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git-svn-id: https://10.10.10.66:8443/svn/MediaProcessPlatform/trunk/mpp@469 6e48237b-75ef-9749-8fc9-41990f28c85a
This commit is contained in:
DingWei
2015-11-19 01:18:21 +00:00
parent 8f72b64abc
commit 88e941aa2f
1 changed files with 3 additions and 17 deletions
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20
mpp/hal/rkdec/h264d/hal_h264d_rkv_reg.c
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@@ -329,7 +329,6 @@ __RETURN:
//extern "C" //extern "C"
MPP_RET rkv_h264d_start(void *hal, HalTaskInfo *task) MPP_RET rkv_h264d_start(void *hal, HalTaskInfo *task)
{ {
RK_U32 i = 0;
RK_U32 *p_regs = NULL; RK_U32 *p_regs = NULL;
MPP_RET ret = MPP_ERR_UNKNOW; MPP_RET ret = MPP_ERR_UNKNOW;
H264dHalCtx_t *p_hal = (H264dHalCtx_t *)hal; H264dHalCtx_t *p_hal = (H264dHalCtx_t *)hal;
@@ -346,16 +345,10 @@ MPP_RET rkv_h264d_start(void *hal, HalTaskInfo *task)
p_regs[65] = 0; p_regs[65] = 0;
p_regs[66] = 0; p_regs[66] = 0;
p_regs[67] = 0x000000ff; // disable fpga reset p_regs[67] = 0x000000ff; // disable fpga reset
p_regs[44] = 0; // 0xffff_ffff, debug enable p_regs[44] = 0; // 0xffff_ffff, debug enable
p_regs[77] = 0; // 0xffff_dfff, debug enable p_regs[77] = 0; // 0xffff_dfff, debug enable
p_regs[1] = 0x00000021; // run hardware p_regs[1] = 0x00000021; // run hardware
mpp_log("---input register ----- \n");
for (i = 0; i<77;i++ )
{
mpp_log("reg[%2d]=%08x \n", i, p_regs[i]);
}
#ifdef ANDROID #ifdef ANDROID
if (VPUClientSendReg(p_hal->vpu_socket, (RK_U32 *)p_regs, DEC_RKV_REGISTERS)) { if (VPUClientSendReg(p_hal->vpu_socket, (RK_U32 *)p_regs, DEC_RKV_REGISTERS)) {
ret = MPP_ERR_VPUHW; ret = MPP_ERR_VPUHW;
@@ -379,7 +372,6 @@ __RETURN:
//extern "C" //extern "C"
MPP_RET rkv_h264d_wait(void *hal, HalTaskInfo *task) MPP_RET rkv_h264d_wait(void *hal, HalTaskInfo *task)
{ {
RK_U32 i = 0;
RK_U32 *ptr = NULL; RK_U32 *ptr = NULL;
MPP_RET ret = MPP_ERR_UNKNOW; MPP_RET ret = MPP_ERR_UNKNOW;
H264dRkvRegs_t *p_regs = NULL; H264dRkvRegs_t *p_regs = NULL;
@@ -401,14 +393,8 @@ MPP_RET rkv_h264d_wait(void *hal, HalTaskInfo *task)
p_hal->iDecodedNum++; p_hal->iDecodedNum++;
(void)wait_ret; (void)wait_ret;
#endif #endif
mpp_log("---output register ----- \n");
ptr = (RK_U32 *)p_hal->regs;
for (i = 0; i<77;i++ )
{
mpp_log("reg[%2d]=%08x \n", i, ptr[i]);
}
p_regs = (H264dRkvRegs_t *)p_hal->regs; p_regs = (H264dRkvRegs_t *)p_hal->regs;
memset(&p_regs->swreg1_int, 0, sizeof(RK_U32)); memset(&p_regs->swreg1_int, 0, sizeof(RK_U32));
FunctionOut(p_hal->logctx.parr[RUN_HAL]); FunctionOut(p_hal->logctx.parr[RUN_HAL]);