From 7e1a19a5412a554c07ae3c1a4417d62361efb6b7 Mon Sep 17 00:00:00 2001 From: Ding Wei Date: Thu, 25 Nov 2021 08:35:28 +0800 Subject: [PATCH] [hal_vdpu34x]: Add timeout register definition rk3588 vdpu38x (vdpu34x) add timeout register. Change-Id: I0517c14054b52eb7179f8ec691bcc5dea5deef5f Signed-off-by: Ding Wei Signed-off-by: Herman Chen --- mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c | 1 + mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c | 1 + mpp/hal/rkdec/inc/vdpu34x_com.h | 5 +++++ mpp/hal/rkdec/vp9d/hal_vp9d_vdpu34x.c | 2 ++ 4 files changed, 9 insertions(+) diff --git a/mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c b/mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c index 97436477..27833b70 100644 --- a/mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c +++ b/mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c @@ -644,6 +644,7 @@ static MPP_RET init_common_regs(Vdpu34xH264dRegSet *regs) common->reg026.swreg_block_gating_e = 0xffff; common->reg026.block_gating_en_l2 = 0xf; common->reg026.reg_cfg_gating_en = 1; + common->reg032_timeout_threshold = 0x0fffffff; common->reg011.dec_clkgate_e = 1; common->reg011.dec_e_strmd_clkgate_dis = 0; diff --git a/mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c b/mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c index 433c046e..ff3c3c8b 100644 --- a/mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c +++ b/mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c @@ -1009,6 +1009,7 @@ static MPP_RET hal_h265d_vdpu34x_gen_regs(void *hal, HalTaskInfo *syn) hw_regs->common.reg026.swreg_block_gating_e = 0xffff; hw_regs->common.reg026.block_gating_en_l2 = 0xf; hw_regs->common.reg026.reg_cfg_gating_en = 1; + hw_regs->common.reg032_timeout_threshold = 0x0fffffff; valid_ref = hw_regs->common_addr.reg130_decout_base; reg_cxt->error_index = dxva_cxt->pp.CurrPic.Index7Bits; diff --git a/mpp/hal/rkdec/inc/vdpu34x_com.h b/mpp/hal/rkdec/inc/vdpu34x_com.h index ee8fe20c..f9c1a72b 100644 --- a/mpp/hal/rkdec/inc/vdpu34x_com.h +++ b/mpp/hal/rkdec/inc/vdpu34x_com.h @@ -219,6 +219,11 @@ typedef struct Vdpu34xRegCommon_t { RK_U32 reserve : 11; RK_U32 reg_cfg_gating_en : 1; } reg026; + + /* NOTE: reg027 ~ reg032 are added in vdpu38x at rk3588 */ + RK_U32 reg027_031[5]; + /* NOTE: timeout must be config in vdpu38x */ + RK_U32 reg032_timeout_threshold; } Vdpu34xRegCommon; /* base: OFFSET_COMMON_ADDR_REGS */ diff --git a/mpp/hal/rkdec/vp9d/hal_vp9d_vdpu34x.c b/mpp/hal/rkdec/vp9d/hal_vp9d_vdpu34x.c index ce1e5b61..1df7d6dd 100644 --- a/mpp/hal/rkdec/vp9d/hal_vp9d_vdpu34x.c +++ b/mpp/hal/rkdec/vp9d/hal_vp9d_vdpu34x.c @@ -740,6 +740,8 @@ static MPP_RET hal_vp9d_vdpu34x_gen_regs(void *hal, HalTaskInfo *task) vp9_hw_regs->common.reg010.dec_e = 1; vp9_hw_regs->common.reg011.dec_timeout_e = 1; vp9_hw_regs->common.reg011.buf_empty_en = 1; + vp9_hw_regs->common.reg013.timeout_mode = 1; + vp9_hw_regs->common.reg032_timeout_threshold = 0x0fffffff; //last info update hw_ctx->ls_info.abs_delta_last = pic_param->stVP9Segments.abs_delta;