From 7307f1bcc239b1cae06eaa541c14c4c7a87bfa1c Mon Sep 17 00:00:00 2001 From: Herman Chen Date: Wed, 18 Nov 2020 09:10:44 +0800 Subject: [PATCH] [vdpu34x]: Add clock gating by default Change-Id: Idede84f638db679ac06af7bcdf526a9a3b7225bb Signed-off-by: Herman Chen --- mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c | 4 ++++ mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c b/mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c index 54bd4899..9f303fe4 100644 --- a/mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c +++ b/mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c @@ -587,6 +587,10 @@ static MPP_RET set_registers(H264dHalCtx_t *p_hal, Vdpu34xH264dRegSet *regs, Hal common->dec_cabac_err_en_lowbits.cabac_err_en_lowbits = 0xffffdfff; common->dec_cabac_err_en_highbits.cabac_err_en_highbits = 0x3ffbf9ff; + common->dec_block_gating_en.swreg_block_gating_e = 0xffff; + common->dec_block_gating_en.block_gating_en_l2 = 0xf; + common->dec_block_gating_en.reg_cfg_gating_en = 1; + common->dec_imp_en.dec_clkgate_e = 1; common->dec_imp_en.dec_e_strmd_clkgate_dis = 0; common->dec_imp_en.dec_timeout_e = 1; diff --git a/mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c b/mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c index 5757ac84..6aebcaa7 100644 --- a/mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c +++ b/mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c @@ -869,6 +869,10 @@ static MPP_RET hal_h265d_vdpu34x_gen_regs(void *hal, HalTaskInfo *syn) hw_regs->common.dec_cabac_err_en_lowbits.cabac_err_en_lowbits = 0xffffdfff; hw_regs->common.dec_cabac_err_en_highbits.cabac_err_en_highbits = 0x3ffbf9ff; + hw_regs->common.dec_block_gating_en.swreg_block_gating_e = 0xffff; + hw_regs->common.dec_block_gating_en.block_gating_en_l2 = 0xf; + hw_regs->common.dec_block_gating_en.reg_cfg_gating_en = 1; + valid_ref = hw_regs->common_addr.decout_base.decout_base; hw_regs->common_addr.error_ref_base.error_ref_base = valid_ref; for (i = 0; i < (RK_S32)MPP_ARRAY_ELEMS(dxva_cxt->pp.RefPicList); i++) {