diff --git a/mpp/hal/rkdec/avs2d/hal_avs2d_rkv.c b/mpp/hal/rkdec/avs2d/hal_avs2d_rkv.c
index 4d31217d..052cc018 100644
--- a/mpp/hal/rkdec/avs2d/hal_avs2d_rkv.c
+++ b/mpp/hal/rkdec/avs2d/hal_avs2d_rkv.c
@@ -251,11 +251,16 @@ static MPP_RET init_common_regs(Vdpu34xAvs2dRegSet *regs)
     common->reg021.error_deb_en = 0;
     common->reg021.error_intra_mode = 0;
 
-    common->reg024.cabac_err_en_lowbits = 0xffffffdf;
-    common->reg025.cabac_err_en_highbits = 0x3dffffff;
+    if (mpp_get_soc_type() == ROCKCHIP_SOC_RK3588) {
+        common->reg024.cabac_err_en_lowbits = 0;
+        common->reg025.cabac_err_en_highbits = 0;
+        common->reg026.swreg_block_gating_e = 0xfffef;
+    } else {
+        common->reg024.cabac_err_en_lowbits = 0xffffffdf;
+        common->reg025.cabac_err_en_highbits = 0x3dffffff;
+        common->reg026.swreg_block_gating_e = 0xfffff;
+    }
 
-    common->reg026.swreg_block_gating_e =
-        (mpp_get_soc_type() == ROCKCHIP_SOC_RK3588) ? 0xfffef : 0xfffff;
     common->reg026.reg_cfg_gating_en = 1;
     common->reg032_timeout_threshold = 0x3fffff;
 
diff --git a/mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c b/mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c
index d6a0d639..7e95de0e 100644
--- a/mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c
+++ b/mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c
@@ -683,10 +683,15 @@ static MPP_RET init_common_regs(Vdpu34xH264dRegSet *regs)
     common->reg021.inter_error_prc_mode = 0;
     common->reg021.error_intra_mode = 1;
 
-    common->reg024.cabac_err_en_lowbits = 0xffffffff;
-    common->reg025.cabac_err_en_highbits = 0x3ff3ffff;
-    common->reg026.swreg_block_gating_e =
-        (mpp_get_soc_type() == ROCKCHIP_SOC_RK3588) ? 0xfffef : 0xfffff;
+    if (mpp_get_soc_type() == ROCKCHIP_SOC_RK3588) {
+        common->reg024.cabac_err_en_lowbits = 0;
+        common->reg025.cabac_err_en_highbits = 0;
+        common->reg026.swreg_block_gating_e = 0xfffef;
+    } else {
+        common->reg024.cabac_err_en_lowbits = 0xffffffff;
+        common->reg025.cabac_err_en_highbits = 0x3ff3ffff;
+        common->reg026.swreg_block_gating_e = 0xfffff;
+    }
     common->reg026.reg_cfg_gating_en = 1;
     common->reg032_timeout_threshold = 0x3ffff;
 
diff --git a/mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c b/mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c
index f6e03ad4..972e26e4 100644
--- a/mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c
+++ b/mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c
@@ -1036,13 +1036,18 @@ static MPP_RET hal_h265d_vdpu34x_gen_regs(void *hal,  HalTaskInfo *syn)
                                                   ? 0 : 1;
     hw_regs->common.reg012.colmv_compress_en    = 1;
 
-    hw_regs->common.reg024.cabac_err_en_lowbits = 0xffffdfff;
-    hw_regs->common.reg025.cabac_err_en_highbits = 0x3ffbf9ff;
+    if (mpp_get_soc_type() == ROCKCHIP_SOC_RK3588) {
+        hw_regs->common.reg026.swreg_block_gating_e = 0xfffef;
+        hw_regs->common.reg024.cabac_err_en_lowbits = 0;
+        hw_regs->common.reg025.cabac_err_en_highbits = 0;
+    } else {
+        hw_regs->common.reg024.cabac_err_en_lowbits = 0xffffdfff;
+        hw_regs->common.reg025.cabac_err_en_highbits = 0x3ffbf9ff;
+        hw_regs->common.reg026.swreg_block_gating_e = 0xfffff;
+    }
 
     hw_regs->common.reg011.dec_clkgate_e    = 1;
     hw_regs->common.reg011.dec_e_strmd_clkgate_dis = 0;
-    hw_regs->common.reg026.swreg_block_gating_e =
-        (mpp_get_soc_type() == ROCKCHIP_SOC_RK3588) ? 0xfffef : 0xfffff;
     hw_regs->common.reg026.reg_cfg_gating_en = 1;
     hw_regs->common.reg032_timeout_threshold = 0x3ffff;