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fix[mpp_dec]: Optimize HDR meta process

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Change-Id: I57d9d0c34d7085ff9c72b996c78835e2d49e0238
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
This commit is contained in:
xueman.ruan
2024-03-14 15:06:10 +08:00
parent b37a668bad
commit 3cf926cd2c
11 changed files with 58 additions and 27 deletions
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12
inc/rk_hdr_meta_com.h
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@@ -20,11 +20,11 @@
#include "rk_type.h"
typedef enum HdrCodecType_e {
HDR_CODEC_UNSPECIFIED = -1,
HDR_AVS2 = 0,
HDR_HEVC = 1,
HDR_H264 = 2,
HDR_AV1 = 3,
HDR_CODEC_BUT,
} HdrCodecType;
typedef enum HdrFormat_e {
@@ -113,6 +113,14 @@ typedef struct RkMetaHdrHeader_t {
RK_U32 payload[];
} RkMetaHdrHeader;
void fill_hdr_meta_to_frame(MppFrame frame, HdrCodecType codec_type);
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
void fill_hdr_meta_to_frame(MppFrame frame, MppCodingType in_type);
#ifdef __cplusplus
}
#endif
#endif

19
mpp/base/mpp_dec_hdr_meta.c
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@@ -28,7 +28,7 @@ static RK_U32 hdr_get_offset_from_frame(MppFrame frame)
return mpp_frame_get_buf_size(frame);
}
void fill_hdr_meta_to_frame(MppFrame frame, HdrCodecType codec_type)
void fill_hdr_meta_to_frame(MppFrame frame, MppCodingType in_type)
{
RK_U32 off = hdr_get_offset_from_frame(frame);
MppBuffer buf = mpp_frame_get_buffer(frame);
@@ -43,6 +43,7 @@ void fill_hdr_meta_to_frame(MppFrame frame, HdrCodecType codec_type)
MppMeta meta = NULL;
RK_U32 max_size = mpp_buffer_get_size(buf);
RK_U32 static_size, dynamic_size = 0, total_size = 0;
HdrCodecType codec_type = HDR_CODEC_UNSPECIFIED;
if (!ptr || !buf) {
mpp_err_f("buf is null!\n");
@@ -71,6 +72,22 @@ void fill_hdr_meta_to_frame(MppFrame frame, HdrCodecType codec_type)
hdr_static_meta_header->size = static_size;
hdr_static_meta_header->message_index = msg_idx++;
switch (in_type) {
case MPP_VIDEO_CodingAVS2 : {
codec_type = HDR_AVS2;
} break;
case MPP_VIDEO_CodingHEVC : {
codec_type = HDR_HEVC;
} break;
case MPP_VIDEO_CodingAVC : {
codec_type = HDR_H264;
} break;
case MPP_VIDEO_CodingAV1 : {
codec_type = HDR_AV1;
} break;
default : break;
}
/* For payload identification */
hdr_static_meta_header->hdr_payload_type = STATIC;
hdr_static_meta_header->video_format = codec_type;

2
mpp/codec/dec/av1/av1d_parser.c
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@@ -617,7 +617,7 @@ static MPP_RET set_output_frame(Av1CodecContext *ctx)
mpp_frame_set_hdr_dynamic_meta(frame, s->hdr_dynamic_meta);
s->hdr_dynamic = 0;
if (s->raw_frame_header->show_existing_frame)
fill_hdr_meta_to_frame(frame, HDR_AV1);
fill_hdr_meta_to_frame(frame, MPP_VIDEO_CodingAV1);
}
mpp_frame_set_pts(frame, s->pts);
mpp_buf_slot_set_flag(s->slots, s->cur_frame.slot_index, SLOT_QUEUE_USE);

12
mpp/codec/mpp_dec_no_thread.cpp
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@@ -23,6 +23,7 @@
#include "mpp_dec_debug.h"
#include "mpp_dec_vproc.h"
#include "mpp_dec_no_thread.h"
#include "rk_hdr_meta_com.h"
MPP_RET mpp_dec_decode(MppDec ctx, MppPacket packet)
{
@@ -271,6 +272,17 @@ MPP_RET mpp_dec_decode(MppDec ctx, MppPacket packet)
task->hal_frm_buf_out = hal_buf_out;
}
{
MppFrame mframe = NULL;
mpp_buf_slot_get_prop(frame_slots, task_dec->output, SLOT_FRAME_PTR, &mframe);
if (MPP_FRAME_FMT_IS_HDR(mpp_frame_get_fmt(mframe)) &&
dec->cfg.base.enable_hdr_meta) {
fill_hdr_meta_to_frame(mframe, dec->coding);
}
}
task->wait.dec_pic_match = (NULL == task->hal_frm_buf_out);
if (task->wait.dec_pic_match)
return MPP_NOK;

12
mpp/codec/mpp_dec_normal.cpp
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@@ -23,6 +23,7 @@
#include "mpp_dec_debug.h"
#include "mpp_dec_vproc.h"
#include "mpp_dec_normal.h"
#include "rk_hdr_meta_com.h"
static RK_S32 ts_cmp(void *priv, const struct list_head *a, const struct list_head *b)
{
@@ -609,6 +610,17 @@ static MPP_RET try_proc_dec_task(Mpp *mpp, DecTask *task)
dec_dbg_detail("detail: %p check output buffer %p\n", dec, hal_buf_out);
{
MppFrame mframe = NULL;
mpp_buf_slot_get_prop(frame_slots, output, SLOT_FRAME_PTR, &mframe);
if (MPP_FRAME_FMT_IS_HDR(mpp_frame_get_fmt(mframe)) &&
dec->cfg.base.enable_hdr_meta) {
fill_hdr_meta_to_frame(mframe, dec->coding);
}
}
// update codec info
if (!dec->info_updated && dec->dev) {
MppFrame frame = NULL;

4
mpp/hal/rkdec/avs2d/hal_avs2d_rkv.c
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@@ -30,7 +30,6 @@
#include "hal_avs2d_rkv.h"
#include "mpp_dec_cb_param.h"
#include "vdpu34x_avs2d.h"
#include "rk_hdr_meta_com.h"
#define VDPU34X_FAST_REG_SET_CNT (3)
#define MAX_REF_NUM (8)
@@ -467,8 +466,7 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu34xAvs2dRegSet *p_regs,
p_regs->common_addr.reg129_rlcwrite_base = p_regs->common_addr.reg128_rlc_base;
common->reg016_str_len = MPP_ALIGN(mpp_packet_get_length(task_dec->input_packet), 16) + 64;
}
if (MPP_FRAME_FMT_IS_HDR(mpp_frame_get_fmt(mframe)) && p_hal->cfg->base.enable_hdr_meta)
fill_hdr_meta_to_frame(mframe, HDR_AVS2);
return ret;
}

4
mpp/hal/rkdec/avs2d/hal_avs2d_vdpu382.c
View File

@@ -30,7 +30,6 @@
#include "hal_avs2d_vdpu382.h"
#include "mpp_dec_cb_param.h"
#include "vdpu382_avs2d.h"
#include "rk_hdr_meta_com.h"
#define VDPU382_FAST_REG_SET_CNT (3)
#define MAX_REF_NUM (8)
@@ -523,9 +522,6 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu382Avs2dRegSet *p_regs,
common->reg016_str_len = MPP_ALIGN(mpp_packet_get_length(task_dec->input_packet), 16) + 64;
}
if (MPP_FRAME_FMT_IS_HDR(mpp_frame_get_fmt(mframe)) && p_hal->cfg->base.enable_hdr_meta)
fill_hdr_meta_to_frame(mframe, HDR_AVS2);
/* set scale down info */
if (mpp_frame_get_thumbnail_en(mframe)) {
p_regs->avs2d_addr.scale_down_luma_base = p_regs->common_addr.reg130_decout_base;

4
mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c
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@@ -30,7 +30,6 @@
#include "hal_h265d_com.h"
#include "hal_h265d_vdpu34x.h"
#include "vdpu34x_h265d.h"
#include "rk_hdr_meta_com.h"
/* #define dump */
#ifdef dump
@@ -988,9 +987,6 @@ static MPP_RET hal_h265d_vdpu34x_gen_regs(void *hal, HalTaskInfo *syn)
hw_regs->common.reg019.uv_hor_virstride = stride_uv >> 4;
hw_regs->common.reg020_y_virstride.y_virstride = virstrid_y >> 4;
}
if (MPP_FRAME_FMT_IS_HDR(mpp_frame_get_fmt(mframe)) && reg_ctx->cfg->base.enable_hdr_meta)
fill_hdr_meta_to_frame(mframe, HDR_HEVC);
}
mpp_buf_slot_get_prop(reg_ctx->slots, dxva_cxt->pp.CurrPic.Index7Bits,
SLOT_BUFFER, &framebuf);

4
mpp/hal/rkdec/h265d/hal_h265d_vdpu382.c
View File

@@ -30,7 +30,6 @@
#include "hal_h265d_com.h"
#include "hal_h265d_vdpu382.h"
#include "vdpu382_h265d.h"
#include "rk_hdr_meta_com.h"
/* #define dump */
#ifdef dump
@@ -782,9 +781,6 @@ static MPP_RET hal_h265d_vdpu382_gen_regs(void *hal, HalTaskInfo *syn)
hw_regs->common.reg019.uv_hor_virstride = stride_uv >> 4;
hw_regs->common.reg020_y_virstride.y_virstride = virstrid_y >> 4;
}
if (MPP_FRAME_FMT_IS_HDR(mpp_frame_get_fmt(mframe)) && reg_ctx->cfg->base.enable_hdr_meta)
fill_hdr_meta_to_frame(mframe, HDR_HEVC);
}
mpp_buf_slot_get_prop(reg_ctx->slots, dxva_cxt->pp.CurrPic.Index7Bits,
SLOT_BUFFER, &framebuf);

3
mpp/hal/vpu/av1d/hal_av1d_vdpu.c
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@@ -35,7 +35,6 @@
#include "av1d_syntax.h"
#include "film_grain_noise_table.h"
#include "av1d_common.h"
#include "rk_hdr_meta_com.h"
#define VDPU_FAST_REG_SET_CNT 3
#define AV1_MAX_TILES 128
@@ -1916,8 +1915,6 @@ MPP_RET vdpu_av1d_gen_regs(void *hal, HalTaskInfo *task)
tile_out_buf = hal_bufs_get_buf(ctx->tile_out_bufs, task->dec.output);
hor_stride = mpp_frame_get_hor_stride(mframe);
ver_stride = mpp_frame_get_ver_stride(mframe);
if (MPP_FRAME_FMT_IS_HDR(mpp_frame_get_fmt(mframe)) && p_hal->cfg->base.enable_hdr_meta)
fill_hdr_meta_to_frame(mframe, HDR_AV1);
ctx->ver_stride = ver_stride;

1
mpp/hal/vpu/av1d/hal_av1d_vdpu383.c
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@@ -24,7 +24,6 @@
#include "av1d_syntax.h"
#include "film_grain_noise_table.h"
#include "av1d_common.h"
#include "rk_hdr_meta_com.h"
#define VDPU383_UNCMPS_HEADER_SIZE (MPP_ALIGN(5159, 128) / 8) // byte, 5159 bit
#define VDPU383_RCB_STRMD_ROW_LEN (MPP_ALIGN(dxva->width, 8) / 8 * 100)