From 398b4cb76fdec425e9c2de55d3b6cbb6b6f8e2bd Mon Sep 17 00:00:00 2001 From: Chandler Chen Date: Wed, 6 Mar 2024 15:30:03 +0800 Subject: [PATCH] fix[vdpu383]: Fix av1 rkfbc output error Signed-off-by: Chandler Chen Change-Id: I6ea36b643f4b3dcc4e29dc6ff5f8fe0fc4c668c5 --- mpp/hal/vpu/av1d/hal_av1d_vdpu383.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/mpp/hal/vpu/av1d/hal_av1d_vdpu383.c b/mpp/hal/vpu/av1d/hal_av1d_vdpu383.c index 8a8c5993..bbcd4560 100644 --- a/mpp/hal/vpu/av1d/hal_av1d_vdpu383.c +++ b/mpp/hal/vpu/av1d/hal_av1d_vdpu383.c @@ -2230,21 +2230,23 @@ MPP_RET vdpu383_av1d_gen_regs(void *hal, HalTaskInfo *task) RK_U32 fbd_offset; regs->ctrl_regs.reg9.fbc_e = 1; - regs->av1d_paras.reg68_hor_virstride = pixel_width / 64; + regs->av1d_paras.reg68_hor_virstride = MPP_ALIGN(hor_virstride, 64) / 64; fbd_offset = regs->av1d_paras.reg68_hor_virstride * MPP_ALIGN(ver_virstride, 8) * 4; regs->av1d_addrs.reg193_fbc_payload_offset = fbd_offset; + regs->av1d_paras.reg80_error_ref_hor_virstride = regs->av1d_paras.reg68_hor_virstride; } else if (MPP_FRAME_FMT_IS_TILE(mpp_frame_get_fmt(mframe))) { regs->ctrl_regs.reg9.tile_e = 1; regs->av1d_paras.reg68_hor_virstride = hor_virstride * 6 / 16; regs->av1d_paras.reg70_y_virstride = (y_virstride + uv_virstride) / 16; + regs->av1d_paras.reg80_error_ref_hor_virstride = hor_virstride >> 4; } else { regs->ctrl_regs.reg9.fbc_e = 0; regs->av1d_paras.reg68_hor_virstride = hor_virstride >> 4; regs->av1d_paras.reg69_raster_uv_hor_virstride = hor_virstride >> 4; regs->av1d_paras.reg70_y_virstride = y_virstride >> 4; + regs->av1d_paras.reg80_error_ref_hor_virstride = hor_virstride >> 4; } /* error */ - regs->av1d_paras.reg80_error_ref_hor_virstride = hor_virstride >> 4; regs->av1d_paras.reg81_error_ref_raster_uv_hor_virstride = hor_virstride >> 4; regs->av1d_paras.reg82_error_ref_virstride = y_virstride >> 4; } @@ -2256,7 +2258,7 @@ MPP_RET vdpu383_av1d_gen_regs(void *hal, HalTaskInfo *task) if (mframe) { hor_virstride = mpp_frame_get_hor_stride(mframe); if (MPP_FRAME_FMT_IS_FBC(mpp_frame_get_fmt(mframe))) { - hor_virstride = MPP_ALIGN(hor_virstride, 64) / 64; + hor_virstride = MPP_ALIGN(hor_virstride, 64) / 4; } ver_virstride = mpp_frame_get_ver_stride(mframe); y_virstride = hor_virstride * ver_virstride;