mirror of
https://github.com/nyanmisaka/mpp.git
synced 2025-10-06 17:46:50 +08:00
[HAL_H264E_RKV]: complete buffers allocation
1. add HalEncTask.flags.err to decribe errors 2. support alloc error treatment 3. support frame rate configuration 4. user tool to format file mpi_enc_test.c 5. allocate buffer according to color space Change-Id: I17a89039504390bf1f2ff664a0aa4075b04d33ee Signed-off-by: Lin Kesheng <lks@rock-chips.com>
This commit is contained in:
@@ -231,8 +231,7 @@ typedef struct {
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RK_U32 pictureRc; /* Adjust QP between pictures, [0,1] */
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RK_U32 pictureRc; /* Adjust QP between pictures, [0,1] */
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RK_U32 mbRc; /* Adjust QP inside picture, [0,1] */
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RK_U32 mbRc; /* Adjust QP inside picture, [0,1] */
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RK_U32 pictureSkip; /* Allow rate control to skip pictures, [0,1] */
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RK_U32 pictureSkip; /* Allow rate control to skip pictures, [0,1] */
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RK_U32 intraPicRate; /* intra period */
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RK_U32 intraPicRate; /* intra period, namely keyframe_max_interval */
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RK_U32 keyframe_max_interval;
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RK_S32 qpHdr; /* QP for next encoded picture, [-1..51]
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RK_S32 qpHdr; /* QP for next encoded picture, [-1..51]
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* -1 = Let rate control calculate initial QP
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* -1 = Let rate control calculate initial QP
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* This QP is used for all pictures if
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* This QP is used for all pictures if
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@@ -339,7 +339,6 @@ MPP_RET h264e_config(void *ctx, RK_S32 cmd, void *param)
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else
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else
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enc_rc_cfg->intraPicRate = 30;
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enc_rc_cfg->intraPicRate = 30;
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enc_rc_cfg->keyframe_max_interval = mpp_cfg->gop;
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enc_rc_cfg->bitPerSecond = mpp_cfg->bps;
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enc_rc_cfg->bitPerSecond = mpp_cfg->bps;
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enc_rc_cfg->gopLen = mpp_cfg->gop;
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enc_rc_cfg->gopLen = mpp_cfg->gop;
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enc_rc_cfg->fixedIntraQp = 0;
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enc_rc_cfg->fixedIntraQp = 0;
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@@ -377,7 +376,8 @@ MPP_RET h264e_config(void *ctx, RK_S32 cmd, void *param)
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info->input_image_format = enc_cfg->input_image_format;
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info->input_image_format = enc_cfg->input_image_format;
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info->profile_idc = enc_cfg->profile;
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info->profile_idc = enc_cfg->profile;
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info->level_idc = enc_cfg->level;
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info->level_idc = enc_cfg->level;
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info->keyframe_max_interval = enc_rc_cfg->keyframe_max_interval;
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info->keyframe_max_interval = enc_rc_cfg->intraPicRate;
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info->frame_rate = enc_cfg->frameRateNum;
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info->second_chroma_qp_index_offset = enc_cfg->second_chroma_qp_index_offset;
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info->second_chroma_qp_index_offset = enc_cfg->second_chroma_qp_index_offset;
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info->pps_id = enc_cfg->pps_id;
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info->pps_id = enc_cfg->pps_id;
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@@ -95,6 +95,7 @@ typedef struct h264e_control_extra_info_cfg_t {
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RK_S32 transform8x8_mode;
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RK_S32 transform8x8_mode;
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RK_S32 chroma_qp_index_offset;
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RK_S32 chroma_qp_index_offset;
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RK_S32 pic_init_qp;
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RK_S32 pic_init_qp;
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RK_S32 frame_rate;
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//RK_S32 rotation_enable; //0: 0/180 degrees, 1: 90/270 degrees //TODO: add rotation
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//RK_S32 rotation_enable; //0: 0/180 degrees, 1: 90/270 degrees //TODO: add rotation
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/* additional cfg only for rkv */
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/* additional cfg only for rkv */
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@@ -86,6 +86,14 @@ typedef struct MppSyntax_t {
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* +----------------------+ +----v----+
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* +----------------------+ +----v----+
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*/
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*/
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#define HAL_ENC_TASK_ERR_INIT 0x00000001
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#define HAL_ENC_TASK_ERR_ALLOC 0x00000010
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#define HAL_ENC_TASK_ERR_EXTRAINFO 0x00000100
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#define HAL_ENC_TASK_ERR_GENREG 0x00001000
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#define HAL_ENC_TASK_ERR_START 0x00010000
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#define HAL_ENC_TASK_ERR_WAIT 0x00100000
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typedef union HalDecTaskFlag_t {
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typedef union HalDecTaskFlag_t {
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RK_U32 val;
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RK_U32 val;
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struct {
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struct {
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@@ -96,6 +104,10 @@ typedef union HalDecTaskFlag_t {
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};
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};
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} HalDecTaskFlag;
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} HalDecTaskFlag;
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typedef struct HalEncTaskFlag_t {
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RK_U32 err;
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} HalEncTaskFlag;
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typedef struct HalDecTask_t {
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typedef struct HalDecTask_t {
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// set by parser to signal that it is valid
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// set by parser to signal that it is valid
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RK_U32 valid;
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RK_U32 valid;
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@@ -135,6 +147,9 @@ typedef struct HalEncTask_t {
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MppBuffer input;
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MppBuffer input;
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RK_U32 is_intra;
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RK_U32 is_intra;
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HalEncTaskFlag flags;
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} HalEncTask;
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} HalEncTask;
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@@ -66,7 +66,7 @@ extern RK_U32 h264e_hal_log_mode;
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#define h264e_hal_log_err(fmt, ...) \
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#define h264e_hal_log_err(fmt, ...) \
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do {\
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do {\
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if (h264e_hal_log_mode & H264E_HAL_LOG_ERROR)\
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if (h264e_hal_log_mode & H264E_HAL_LOG_ERROR)\
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{ mpp_err(fmt, ## __VA_ARGS__); }\
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{ mpp_err_f(fmt, ## __VA_ARGS__); }\
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} while (0)
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} while (0)
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#define h264e_hal_log_detail(fmt, ...) \
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#define h264e_hal_log_detail(fmt, ...) \
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@@ -1469,12 +1469,40 @@ static MPP_RET hal_h264e_rkv_allocate_buffers(h264e_hal_context *ctx, h264e_synt
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RK_S32 k = 0;
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RK_S32 k = 0;
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h264e_hal_rkv_buffers *buffers = (h264e_hal_rkv_buffers *)ctx->buffers;
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h264e_hal_rkv_buffers *buffers = (h264e_hal_rkv_buffers *)ctx->buffers;
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RK_U32 num_mbs_oneframe = (syn->pic_luma_width + 15) / 16 * ((syn->pic_luma_height + 15) / 16);
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RK_U32 num_mbs_oneframe = (syn->pic_luma_width + 15) / 16 * ((syn->pic_luma_height + 15) / 16);
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RK_U32 frame_size = ((syn->pic_luma_width + 15) & (~15)) * ((syn->pic_luma_height + 15) & (~15)) * 3 / 2;
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RK_U32 frame_size = ((syn->pic_luma_width + 15) & (~15)) * ((syn->pic_luma_height + 15) & (~15)); //only Y component
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h264e_hal_rkv_dpb_ctx *dpb_ctx = (h264e_hal_rkv_dpb_ctx *)ctx->dpb_ctx;
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h264e_hal_rkv_dpb_ctx *dpb_ctx = (h264e_hal_rkv_dpb_ctx *)ctx->dpb_ctx;
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h264e_hal_rkv_frame *frame_buf = dpb_ctx->frame_buf;
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h264e_hal_rkv_frame *frame_buf = dpb_ctx->frame_buf;
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RK_U32 all_intra_mode = sps->keyframe_max_interval == 1;
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RK_U32 all_intra_mode = sps->keyframe_max_interval == 1;
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h264e_hal_debug_enter();
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h264e_hal_debug_enter();
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//TODO: reduce buf size
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switch ((h264e_hal_rkv_csp)syn->input_image_format) {
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case H264E_RKV_CSP_YUV420P:
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case H264E_RKV_CSP_YUV420SP: {
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frame_size = frame_size * 3 / 2;
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break;
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}
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case H264E_RKV_CSP_YUV422P:
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case H264E_RKV_CSP_YUV422SP:
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case H264E_RKV_CSP_YUYV422:
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case H264E_RKV_CSP_UYVY422:
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case H264E_RKV_CSP_BGR565: {
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frame_size *= 2;
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break;
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}
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case H264E_RKV_CSP_BGR888: {
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frame_size *= 3;
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break;
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}
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case H264E_RKV_CSP_BGRA8888: {
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frame_size *= 4;
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break;
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}
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default: {
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h264e_hal_log_err("unvalid src color space: %d, return early", syn->input_image_format);
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return MPP_NOK;
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}
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}
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for (k = 0; k < H264E_HAL_RKV_BUF_GRP_BUTT; k++) {
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for (k = 0; k < H264E_HAL_RKV_BUF_GRP_BUTT; k++) {
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if (MPP_OK != mpp_buffer_group_get_internal(&buffers->hw_buf_grp[k], MPP_BUFFER_TYPE_ION)) {
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if (MPP_OK != mpp_buffer_group_get_internal(&buffers->hw_buf_grp[k], MPP_BUFFER_TYPE_ION)) {
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h264e_hal_log_err("buf group[%d] get failed", k);
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h264e_hal_log_err("buf group[%d] get failed", k);
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@@ -1606,7 +1634,7 @@ MPP_RET hal_h264e_rkv_set_sps(h264e_hal_sps *sps, h264e_hal_param *par, h264e_co
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RK_S32 crop_rect_top = 0;
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RK_S32 crop_rect_top = 0;
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RK_S32 crop_rect_bottom = 0;
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RK_S32 crop_rect_bottom = 0;
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RK_S32 i_timebase_num = 1;
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RK_S32 i_timebase_num = 1;
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RK_S32 i_timebase_den = 25;
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RK_S32 i_timebase_den = cfg->frame_rate;
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RK_S32 b_vfr_input = 0;
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RK_S32 b_vfr_input = 0;
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RK_S32 i_nal_hrd = 0;
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RK_S32 i_nal_hrd = 0;
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RK_S32 b_pic_struct = 0;
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RK_S32 b_pic_struct = 0;
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@@ -3038,6 +3066,7 @@ MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
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h264e_hal_rkv_coveragetest_cfg *test_cfg = (h264e_hal_rkv_coveragetest_cfg *)ctx->test_cfg;
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h264e_hal_rkv_coveragetest_cfg *test_cfg = (h264e_hal_rkv_coveragetest_cfg *)ctx->test_cfg;
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h264e_hal_sps *sps = &extra_info->sps;
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h264e_hal_sps *sps = &extra_info->sps;
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h264e_hal_pps *pps = &extra_info->pps;
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h264e_hal_pps *pps = &extra_info->pps;
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HalEncTask *enc_task = &task->enc;
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RK_S32 pic_width_align16 = (syn->pic_luma_width + 15) & (~15);
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RK_S32 pic_width_align16 = (syn->pic_luma_width + 15) & (~15);
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RK_S32 pic_height_align16 = (syn->pic_luma_height + 15) & (~15);
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RK_S32 pic_height_align16 = (syn->pic_luma_height + 15) & (~15);
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@@ -3051,11 +3080,13 @@ MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
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h264e_hal_debug_enter();
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h264e_hal_debug_enter();
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hal_h264e_rkv_dump_mpp_syntax_in(syn, ctx);
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hal_h264e_rkv_dump_mpp_syntax_in(syn, ctx);
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if (MPP_OK != hal_h264e_rkv_validate_syntax(syn, &src_fmt, ctx->frame_cnt % sps->keyframe_max_interval == 0)) {
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enc_task->flags.err = 0;
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h264e_hal_log_err("hal_h264e_rkv_validate_syntax failed");
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}
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ctx->enc_task = task->enc;
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if (MPP_OK != hal_h264e_rkv_validate_syntax(syn, &src_fmt, ctx->frame_cnt % sps->keyframe_max_interval == 0)) {
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h264e_hal_log_err("hal_h264e_rkv_validate_syntax failed, return early");
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enc_task->flags.err |= HAL_ENC_TASK_ERR_GENREG;
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return MPP_NOK;
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}
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hal_h264e_rkv_adjust_param(ctx); //TODO: future expansion
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hal_h264e_rkv_adjust_param(ctx); //TODO: future expansion
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@@ -3063,8 +3094,10 @@ MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
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if (ctx->frame_cnt == 0) {
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if (ctx->frame_cnt == 0) {
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if (MPP_OK != hal_h264e_rkv_allocate_buffers(ctx, syn, sps, test_cfg)) {
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if (MPP_OK != hal_h264e_rkv_allocate_buffers(ctx, syn, sps, test_cfg)) {
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h264e_hal_log_err("hal_h264e_rkv_allocate_buffers failed, free now");
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h264e_hal_log_err("hal_h264e_rkv_allocate_buffers failed, free buffers and return");
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enc_task->flags.err |= HAL_ENC_TASK_ERR_ALLOC;
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hal_h264e_rkv_free_buffers(ctx);
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hal_h264e_rkv_free_buffers(ctx);
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return MPP_ERR_MALLOC;
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}
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}
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}
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}
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@@ -3464,8 +3497,14 @@ MPP_RET hal_h264e_rkv_start(void *hal, HalTaskInfo *task)
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h264e_rkv_reg_set *reg_list = (h264e_rkv_reg_set *)ctx->regs;
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h264e_rkv_reg_set *reg_list = (h264e_rkv_reg_set *)ctx->regs;
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RK_U32 length = 0, k = 0;
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RK_U32 length = 0, k = 0;
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h264e_rkv_ioctl_input *ioctl_info = (h264e_rkv_ioctl_input *)ctx->ioctl_input;
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h264e_rkv_ioctl_input *ioctl_info = (h264e_rkv_ioctl_input *)ctx->ioctl_input;
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HalEncTask *enc_task = &task->enc;
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h264e_hal_debug_enter();
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h264e_hal_debug_enter();
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if (enc_task->flags.err) {
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h264e_hal_log_err("enc_task->flags.err %08x, return early", enc_task->flags.err);
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return MPP_NOK;
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}
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if (ctx->frame_cnt_gen_ready != ctx->num_frames_to_send) {
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if (ctx->frame_cnt_gen_ready != ctx->num_frames_to_send) {
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h264e_hal_log_detail("frame_cnt_gen_ready(%d) != num_frames_to_send(%d), start hardware later",
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h264e_hal_log_detail("frame_cnt_gen_ready(%d) != num_frames_to_send(%d), start hardware later",
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ctx->frame_cnt_gen_ready, ctx->num_frames_to_send);
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ctx->frame_cnt_gen_ready, ctx->num_frames_to_send);
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@@ -3568,9 +3607,14 @@ MPP_RET hal_h264e_rkv_wait(void *hal, HalTaskInfo *task)
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RK_S32 length = (sizeof(reg_out->frame_num) + sizeof(reg_out->elem[0]) * ctx->num_frames_to_send) >> 2;
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RK_S32 length = (sizeof(reg_out->frame_num) + sizeof(reg_out->elem[0]) * ctx->num_frames_to_send) >> 2;
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IOInterruptCB int_cb = ctx->int_cb;
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IOInterruptCB int_cb = ctx->int_cb;
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h264e_feedback *fb = &ctx->feedback;
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h264e_feedback *fb = &ctx->feedback;
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(void)task;
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HalEncTask *enc_task = &task->enc;
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h264e_hal_debug_enter();
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h264e_hal_debug_enter();
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if (enc_task->flags.err) {
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h264e_hal_log_err("enc_task->flags.err %08x, return early", enc_task->flags.err);
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return MPP_NOK;
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}
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if (ctx->frame_cnt_gen_ready != ctx->num_frames_to_send) {
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if (ctx->frame_cnt_gen_ready != ctx->num_frames_to_send) {
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h264e_hal_log_detail("frame_cnt_gen_ready(%d) != num_frames_to_send(%d), wait hardware later",
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h264e_hal_log_detail("frame_cnt_gen_ready(%d) != num_frames_to_send(%d), wait hardware later",
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ctx->frame_cnt_gen_ready, ctx->num_frames_to_send);
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ctx->frame_cnt_gen_ready, ctx->num_frames_to_send);
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@@ -3623,7 +3667,7 @@ MPP_RET hal_h264e_rkv_wait(void *hal, HalTaskInfo *task)
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hal_h264e_rkv_dump_mpp_reg_out(ctx);
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hal_h264e_rkv_dump_mpp_reg_out(ctx);
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hal_h264e_rkv_dump_mpp_feedback(ctx);
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hal_h264e_rkv_dump_mpp_feedback(ctx);
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hal_h264e_rkv_dump_mpp_strm_out(ctx, ctx->enc_task.output);
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hal_h264e_rkv_dump_mpp_strm_out(ctx, enc_task->output);
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h264e_hal_debug_leave();
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h264e_hal_debug_leave();
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return MPP_OK;
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return MPP_OK;
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@@ -1331,6 +1331,8 @@ static void h264e_hal_set_extra_info_cfg(h264e_control_extra_info_cfg *info, h26
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info->keyframe_max_interval = syn->keyframe_max_interval;
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info->keyframe_max_interval = syn->keyframe_max_interval;
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info->second_chroma_qp_index_offset = syn->second_chroma_qp_index_offset;
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info->second_chroma_qp_index_offset = syn->second_chroma_qp_index_offset;
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info->pps_id = syn->pps_id;
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info->pps_id = syn->pps_id;
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info->frame_rate = 30;
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}
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}
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MPP_RET h264e_hal_vpu_test()
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MPP_RET h264e_hal_vpu_test()
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@@ -83,8 +83,8 @@ static MPP_RET fill_yuv_image(RK_U8 *buf, MppEncConfig *mpp_cfg, RK_U32 frame_co
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p = buf_c;
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p = buf_c;
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for (y = 0; y < height / 2; y++, p += hor_stride) {
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for (y = 0; y < height / 2; y++, p += hor_stride) {
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for (x = 0; x < width / 2; x++) {
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for (x = 0; x < width / 2; x++) {
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p[x*2+0] = 128 + y + frame_count * 2;
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p[x * 2 + 0] = 128 + y + frame_count * 2;
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p[x*2+1] = 64 + x + frame_count * 5;
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p[x * 2 + 1] = 64 + x + frame_count * 5;
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}
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}
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}
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}
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} break;
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} break;
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