From 2506f5df61c716dbb9be9c7e34b615910a367403 Mon Sep 17 00:00:00 2001 From: "xiaoxu.chen" Date: Mon, 23 Jun 2025 17:00:13 +0800 Subject: [PATCH] fix[hal_h264e]: Fix h264 poc_type reg configure Change-Id: Ife9fd9bc96037406cfbea16c3c4fef45d4a5a3dd Signed-off-by: xiaoxu.chen --- mpp/hal/rkenc/h264e/hal_h264e_vepu510.c | 2 ++ mpp/hal/rkenc/h264e/hal_h264e_vepu511.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/mpp/hal/rkenc/h264e/hal_h264e_vepu510.c b/mpp/hal/rkenc/h264e/hal_h264e_vepu510.c index 40a4ca1b..5eeee303 100644 --- a/mpp/hal/rkenc/h264e/hal_h264e_vepu510.c +++ b/mpp/hal/rkenc/h264e/hal_h264e_vepu510.c @@ -584,6 +584,7 @@ static MPP_RET hal_h264e_vepu510_get_task(void *hal, HalEncTask *task) /* if not VEPU1/2, update log2_max_frame_num_minus4 in hw_cfg */ hw_cfg->hw_log2_max_frame_num_minus4 = ctx->sps->log2_max_frame_num_minus4; + hw_cfg->hw_poc_type = ctx->sps->pic_order_cnt_type; if (ctx->task_cnt > 1 && (ref->lt_cfg_cnt || ref->st_cfg_cnt > 1)) { H264ePrefixNal *prefix = &ctx->prefix_sets[ctx->task_idx]; @@ -924,6 +925,7 @@ static void setup_vepu510_codec(HalVepu510RegSet *regs, H264eSps *sps, reg_frm->synt_sps.max_fnum = sps->log2_max_frame_num_minus4; reg_frm->synt_sps.drct_8x8 = sps->direct8x8_inference; reg_frm->synt_sps.mpoc_lm4 = sps->log2_max_poc_lsb_minus4; + reg_frm->synt_sps.poc_type = sps->pic_order_cnt_type; reg_frm->synt_pps.etpy_mode = pps->entropy_coding_mode; reg_frm->synt_pps.trns_8x8 = pps->transform_8x8_mode; diff --git a/mpp/hal/rkenc/h264e/hal_h264e_vepu511.c b/mpp/hal/rkenc/h264e/hal_h264e_vepu511.c index e77d98c0..542bef24 100644 --- a/mpp/hal/rkenc/h264e/hal_h264e_vepu511.c +++ b/mpp/hal/rkenc/h264e/hal_h264e_vepu511.c @@ -585,6 +585,7 @@ static MPP_RET hal_h264e_vepu511_get_task(void *hal, HalEncTask *task) /* if not VEPU1/2, update log2_max_frame_num_minus4 in hw_cfg */ hw_cfg->hw_log2_max_frame_num_minus4 = ctx->sps->log2_max_frame_num_minus4; + hw_cfg->hw_poc_type = ctx->sps->pic_order_cnt_type; if (ctx->task_cnt > 1 && (ref->lt_cfg_cnt || ref->st_cfg_cnt > 1)) { H264ePrefixNal *prefix = &ctx->prefix_sets[ctx->task_idx]; @@ -896,6 +897,7 @@ static void setup_vepu511_codec(HalVepu511RegSet *regs, HalH264eVepu511Ctx *ctx) reg_frm->synt_sps.max_fnum = sps->log2_max_frame_num_minus4; reg_frm->synt_sps.drct_8x8 = sps->direct8x8_inference; reg_frm->synt_sps.mpoc_lm4 = sps->log2_max_poc_lsb_minus4; + reg_frm->synt_sps.poc_type = sps->pic_order_cnt_type; reg_frm->synt_pps.etpy_mode = pps->entropy_coding_mode; reg_frm->synt_pps.trns_8x8 = pps->transform_8x8_mode;