diff --git a/inc/vpu_api.h b/inc/vpu_api.h index fb9117e6..6a3f8f45 100644 --- a/inc/vpu_api.h +++ b/inc/vpu_api.h @@ -66,6 +66,8 @@ typedef struct { RK_U32 CodecType; RK_U32 ImgWidth; RK_U32 ImgHeight; + RK_U32 ImgHorStride; + RK_U32 ImgVerStride; } VPU_GENERIC; typedef struct VPUMem { diff --git a/mpp/codec/mpp_buf_slot.cpp b/mpp/codec/mpp_buf_slot.cpp index fd8b1c3c..871c0a89 100644 --- a/mpp/codec/mpp_buf_slot.cpp +++ b/mpp/codec/mpp_buf_slot.cpp @@ -237,8 +237,8 @@ static void generate_info_set(MppBufSlotsImpl *impl, MppFrame frame, RK_U32 forc (impl->hal_ver_align(codec_ver_stride)) : (impl->hal_ver_align(height)); if (force_default_align) { - hal_hor_stride = default_align_16(width); - hal_ver_stride = default_align_16(height); + hal_hor_stride = codec_hor_stride; + hal_ver_stride = codec_ver_stride; } RK_U32 size = hal_hor_stride * hal_ver_stride; size *= impl->numerator; diff --git a/mpp/codec/mpp_dec.cpp b/mpp/codec/mpp_dec.cpp index a932c814..6ea6a227 100644 --- a/mpp/codec/mpp_dec.cpp +++ b/mpp/codec/mpp_dec.cpp @@ -863,6 +863,8 @@ MPP_RET mpp_dec_control(MppDec *dec, MpiCmd cmd, void *param) mpp_frame_init(&frame); mpp_frame_set_width(frame, p->ImgWidth); mpp_frame_set_height(frame, p->ImgHeight); + mpp_frame_set_hor_stride(frame, p->ImgHorStride); + mpp_frame_set_ver_stride(frame, p->ImgVerStride); mpp_log_f("setting default w %4d h %4d\n", p->ImgWidth, p->ImgHeight); mpp_slots_set_prop(dec->frame_slots, SLOTS_FRAME_INFO, frame); mpp_frame_deinit(&frame); diff --git a/mpp/legacy/vpu_api_legacy.cpp b/mpp/legacy/vpu_api_legacy.cpp index db128b52..a245e7fc 100644 --- a/mpp/legacy/vpu_api_legacy.cpp +++ b/mpp/legacy/vpu_api_legacy.cpp @@ -21,6 +21,7 @@ #include "vpu_api_legacy.h" #include "mpp_mem.h" #include "string.h" +#include "mpp_common.h" VpuApi::VpuApi() { @@ -69,8 +70,6 @@ RK_S32 VpuApi::init(VpuCodecContext *ctx, RK_U8 *extraData, RK_U32 extra_size) vpug.CodecType = ctx->codecType; vpug.ImgWidth = ctx->width; vpug.ImgHeight = ctx->height; - vpug.ImgHStride = (ctx->codecType == HEVC) : (ctx->width aling 256); else - vpug.ImgVStride = ctx->height; control(ctx, VPU_API_SET_DEFAULT_WIDTH_HEIGH, &vpug); if (extraData != NULL) { mpp_packet_init(&pkt, extraData, extra_size); @@ -248,6 +247,20 @@ RK_S32 VpuApi::perform(RK_U32 cmd, RK_U32 *data) return 0; } +static RK_U32 hevc_ver_align_8(RK_U32 val) +{ + return MPP_ALIGN(val, 8); +} + +static RK_U32 hevc_ver_align_256_odd(RK_U32 val) +{ + return MPP_ALIGN(val, 256) | 256; +} + +static RK_U32 default_align_16(RK_U32 val) +{ + return MPP_ALIGN(val, 16); +} RK_S32 VpuApi::control(VpuCodecContext *ctx, VPU_API_CMD cmd, void *param) { mpp_log_f("in\n"); @@ -264,7 +277,15 @@ RK_S32 VpuApi::control(VpuCodecContext *ctx, VPU_API_CMD cmd, void *param) break; } case VPU_API_SET_DEFAULT_WIDTH_HEIGH: { + VPU_GENERIC *p = (VPU_GENERIC *)param; mpicmd = MPP_CODEC_SET_FRAME_INFO; + if (ctx->videoCoding == OMX_RK_VIDEO_CodingHEVC) { + p->ImgHorStride = hevc_ver_align_256_odd(p->ImgWidth); + p->ImgVerStride = hevc_ver_align_8(p->ImgHeight); + } else { + p->ImgHorStride = default_align_16(p->ImgWidth); + p->ImgVerStride = default_align_16(p->ImgHeight); + } break; } case VPU_API_SET_INFO_CHANGE: {