diff --git a/mpp/hal/rkenc/h264e/hal_h264e_vepu541.c b/mpp/hal/rkenc/h264e/hal_h264e_vepu541.c
index 9740b058..14650712 100644
--- a/mpp/hal/rkenc/h264e/hal_h264e_vepu541.c
+++ b/mpp/hal/rkenc/h264e/hal_h264e_vepu541.c
@@ -314,7 +314,7 @@ static void setup_vepu541_normal(Vepu541H264eRegSet *regs)
     regs->reg004.brsp_done_en       = 1;
     regs->reg004.berr_done_en       = 1;
     regs->reg004.rerr_done_en       = 1;
-    regs->reg004.wdg_done_en        = 1;
+    regs->reg004.wdg_done_en        = 0;
 
     /* reg005 INT_MSK */
     regs->reg005.enc_done_msk       = 0;
@@ -330,8 +330,8 @@ static void setup_vepu541_normal(Vepu541H264eRegSet *regs)
     /* reg006 INT_CLR is not set */
     /* reg007 INT_STA is read only */
     /* reg008 ~ reg0011 gap */
-    regs->reg014.vs_load_thd        = 0x1ffff;
-    regs->reg014.rfp_load_thrd      = 0xff;
+    regs->reg014.vs_load_thd        = 0;
+    regs->reg014.rfp_load_thrd      = 0;
 
     /* reg015 DTRNS_MAP */
     regs->reg015.cmvw_bus_ordr      = 0;
diff --git a/mpp/hal/rkenc/h265e/hal_h265e_vepu541.c b/mpp/hal/rkenc/h265e/hal_h265e_vepu541.c
index 70c783e9..91e14684 100644
--- a/mpp/hal/rkenc/h265e/hal_h265e_vepu541.c
+++ b/mpp/hal/rkenc/h265e/hal_h265e_vepu541.c
@@ -981,7 +981,7 @@ MPP_RET hal_h265e_v541_gen_regs(void *hal, HalEncTask *task)
     regs->int_en.brsp_ostd_en   = 1;
     regs->int_en.wbus_err_en    = 1;
     regs->int_en.rbus_err_en    = 1;
-    regs->int_en.wdg_en         = 1;
+    regs->int_en.wdg_en         = 0;
 
     regs->enc_rsl.pic_wd8_m1    = pic_width_align8 / 8 - 1;
     regs->enc_rsl.pic_wfill     = (syn->pp.pic_width & 0x7)
@@ -998,8 +998,8 @@ MPP_RET hal_h265e_v541_gen_regs(void *hal, HalEncTask *task)
 
     regs->enc_pic.rdo_wgt_sel   = (ctx->frame_type == INTRA_FRAME) ? 0 : 1;
 
-    regs->enc_wdg.vs_load_thd   = 0x1ffff;
-    regs->enc_wdg.rfp_load_thd  = 0xff;
+    regs->enc_wdg.vs_load_thd   = 0;
+    regs->enc_wdg.rfp_load_thd  = 0;
 
     regs->dtrns_cfg.cime_dspw_orsd  = (ctx->frame_type == INTER_P_FRAME);