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[avspd]: Fix version check on I frame

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If correct I frame found fixed the version value.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I7f70827048a1af718f0015845ecf45e12bd11b94
This commit is contained in:
Herman Chen
2022-11-25 15:26:47 +08:00
parent d768f4f0f0
commit 21f8fe1062
6 changed files with 100 additions and 111 deletions
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36
mpp/codec/dec/avs/avsd_api.c
View File

@@ -64,7 +64,7 @@ __RETURN:
*********************************************************************** ***********************************************************************
*/ */
MPP_RET avsd_init(void *decoder, ParserCfg *init) static MPP_RET avsd_init(void *decoder, ParserCfg *init)
{ {
MPP_RET ret = MPP_ERR_UNKNOW; MPP_RET ret = MPP_ERR_UNKNOW;
RK_S32 i = 0; RK_S32 i = 0;
@@ -110,13 +110,14 @@ __FAILED:
return ret; return ret;
} }
/*! /*!
*********************************************************************** ***********************************************************************
* \brief * \brief
* reset * reset
*********************************************************************** ***********************************************************************
*/ */
MPP_RET avsd_reset(void *decoder) static MPP_RET avsd_reset(void *decoder)
{ {
MPP_RET ret = MPP_ERR_UNKNOW; MPP_RET ret = MPP_ERR_UNKNOW;
AvsdCtx_t *p_dec = (AvsdCtx_t *)decoder; AvsdCtx_t *p_dec = (AvsdCtx_t *)decoder;
@@ -147,24 +148,21 @@ MPP_RET avsd_reset(void *decoder)
* flush * flush
*********************************************************************** ***********************************************************************
*/ */
MPP_RET avsd_flush(void *decoder) static MPP_RET avsd_flush(void *decoder)
{ {
MPP_RET ret = MPP_ERR_UNKNOW;
AvsdCtx_t *p_dec = (AvsdCtx_t *)decoder; AvsdCtx_t *p_dec = (AvsdCtx_t *)decoder;
AVSD_PARSE_TRACE("In."); AVSD_PARSE_TRACE("In.");
avsd_reset_parameters(p_dec); set_frame_output(p_dec, p_dec->dpb[1]);
p_dec->got_keyframe = 0; set_frame_output(p_dec, p_dec->dpb[0]);
p_dec->vec_flag = 0; set_frame_output(p_dec, p_dec->cur);
p_dec->got_eos = 0; p_dec->got_eos = 0;
p_dec->left_length = 0;
p_dec->state = 0xFFFFFFFF;
p_dec->vop_header_found = 0;
AVSD_PARSE_TRACE("Out."); AVSD_PARSE_TRACE("Out.");
(void)p_dec;
(void)decoder; return MPP_OK;
return ret = MPP_OK;
} }
/*! /*!
@@ -173,7 +171,7 @@ MPP_RET avsd_flush(void *decoder)
* control/perform * control/perform
*********************************************************************** ***********************************************************************
*/ */
MPP_RET avsd_control(void *decoder, MpiCmd cmd_type, void *param) static MPP_RET avsd_control(void *decoder, MpiCmd cmd_type, void *param)
{ {
MPP_RET ret = MPP_ERR_UNKNOW; MPP_RET ret = MPP_ERR_UNKNOW;
AvsdCtx_t *p_dec = (AvsdCtx_t *)decoder; AvsdCtx_t *p_dec = (AvsdCtx_t *)decoder;
@@ -199,7 +197,7 @@ MPP_RET avsd_control(void *decoder, MpiCmd cmd_type, void *param)
* prepare * prepare
*********************************************************************** ***********************************************************************
*/ */
MPP_RET avsd_prepare(void *decoder, MppPacket pkt, HalDecTask *task) static MPP_RET avsd_prepare(void *decoder, MppPacket pkt, HalDecTask *task)
{ {
MPP_RET ret = MPP_ERR_UNKNOW; MPP_RET ret = MPP_ERR_UNKNOW;
@@ -297,7 +295,7 @@ __RETURN:
* parser * parser
*********************************************************************** ***********************************************************************
*/ */
MPP_RET avsd_parse(void *decoder, HalDecTask *task) static MPP_RET avsd_parse(void *decoder, HalDecTask *task)
{ {
MPP_RET ret = MPP_ERR_UNKNOW; MPP_RET ret = MPP_ERR_UNKNOW;
AvsdCtx_t *p_dec = (AvsdCtx_t *)decoder; AvsdCtx_t *p_dec = (AvsdCtx_t *)decoder;
@@ -328,7 +326,7 @@ MPP_RET avsd_parse(void *decoder, HalDecTask *task)
* callback * callback
*********************************************************************** ***********************************************************************
*/ */
MPP_RET avsd_callback(void *decoder, void *info) static MPP_RET avsd_callback(void *decoder, void *info)
{ {
MPP_RET ret = MPP_ERR_UNKNOW; MPP_RET ret = MPP_ERR_UNKNOW;
AvsdCtx_t *p_dec = (AvsdCtx_t *)decoder; AvsdCtx_t *p_dec = (AvsdCtx_t *)decoder;
@@ -350,6 +348,10 @@ MPP_RET avsd_callback(void *decoder, void *info)
} }
} }
} }
if (!ctx->hard_err && p_dec->ph.picture_coding_type == I_PICTURE)
p_dec->vsh.version_checked = 1;
AVSD_PARSE_TRACE("Out."); AVSD_PARSE_TRACE("Out.");
return ret = MPP_OK; return ret = MPP_OK;

37
mpp/codec/dec/avs/avsd_parse.c
View File

@@ -226,18 +226,21 @@ static MPP_RET get_i_picture_header(BitReadCtx_t *bitctx, AvsdSeqHeader_t *vsh,
READ_BITS(bitctx, 24, &ph->time_code); READ_BITS(bitctx, 24, &ph->time_code);
} }
vsh->version = 0; /* NOTE: only check version on correct I frame not found */
/* check stream version */ if (!vsh->version_checked) {
if (vsh->low_delay) { vsh->version = 0;
vsh->version = 1; /* check stream version */
} else { if (vsh->low_delay) {
SHOW_BITS(bitctx, 9, &val_temp);
if (!(val_temp & 1)) {
vsh->version = 1; vsh->version = 1;
} else { } else {
SHOW_BITS(bitctx, 11, &val_temp); SHOW_BITS(bitctx, 9, &val_temp);
if (val_temp & 3) if (!(val_temp & 1)) {
vsh->version = 1; vsh->version = 1;
} else {
SHOW_BITS(bitctx, 11, &val_temp);
if (val_temp & 3)
vsh->version = 1;
}
} }
} }
@@ -375,28 +378,24 @@ __FAILED:
static MPP_RET set_frame_unref(AvsdCtx_t *pdec, AvsdFrame_t *p) static MPP_RET set_frame_unref(AvsdCtx_t *pdec, AvsdFrame_t *p)
{ {
MPP_RET ret = MPP_ERR_UNKNOW;
if (p && p->slot_idx >= 0) { if (p && p->slot_idx >= 0) {
mpp_buf_slot_clr_flag(pdec->frame_slots, p->slot_idx, SLOT_CODEC_USE); mpp_buf_slot_clr_flag(pdec->frame_slots, p->slot_idx, SLOT_CODEC_USE);
reset_one_save(p); reset_one_save(p);
} }
return ret = MPP_OK; return MPP_OK;
} }
static MPP_RET set_frame_output(AvsdCtx_t *p_dec, AvsdFrame_t *p) MPP_RET set_frame_output(AvsdCtx_t *p_dec, AvsdFrame_t *p)
{ {
MPP_RET ret = MPP_ERR_UNKNOW;
if (p && p->slot_idx >= 0 && !p->had_display) { if (p && p->slot_idx >= 0 && !p->had_display) {
mpp_buf_slot_set_flag(p_dec->frame_slots, p->slot_idx, SLOT_QUEUE_USE); mpp_buf_slot_set_flag(p_dec->frame_slots, p->slot_idx, SLOT_QUEUE_USE);
mpp_buf_slot_enqueue(p_dec->frame_slots, p->slot_idx, QUEUE_DISPLAY); mpp_buf_slot_enqueue(p_dec->frame_slots, p->slot_idx, QUEUE_DISPLAY);
p->had_display = 1; p->had_display = 1;
} }
return ret = MPP_OK; return MPP_OK;
} }
/*! /*!
@@ -420,6 +419,8 @@ MPP_RET avsd_reset_parameters(AvsdCtx_t *p_dec)
p_dec->dpb[0] = NULL; p_dec->dpb[0] = NULL;
p_dec->dpb[1] = NULL; p_dec->dpb[1] = NULL;
p_dec->vsh.version_checked = 0;
for (i = 0; i < MPP_ARRAY_ELEMS(p_dec->mem->save); i++) { for (i = 0; i < MPP_ARRAY_ELEMS(p_dec->mem->save); i++) {
AvsdFrame_t *frm = &p_dec->mem->save[i]; AvsdFrame_t *frm = &p_dec->mem->save[i];
@@ -817,6 +818,10 @@ MPP_RET avsd_parse_stream(AvsdCtx_t *p_dec, HalDecTask *task)
AVSD_DBG(AVSD_DBG_SYNTAX, "offset=%d,got_vsh=%d, got_ph=%d, task->valid=%d\n", AVSD_DBG(AVSD_DBG_SYNTAX, "offset=%d,got_vsh=%d, got_ph=%d, task->valid=%d\n",
p_dec->cur->stream_offset, p_dec->got_vsh, p_dec->got_ph, task->valid); p_dec->cur->stream_offset, p_dec->got_vsh, p_dec->got_ph, task->valid);
} }
if (p_dec->disable_error)
break;
if ((pic_type == P_PICTURE && !p_dec->dpb[0]) || if ((pic_type == P_PICTURE && !p_dec->dpb[0]) ||
(pic_type == B_PICTURE && !p_dec->dpb[0]) || (pic_type == B_PICTURE && !p_dec->dpb[0]) ||
(pic_type == B_PICTURE && !p_dec->dpb[1] && !p_dec->vsh.low_delay) || (pic_type == B_PICTURE && !p_dec->dpb[1] && !p_dec->vsh.low_delay) ||

4
mpp/codec/dec/avs/avsd_parse.h
View File

@@ -122,6 +122,7 @@ typedef struct avsd_sequence_header_t {
RK_U8 frame_rate_code; RK_U8 frame_rate_code;
RK_U32 bit_rate; RK_U32 bit_rate;
RK_U8 low_delay; RK_U8 low_delay;
RK_U8 version_checked;
RK_U32 bbv_buffer_size; RK_U32 bbv_buffer_size;
} AvsdSeqHeader_t; } AvsdSeqHeader_t;
@@ -240,14 +241,13 @@ typedef struct avs_dec_ctx_t {
RK_U32 disable_error; RK_U32 disable_error;
} AvsdCtx_t; } AvsdCtx_t;
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
MPP_RET avsd_free_resource(AvsdCtx_t *p_dec); MPP_RET avsd_free_resource(AvsdCtx_t *p_dec);
MPP_RET avsd_reset_parameters(AvsdCtx_t *p_dec); MPP_RET avsd_reset_parameters(AvsdCtx_t *p_dec);
MPP_RET set_frame_output(AvsdCtx_t *p_dec, AvsdFrame_t *p);
MPP_RET avsd_set_dpb(AvsdCtx_t *p_dec, HalDecTask *task); MPP_RET avsd_set_dpb(AvsdCtx_t *p_dec, HalDecTask *task);
MPP_RET avsd_commit_syntaxs(AvsdSyntax_t *syn, HalDecTask *task); MPP_RET avsd_commit_syntaxs(AvsdSyntax_t *syn, HalDecTask *task);

10
mpp/codec/inc/avsd_api.h
View File

@@ -22,18 +22,10 @@
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
extern const ParserApi api_avsd_parser; extern const ParserApi api_avsd_parser;
extern const ParserApi api_avsd_plus_parser; extern const ParserApi api_avsd_plus_parser;
MPP_RET avsd_init (void *decoder, ParserCfg *cfg);
MPP_RET avsd_deinit (void *decoder);
MPP_RET avsd_reset (void *decoder);
MPP_RET avsd_flush (void *decoder);
MPP_RET avsd_control(void *decoder, MpiCmd cmd_type, void *param);
MPP_RET avsd_prepare(void *decoder, MppPacket pkt, HalDecTask *task);
MPP_RET avsd_parse (void *decoder, HalDecTask *task);
MPP_RET avsd_callback(void *decoder, void *err_info);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

25
mpp/hal/rkdec/avsd/hal_avsd_plus.c
View File

@@ -167,7 +167,6 @@ static MPP_RET set_regs_parameters(AvsdHalCtx_t *p_hal, HalDecTask *task)
} }
} }
//!< AVS Plus end //!< AVS Plus end
p_regs->sw13.dpb_ilace_mode = 0;
if (p_syn->pp.pictureStructure == FRAMEPICTURE || p_hal->first_field) { if (p_syn->pp.pictureStructure == FRAMEPICTURE || p_hal->first_field) {
p_regs->sw13.dec_out_base = get_frame_fd(p_hal, task->output); p_regs->sw13.dec_out_base = get_frame_fd(p_hal, task->output);
} else { } else {
@@ -477,6 +476,7 @@ static MPP_RET set_regs_parameters(AvsdHalCtx_t *p_hal, HalDecTask *task)
{ {
RK_U32 pic_type = 0; RK_U32 pic_type = 0;
RK_U32 prev_anc_type = 0; RK_U32 prev_anc_type = 0;
if (p_hal->work0 >= 0) { if (p_hal->work0 >= 0) {
pic_type = p_hal->pic[p_hal->work0].pic_type; pic_type = p_hal->pic[p_hal->work0].pic_type;
} }
@@ -549,6 +549,7 @@ static MPP_RET repeat_other_field(AvsdHalCtx_t *p_hal, HalTaskInfo *task)
AVSD_HAL_DBG(AVSD_HAL_DBG_OFFSET, "frame_no=%d, i=%d, offset=%d\n", AVSD_HAL_DBG(AVSD_HAL_DBG_OFFSET, "frame_no=%d, i=%d, offset=%d\n",
p_hal->frame_no, i, p_hal->data_offset); p_hal->frame_no, i, p_hal->data_offset);
//!< re-generate register //!< re-generate register
p_hal->frame_no++;
FUN_CHECK(ret = set_regs_parameters(p_hal, &task->dec)); FUN_CHECK(ret = set_regs_parameters(p_hal, &task->dec));
hal_avsd_plus_start((void *)p_hal, task); hal_avsd_plus_start((void *)p_hal, task);
hal_avsd_plus_wait((void *)p_hal, task); hal_avsd_plus_wait((void *)p_hal, task);
@@ -672,6 +673,26 @@ MPP_RET hal_avsd_plus_start(void *decoder, HalTaskInfo *task)
wr_cfg.size = AVSD_REGISTERS * sizeof(RK_U32); wr_cfg.size = AVSD_REGISTERS * sizeof(RK_U32);
wr_cfg.offset = 0; wr_cfg.offset = 0;
{
static RK_U32 frame_no = 0;
static FILE *fp = NULL;
RK_U32 i;
if (!fp)
fp = fopen("regs.txt", "w+b");
if (fp) {
fprintf(fp, "frame %d\n", frame_no);
for (i = 0; i < AVSD_REGISTERS; i++)
fprintf(fp, "reg[%03d]: %08x\n", i, p_hal->p_regs[i]);
frame_no++;
fflush(fp);
}
}
ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_REG_WR, &wr_cfg); ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_REG_WR, &wr_cfg);
if (ret) { if (ret) {
mpp_err_f("set register write failed %d\n", ret); mpp_err_f("set register write failed %d\n", ret);
@@ -695,8 +716,6 @@ MPP_RET hal_avsd_plus_start(void *decoder, HalTaskInfo *task)
} }
} while (0); } while (0);
p_hal->frame_no++;
__RETURN: __RETURN:
AVSD_HAL_TRACE("Out."); AVSD_HAL_TRACE("Out.");

99
mpp/hal/rkdec/avsd/hal_avsd_plus_reg.h
View File

@@ -48,33 +48,23 @@ typedef struct {
RK_U32 dec_pic_inf : 1; RK_U32 dec_pic_inf : 1;
RK_U32 reserve6 : 7; RK_U32 reserve6 : 7;
} sw01; } sw01;
union { struct {
struct { RK_U32 dec_max_burst : 5;
RK_U32 dec_max_burst : 5; RK_U32 dec_scmd_dis : 1;
RK_U32 dec_scmd_dis : 1; RK_U32 dec_adv_pre_dis : 1;
RK_U32 dec_adv_pre_dis : 1; RK_U32 tiled_mode_lsb : 1;
RK_U32 tiled_mode_lsb : 1; RK_U32 dec_out_endian : 1;
RK_U32 dec_out_endian : 1; RK_U32 dec_in_endian : 1;
RK_U32 dec_in_endian : 1; RK_U32 dec_clk_gate_e : 1;
RK_U32 dec_clk_gate_e : 1; RK_U32 dec_latency : 6;
RK_U32 dec_latency : 6; RK_U32 dec_out_tiled_e : 1;
RK_U32 dec_out_tiled_e : 1; RK_U32 dec_data_disc_e : 1;
RK_U32 dec_2chan_dis : 1; RK_U32 dec_outswap32_e : 1;
RK_U32 dec_outswap32_e : 1; RK_U32 dec_inswap32_e : 1;
RK_U32 dec_inswap32_e : 1; RK_U32 dec_strendian_e : 1;
RK_U32 dec_strendian_e : 1; RK_U32 dec_strswap32_e : 1;
RK_U32 dec_strswap32_e : 1; RK_U32 dec_timeout_e : 1;
RK_U32 dec_timeout_e : 1; RK_U32 dec_axi_rd_id : 8;
RK_U32 dec_axi_rd_id : 8;
};
struct {
RK_U32 reserve0 : 5;
RK_U32 priority_mode : 3;
RK_U32 reserve1 : 9;
RK_U32 tiled_mode_msb : 1;
RK_U32 dec_data_disc_e : 1;
RK_U32 reserve2 : 13;
};
} sw02; } sw02;
struct { struct {
RK_U32 dec_axi_wr_id : 8; RK_U32 dec_axi_wr_id : 8;
@@ -106,17 +96,11 @@ typedef struct {
RK_U32 mb_width_off : 4; RK_U32 mb_width_off : 4;
RK_U32 pic_mb_width : 9; RK_U32 pic_mb_width : 9;
} sw04; } sw04;
union { struct {
struct { RK_U32 beta_offset : 5;
RK_U32 fieldpic_flag_e : 1; RK_U32 alpha_offset : 5;
RK_S32 reserve0 : 31; RK_U32 reserve1 : 16;
}; RK_U32 strm_start_bit : 6;
struct {
RK_U32 beta_offset : 5;
RK_U32 alpha_offset : 5;
RK_U32 reserve1 : 16;
RK_U32 strm_start_bit : 6;
};
} sw05; } sw05;
struct { struct {
RK_U32 stream_len : 24; RK_U32 stream_len : 24;
@@ -134,47 +118,34 @@ typedef struct {
RK_U32 sw10; RK_U32 sw10;
RK_U32 sw11; RK_U32 sw11;
struct { struct {
RK_U32 rlc_vlc_base : 32; RK_U32 rlc_vlc_base;
} sw12; } sw12;
union { struct {
struct { RK_U32 dec_out_base;
RK_U32 dec_out_base : 32;
};
struct { //!< left move 10bit
RK_U32 reserve0 : 11;
RK_U32 dpb_ilace_mode : 1;
RK_U32 reserve1 : 20;
};
} sw13; } sw13;
union { union {
RK_U32 refer0_base : 32; RK_U32 refer0_base;
struct { struct {
RK_U32 refer0_topc_e : 1; RK_U32 refer0_topc_e : 1;
RK_U32 refer0_field_e : 1; RK_U32 refer0_field_e : 1;
}; };
} sw14; } sw14;
union { union {
RK_U32 refer1_base;
struct { struct {
RK_U32 refer1_base : 32; RK_U32 refer1_topc_e : 1;
}; RK_U32 refer1_field_e : 1;
struct {
RK_U32 refer1_topc_e : 1;
RK_U32 refer1_field_e : 1;
}; };
} sw15; } sw15;
union { union {
RK_U32 refer2_base;
struct { struct {
RK_U32 refer2_base : 32; RK_U32 refer2_topc_e : 1;
}; RK_U32 refer2_field_e : 1;
struct {
RK_U32 refer2_topc_e : 1;
RK_U32 refer2_field_e : 1;
}; };
} sw16; } sw16;
union { union {
struct { RK_U32 refer3_base;
RK_U32 refer3_base : 32;
};
struct { struct {
RK_U32 refer3_topc_e : 1; RK_U32 refer3_topc_e : 1;
RK_U32 refer3_field_e : 1; RK_U32 refer3_field_e : 1;