mirror of
https://github.com/nyanmisaka/mpp.git
synced 2025-10-12 20:40:07 +08:00
[h265d]: merge csy's h265d modification
git-svn-id: https://10.10.10.66:8443/svn/MediaProcessPlatform/trunk/mpp@353 6e48237b-75ef-9749-8fc9-41990f28c85a
This commit is contained in:
@@ -268,17 +268,17 @@ RK_S32 h265d_split_frame(void *sc,
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return next;
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}
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RK_S32 h265d_split_flush(void *sc)
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RK_S32 h265d_split_reset(void *sc)
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{
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RK_U8 *buf = NULL;
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RK_U32 size = 0;
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SplitContext_t *s = (SplitContext_t*)sc;
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s->index = 0;
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s->last_index = 0;
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s->state = 0;
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s->frame_start_found = 0;
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s->overread = 0;
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s->overread_index = 0;
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s->state64 = 0;
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buf = s->buffer;
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size = s->buffer_size;
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s->fetch_timestamp = 1;
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memset(s,0,sizeof(SplitContext_t));
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s->buffer = buf;
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s->buffer_size = size;
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return MPP_OK;
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}
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@@ -474,7 +474,7 @@ static RK_S32 set_sps(HEVCContext *s, const HEVCSPS *sps)
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s->h265dctx->height = sps->output_height;
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s->h265dctx->pix_fmt = sps->pix_fmt;
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s->h265dctx->sample_aspect_ratio = sps->vui.sar;
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mpp_buf_slot_setup(s->slots, 22, s->h265dctx->coded_width * s->h265dctx->coded_height * 7 / 4 , 0);
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mpp_buf_slot_setup(s->slots, 25, s->h265dctx->coded_width * s->h265dctx->coded_height * 7 / 4 , 0);
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if (sps->vui.video_signal_type_present_flag)
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s->h265dctx->color_range = sps->vui.video_full_range_flag ? MPPCOL_RANGE_JPEG
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@@ -1339,7 +1339,7 @@ RK_S32 mpp_hevc_extract_rbsp(HEVCContext *s, const RK_U8 *src, int length,
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si = di = i;
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while (si + 2 < length) {
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// remove escapes (very rare 1:2^22)
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if (src[si + 2] > 3) {
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if (src[si + 2] >= 3) {
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dst[di++] = src[si++];
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dst[di++] = src[si++];
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} else if (src[si] == 0 && src[si + 1] == 0) {
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@@ -1651,14 +1651,18 @@ MPP_RET h265d_parse(void *ctx, HalDecTask *task)
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}
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return ret;
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}
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mpp_err("decode poc = %d", s->poc);
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h265d_dbg(H265D_DBG_GLOBAL,"decode poc = %d", s->poc);
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if (s->ref) {
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h265d_parser2_syntax(h265dctx);
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s->task->syntax.data = s->hal_pic_private;
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s->task->syntax.number = 1;
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s->task->valid = 1;
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if (s->eos) {
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s->task->eos = 1;
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s->task->flags |= MPP_PACKET_FLAG_EOS;
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}
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}else{
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if(s->eos){
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h265d_flush(ctx);
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}
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}
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#if 0
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@@ -1835,6 +1839,7 @@ MPP_RET h265d_reset(void *ctx)
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H265dContext_t *h265dctx = (H265dContext_t *)ctx;
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HEVCContext *s = (HEVCContext *)h265dctx->priv_data;
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mpp_hevc_flush_dpb(s);
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h265d_split_reset(h265dctx->split_cxt);
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s->max_ra = INT_MAX;
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return MPP_OK;
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}
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@@ -158,7 +158,7 @@ static void fill_picture_parameters(const HEVCContext *h,
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pp->log2_parallel_merge_level_minus2 = pps->log2_parallel_merge_level - 2;
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pp->CurrPicOrderCntVal = h->poc;
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mpp_err("fill RefPicList from the DPB");
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// mpp_err("fill RefPicList from the DPB");
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// fill RefPicList from the DPB
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for (i = 0, j = 0; i < MPP_ARRAY_ELEMS(pp->RefPicList); i++) {
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const HEVCFrame *frame = NULL;
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@@ -270,7 +270,7 @@ RK_S32 h265d_syntax_fill_slice(void *ctx, RK_S32 input_index)
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MppBuffer streambuf = NULL;
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RK_S32 i, count = 0;
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RK_U32 position = 0;
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mpp_err("input_index = %d",input_index);
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// mpp_err("input_index = %d",input_index);
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mpp_buf_slot_get_prop(h->packet_slots, input_index, SLOT_BUFFER, &streambuf);
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RK_U8 *ptr = (RK_U8 *)mpp_buffer_get_ptr(streambuf);
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RK_U8 *current = ptr;
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@@ -303,7 +303,7 @@ RK_S32 h265d_syntax_fill_slice(void *ctx, RK_S32 input_index)
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current += start_code_size;
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position += start_code_size;
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memcpy(current, h->nals[i].data, h->nals[i].size);
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mpp_log("h->nals[%d].size = %d", i, h->nals[i].size);
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// mpp_log("h->nals[%d].size = %d", i, h->nals[i].size);
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fill_slice_short(&ctx_pic->slice_short[count], position, h->nals[i].size);
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current += h->nals[i].size;
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position += h->nals[i].size;
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@@ -1527,7 +1527,7 @@ RK_S32 mpp_hevc_decode_nal_sps(HEVCContext *s)
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}
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READ_ONEBIT(gb, &sublayer_ordering_info);
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h265d_dbg(H265D_DBG_SPS,"read bit left %d",gb->num_remaining_bits_in_curr_byte_ + gb->bytes_left_*8);
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start = sublayer_ordering_info ? 0 : sps->max_sub_layers - 1;
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for (i = start; i < sps->max_sub_layers; i++) {
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READ_UE(gb, &sps->temporal_layer[i].max_dec_pic_buffering) ;
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@@ -1560,20 +1560,32 @@ RK_S32 mpp_hevc_decode_nal_sps(HEVCContext *s)
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}
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}
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h265d_dbg(H265D_DBG_SPS,"2 read bit left %d",gb->num_remaining_bits_in_curr_byte_ + gb->bytes_left_*8);
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READ_UE(gb, &sps->log2_min_cb_size) ;
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sps->log2_min_cb_size += 3;
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h265d_dbg(H265D_DBG_SPS,"sps->log2_min_cb_size %d",sps->log2_min_cb_size);
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READ_UE(gb, &sps->log2_diff_max_min_coding_block_size);
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h265d_dbg(H265D_DBG_SPS,"sps->log2_diff_max_min_coding_block_size %d",sps->log2_diff_max_min_coding_block_size);
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READ_UE(gb, &sps->log2_min_tb_size);
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sps->log2_min_tb_size += 2;
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h265d_dbg(H265D_DBG_SPS,"sps->log2_min_tb_size %d",sps->log2_min_tb_size);
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READ_UE(gb, &log2_diff_max_min_transform_block_size);
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h265d_dbg(H265D_DBG_SPS,"sps->log2_diff_max_min_transform_block_size %d",log2_diff_max_min_transform_block_size);
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sps->log2_max_trafo_size = log2_diff_max_min_transform_block_size +
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sps->log2_min_tb_size;
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h265d_dbg(H265D_DBG_SPS,"sps->log2_max_trafo_size %d",sps->log2_max_trafo_size);
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if (sps->log2_min_tb_size >= sps->log2_min_cb_size) {
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mpp_err( "Invalid value for log2_min_tb_size");
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ret = MPP_ERR_STREAM;
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goto err;
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}
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READ_UE(gb, &sps->max_transform_hierarchy_depth_inter);
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READ_UE(gb, &sps->max_transform_hierarchy_depth_intra);
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@@ -1592,10 +1604,15 @@ RK_S32 mpp_hevc_decode_nal_sps(HEVCContext *s)
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s->scaling_list_listen[sps_id] = 1;
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}
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READ_ONEBIT(gb, &sps->amp_enabled_flag);
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READ_ONEBIT(gb, &sps->sao_enabled);
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READ_ONEBIT(gb, &sps->pcm_enabled_flag);
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h265d_dbg(H265D_DBG_SPS,"sps->amp_enabled_flag = %d", sps->amp_enabled_flag);
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h265d_dbg(H265D_DBG_SPS,"sps->sao_enabled = %d", sps->sao_enabled);
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h265d_dbg(H265D_DBG_SPS,"sps->pcm_enabled_flag = %d", sps->pcm_enabled_flag);
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if (sps->pcm_enabled_flag) {
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READ_BITS(gb, 4, &sps->pcm.bit_depth);
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sps->pcm.bit_depth += 1;
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@@ -1637,12 +1654,15 @@ RK_S32 mpp_hevc_decode_nal_sps(HEVCContext *s)
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READ_ONEBIT(gb, &sps->used_by_curr_pic_lt_sps_flag[i]);
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}
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}
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READ_ONEBIT(gb, &sps->sps_temporal_mvp_enabled_flag);
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#ifdef REF_IDX_MFM
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if (s->nuh_layer_id > 0)
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READ_ONEBIT(gb, &sps->set_mfm_enabled_flag);
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#endif
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READ_ONEBIT(gb, &sps->sps_strong_intra_smoothing_enable_flag);
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sps->vui.sar.num = 0;
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sps->vui.sar.den = 1;
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READ_ONEBIT(gb, &vui_present);
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@@ -1703,6 +1723,10 @@ RK_S32 mpp_hevc_decode_nal_sps(HEVCContext *s)
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s->h265dctx->height = sps->height;
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// Inferred parameters
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sps->log2_ctb_size = sps->log2_min_cb_size + sps->log2_diff_max_min_coding_block_size;
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h265d_dbg(H265D_DBG_SPS,"sps->log2_min_cb_size = %d sps->log2_diff_max_min_coding_block_size = %d",sps->log2_min_cb_size,sps->log2_diff_max_min_coding_block_size);
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h265d_dbg(H265D_DBG_SPS,"plus sps->log2_ctb_size %d",sps->log2_ctb_size);
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sps->log2_min_pu_size = sps->log2_min_cb_size - 1;
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sps->ctb_width = (sps->width + (1 << sps->log2_ctb_size) - 1) >> sps->log2_ctb_size;
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@@ -1738,6 +1762,7 @@ RK_S32 mpp_hevc_decode_nal_sps(HEVCContext *s)
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sps->max_transform_hierarchy_depth_intra);
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goto err;
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}
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h265d_dbg(H265D_DBG_SPS,"sps->log2_ctb_size %d",sps->log2_ctb_size);
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if (sps->log2_max_trafo_size > (RK_U32)MPP_MIN(sps->log2_ctb_size, 5)) {
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mpp_err(
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"max transform block size out of range: %d\n",
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@@ -1747,13 +1772,13 @@ RK_S32 mpp_hevc_decode_nal_sps(HEVCContext *s)
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if (s->h265dctx->compare_info != NULL) {
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CurrentFameInf_t *info = (CurrentFameInf_t *)s->h265dctx->compare_info;
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HEVCSPS *openhevc_sps = (HEVCSPS *)&info->sps[sps_id];
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mpp_log("compare sps in");
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if (compare_sps(openhevc_sps, (HEVCSPS *)sps_buf) < 0) {
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mpp_err("compare sps with openhevc error found");
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mpp_assert(0);
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return -1;
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}
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mpp_log("compare sps ok");
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}
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#if 0
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if (s->h265dctx->debug & FF_DEBUG_BITSTREAM) {
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@@ -88,7 +88,7 @@ static HEVCFrame *alloc_frame(HEVCContext *s)
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if (ret != MPP_OK) {
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goto fail;
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}
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mpp_err("width = %d height = %d", s->h265dctx->width, s->h265dctx->height);
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h265d_dbg(H265D_DBG_GLOBAL,"width = %d height = %d", s->h265dctx->width, s->h265dctx->height);
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mpp_frame_set_width(frame->frame, s->h265dctx->width);
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mpp_frame_set_height(frame->frame, s->h265dctx->height);
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@@ -8,7 +8,9 @@ if(H265D_TEST)
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add_executable(h265d_parser_test h265d_parser_test.c)
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include_directories(.)
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link_directories(.)
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if(UNIX)
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if(ANDROID)
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target_link_libraries(h265d_parser_test mpp utils)
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elseif(UNIX)
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set(OPENHEVCSO "${CMAKE_SOURCE_DIR}/mpp/codec/dec/h265/test")
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add_library(openhevcwrapper SHARED IMPORTED)
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set_target_properties(openhevcwrapper PROPERTIES
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@@ -458,7 +458,6 @@ RK_S32 hevc_parser_test(ParserDemoCmdContext_t *cmd)
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RK_U32 index;
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ret = mpp_buf_slot_dequeue(slots, &index, QUEUE_DISPLAY);
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if (ret == MPP_OK) {
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mpp_log("get_display for ");
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mpp_buf_slot_get_prop(slots, index, SLOT_FRAME, &frame);
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if (frame) {
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#if 1//def DUMP
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@@ -492,7 +491,10 @@ RK_S32 hevc_parser_test(ParserDemoCmdContext_t *cmd)
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if (-1 != curtask->input) {
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MppBuffer buffer = NULL;
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mpp_buf_slot_set_flag(packet_slots, curtask->input, SLOT_CODEC_READY);
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mpp_buf_slot_set_flag(packet_slots, curtask->input, SLOT_HAL_INPUT);
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mpp_buf_slot_get_prop(packet_slots, curtask->input, SLOT_BUFFER, &buffer);
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mpp_buf_slot_clr_flag(packet_slots, curtask->input, SLOT_HAL_INPUT);
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mpp_err("mpp_buf_slot free for last packet %p",buffer);
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mpp_buffer_put(buffer);
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}
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@@ -502,13 +504,14 @@ RK_S32 hevc_parser_test(ParserDemoCmdContext_t *cmd)
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RK_U32 index;
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ret = mpp_buf_slot_dequeue(slots, &index, QUEUE_DISPLAY);
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if (ret == MPP_OK) {
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mpp_log("get_display for ");
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}
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mpp_buf_slot_get_prop(slots, index, SLOT_FRAME, &frame);
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if (frame) {
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mpp_frame_deinit(&frame);
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}
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mpp_buf_slot_clr_flag(slots, index, SLOT_QUEUE_USE);
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mpp_log("get_display for index = %d",index);
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mpp_buf_slot_get_prop(slots, index, SLOT_FRAME, &frame);
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if (frame) {
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mpp_frame_deinit(&frame);
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}
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mpp_buf_slot_clr_flag(slots, index, SLOT_QUEUE_USE);
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}
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} while (ret == MPP_OK);
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if (mpp_codex_ctx != NULL) {
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@@ -268,7 +268,10 @@ void *mpp_dec_parser_thread(void *data)
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hal_task_info_init(&task_local, MPP_CTX_DEC);
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}
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if (NULL != task) {
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mpp_buf_slot_set_flag(packet_slots, task_dec->input, SLOT_CODEC_READY);
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mpp_buf_slot_set_flag(packet_slots, task_dec->input, SLOT_HAL_INPUT);
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mpp_buf_slot_get_prop(packet_slots, task_dec->input, SLOT_BUFFER, &buffer);
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mpp_buf_slot_clr_flag(packet_slots, task_dec->input, SLOT_HAL_INPUT);
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if (buffer)
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mpp_buffer_put(buffer);
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}
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@@ -397,7 +400,7 @@ MPP_RET mpp_dec_init(MppDec **dec, MppCodingType coding)
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MPP_CTX_DEC,
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coding,
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HAL_MODE_LIBVPU,
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HAL_HARD_RKVDEC,
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HAL_RKVDEC,
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frame_slots,
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packet_slots,
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NULL,
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@@ -29,9 +29,11 @@ typedef enum MppHalType_e {
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typedef enum MppHalHardType_e {
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HAL_HARD_RKVDEC, //!< rock-chip h264 h265 vp9 combined decoder
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HAL_HARD_VDPU, //!< on2 combined decoder
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} HalHardMode;
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HAL_VDPU, //!< vpu combined decoder
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HAL_VEPU, //!< vpu combined encoder
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HAL_RKVDEC, //!< rock-chip h264 h265 vp9 combined decoder
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HAL_DEVICE_BUTT,
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} HalDeviceId;
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typedef void* MppHalCtx;
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@@ -41,7 +43,7 @@ typedef struct MppHalCfg_t {
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MppCtxType type;
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MppCodingType coding;
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HalWorkMode work_mode;
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HalHardMode hard_mode;
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HalDeviceId device_id;
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MppBufSlots frame_slots;
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MppBufSlots packet_slots;
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