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fix[h265d_vdpu383]: fix dec err when ps_update_flag=0

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The ps_update_flag=0 case is not handled properly here,
and follow commit exposes this problem.
233940: fix[h265d]: fix infochange loss when two sps continuous

Change-Id: I54dcea6c31483257b4b771a8bd4994cc75ed41f5
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
This commit is contained in:
Yandong Lin
2024-09-09 21:31:55 +08:00
committed by Herman Chen
parent ba450dd834
commit 05b809393c
2 changed files with 121 additions and 123 deletions
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42
mpp/hal/rkdec/h265d/hal_h265d_vdpu383.c
View File

@@ -370,7 +370,6 @@ static MPP_RET hal_h265d_vdpu383_scalinglist_packet(void *hal, void *ptr, void *
static RK_S32 hal_h265d_v345_output_pps_packet(void *hal, void *dxva)
{
RK_S32 i;
RK_U32 addr;
RK_U32 log2_min_cb_size;
RK_S32 width, height;
HalH265dCtx *reg_ctx = ( HalH265dCtx *)hal;
@@ -383,26 +382,28 @@ static RK_S32 hal_h265d_v345_output_pps_packet(void *hal, void *dxva)
__FILE__, __FUNCTION__, __LINE__);
return MPP_ERR_NULL_PTR;
}
// SPS
{
void *pps_ptr = mpp_buffer_get_ptr(reg_ctx->bufs) + reg_ctx->spspps_offset;
if (dxva_ctx->pp.ps_update_flag) {
RK_U64 *pps_packet = reg_ctx->pps_buf;
if (NULL == pps_ptr) {
mpp_err("pps_data get ptr error");
return MPP_ERR_NOMEM;
}
for (i = 0; i < 14; i++) pps_packet[i] = 0;
log2_min_cb_size = dxva_ctx->pp.log2_min_luma_coding_block_size_minus3 + 3;
width = (dxva_ctx->pp.PicWidthInMinCbsY << log2_min_cb_size);
height = (dxva_ctx->pp.PicHeightInMinCbsY << log2_min_cb_size);
mpp_set_bitput_ctx(&bp, pps_packet, 22); // 22*64bits
// SPS
if (dxva_ctx->pp.ps_update_flag) {
mpp_put_bits(&bp, dxva_ctx->pp.vps_id, 4);
mpp_put_bits(&bp, dxva_ctx->pp.sps_id, 4);
mpp_put_bits(&bp, dxva_ctx->pp.chroma_format_idc, 2);
log2_min_cb_size = dxva_ctx->pp.log2_min_luma_coding_block_size_minus3 + 3;
width = (dxva_ctx->pp.PicWidthInMinCbsY << log2_min_cb_size);
height = (dxva_ctx->pp.PicHeightInMinCbsY << log2_min_cb_size);
mpp_put_bits(&bp, width, 16);
mpp_put_bits(&bp, height, 16);
mpp_put_bits(&bp, dxva_ctx->pp.bit_depth_luma_minus8, 3);
@@ -506,7 +507,11 @@ static RK_S32 hal_h265d_v345_output_pps_packet(void *hal, void *dxva)
mpp_put_bits(&bp, 0, 6);
mpp_put_bits(&bp, 0, 1);
mpp_put_bits(&bp, 0, 1);
} else {
bp.index = 4;
bp.bitpos = 41;
bp.bvalue = bp.pbuf[bp.index] & MPP_GENMASK(bp.bitpos - 1, 0);
}
/* poc info */
{
RK_S32 dpb_valid[15] = {0}, refpic_poc[15] = {0};
@@ -544,7 +549,6 @@ static RK_S32 hal_h265d_v345_output_pps_packet(void *hal, void *dxva)
memset(row_height, 0, sizeof(row_height));
if (dxva_ctx->pp.tiles_enabled_flag) {
if (dxva_ctx->pp.uniform_spacing_flag == 0) {
RK_S32 maxcuwidth = dxva_ctx->pp.log2_diff_max_min_luma_coding_block_size + log2_min_cb_size;
RK_S32 ctu_width_in_pic = (width +
@@ -564,9 +568,7 @@ static RK_S32 hal_h265d_v345_output_pps_packet(void *hal, void *dxva)
sum += row_height[i];
}
row_height[i] = ctu_height_in_pic - sum;
} // end of (pps->uniform_spacing_flag == 0)
else {
} else {
RK_S32 pic_in_cts_width = (width +
(1 << (log2_min_cb_size +
dxva_ctx->pp.log2_diff_max_min_luma_coding_block_size)) - 1)
@@ -586,8 +588,7 @@ static RK_S32 hal_h265d_v345_output_pps_packet(void *hal, void *dxva)
row_height[i] = ((i + 1) * pic_in_cts_height) / (dxva_ctx->pp.num_tile_rows_minus1 + 1) -
(i * pic_in_cts_height) / (dxva_ctx->pp.num_tile_rows_minus1 + 1);
}
} // pps->tiles_enabled_flag
else {
} else {
RK_S32 MaxCUWidth = (1 << (dxva_ctx->pp.log2_diff_max_min_luma_coding_block_size + log2_min_cb_size));
column_width[0] = (width + MaxCUWidth - 1) / MaxCUWidth;
row_height[0] = (height + MaxCUWidth - 1) / MaxCUWidth;
@@ -599,12 +600,12 @@ static RK_S32 hal_h265d_v345_output_pps_packet(void *hal, void *dxva)
for (i = 0; i < 22; i++)
mpp_put_bits(&bp, row_height[i], 12);
}
}
mpp_put_align(&bp, 64, 0);//128
/* --- end spspps data ------*/
memcpy(pps_ptr, reg_ctx->pps_buf, 176);
} /* --- end spspps data ------*/
if (dxva_ctx->pp.scaling_list_enabled_flag) {
MppDevRegOffsetCfg trans_cfg;
RK_U32 addr;
RK_U8 *ptr_scaling = (RK_U8 *)mpp_buffer_get_ptr(reg_ctx->bufs) + reg_ctx->sclst_offset;
if (dxva_ctx->pp.scaling_list_data_present_flag) {
@@ -618,14 +619,9 @@ static RK_S32 hal_h265d_v345_output_pps_packet(void *hal, void *dxva)
hal_h265d_vdpu383_scalinglist_packet(hal, ptr_scaling + addr, dxva);
hw_reg->common_addr.reg132_scanlist_addr = reg_ctx->bufs_fd;
/* need to config addr */
trans_cfg.reg_idx = 132;
trans_cfg.offset = addr + reg_ctx->sclst_offset;
mpp_dev_ioctl(reg_ctx->dev, MPP_DEV_REG_OFFSET, &trans_cfg);
mpp_dev_set_reg_offset(reg_ctx->dev, 132, addr + reg_ctx->sclst_offset);
}
memcpy(pps_ptr, reg_ctx->pps_buf, 176);
#ifdef dump
fwrite(pps_ptr, 1, 80 * 64, fp);
RK_U32 *tmp = (RK_U32 *)pps_ptr;

2
osal/inc/mpp_common.h
View File

@@ -44,6 +44,8 @@
#define MPP_ALIGN_GEN(x, a) (((x)+(a)-1)/(a)*(a))
#define MPP_VSWAP(a, b) { a ^= b; b ^= a; a ^= b; }
#define MPP_GENMASK(h, l) (((1ULL << ((h) + 1)) - 1) & ~((1ULL << (l)) - 1))
#define MPP_RB16(x) ((((const RK_U8*)(x))[0] << 8) | ((const RK_U8*)(x))[1])
#define MPP_WB16(p, d) do { \
((RK_U8*)(p))[1] = (d); \