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[mpp_enc_cfg]: combine gop and ref cfg config.

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Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: Ia15a0128d03b1a2624410b6f2a13effe3a03c47c
This commit is contained in:
xueman.ruan
2023-03-21 09:29:37 +08:00
parent 35db8f909f
commit 0466c8aa6b
5 changed files with 92 additions and 67 deletions
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2
inc/rk_venc_cmd.h
View File

@@ -237,6 +237,7 @@ typedef enum MppEncRcCfgChange_e {
MPP_ENC_RC_CFG_CHANGE_HIER_QP = (1 << 25),
MPP_ENC_RC_CFG_CHANGE_ST_TIME = (1 << 26),
MPP_ENC_RC_CFG_CHANGE_REFRESH = (1 << 27),
MPP_ENC_RC_CFG_CHANGE_GOP_REF_CFG = (1 << 28),
MPP_ENC_RC_CFG_CHANGE_ALL = (0xFFFFFFFF),
} MppEncRcCfgChange;
@@ -339,6 +340,7 @@ typedef struct MppEncRcCfg_t {
* etc...
*/
RK_S32 gop;
void *ref_cfg;
/*
* skip_cnt - max continuous frame skip count

3
mpp/base/mpp_enc_cfg.cpp
View File

@@ -137,6 +137,7 @@ public:
ENTRY(rc, fps_out_num, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_OUT, rc, fps_out_num) \
ENTRY(rc, fps_out_denorm, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_OUT, rc, fps_out_denorm) \
ENTRY(rc, gop, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_GOP, rc, gop) \
ENTRY(rc, ref_cfg, Ptr, void *, MPP_ENC_RC_CFG_CHANGE_GOP_REF_CFG, rc, ref_cfg) \
ENTRY(rc, max_reenc_times,U32, RK_U32, MPP_ENC_RC_CFG_CHANGE_MAX_REENC, rc, max_reenc_times) \
ENTRY(rc, priority, U32, MppEncRcPriority, MPP_ENC_RC_CFG_CHANGE_PRIORITY, rc, rc_priority) \
ENTRY(rc, drop_mode, U32, MppEncRcDropFrmMode, MPP_ENC_RC_CFG_CHANGE_DROP_FRM, rc, drop_mode) \
@@ -365,7 +366,7 @@ MppEncCfgService::MppEncCfgService() :
MPP_RET ret;
RK_S32 i;
ret = mpp_trie_init(&trie, 1724, cfg_cnt);
ret = mpp_trie_init(&trie, 1732, cfg_cnt);
if (ret) {
mpp_err_f("failed to init enc cfg set trie\n");
return ;

71
mpp/codec/mpp_enc_impl.cpp
View File

@@ -578,6 +578,9 @@ MPP_RET mpp_enc_proc_rc_cfg(MppCodingType coding, MppEncRcCfg *dst, MppEncRcCfg
dst->gop = src->gop;
}
if (change & MPP_ENC_RC_CFG_CHANGE_GOP_REF_CFG)
dst->ref_cfg = src->ref_cfg;
if (change & MPP_ENC_RC_CFG_CHANGE_MAX_REENC)
dst->max_reenc_times = src->max_reenc_times;
@@ -852,6 +855,36 @@ MPP_RET mpp_enc_proc_tune_cfg(MppEncFineTuneCfg *dst, MppEncFineTuneCfg *src)
return ret;
}
static MPP_RET mpp_enc_control_set_ref_cfg(MppEncImpl *enc, void *param)
{
MPP_RET ret = MPP_OK;
MppEncRefCfg src = (MppEncRefCfg)param;
MppEncRefCfg dst = enc->cfg.ref_cfg;
if (NULL == src)
src = mpp_enc_ref_default();
if (NULL == dst) {
mpp_enc_ref_cfg_init(&dst);
enc->cfg.ref_cfg = dst;
}
ret = mpp_enc_ref_cfg_copy(dst, src);
if (ret) {
mpp_err_f("failed to copy ref cfg ret %d\n", ret);
}
ret = mpp_enc_refs_set_cfg(enc->refs, dst);
if (ret) {
mpp_err_f("failed to set ref cfg ret %d\n", ret);
}
if (mpp_enc_refs_update_hdr(enc->refs))
enc->hdr_status.val = 0;
return ret;
}
MPP_RET mpp_enc_proc_cfg(MppEncImpl *enc, MpiCmd cmd, void *param)
{
MPP_RET ret = MPP_OK;
@@ -875,6 +908,12 @@ MPP_RET mpp_enc_proc_cfg(MppEncImpl *enc, MpiCmd cmd, void *param)
/* process rc cfg at mpp_enc module */
if (src->rc.change) {
ret = mpp_enc_proc_rc_cfg(enc->coding, &enc->cfg.rc, &src->rc);
// update ref cfg
if ((enc->cfg.rc.change & MPP_ENC_RC_CFG_CHANGE_GOP_REF_CFG) &&
(enc->cfg.rc.gop > 0))
mpp_enc_control_set_ref_cfg(enc, enc->cfg.rc.ref_cfg);
src->rc.change = 0;
}
@@ -895,8 +934,14 @@ MPP_RET mpp_enc_proc_cfg(MppEncImpl *enc, MpiCmd cmd, void *param)
} break;
case MPP_ENC_SET_RC_CFG : {
MppEncRcCfg *src = (MppEncRcCfg *)param;
if (src)
if (src) {
ret = mpp_enc_proc_rc_cfg(enc->coding, &enc->cfg.rc, src);
// update ref cfg
if ((enc->cfg.rc.change & MPP_ENC_RC_CFG_CHANGE_GOP_REF_CFG) &&
(enc->cfg.rc.gop > 0))
mpp_enc_control_set_ref_cfg(enc, enc->cfg.rc.ref_cfg);
}
} break;
case MPP_ENC_SET_IDR_FRAME : {
enc->frm_cfg.force_idr++;
@@ -998,29 +1043,7 @@ MPP_RET mpp_enc_proc_cfg(MppEncImpl *enc, MpiCmd cmd, void *param)
}
} break;
case MPP_ENC_SET_REF_CFG : {
MppEncRefCfg src = (MppEncRefCfg)param;
MppEncRefCfg dst = enc->cfg.ref_cfg;
if (NULL == src)
src = mpp_enc_ref_default();
if (NULL == dst) {
mpp_enc_ref_cfg_init(&dst);
enc->cfg.ref_cfg = dst;
}
ret = mpp_enc_ref_cfg_copy(dst, src);
if (ret) {
mpp_err_f("failed to copy ref cfg ret %d\n", ret);
}
ret = mpp_enc_refs_set_cfg(enc->refs, dst);
if (ret) {
mpp_err_f("failed to set ref cfg ret %d\n", ret);
}
if (mpp_enc_refs_update_hdr(enc->refs))
enc->hdr_status.val = 0;
ret = mpp_enc_control_set_ref_cfg(enc, param);
} break;
case MPP_ENC_SET_OSD_PLT_CFG : {
MppEncOSDPltCfg *src = (MppEncOSDPltCfg *)param;

40
test/mpi_enc_mt_test.cpp
View File

@@ -301,6 +301,7 @@ MPP_RET test_mt_cfg_setup(MpiEncMtCtxInfo *info)
RK_U32 gop_mode = p->gop_mode;
RK_U32 quiet = cmd->quiet;
MPP_RET ret;
MppEncRefCfg ref = NULL;
/* setup default parameter */
if (p->fps_in_den == 0)
@@ -330,7 +331,6 @@ MPP_RET test_mt_cfg_setup(MpiEncMtCtxInfo *info)
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_flex", p->fps_out_flex);
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_num", p->fps_out_num);
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_denorm", p->fps_out_den);
mpp_enc_cfg_set_s32(cfg, "rc:gop", p->gop_len ? p->gop_len : p->fps_out_num * 2);
/* drop frame or not when bitrate overflow */
mpp_enc_cfg_set_u32(cfg, "rc:drop_mode", MPP_ENC_RC_DROP_FRM_DISABLED);
@@ -459,12 +459,31 @@ MPP_RET test_mt_cfg_setup(MpiEncMtCtxInfo *info)
mpp_enc_cfg_set_s32(cfg, "split:out", p->split_out);
}
// config gop_len and ref cfg
mpp_enc_cfg_set_s32(cfg, "rc:gop", p->gop_len ? p->gop_len : p->fps_out_num * 2);
mpp_env_get_u32("gop_mode", &gop_mode, gop_mode);
if (gop_mode) {
mpp_enc_ref_cfg_init(&ref);
if (p->gop_mode < 4)
mpi_enc_gen_ref_cfg(ref, gop_mode);
else
mpi_enc_gen_smart_gop_ref_cfg(ref, p->gop_len, p->vi_len);
mpp_enc_cfg_set_ptr(cfg, "rc:ref_cfg", ref);
}
ret = mpi->control(ctx, MPP_ENC_SET_CFG, cfg);
if (ret) {
mpp_err("mpi control enc set cfg failed ret %d\n", ret);
goto RET;
}
if (ref)
mpp_enc_ref_cfg_deinit(&ref);
/* optional */
p->sei_mode = MPP_ENC_SEI_MODE_ONE_FRAME;
ret = mpi->control(ctx, MPP_ENC_SET_SEI_CFG, &p->sei_mode);
@@ -482,25 +501,6 @@ MPP_RET test_mt_cfg_setup(MpiEncMtCtxInfo *info)
}
}
mpp_env_get_u32("gop_mode", &gop_mode, gop_mode);
if (gop_mode) {
MppEncRefCfg ref;
mpp_enc_ref_cfg_init(&ref);
if (p->gop_mode < 4)
mpi_enc_gen_ref_cfg(ref, gop_mode);
else
mpi_enc_gen_smart_gop_ref_cfg(ref, p->gop_len, p->vi_len);
ret = mpi->control(ctx, MPP_ENC_SET_REF_CFG, ref);
if (ret) {
mpp_err("mpi control enc set ref cfg failed ret %d\n", ret);
goto RET;
}
mpp_enc_ref_cfg_deinit(&ref);
}
/* setup test mode by env */
mpp_env_get_u32("osd_enable", &p->osd_enable, 0);
mpp_env_get_u32("osd_mode", &p->osd_mode, MPP_ENC_OSD_PLT_TYPE_DEFAULT);

43
test/mpi_enc_test.c
View File

@@ -295,6 +295,8 @@ MPP_RET test_mpp_enc_cfg_setup(MpiEncMultiCtxInfo *info)
RK_U32 rotation;
RK_U32 mirroring;
RK_U32 flip;
RK_U32 gop_mode = p->gop_mode;
MppEncRefCfg ref = NULL;
/* setup default parameter */
if (p->fps_in_den == 0)
@@ -324,7 +326,6 @@ MPP_RET test_mpp_enc_cfg_setup(MpiEncMultiCtxInfo *info)
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_flex", p->fps_out_flex);
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_num", p->fps_out_num);
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_denorm", p->fps_out_den);
mpp_enc_cfg_set_s32(cfg, "rc:gop", p->gop_len ? p->gop_len : p->fps_out_num * 2);
/* drop frame or not when bitrate overflow */
mpp_enc_cfg_set_u32(cfg, "rc:drop_mode", MPP_ENC_RC_DROP_FRM_DISABLED);
@@ -467,12 +468,31 @@ MPP_RET test_mpp_enc_cfg_setup(MpiEncMultiCtxInfo *info)
mpp_enc_cfg_set_s32(cfg, "prep:rotation", rotation);
mpp_enc_cfg_set_s32(cfg, "prep:flip", flip);
// config gop_len and ref cfg
mpp_enc_cfg_set_s32(cfg, "rc:gop", p->gop_len ? p->gop_len : p->fps_out_num * 2);
mpp_env_get_u32("gop_mode", &gop_mode, gop_mode);
if (gop_mode) {
mpp_enc_ref_cfg_init(&ref);
if (p->gop_mode < 4)
mpi_enc_gen_ref_cfg(ref, gop_mode);
else
mpi_enc_gen_smart_gop_ref_cfg(ref, p->gop_len, p->vi_len);
mpp_enc_cfg_set_ptr(cfg, "rc:ref_cfg", ref);
}
ret = mpi->control(ctx, MPP_ENC_SET_CFG, cfg);
if (ret) {
mpp_err("mpi control enc set cfg failed ret %d\n", ret);
goto RET;
}
if (ref)
mpp_enc_ref_cfg_deinit(&ref);
/* optional */
{
RK_U32 sei_mode;
@@ -495,27 +515,6 @@ MPP_RET test_mpp_enc_cfg_setup(MpiEncMultiCtxInfo *info)
}
}
RK_U32 gop_mode = p->gop_mode;
mpp_env_get_u32("gop_mode", &gop_mode, gop_mode);
if (gop_mode) {
MppEncRefCfg ref;
mpp_enc_ref_cfg_init(&ref);
if (p->gop_mode < 4)
mpi_enc_gen_ref_cfg(ref, gop_mode);
else
mpi_enc_gen_smart_gop_ref_cfg(ref, p->gop_len, p->vi_len);
ret = mpi->control(ctx, MPP_ENC_SET_REF_CFG, ref);
if (ret) {
mpp_err("mpi control enc set ref cfg failed ret %d\n", ret);
goto RET;
}
mpp_enc_ref_cfg_deinit(&ref);
}
/* setup test mode by env */
mpp_env_get_u32("osd_enable", &p->osd_enable, 0);
mpp_env_get_u32("osd_mode", &p->osd_mode, MPP_ENC_OSD_PLT_TYPE_DEFAULT);