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fix: Fix clerical error
fix denorminator to denominator Signed-off-by: Herman Chen <herman.chen@rock-chips.com> Change-Id: I6e9deed4fe3bcdc1d2f7d56f3dccb87607d576bf
This commit is contained in:
@@ -613,12 +613,12 @@ MPP_RET mpp_enc_cfg_get_st(MppEncCfg cfg, const char *name, void *val);
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| rc:bps_target | S32 | RK_S32 | 表示CBR模式下的目标码率。 |
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| rc:bps_target | S32 | RK_S32 | 表示CBR模式下的目标码率。 |
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| rc:bps_max | S32 | RK_S32 | 表示VBR/AVBR模式下的最高码率。 |
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| rc:bps_max | S32 | RK_S32 | 表示VBR/AVBR模式下的最高码率。 |
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| rc:bps_min | S32 | RK_S32 | 表示VBR/AVBR模式下的最低码率。 |
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| rc:bps_min | S32 | RK_S32 | 表示VBR/AVBR模式下的最低码率。 |
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| rc:fps_in_flex | S32 | RK_S32 | 表示输入帧率是否可变的标志位,默认为0。 为0表示输入帧率固定,帧率计算方式为: fps_in_num / fps_in_denorm,可以表示分数帧率。 为1表示输入帧率可变。可变帧率的情况下,帧率不固定,对应的码率计算与分配的规则变为按实际时间进行计算。 |
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| rc:fps_in_flex | S32 | RK_S32 | 表示输入帧率是否可变的标志位,默认为0。 为0表示输入帧率固定,帧率计算方式为: fps_in_num / fps_in_denom,可以表示分数帧率。 为1表示输入帧率可变。可变帧率的情况下,帧率不固定,对应的码率计算与分配的规则变为按实际时间进行计算。 |
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| rc:fps_in_num | S32 | RK_S32 | 表示输入帧率分数值的分子部分,默认值为30。 |
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| rc:fps_in_num | S32 | RK_S32 | 表示输入帧率分数值的分子部分,默认值为30。 |
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| rc:fps_in_denorm | S32 | RK_S32 | 表示输入帧率分数值的分母部分,默认值为1。 |
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| rc:fps_in_denom | S32 | RK_S32 | 表示输入帧率分数值的分母部分,默认值为1。 |
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| rc:fps_out_flex | S32 | RK_S32 | 表示输出帧率是否可变的标志位,默认为0。 为0表示输出帧率固定,帧率计算方式为: fps_out_num / fps_out_denorm,可以表示分数帧率。 为1表示输出帧率可变。可变帧率的情况下,帧率不固定,对应的码流输出时间按实际时间进行计算。 |
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| rc:fps_out_flex | S32 | RK_S32 | 表示输出帧率是否可变的标志位,默认为0。 为0表示输出帧率固定,帧率计算方式为: fps_out_num / fps_out_denom,可以表示分数帧率。 为1表示输出帧率可变。可变帧率的情况下,帧率不固定,对应的码流输出时间按实际时间进行计算。 |
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| rc:fps_out_num | S32 | RK_S32 | 表示输出帧率分数值的分子部分,默认值为30。 |
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| rc:fps_out_num | S32 | RK_S32 | 表示输出帧率分数值的分子部分,默认值为30。 |
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| rc:fps_out_denorm | S32 | RK_S32 | 表示输出帧率分数值的分母部分,默认值为1。 |
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| rc:fps_out_denom | S32 | RK_S32 | 表示输出帧率分数值的分母部分,默认值为1。 |
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| rc:gop | S32 | RK_S32 | 表示Group Of Picture,即两个I帧之间的间隔,含义如下: 0 – 表示只有一个I帧,其他帧均为P帧。 1 – 表示全为I帧。 2 – 表示序列为I P I P I P… 3 – 表示序列为I P P I P P I P P… 一般情况下,gop应配置为输出帧率的整数倍,默认值为两倍输出帧率。 |
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| rc:gop | S32 | RK_S32 | 表示Group Of Picture,即两个I帧之间的间隔,含义如下: 0 – 表示只有一个I帧,其他帧均为P帧。 1 – 表示全为I帧。 2 – 表示序列为I P I P I P… 3 – 表示序列为I P P I P P I P P… 一般情况下,gop应配置为输出帧率的整数倍,默认值为两倍输出帧率。 |
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| rc:max_reenc_times | U32 | RK_U32 | 表示一帧图像最大重编码次数,默认值为1。在低延时输出模式下,max_reenc_times只能配置为0。 |
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| rc:max_reenc_times | U32 | RK_U32 | 表示一帧图像最大重编码次数,默认值为1。在低延时输出模式下,max_reenc_times只能配置为0。 |
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| rc:priority | U32 | MppEncRcPriority | 表示超大帧重编优先级。 0 – 表示目标码率优先。 1 – 表示超大帧阈值优先。 此优先级只在超大帧重编时有效。  |
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| rc:priority | U32 | MppEncRcPriority | 表示超大帧重编优先级。 0 – 表示目标码率优先。 1 – 表示超大帧阈值优先。 此优先级只在超大帧重编时有效。  |
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@@ -584,13 +584,13 @@ The character string is generally defined by \[type:parameter\]. The supported c
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|rc:bps_target|S32|RK_S32|Indicates the target code rate in CBR mode.|
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|rc:bps_target|S32|RK_S32|Indicates the target code rate in CBR mode.|
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|rc:bps_max|S32|RK_S32|Indicates the highest bit rate in VBR mode.|
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|rc:bps_max|S32|RK_S32|Indicates the highest bit rate in VBR mode.|
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|rc:bps_min|S32|RK_S32|Indicates the lowest bit rate in VBR mode.|
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|rc:bps_min|S32|RK_S32|Indicates the lowest bit rate in VBR mode.|
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|rc:fps_in_flex|S32|RK_S32|Flag bit indicating whether the input frame rate is variable. The default is 0.<br>0 means that the input frame rate is fixed, and the frame rate calculation method is fps_in_num/fps_in_denorm, which can indicate the fractional frame rate.<br>1 means that the input frame rate is variable. In the case of a variable frame rate, the frame rate is not fixed, and the corresponding code rate calculation and allocation rules become calculated according to actual time.|
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|rc:fps_in_flex|S32|RK_S32|Flag bit indicating whether the input frame rate is variable. The default is 0.<br>0 means that the input frame rate is fixed, and the frame rate calculation method is fps_in_num/fps_in_denom, which can indicate the fractional frame rate.<br>1 means that the input frame rate is variable. In the case of a variable frame rate, the frame rate is not fixed, and the corresponding code rate calculation and allocation rules become calculated according to actual time.|
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|rc:fps_in_flex|S32|RK_S32|Flag bit indicating whether the input frame rate is variable. The default is 0.<br>0 means that the input frame rate is fixed, and the frame rate calculation method is fps_in_num/fps_in_denorm, which can indicate the fractional frame rate.<br>1 means that the input frame rate is variable. In the case of a variable frame rate, the frame rate is not fixed, and the corresponding code rate calculation and allocation rules become calculated according to actual time.|
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|rc:fps_in_flex|S32|RK_S32|Flag bit indicating whether the input frame rate is variable. The default is 0.<br>0 means that the input frame rate is fixed, and the frame rate calculation method is fps_in_num/fps_in_denom, which can indicate the fractional frame rate.<br>1 means that the input frame rate is variable. In the case of a variable frame rate, the frame rate is not fixed, and the corresponding code rate calculation and allocation rules become calculated according to actual time.|
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|rc:fps_in_num|S32|RK_S32|Indicates the numerator part of the input frame rate score value, for example, 0 means the default 30fps.|
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|rc:fps_in_num|S32|RK_S32|Indicates the numerator part of the input frame rate score value, for example, 0 means the default 30fps.|
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|rc:fps_in_denorm|S32|RK_S32|Indicates the denominator part of the input frame rate fraction value. If 0 is 1|
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|rc:fps_in_denom|S32|RK_S32|Indicates the denominator part of the input frame rate fraction value. If 0 is 1|
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|rc:fps_out_flex|S32|RK_S32|Flag indicating whether the output frame rate is variable. The default is 0.<br>0 means that the output frame rate is fixed, and the frame rate calculation method is fps_out_num/fps_out_denorm, which can indicate the fractional frame rate.<br>1 means that the output frame rate is variable. In the case of variable frame rate, the frame rate is not fixed, and the corresponding code stream output time is calculated according to the actual time.|
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|rc:fps_out_flex|S32|RK_S32|Flag indicating whether the output frame rate is variable. The default is 0.<br>0 means that the output frame rate is fixed, and the frame rate calculation method is fps_out_num/fps_out_denom, which can indicate the fractional frame rate.<br>1 means that the output frame rate is variable. In the case of variable frame rate, the frame rate is not fixed, and the corresponding code stream output time is calculated according to the actual time.|
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|rc:fps_out_num|S32|RK_S32|Indicates the numerator part of the output frame rate score, such as 0 means the default 30fps.|
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|rc:fps_out_num|S32|RK_S32|Indicates the numerator part of the output frame rate score, such as 0 means the default 30fps.|
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|rc:fps_out_denorm|S32|RK_S32|Indicates the denominator part of the output frame rate score value. If 0 is 1|
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|rc:fps_out_denom|S32|RK_S32|Indicates the denominator part of the output frame rate score value. If 0 is 1|
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|rc:gop||RK_S32|Indicates Group Of Picture, that is, the interval between two I frames, the meaning is as follows.<br>0-indicates that there is only one I frame, other frames are P frames<br>1-means all I frames<br>2-means the sequence is I P I P I P...<br>3-means the sequence is I P P I P P I P P...<br>In general, gop is selected as an integer multiple of the input frame rate.|
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|rc:gop||RK_S32|Indicates Group Of Picture, that is, the interval between two I frames, the meaning is as follows.<br>0-indicates that there is only one I frame, other frames are P frames<br>1-means all I frames<br>2-means the sequence is I P I P I P...<br>3-means the sequence is I P P I P P I P P...<br>In general, gop is selected as an integer multiple of the input frame rate.|
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|rc:max_reenc_times|U32|RK_U32|The maximum recoding times of a frame of image.|
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|rc:max_reenc_times|U32|RK_U32|The maximum recoding times of a frame of image.|
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|prep:width|S32|RK_S32|Indicates the number of pixels in the horizontal direction of the input image, in units of pixels.|
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|prep:width|S32|RK_S32|Indicates the number of pixels in the horizontal direction of the input image, in units of pixels.|
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@@ -71,8 +71,8 @@ typedef enum GopMode_e {
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* fps_in_num
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* fps_in_num
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* input frame rate numerator, if 0 then default 30
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* input frame rate numerator, if 0 then default 30
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*
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*
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* fps_in_denorm
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* fps_in_denom
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* input frame rate denorminator, if 0 then default 1
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* input frame rate denominator, if 0 then default 1
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*
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*
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* fps_out_flex
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* fps_out_flex
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* 0 - fix output frame rate
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* 0 - fix output frame rate
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@@ -81,16 +81,16 @@ typedef enum GopMode_e {
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* fps_out_num
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* fps_out_num
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* output frame rate numerator, if 0 then default 30
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* output frame rate numerator, if 0 then default 30
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*
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*
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* fps_out_denorm
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* fps_out_denom
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* output frame rate denorminator, if 0 then default 1
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* output frame rate denominator, if 0 then default 1
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*/
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*/
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typedef struct RcFpsCfg_t {
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typedef struct RcFpsCfg_t {
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RK_S32 fps_in_flex;
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RK_S32 fps_in_flex;
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RK_S32 fps_in_num;
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RK_S32 fps_in_num;
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RK_S32 fps_in_denorm;
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RK_S32 fps_in_denom;
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RK_S32 fps_out_flex;
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RK_S32 fps_out_flex;
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RK_S32 fps_out_num;
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RK_S32 fps_out_num;
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RK_S32 fps_out_denorm;
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RK_S32 fps_out_denom;
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} RcFpsCfg;
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} RcFpsCfg;
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typedef struct RcSuperframeCfg_t {
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typedef struct RcSuperframeCfg_t {
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@@ -213,8 +213,8 @@ typedef enum MppEncRcCfgChange_e {
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MPP_ENC_RC_CFG_CHANGE_RC_MODE = (1 << 0),
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MPP_ENC_RC_CFG_CHANGE_RC_MODE = (1 << 0),
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MPP_ENC_RC_CFG_CHANGE_QUALITY = (1 << 1),
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MPP_ENC_RC_CFG_CHANGE_QUALITY = (1 << 1),
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MPP_ENC_RC_CFG_CHANGE_BPS = (1 << 2), /* change on bps target / max / min */
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MPP_ENC_RC_CFG_CHANGE_BPS = (1 << 2), /* change on bps target / max / min */
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MPP_ENC_RC_CFG_CHANGE_FPS_IN = (1 << 5), /* change on fps in flex / numerator / denorminator */
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MPP_ENC_RC_CFG_CHANGE_FPS_IN = (1 << 5), /* change on fps in flex / numerator / denominator */
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MPP_ENC_RC_CFG_CHANGE_FPS_OUT = (1 << 6), /* change on fps out flex / numerator / denorminator */
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MPP_ENC_RC_CFG_CHANGE_FPS_OUT = (1 << 6), /* change on fps out flex / numerator / denominator */
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MPP_ENC_RC_CFG_CHANGE_GOP = (1 << 7),
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MPP_ENC_RC_CFG_CHANGE_GOP = (1 << 7),
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MPP_ENC_RC_CFG_CHANGE_SKIP_CNT = (1 << 8),
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MPP_ENC_RC_CFG_CHANGE_SKIP_CNT = (1 << 8),
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MPP_ENC_RC_CFG_CHANGE_MAX_REENC = (1 << 9),
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MPP_ENC_RC_CFG_CHANGE_MAX_REENC = (1 << 9),
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@@ -312,8 +312,8 @@ typedef struct MppEncRcCfg_t {
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* fps_in_num
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* fps_in_num
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* input frame rate numerator, if 0 then default 30
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* input frame rate numerator, if 0 then default 30
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*
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*
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* fps_in_denorm
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* fps_in_denom
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* input frame rate denorminator, if 0 then default 1
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* input frame rate denominator, if 0 then default 1
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*
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*
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* fps_out_flex
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* fps_out_flex
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* 0 - fix output frame rate
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* 0 - fix output frame rate
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@@ -322,15 +322,15 @@ typedef struct MppEncRcCfg_t {
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* fps_out_num
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* fps_out_num
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* output frame rate numerator, if 0 then default 30
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* output frame rate numerator, if 0 then default 30
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*
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*
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* fps_out_denorm
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* fps_out_denom
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* output frame rate denorminator, if 0 then default 1
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* output frame rate denominator, if 0 then default 1
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*/
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*/
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RK_S32 fps_in_flex;
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RK_S32 fps_in_flex;
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RK_S32 fps_in_num;
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RK_S32 fps_in_num;
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RK_S32 fps_in_denorm;
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RK_S32 fps_in_denom;
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RK_S32 fps_out_flex;
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RK_S32 fps_out_flex;
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RK_S32 fps_out_num;
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RK_S32 fps_out_num;
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RK_S32 fps_out_denorm;
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RK_S32 fps_out_denom;
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/*
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/*
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* gop - group of picture, gap between Intra frame
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* gop - group of picture, gap between Intra frame
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@@ -132,10 +132,12 @@ public:
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ENTRY(rc, bps_min, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_BPS, rc, bps_min) \
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ENTRY(rc, bps_min, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_BPS, rc, bps_min) \
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ENTRY(rc, fps_in_flex, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_IN, rc, fps_in_flex) \
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ENTRY(rc, fps_in_flex, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_IN, rc, fps_in_flex) \
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ENTRY(rc, fps_in_num, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_IN, rc, fps_in_num) \
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ENTRY(rc, fps_in_num, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_IN, rc, fps_in_num) \
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ENTRY(rc, fps_in_denorm, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_IN, rc, fps_in_denorm) \
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ENTRY(rc, fps_in_denom, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_IN, rc, fps_in_denom) \
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ENTRY(rc, fps_in_denorm, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_IN, rc, fps_in_denom) \
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ENTRY(rc, fps_out_flex, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_OUT, rc, fps_out_flex) \
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ENTRY(rc, fps_out_flex, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_OUT, rc, fps_out_flex) \
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ENTRY(rc, fps_out_num, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_OUT, rc, fps_out_num) \
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ENTRY(rc, fps_out_num, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_OUT, rc, fps_out_num) \
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ENTRY(rc, fps_out_denorm, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_OUT, rc, fps_out_denorm) \
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ENTRY(rc, fps_out_denom, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_OUT, rc, fps_out_denom) \
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ENTRY(rc, fps_out_denorm, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_FPS_OUT, rc, fps_out_denom) \
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ENTRY(rc, gop, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_GOP, rc, gop) \
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ENTRY(rc, gop, S32, RK_S32, MPP_ENC_RC_CFG_CHANGE_GOP, rc, gop) \
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ENTRY(rc, ref_cfg, Ptr, void *, MPP_ENC_RC_CFG_CHANGE_GOP_REF_CFG, rc, ref_cfg) \
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ENTRY(rc, ref_cfg, Ptr, void *, MPP_ENC_RC_CFG_CHANGE_GOP_REF_CFG, rc, ref_cfg) \
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ENTRY(rc, max_reenc_times,U32, RK_U32, MPP_ENC_RC_CFG_CHANGE_MAX_REENC, rc, max_reenc_times) \
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ENTRY(rc, max_reenc_times,U32, RK_U32, MPP_ENC_RC_CFG_CHANGE_MAX_REENC, rc, max_reenc_times) \
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@@ -165,10 +165,10 @@ static void init_h264e_cfg_set(MppEncCfgSet *cfg, MppClientType type)
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rc_cfg->bps_min = rc_cfg->bps_target * 3 / 4;
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rc_cfg->bps_min = rc_cfg->bps_target * 3 / 4;
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rc_cfg->fps_in_flex = 0;
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rc_cfg->fps_in_flex = 0;
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rc_cfg->fps_in_num = 30;
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rc_cfg->fps_in_num = 30;
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rc_cfg->fps_in_denorm = 1;
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rc_cfg->fps_in_denom = 1;
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rc_cfg->fps_out_flex = 0;
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rc_cfg->fps_out_flex = 0;
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rc_cfg->fps_out_num = 30;
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rc_cfg->fps_out_num = 30;
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rc_cfg->fps_out_denorm = 1;
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rc_cfg->fps_out_denom = 1;
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rc_cfg->gop = 60;
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rc_cfg->gop = 60;
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rc_cfg->max_reenc_times = 1;
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rc_cfg->max_reenc_times = 1;
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rc_cfg->max_i_prop = 30;
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rc_cfg->max_i_prop = 30;
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@@ -218,7 +218,7 @@ MPP_RET h264e_sps_update(H264eSps *sps, MppEncCfgSet *cfg)
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vui->vui_present = 1;
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vui->vui_present = 1;
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vui->timing_info_present = 1;
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vui->timing_info_present = 1;
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vui->time_scale = rc->fps_out_num * 2;
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vui->time_scale = rc->fps_out_num * 2;
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vui->num_units_in_tick = rc->fps_out_denorm;
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vui->num_units_in_tick = rc->fps_out_denom;
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vui->fixed_frame_rate = !rc->fps_out_flex;
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vui->fixed_frame_rate = !rc->fps_out_flex;
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vui->vidformat = MPP_FRAME_VIDEO_FMT_UNSPECIFIED;
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vui->vidformat = MPP_FRAME_VIDEO_FMT_UNSPECIFIED;
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||||||
|
@@ -150,10 +150,10 @@ static MPP_RET h265e_init(void *ctx, EncImplCfg *ctrlCfg)
|
|||||||
rc_cfg->bps_min = rc_cfg->bps_target * 3 / 4;
|
rc_cfg->bps_min = rc_cfg->bps_target * 3 / 4;
|
||||||
rc_cfg->fps_in_flex = 0;
|
rc_cfg->fps_in_flex = 0;
|
||||||
rc_cfg->fps_in_num = 30;
|
rc_cfg->fps_in_num = 30;
|
||||||
rc_cfg->fps_in_denorm = 1;
|
rc_cfg->fps_in_denom = 1;
|
||||||
rc_cfg->fps_out_flex = 0;
|
rc_cfg->fps_out_flex = 0;
|
||||||
rc_cfg->fps_out_num = 30;
|
rc_cfg->fps_out_num = 30;
|
||||||
rc_cfg->fps_out_denorm = 1;
|
rc_cfg->fps_out_denom = 1;
|
||||||
rc_cfg->gop = 60;
|
rc_cfg->gop = 60;
|
||||||
rc_cfg->max_reenc_times = 1;
|
rc_cfg->max_reenc_times = 1;
|
||||||
rc_cfg->max_i_prop = 30;
|
rc_cfg->max_i_prop = 30;
|
||||||
|
@@ -183,7 +183,7 @@ MPP_RET h265e_set_sps(H265eCtx *ctx, H265eSps *sps, H265eVps *vps)
|
|||||||
MppEncRefCfg ref_cfg = ctx->cfg->ref_cfg;
|
MppEncRefCfg ref_cfg = ctx->cfg->ref_cfg;
|
||||||
MppEncH265VuiCfg *vui = &codec->vui;
|
MppEncH265VuiCfg *vui = &codec->vui;
|
||||||
MppFrameFormat fmt = prep->format;
|
MppFrameFormat fmt = prep->format;
|
||||||
RK_S32 i_timebase_num = rc->fps_out_denorm;
|
RK_S32 i_timebase_num = rc->fps_out_denom;
|
||||||
RK_S32 i_timebase_den = rc->fps_out_num;
|
RK_S32 i_timebase_den = rc->fps_out_num;
|
||||||
RK_U8 convertToBit[MAX_CU_SIZE + 1];
|
RK_U8 convertToBit[MAX_CU_SIZE + 1];
|
||||||
RK_U32 maxCUDepth, minCUDepth, addCUDepth;
|
RK_U32 maxCUDepth, minCUDepth, addCUDepth;
|
||||||
|
@@ -82,10 +82,10 @@ static MPP_RET jpege_init_v2(void *ctx, EncImplCfg *cfg)
|
|||||||
|
|
||||||
rc->fps_in_flex = 0;
|
rc->fps_in_flex = 0;
|
||||||
rc->fps_in_num = 30;
|
rc->fps_in_num = 30;
|
||||||
rc->fps_in_denorm = 1;
|
rc->fps_in_denom = 1;
|
||||||
rc->fps_out_flex = 0;
|
rc->fps_out_flex = 0;
|
||||||
rc->fps_out_num = 30;
|
rc->fps_out_num = 30;
|
||||||
rc->fps_out_denorm = 1;
|
rc->fps_out_denom = 1;
|
||||||
rc->rc_mode = MPP_ENC_RC_MODE_VBR;
|
rc->rc_mode = MPP_ENC_RC_MODE_VBR;
|
||||||
/* init default quant */
|
/* init default quant */
|
||||||
jpeg_cfg->quant = 10;
|
jpeg_cfg->quant = 10;
|
||||||
|
@@ -97,10 +97,10 @@ static MPP_RET vp8e_init(void *ctx, EncImplCfg *ctrl_cfg)
|
|||||||
rc_cfg->bps_min = rc_cfg->bps_target * 3 / 4;
|
rc_cfg->bps_min = rc_cfg->bps_target * 3 / 4;
|
||||||
rc_cfg->fps_in_flex = 0;
|
rc_cfg->fps_in_flex = 0;
|
||||||
rc_cfg->fps_in_num = 30;
|
rc_cfg->fps_in_num = 30;
|
||||||
rc_cfg->fps_in_denorm = 1;
|
rc_cfg->fps_in_denom = 1;
|
||||||
rc_cfg->fps_out_flex = 0;
|
rc_cfg->fps_out_flex = 0;
|
||||||
rc_cfg->fps_out_num = 30;
|
rc_cfg->fps_out_num = 30;
|
||||||
rc_cfg->fps_out_denorm = 1;
|
rc_cfg->fps_out_denom = 1;
|
||||||
rc_cfg->gop = 60;
|
rc_cfg->gop = 60;
|
||||||
rc_cfg->max_reenc_times = 1;
|
rc_cfg->max_reenc_times = 1;
|
||||||
rc_cfg->fqp_min_i = INT_MAX;
|
rc_cfg->fqp_min_i = INT_MAX;
|
||||||
|
@@ -406,18 +406,18 @@ MPP_RET vp8e_update_rc_cfg(Vp8eRc *rc, MppEncRcCfg *cfg)
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (change & MPP_ENC_RC_CFG_CHANGE_FPS_OUT) {
|
if (change & MPP_ENC_RC_CFG_CHANGE_FPS_OUT) {
|
||||||
vp8e_rc_dbg_cfg("fps: %d / %d\n", cfg->fps_out_num, cfg->fps_out_denorm);
|
vp8e_rc_dbg_cfg("fps: %d / %d\n", cfg->fps_out_num, cfg->fps_out_denom);
|
||||||
rc->fps_out_num = cfg->fps_out_num;
|
rc->fps_out_num = cfg->fps_out_num;
|
||||||
rc->fps_out_denorm = cfg->fps_out_denorm;
|
rc->fps_out_denom = cfg->fps_out_denom;
|
||||||
if (rc->fps_out_denorm == 0) {
|
if (rc->fps_out_denom == 0) {
|
||||||
mpp_err("denorm can not be 0, change to default 1");
|
mpp_err("denom can not be 0, change to default 1");
|
||||||
rc->fps_out_denorm = 1;
|
rc->fps_out_denom = 1;
|
||||||
}
|
}
|
||||||
rc->fps_out = rc->fps_out_num / rc->fps_out_denorm;
|
rc->fps_out = rc->fps_out_num / rc->fps_out_denom;
|
||||||
if (rc->fps_out == 0) {
|
if (rc->fps_out == 0) {
|
||||||
rc->fps_out = 30;
|
rc->fps_out = 30;
|
||||||
rc->fps_out_num = 30;
|
rc->fps_out_num = 30;
|
||||||
rc->fps_out_denorm = 1;
|
rc->fps_out_denom = 1;
|
||||||
mpp_err("fps out can not be 0, change to default 30");
|
mpp_err("fps out can not be 0, change to default 30");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -427,7 +427,7 @@ MPP_RET vp8e_update_rc_cfg(Vp8eRc *rc, MppEncRcCfg *cfg)
|
|||||||
rc->gop_len = cfg->gop;
|
rc->gop_len = cfg->gop;
|
||||||
vp8e_rc_dbg_cfg("gop: %d\n", cfg->gop);
|
vp8e_rc_dbg_cfg("gop: %d\n", cfg->gop);
|
||||||
}
|
}
|
||||||
vb->bit_per_pic = axb_div_c(vb->bit_rate, rc->fps_out_denorm, rc->fps_out_num);
|
vb->bit_per_pic = axb_div_c(vb->bit_rate, rc->fps_out_denom, rc->fps_out_num);
|
||||||
|
|
||||||
cfg->change = 0;
|
cfg->change = 0;
|
||||||
|
|
||||||
@@ -452,7 +452,7 @@ MPP_RET vp8e_init_rc(Vp8eRc *rc, MppEncCfgSet *cfg)
|
|||||||
rc->golden_picture_rate = 0;
|
rc->golden_picture_rate = 0;
|
||||||
rc->altref_picture_rate = 0;
|
rc->altref_picture_rate = 0;
|
||||||
rc->virbuf.bit_rate = cfg->rc.bps_target;
|
rc->virbuf.bit_rate = cfg->rc.bps_target;
|
||||||
rc->fps_out_denorm = cfg->rc.fps_out_denorm;
|
rc->fps_out_denom = cfg->rc.fps_out_denom;
|
||||||
rc->fps_out_num = cfg->rc.fps_out_num;
|
rc->fps_out_num = cfg->rc.fps_out_num;
|
||||||
rc->mb_per_pic = ((cfg->prep.width + 15) / 16) * ((cfg->prep.height + 15) / 16);
|
rc->mb_per_pic = ((cfg->prep.width + 15) / 16) * ((cfg->prep.height + 15) / 16);
|
||||||
|
|
||||||
@@ -464,12 +464,12 @@ MPP_RET vp8e_init_rc(Vp8eRc *rc, MppEncCfgSet *cfg)
|
|||||||
|
|
||||||
max_bps = rc->mb_per_pic * 16 * 16 * 6;
|
max_bps = rc->mb_per_pic * 16 * 16 * 6;
|
||||||
max_bps = axb_div_c(max_bps, rc->fps_out_num,
|
max_bps = axb_div_c(max_bps, rc->fps_out_num,
|
||||||
rc->fps_out_denorm);
|
rc->fps_out_denom);
|
||||||
|
|
||||||
if (max_bps < 0)
|
if (max_bps < 0)
|
||||||
max_bps = I32_MPP_MAX;
|
max_bps = I32_MPP_MAX;
|
||||||
vb->bit_rate = MPP_MIN(vb->bit_rate, max_bps);
|
vb->bit_rate = MPP_MIN(vb->bit_rate, max_bps);
|
||||||
vb->bit_per_pic = axb_div_c(vb->bit_rate, rc->fps_out_denorm,
|
vb->bit_per_pic = axb_div_c(vb->bit_rate, rc->fps_out_denom,
|
||||||
rc->fps_out_num);
|
rc->fps_out_num);
|
||||||
|
|
||||||
if (rc->qp_hdr == -1)
|
if (rc->qp_hdr == -1)
|
||||||
|
@@ -124,7 +124,7 @@ extern "C" {
|
|||||||
MPP_RET mpp_data_init(MppData **p, RK_S32 len);
|
MPP_RET mpp_data_init(MppData **p, RK_S32 len);
|
||||||
void mpp_data_deinit(MppData *p);
|
void mpp_data_deinit(MppData *p);
|
||||||
void mpp_data_update(MppData *p, RK_S32 val);
|
void mpp_data_update(MppData *p, RK_S32 val);
|
||||||
RK_S32 mpp_data_avg(MppData *p, RK_S32 len, RK_S32 num, RK_S32 denorm);
|
RK_S32 mpp_data_avg(MppData *p, RK_S32 len, RK_S32 num, RK_S32 denom);
|
||||||
|
|
||||||
void mpp_pid_reset(MppPIDCtx *p);
|
void mpp_pid_reset(MppPIDCtx *p);
|
||||||
void mpp_pid_set_param(MppPIDCtx *p, RK_S32 coef_p, RK_S32 coef_i, RK_S32 coef_d, RK_S32 div, RK_S32 len);
|
void mpp_pid_set_param(MppPIDCtx *p, RK_S32 coef_p, RK_S32 coef_i, RK_S32 coef_d, RK_S32 div, RK_S32 len);
|
||||||
|
@@ -560,13 +560,13 @@ MPP_RET mpp_enc_proc_rc_cfg(MppCodingType coding, MppEncRcCfg *dst, MppEncRcCfg
|
|||||||
if (change & MPP_ENC_RC_CFG_CHANGE_FPS_IN) {
|
if (change & MPP_ENC_RC_CFG_CHANGE_FPS_IN) {
|
||||||
dst->fps_in_flex = src->fps_in_flex;
|
dst->fps_in_flex = src->fps_in_flex;
|
||||||
dst->fps_in_num = src->fps_in_num;
|
dst->fps_in_num = src->fps_in_num;
|
||||||
dst->fps_in_denorm = src->fps_in_denorm;
|
dst->fps_in_denom = src->fps_in_denom;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (change & MPP_ENC_RC_CFG_CHANGE_FPS_OUT) {
|
if (change & MPP_ENC_RC_CFG_CHANGE_FPS_OUT) {
|
||||||
dst->fps_out_flex = src->fps_out_flex;
|
dst->fps_out_flex = src->fps_out_flex;
|
||||||
dst->fps_out_num = src->fps_out_num;
|
dst->fps_out_num = src->fps_out_num;
|
||||||
dst->fps_out_denorm = src->fps_out_denorm;
|
dst->fps_out_denom = src->fps_out_denom;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (change & MPP_ENC_RC_CFG_CHANGE_GOP) {
|
if (change & MPP_ENC_RC_CFG_CHANGE_GOP) {
|
||||||
@@ -713,11 +713,11 @@ MPP_RET mpp_enc_proc_rc_cfg(MppCodingType coding, MppEncRcCfg *dst, MppEncRcCfg
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (dst->fps_in_num < 0 || dst->fps_in_denorm < 0 ||
|
if (dst->fps_in_num < 0 || dst->fps_in_denom < 0 ||
|
||||||
dst->fps_out_num < 0 || dst->fps_out_denorm < 0) {
|
dst->fps_out_num < 0 || dst->fps_out_denom < 0) {
|
||||||
mpp_err("invalid fps cfg [number:denorm:flex]: in [%d:%d:%d] out [%d:%d:%d]\n",
|
mpp_err("invalid fps cfg [number:denom:flex]: in [%d:%d:%d] out [%d:%d:%d]\n",
|
||||||
dst->fps_in_num, dst->fps_in_denorm, dst->fps_in_flex,
|
dst->fps_in_num, dst->fps_in_denom, dst->fps_in_flex,
|
||||||
dst->fps_out_num, dst->fps_out_denorm, dst->fps_out_flex);
|
dst->fps_out_num, dst->fps_out_denom, dst->fps_out_flex);
|
||||||
ret = MPP_ERR_VALUE;
|
ret = MPP_ERR_VALUE;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1223,10 +1223,10 @@ static void set_rc_cfg(RcCfg *cfg, MppEncCfgSet *cfg_set)
|
|||||||
|
|
||||||
cfg->fps.fps_in_flex = rc->fps_in_flex;
|
cfg->fps.fps_in_flex = rc->fps_in_flex;
|
||||||
cfg->fps.fps_in_num = rc->fps_in_num;
|
cfg->fps.fps_in_num = rc->fps_in_num;
|
||||||
cfg->fps.fps_in_denorm = rc->fps_in_denorm;
|
cfg->fps.fps_in_denom = rc->fps_in_denom;
|
||||||
cfg->fps.fps_out_flex = rc->fps_out_flex;
|
cfg->fps.fps_out_flex = rc->fps_out_flex;
|
||||||
cfg->fps.fps_out_num = rc->fps_out_num;
|
cfg->fps.fps_out_num = rc->fps_out_num;
|
||||||
cfg->fps.fps_out_denorm = rc->fps_out_denorm;
|
cfg->fps.fps_out_denom = rc->fps_out_denom;
|
||||||
cfg->igop = rc->gop;
|
cfg->igop = rc->gop;
|
||||||
cfg->max_i_bit_prop = rc->max_i_prop;
|
cfg->max_i_bit_prop = rc->max_i_prop;
|
||||||
cfg->min_i_bit_prop = rc->min_i_prop;
|
cfg->min_i_bit_prop = rc->min_i_prop;
|
||||||
@@ -1302,7 +1302,7 @@ static void set_rc_cfg(RcCfg *cfg, MppEncCfgSet *cfg_set)
|
|||||||
|
|
||||||
if (info->st_gop) {
|
if (info->st_gop) {
|
||||||
cfg->vgop = info->st_gop;
|
cfg->vgop = info->st_gop;
|
||||||
if (cfg->vgop >= rc->fps_out_num / rc->fps_out_denorm &&
|
if (cfg->vgop >= rc->fps_out_num / rc->fps_out_denom &&
|
||||||
cfg->vgop < cfg->igop ) {
|
cfg->vgop < cfg->igop ) {
|
||||||
cfg->gop_mode = SMART_P;
|
cfg->gop_mode = SMART_P;
|
||||||
if (!cfg->vi_quality_delta)
|
if (!cfg->vi_quality_delta)
|
||||||
@@ -1316,9 +1316,9 @@ static void set_rc_cfg(RcCfg *cfg, MppEncCfgSet *cfg_set)
|
|||||||
name_of_rc_mode[cfg->mode],
|
name_of_rc_mode[cfg->mode],
|
||||||
rc->bps_min, rc->bps_target, rc->bps_max,
|
rc->bps_min, rc->bps_target, rc->bps_max,
|
||||||
cfg->fps.fps_in_flex ? "flex" : "fix",
|
cfg->fps.fps_in_flex ? "flex" : "fix",
|
||||||
cfg->fps.fps_in_num, cfg->fps.fps_in_denorm,
|
cfg->fps.fps_in_num, cfg->fps.fps_in_denom,
|
||||||
cfg->fps.fps_out_flex ? "flex" : "fix",
|
cfg->fps.fps_out_flex ? "flex" : "fix",
|
||||||
cfg->fps.fps_out_num, cfg->fps.fps_out_denorm,
|
cfg->fps.fps_out_num, cfg->fps.fps_out_denom,
|
||||||
cfg->igop, cfg->vgop);
|
cfg->igop, cfg->vgop);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@@ -88,7 +88,7 @@ void mpp_data_update(MppData *p, RK_S32 val)
|
|||||||
p->len++;
|
p->len++;
|
||||||
}
|
}
|
||||||
|
|
||||||
RK_S32 mpp_data_avg(MppData *p, RK_S32 len, RK_S32 num, RK_S32 denorm)
|
RK_S32 mpp_data_avg(MppData *p, RK_S32 len, RK_S32 num, RK_S32 denom)
|
||||||
{
|
{
|
||||||
mpp_assert(p);
|
mpp_assert(p);
|
||||||
|
|
||||||
@@ -102,7 +102,7 @@ RK_S32 mpp_data_avg(MppData *p, RK_S32 len, RK_S32 num, RK_S32 denorm)
|
|||||||
if (len < 0 || len > p->len)
|
if (len < 0 || len > p->len)
|
||||||
len = p->len;
|
len = p->len;
|
||||||
|
|
||||||
if (num == denorm) {
|
if (num == denom) {
|
||||||
i = len;
|
i = len;
|
||||||
while (i--) {
|
while (i--) {
|
||||||
if (pos)
|
if (pos)
|
||||||
@@ -114,9 +114,9 @@ RK_S32 mpp_data_avg(MppData *p, RK_S32 len, RK_S32 num, RK_S32 denorm)
|
|||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
/* This case is not used so far, but may be useful in the future */
|
/* This case is not used so far, but may be useful in the future */
|
||||||
mpp_assert(num > denorm);
|
mpp_assert(num > denom);
|
||||||
RK_S32 acc_num = num;
|
RK_S32 acc_num = num;
|
||||||
RK_S32 acc_denorm = denorm;
|
RK_S32 acc_denom = denom;
|
||||||
|
|
||||||
i = len - 1;
|
i = len - 1;
|
||||||
sum = p->val[--pos];
|
sum = p->val[--pos];
|
||||||
@@ -126,9 +126,9 @@ RK_S32 mpp_data_avg(MppData *p, RK_S32 len, RK_S32 num, RK_S32 denorm)
|
|||||||
else
|
else
|
||||||
pos = p->len - 1;
|
pos = p->len - 1;
|
||||||
|
|
||||||
sum += p->val[pos] * acc_num / acc_denorm;
|
sum += p->val[pos] * acc_num / acc_denom;
|
||||||
acc_num *= num;
|
acc_num *= num;
|
||||||
acc_denorm *= denorm;
|
acc_denom *= denom;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
return DIV(sum, len);
|
return DIV(sum, len);
|
||||||
|
@@ -145,12 +145,12 @@ MPP_RET rc_frm_check_drop(RcCtx ctx, EncRcTask *task)
|
|||||||
} else {
|
} else {
|
||||||
RcFpsCfg *cfg = &p->fps;
|
RcFpsCfg *cfg = &p->fps;
|
||||||
RK_S32 frm_cnt = p->frm_cnt;
|
RK_S32 frm_cnt = p->frm_cnt;
|
||||||
RK_S32 rate_in = cfg->fps_in_num * cfg->fps_out_denorm;
|
RK_S32 rate_in = cfg->fps_in_num * cfg->fps_out_denom;
|
||||||
RK_S32 rate_out = cfg->fps_out_num * cfg->fps_in_denorm;
|
RK_S32 rate_out = cfg->fps_out_num * cfg->fps_in_denom;
|
||||||
RK_S32 drop = 0;
|
RK_S32 drop = 0;
|
||||||
|
|
||||||
mpp_assert(cfg->fps_in_denorm >= 1);
|
mpp_assert(cfg->fps_in_denom >= 1);
|
||||||
mpp_assert(cfg->fps_out_denorm >= 1);
|
mpp_assert(cfg->fps_out_denom >= 1);
|
||||||
mpp_assert(rate_in >= rate_out);
|
mpp_assert(rate_in >= rate_out);
|
||||||
|
|
||||||
// frame counter is inited to (rate_in - rate_out) to encode first frame
|
// frame counter is inited to (rate_in - rate_out) to encode first frame
|
||||||
|
@@ -165,7 +165,7 @@ RK_S32 mpp_data_mean_v2(MppDataV2 *p)
|
|||||||
return mean;
|
return mean;
|
||||||
}
|
}
|
||||||
|
|
||||||
RK_S32 mpp_data_sum_with_ratio_v2(MppDataV2 *p, RK_S32 len, RK_S32 num, RK_S32 denorm)
|
RK_S32 mpp_data_sum_with_ratio_v2(MppDataV2 *p, RK_S32 len, RK_S32 num, RK_S32 denom)
|
||||||
{
|
{
|
||||||
mpp_assert(p);
|
mpp_assert(p);
|
||||||
|
|
||||||
@@ -175,18 +175,18 @@ RK_S32 mpp_data_sum_with_ratio_v2(MppDataV2 *p, RK_S32 len, RK_S32 num, RK_S32 d
|
|||||||
|
|
||||||
mpp_assert(len <= p->size);
|
mpp_assert(len <= p->size);
|
||||||
|
|
||||||
if (num == denorm) {
|
if (num == denom) {
|
||||||
for (i = 0; i < len; i++)
|
for (i = 0; i < len; i++)
|
||||||
sum += *data++;
|
sum += *data++;
|
||||||
} else {
|
} else {
|
||||||
// NOTE: use 64bit to avoid 0 in 32bit
|
// NOTE: use 64bit to avoid 0 in 32bit
|
||||||
RK_S64 acc_num = 1;
|
RK_S64 acc_num = 1;
|
||||||
RK_S64 acc_denorm = 1;
|
RK_S64 acc_denom = 1;
|
||||||
|
|
||||||
for (i = 0; i < len; i++) {
|
for (i = 0; i < len; i++) {
|
||||||
sum += p->val[i] * acc_num / acc_denorm;
|
sum += p->val[i] * acc_num / acc_denom;
|
||||||
acc_num *= num;
|
acc_num *= num;
|
||||||
acc_denorm *= denorm;
|
acc_denom *= denom;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@@ -60,7 +60,7 @@ void mpp_data_update_v2(MppDataV2 *p, RK_S32 val);
|
|||||||
RK_S32 mpp_data_sum_v2(MppDataV2 *p);
|
RK_S32 mpp_data_sum_v2(MppDataV2 *p);
|
||||||
RK_S32 mpp_data_mean_v2(MppDataV2 *p);
|
RK_S32 mpp_data_mean_v2(MppDataV2 *p);
|
||||||
RK_S32 mpp_data_get_pre_val_v2(MppDataV2 *p, RK_S32 idx);
|
RK_S32 mpp_data_get_pre_val_v2(MppDataV2 *p, RK_S32 idx);
|
||||||
RK_S32 mpp_data_sum_with_ratio_v2(MppDataV2 *p, RK_S32 len, RK_S32 num, RK_S32 denorm);
|
RK_S32 mpp_data_sum_with_ratio_v2(MppDataV2 *p, RK_S32 len, RK_S32 num, RK_S32 denom);
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
|
@@ -137,7 +137,7 @@ MPP_RET bits_model_param_init(RcModelV2Ctx *ctx)
|
|||||||
{
|
{
|
||||||
RK_S32 gop_len = ctx->usr_cfg.igop;
|
RK_S32 gop_len = ctx->usr_cfg.igop;
|
||||||
RcFpsCfg *fps = &ctx->usr_cfg.fps;
|
RcFpsCfg *fps = &ctx->usr_cfg.fps;
|
||||||
RK_U32 stat_len = fps->fps_out_num * ctx->usr_cfg.stats_time / fps->fps_out_denorm;
|
RK_U32 stat_len = fps->fps_out_num * ctx->usr_cfg.stats_time / fps->fps_out_denom;
|
||||||
stat_len = stat_len ? stat_len : 1;
|
stat_len = stat_len ? stat_len : 1;
|
||||||
|
|
||||||
bits_model_param_deinit(ctx);
|
bits_model_param_deinit(ctx);
|
||||||
@@ -1134,16 +1134,16 @@ MPP_RET bits_model_init(RcModelV2Ctx *ctx)
|
|||||||
ctx->target_bps = ctx->usr_cfg.bps_target;
|
ctx->target_bps = ctx->usr_cfg.bps_target;
|
||||||
|
|
||||||
if (gop_len >= 1)
|
if (gop_len >= 1)
|
||||||
gop_bits = (RK_S64)gop_len * target_bps * fps->fps_out_denorm;
|
gop_bits = (RK_S64)gop_len * target_bps * fps->fps_out_denom;
|
||||||
else
|
else
|
||||||
gop_bits = (RK_S64)fps->fps_out_num * target_bps * fps->fps_out_denorm;
|
gop_bits = (RK_S64)fps->fps_out_num * target_bps * fps->fps_out_denom;
|
||||||
|
|
||||||
ctx->gop_total_bits = gop_bits / fps->fps_out_num;
|
ctx->gop_total_bits = gop_bits / fps->fps_out_num;
|
||||||
ctx->bit_per_frame = target_bps * fps->fps_out_denorm / fps->fps_out_num;
|
ctx->bit_per_frame = target_bps * fps->fps_out_denom / fps->fps_out_num;
|
||||||
ctx->watl_thrd = 3 * target_bps;
|
ctx->watl_thrd = 3 * target_bps;
|
||||||
ctx->stat_watl = ctx->watl_thrd >> 3;
|
ctx->stat_watl = ctx->watl_thrd >> 3;
|
||||||
ctx->watl_base = ctx->stat_watl;
|
ctx->watl_base = ctx->stat_watl;
|
||||||
ctx->last_fps = fps->fps_out_num / fps->fps_out_denorm;
|
ctx->last_fps = fps->fps_out_num / fps->fps_out_denom;
|
||||||
|
|
||||||
rc_dbg_rc("gop %d total bit %lld per_frame %d statistics time %d second\n",
|
rc_dbg_rc("gop %d total bit %lld per_frame %d statistics time %d second\n",
|
||||||
ctx->usr_cfg.igop, ctx->gop_total_bits, ctx->bit_per_frame,
|
ctx->usr_cfg.igop, ctx->gop_total_bits, ctx->bit_per_frame,
|
||||||
|
@@ -296,8 +296,8 @@ MPP_RET bits_model_smt_init(RcModelV2SmtCtx *ctx)
|
|||||||
|
|
||||||
ctx->bps_target_low_rate = ctx->usr_cfg.bps_min;
|
ctx->bps_target_low_rate = ctx->usr_cfg.bps_min;
|
||||||
ctx->bps_target_high_rate = ctx->usr_cfg.bps_max;
|
ctx->bps_target_high_rate = ctx->usr_cfg.bps_max;
|
||||||
ctx->bits_per_pic_low_rate = axb_div_c(ctx->bps_target_low_rate, fps->fps_out_denorm, fps->fps_out_num);
|
ctx->bits_per_pic_low_rate = axb_div_c(ctx->bps_target_low_rate, fps->fps_out_denom, fps->fps_out_num);
|
||||||
ctx->bits_per_pic_high_rate = axb_div_c(ctx->bps_target_high_rate, fps->fps_out_denorm, fps->fps_out_num);
|
ctx->bits_per_pic_high_rate = axb_div_c(ctx->bps_target_high_rate, fps->fps_out_denom, fps->fps_out_num);
|
||||||
|
|
||||||
ctx->acc_intra_bits_in_fps = 0;
|
ctx->acc_intra_bits_in_fps = 0;
|
||||||
ctx->acc_inter_bits_in_fps = 0;
|
ctx->acc_inter_bits_in_fps = 0;
|
||||||
|
@@ -78,7 +78,7 @@ typedef struct {
|
|||||||
RK_S32 qp_max;
|
RK_S32 qp_max;
|
||||||
RK_S32 qp_hdr_prev;
|
RK_S32 qp_hdr_prev;
|
||||||
RK_S32 fps_out_num; //MppEncRcCfg.fps_out_num
|
RK_S32 fps_out_num; //MppEncRcCfg.fps_out_num
|
||||||
RK_S32 fps_out_denorm; //MppEncRcCfg.fps_out_denorm
|
RK_S32 fps_out_denom; //MppEncRcCfg.fps_out_denom
|
||||||
RK_S32 fps_out;
|
RK_S32 fps_out;
|
||||||
|
|
||||||
RK_S32 target_pic_size;
|
RK_S32 target_pic_size;
|
||||||
|
@@ -234,14 +234,14 @@ RK_U64 hal_info_to_string(HalInfo ctx, RK_U32 type, void *val)
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
RK_U64 hal_info_to_float(RK_S32 num, RK_S32 denorm)
|
RK_U64 hal_info_to_float(RK_S32 num, RK_S32 denom)
|
||||||
{
|
{
|
||||||
RK_U64 ret = 0;
|
RK_U64 ret = 0;
|
||||||
|
|
||||||
if (!denorm)
|
if (!denom)
|
||||||
snprintf((void *)&ret, sizeof(ret) - 1, "%d", num);
|
snprintf((void *)&ret, sizeof(ret) - 1, "%d", num);
|
||||||
else
|
else
|
||||||
snprintf((void *)&ret, sizeof(ret) - 1, "%.2f", (float)num / denorm);
|
snprintf((void *)&ret, sizeof(ret) - 1, "%.2f", (float)num / denom);
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
@@ -262,9 +262,9 @@ MPP_RET hal_info_from_enc_cfg(HalInfo ctx, MppEncCfgSet *cfg)
|
|||||||
|
|
||||||
hal_info_set(ctx, ENC_INFO_FORMAT, CODEC_INFO_FLAG_STRING, val);
|
hal_info_set(ctx, ENC_INFO_FORMAT, CODEC_INFO_FLAG_STRING, val);
|
||||||
hal_info_set(ctx, ENC_INFO_FPS_IN, CODEC_INFO_FLAG_NUMBER,
|
hal_info_set(ctx, ENC_INFO_FPS_IN, CODEC_INFO_FLAG_NUMBER,
|
||||||
rc->fps_in_num / rc->fps_in_denorm);
|
rc->fps_in_num / rc->fps_in_denom);
|
||||||
hal_info_set(ctx, ENC_INFO_FPS_OUT, CODEC_INFO_FLAG_NUMBER,
|
hal_info_set(ctx, ENC_INFO_FPS_OUT, CODEC_INFO_FLAG_NUMBER,
|
||||||
rc->fps_out_num / rc->fps_out_denorm);
|
rc->fps_out_num / rc->fps_out_denom);
|
||||||
|
|
||||||
val = hal_info_to_string(ctx, ENC_INFO_RC_MODE, &rc->rc_mode);
|
val = hal_info_to_string(ctx, ENC_INFO_RC_MODE, &rc->rc_mode);
|
||||||
hal_info_set(ctx, ENC_INFO_RC_MODE, CODEC_INFO_FLAG_STRING, val);
|
hal_info_set(ctx, ENC_INFO_RC_MODE, CODEC_INFO_FLAG_STRING, val);
|
||||||
|
@@ -64,7 +64,7 @@ MPP_RET hal_info_set(HalInfo ctx, RK_U32 type, RK_U32 flag, RK_U64 data);
|
|||||||
MPP_RET hal_info_get(HalInfo ctx, MppDevInfoCfg *data, RK_S32 *size);
|
MPP_RET hal_info_get(HalInfo ctx, MppDevInfoCfg *data, RK_S32 *size);
|
||||||
|
|
||||||
RK_U64 hal_info_to_string(HalInfo ctx, RK_U32 type, void *val);
|
RK_U64 hal_info_to_string(HalInfo ctx, RK_U32 type, void *val);
|
||||||
RK_U64 hal_info_to_float(RK_S32 num, RK_S32 denorm);
|
RK_U64 hal_info_to_float(RK_S32 num, RK_S32 denom);
|
||||||
|
|
||||||
MPP_RET hal_info_from_enc_cfg(HalInfo ctx, MppEncCfgSet *cfg);
|
MPP_RET hal_info_from_enc_cfg(HalInfo ctx, MppEncCfgSet *cfg);
|
||||||
|
|
||||||
|
@@ -44,9 +44,9 @@ typedef struct HalH264eVepuMbRcImpl_t {
|
|||||||
|
|
||||||
/* frame rate control */
|
/* frame rate control */
|
||||||
RK_S32 fps_in_num;
|
RK_S32 fps_in_num;
|
||||||
RK_S32 fps_in_denorm;
|
RK_S32 fps_in_denom;
|
||||||
RK_S32 fps_out_num;
|
RK_S32 fps_out_num;
|
||||||
RK_S32 fps_out_denorm;
|
RK_S32 fps_out_denom;
|
||||||
|
|
||||||
RK_S32 fps_count;
|
RK_S32 fps_count;
|
||||||
RK_S32 fps_step;
|
RK_S32 fps_step;
|
||||||
@@ -524,21 +524,21 @@ MPP_RET h264e_vepu_mbrc_setup(HalH264eVepuMbRcCtx ctx, MppEncCfgSet*cfg)
|
|||||||
p->mb_h = MPP_ALIGN(prep->height, 16) / 16;
|
p->mb_h = MPP_ALIGN(prep->height, 16) / 16;
|
||||||
p->pels = p->width * p->height;
|
p->pels = p->width * p->height;
|
||||||
p->mbs = p->mb_w * p->mb_h;
|
p->mbs = p->mb_w * p->mb_h;
|
||||||
p->bits_per_pic = axb_div_c(rc->bps_target, rc->fps_out_denorm,
|
p->bits_per_pic = axb_div_c(rc->bps_target, rc->fps_out_denom,
|
||||||
rc->fps_out_num);
|
rc->fps_out_num);
|
||||||
|
|
||||||
mpp_assert(p->pels);
|
mpp_assert(p->pels);
|
||||||
|
|
||||||
// frame rate control
|
// frame rate control
|
||||||
mpp_assert(rc->fps_out_num / rc->fps_out_denorm <= rc->fps_in_num / rc->fps_in_denorm);
|
mpp_assert(rc->fps_out_num / rc->fps_out_denom <= rc->fps_in_num / rc->fps_in_denom);
|
||||||
|
|
||||||
p->fps_in_num = rc->fps_in_num;
|
p->fps_in_num = rc->fps_in_num;
|
||||||
p->fps_in_denorm = rc->fps_in_denorm;
|
p->fps_in_denom = rc->fps_in_denom;
|
||||||
p->fps_out_num = rc->fps_out_num;
|
p->fps_out_num = rc->fps_out_num;
|
||||||
p->fps_out_denorm = rc->fps_out_denorm;
|
p->fps_out_denom = rc->fps_out_denom;
|
||||||
|
|
||||||
p->fps_step = rc->fps_in_denorm * rc->fps_out_num;
|
p->fps_step = rc->fps_in_denom * rc->fps_out_num;
|
||||||
p->fps_threshold = rc->fps_in_num * rc->fps_out_denorm;
|
p->fps_threshold = rc->fps_in_num * rc->fps_out_denom;
|
||||||
p->fps_count = p->fps_threshold;
|
p->fps_count = p->fps_threshold;
|
||||||
|
|
||||||
// if not constant
|
// if not constant
|
||||||
|
@@ -821,10 +821,10 @@ void write_ivf_header(void *hal, RK_U8 *dst)
|
|||||||
data[18] = (rc->fps_out_num >> 16) & 0xff;
|
data[18] = (rc->fps_out_num >> 16) & 0xff;
|
||||||
data[19] = (rc->fps_out_num >> 24) & 0xff;
|
data[19] = (rc->fps_out_num >> 24) & 0xff;
|
||||||
|
|
||||||
data[20] = rc->fps_out_denorm & 0xff;
|
data[20] = rc->fps_out_denom & 0xff;
|
||||||
data[21] = (rc->fps_out_denorm >> 8) & 0xff;
|
data[21] = (rc->fps_out_denom >> 8) & 0xff;
|
||||||
data[22] = (rc->fps_out_denorm >> 16) & 0xff;
|
data[22] = (rc->fps_out_denom >> 16) & 0xff;
|
||||||
data[23] = (rc->fps_out_denorm >> 24) & 0xff;
|
data[23] = (rc->fps_out_denom >> 24) & 0xff;
|
||||||
|
|
||||||
data[24] = ctx->frame_cnt & 0xff;
|
data[24] = ctx->frame_cnt & 0xff;
|
||||||
data[25] = (ctx->frame_cnt >> 8) & 0xff;
|
data[25] = (ctx->frame_cnt >> 8) & 0xff;
|
||||||
|
@@ -158,10 +158,10 @@ static MPP_RET vpu_api_set_enc_cfg(MppCtx mpp_ctx, MppApi *mpi, MppEncCfg enc_cf
|
|||||||
mpp_enc_cfg_set_s32(enc_cfg, "rc:bps_min", rc_mode ? bps * 15 / 16 : bps * 1 / 16);
|
mpp_enc_cfg_set_s32(enc_cfg, "rc:bps_min", rc_mode ? bps * 15 / 16 : bps * 1 / 16);
|
||||||
mpp_enc_cfg_set_s32(enc_cfg, "rc:fps_in_flex", 0);
|
mpp_enc_cfg_set_s32(enc_cfg, "rc:fps_in_flex", 0);
|
||||||
mpp_enc_cfg_set_s32(enc_cfg, "rc:fps_in_num", fps_in);
|
mpp_enc_cfg_set_s32(enc_cfg, "rc:fps_in_num", fps_in);
|
||||||
mpp_enc_cfg_set_s32(enc_cfg, "rc:fps_in_denorm", 1);
|
mpp_enc_cfg_set_s32(enc_cfg, "rc:fps_in_denom", 1);
|
||||||
mpp_enc_cfg_set_s32(enc_cfg, "rc:fps_out_flex", 0);
|
mpp_enc_cfg_set_s32(enc_cfg, "rc:fps_out_flex", 0);
|
||||||
mpp_enc_cfg_set_s32(enc_cfg, "rc:fps_out_num", fps_out);
|
mpp_enc_cfg_set_s32(enc_cfg, "rc:fps_out_num", fps_out);
|
||||||
mpp_enc_cfg_set_s32(enc_cfg, "rc:fps_out_denorm", 1);
|
mpp_enc_cfg_set_s32(enc_cfg, "rc:fps_out_denom", 1);
|
||||||
mpp_enc_cfg_set_s32(enc_cfg, "rc:gop", gop);
|
mpp_enc_cfg_set_s32(enc_cfg, "rc:gop", gop);
|
||||||
|
|
||||||
mpp_enc_cfg_set_s32(enc_cfg, "codec:type", coding);
|
mpp_enc_cfg_set_s32(enc_cfg, "codec:type", coding);
|
||||||
|
@@ -328,10 +328,10 @@ MPP_RET test_mt_cfg_setup(MpiEncMtCtxInfo *info)
|
|||||||
/* fix input / output frame rate */
|
/* fix input / output frame rate */
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_flex", p->fps_in_flex);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_flex", p->fps_in_flex);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_num", p->fps_in_num);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_num", p->fps_in_num);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_denorm", p->fps_in_den);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_denom", p->fps_in_den);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_flex", p->fps_out_flex);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_flex", p->fps_out_flex);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_num", p->fps_out_num);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_num", p->fps_out_num);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_denorm", p->fps_out_den);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_denom", p->fps_out_den);
|
||||||
|
|
||||||
/* drop frame or not when bitrate overflow */
|
/* drop frame or not when bitrate overflow */
|
||||||
mpp_enc_cfg_set_u32(cfg, "rc:drop_mode", MPP_ENC_RC_DROP_FRM_DISABLED);
|
mpp_enc_cfg_set_u32(cfg, "rc:drop_mode", MPP_ENC_RC_DROP_FRM_DISABLED);
|
||||||
|
@@ -328,10 +328,10 @@ MPP_RET test_mpp_enc_cfg_setup(MpiEncMultiCtxInfo *info)
|
|||||||
/* fix input / output frame rate */
|
/* fix input / output frame rate */
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_flex", p->fps_in_flex);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_flex", p->fps_in_flex);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_num", p->fps_in_num);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_num", p->fps_in_num);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_denorm", p->fps_in_den);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_denom", p->fps_in_den);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_flex", p->fps_out_flex);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_flex", p->fps_out_flex);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_num", p->fps_out_num);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_num", p->fps_out_num);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_denorm", p->fps_out_den);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_denom", p->fps_out_den);
|
||||||
|
|
||||||
/* drop frame or not when bitrate overflow */
|
/* drop frame or not when bitrate overflow */
|
||||||
mpp_enc_cfg_set_u32(cfg, "rc:drop_mode", MPP_ENC_RC_DROP_FRM_DISABLED);
|
mpp_enc_cfg_set_u32(cfg, "rc:drop_mode", MPP_ENC_RC_DROP_FRM_DISABLED);
|
||||||
|
@@ -431,8 +431,8 @@ static MPP_RET mpi_rc_enc_init(MpiRc2TestCtx *ctx)
|
|||||||
enc_mpi = ctx->enc_mpi;
|
enc_mpi = ctx->enc_mpi;
|
||||||
enc_ctx = ctx->enc_ctx;
|
enc_ctx = ctx->enc_ctx;
|
||||||
|
|
||||||
rc_cfg->fps_in_denorm = 1;
|
rc_cfg->fps_in_denom = 1;
|
||||||
rc_cfg->fps_out_denorm = 1;
|
rc_cfg->fps_out_denom = 1;
|
||||||
rc_cfg->fps_in_num = 30;
|
rc_cfg->fps_in_num = 30;
|
||||||
rc_cfg->fps_out_num = 30;
|
rc_cfg->fps_out_num = 30;
|
||||||
rc_cfg->fps_in_flex = 0;
|
rc_cfg->fps_in_flex = 0;
|
||||||
@@ -495,10 +495,10 @@ static MPP_RET mpi_rc_enc_init(MpiRc2TestCtx *ctx)
|
|||||||
/* fix input / output frame rate */
|
/* fix input / output frame rate */
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_flex", rc_cfg->fps_in_flex);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_flex", rc_cfg->fps_in_flex);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_num", rc_cfg->fps_in_num);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_num", rc_cfg->fps_in_num);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_denorm", rc_cfg->fps_in_denorm);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_denom", rc_cfg->fps_in_denom);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_flex", rc_cfg->fps_out_flex);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_flex", rc_cfg->fps_out_flex);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_num", rc_cfg->fps_out_num);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_num", rc_cfg->fps_out_num);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_denorm", rc_cfg->fps_out_denorm);
|
mpp_enc_cfg_set_s32(cfg, "rc:fps_out_denom", rc_cfg->fps_out_denom);
|
||||||
mpp_enc_cfg_set_s32(cfg, "rc:gop", enc_cmd->gop_len ? enc_cmd->gop_len : 30 * 2);
|
mpp_enc_cfg_set_s32(cfg, "rc:gop", enc_cmd->gop_len ? enc_cmd->gop_len : 30 * 2);
|
||||||
|
|
||||||
/* drop frame or not when bitrate overflow */
|
/* drop frame or not when bitrate overflow */
|
||||||
|
Reference in New Issue
Block a user