diff --git a/dev_reference/README.md b/dev_reference/README.md new file mode 100644 index 0000000..41176a0 --- /dev/null +++ b/dev_reference/README.md @@ -0,0 +1,5 @@ +这个文件夹放置了开发过程中的参考资料 + +## 文件叫列表释义 + +- `rockchip` rkmpp 的头文件 \ No newline at end of file diff --git a/dev_reference/rockchip/mpp_buffer.h b/dev_reference/rockchip/mpp_buffer.h new file mode 100644 index 0000000..9c51647 --- /dev/null +++ b/dev_reference/rockchip/mpp_buffer.h @@ -0,0 +1,357 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MPP_BUFFER_H__ +#define __MPP_BUFFER_H__ + +#include "rk_type.h" +#include "mpp_err.h" + +/* + * MppBuffer module has several functions: + * + * 1. buffer get / put / reference management / external commit / get info. + * this part is the basic user interface for MppBuffer. + * + * function: + * + * mpp_buffer_get + * mpp_buffer_put + * mpp_buffer_inc_ref + * mpp_buffer_commit + * mpp_buffer_info_get + * + * 2. user buffer working flow control abstraction. + * buffer should attach to certain group, and buffer mode control the buffer usage flow. + * this part is also a part of user interface. + * + * function: + * + * mpp_buffer_group_get + * mpp_buffer_group_normal_get + * mpp_buffer_group_limit_get + * mpp_buffer_group_put + * mpp_buffer_group_limit_config + * + * 3. buffer allocator management + * this part is for allocator on different os, it does not have user interface + * it will support normal buffer, Android ion buffer, Linux v4l2 vb2 buffer + * user can only use MppBufferType to choose. + * + */ + +/* + * mpp buffer group support two work flow mode: + * + * normal flow: all buffer are generated by MPP + * under this mode, buffer pool is maintained internally + * + * typical call flow: + * + * mpp_buffer_group_get() return A + * mpp_buffer_get(A) return a ref +1 -> used + * mpp_buffer_inc_ref(a) ref +1 + * mpp_buffer_put(a) ref -1 + * mpp_buffer_put(a) ref -1 -> unused + * mpp_buffer_group_put(A) + * + * commit flow: all buffer are commited out of MPP + * under this mode, buffers is commit by external api. + * normally MPP only use it but not generate it. + * + * typical call flow: + * + * ==== external allocator ==== + * mpp_buffer_group_get() return A + * mpp_buffer_commit(A, x) + * mpp_buffer_commit(A, y) + * + * ======= internal user ====== + * mpp_buffer_get(A) return a + * mpp_buffer_get(A) return b + * mpp_buffer_put(a) + * mpp_buffer_put(b) + * + * ==== external allocator ==== + * mpp_buffer_group_put(A) + * + * NOTE: commit interface required group handle to record group information + */ + +/* + * mpp buffer group has two buffer limit mode: normal and limit + * + * normal mode: allows any buffer size and always general new buffer is no unused buffer + * is available. + * This mode normally use with normal flow and is used for table / stream buffer + * + * limit mode : restrict the buffer's size and count in the buffer group. if try to calloc + * buffer with different size or extra count it will fail. + * This mode normally use with commit flow and is used for frame buffer + */ + +/* + * NOTE: normal mode is recommanded to work with normal flow, working with limit mode is not. + * limit mode is recommanded to work with commit flow, working with normal mode is not. + */ +typedef enum { + MPP_BUFFER_INTERNAL, + MPP_BUFFER_EXTERNAL, + MPP_BUFFER_MODE_BUTT, +} MppBufferMode; + +/* + * the mpp buffer has serval types: + * + * normal : normal malloc buffer for unit test or hardware simulation + * ion : use ion device under Android/Linux, MppBuffer will encapsulte ion file handle + * ext_dma : the DMABUF(DMA buffers) come from the application + * drm : use the drm device interface for memory management + */ +typedef enum { + MPP_BUFFER_TYPE_NORMAL, + MPP_BUFFER_TYPE_ION, + MPP_BUFFER_TYPE_EXT_DMA, + MPP_BUFFER_TYPE_DRM, + MPP_BUFFER_TYPE_DMA_HEAP, + MPP_BUFFER_TYPE_BUTT, +} MppBufferType; + +#define MPP_BUFFER_TYPE_MASK 0x0000FFFF + +/* + * MPP_BUFFER_FLAGS cooperate with MppBufferType + * 16 high bits of MppBufferType are used in flags + * + * eg: + * DRM CMA buffer : MPP_BUFFER_TYPE_DRM | MPP_BUFFER_FLAGS_CONTIG + * = 0x00010003 + * DRM SECURE buffer: MPP_BUFFER_TYPE_DRM | MPP_BUFFER_FLAGS_SECURE + * = 0x00080003 + * + * The dma buffer source can also be set by format: flags | type. + * dma buffer source flags: + * MPP_BUFFER_FLAGS_CONTIG means cma + * MPP_BUFFER_FLAGS_CACHABLE means cachable + * MPP_BUFFER_FLAGS_DMA32 means dma32 + * + * flags originate from drm_rockchip_gem_mem_type + */ +#define MPP_BUFFER_FLAGS_MASK 0x003f0000 //ROCKCHIP_BO_MASK << 16 +#define MPP_BUFFER_FLAGS_CONTIG 0x00010000 //ROCKCHIP_BO_CONTIG << 16 +#define MPP_BUFFER_FLAGS_CACHABLE 0x00020000 //ROCKCHIP_BO_CACHABLE << 16 +#define MPP_BUFFER_FLAGS_WC 0x00040000 //ROCKCHIP_BO_WC << 16 +#define MPP_BUFFER_FLAGS_SECURE 0x00080000 //ROCKCHIP_BO_SECURE << 16 +#define MPP_BUFFER_FLAGS_ALLOC_KMAP 0x00100000 //ROCKCHIP_BO_ALLOC_KMAP << 16 +#define MPP_BUFFER_FLAGS_DMA32 0x00200000 //ROCKCHIP_BO_DMA32 << 16 + +/* + * MppBufferInfo variable's meaning is different in different MppBufferType + * + * Common + * index - the buffer index used to track buffer in buffer pool + * size - the buffer size + * + * MPP_BUFFER_TYPE_NORMAL + * + * ptr - virtual address of normal malloced buffer + * fd - unused and set to -1, the allocator would return its + * internal buffer counter number + * + * MPP_BUFFER_TYPE_ION + * + * ptr - virtual address of ion buffer in user space + * hnd - ion handle in user space + * fd - ion buffer file handle for map / unmap + * + */ +typedef struct MppBufferInfo_t { + MppBufferType type; + size_t size; + void *ptr; + void *hnd; + int fd; + int index; +} MppBufferInfo; + +#define BUFFER_GROUP_SIZE_DEFAULT (SZ_1M*80) + +/* + * mpp_buffer_import_with_tag(MppBufferGroup group, MppBufferInfo *info, MppBuffer *buffer) + * + * 1. group - specified the MppBuffer to be attached to. + * group can be NULL then this buffer will attached to default legecy group + * Default to NULL on mpp_buffer_import case + * + * 2. info - input information for the output MppBuffer + * info can NOT be NULL. It must contain at least one of ptr/fd. + * + * 3. buffer - generated MppBuffer from MppBufferInfo. + * buffer can be NULL then the buffer is commit to group with unused status. + * Otherwise generated buffer will be directly got and ref_count increased. + * Default to NULL on mpp_buffer_commit case + * + * mpp_buffer_commit usage: + * + * Add a external buffer info to group. This buffer will be on unused status. + * Typical usage is on Android. MediaPlayer gralloc Graphic buffer then commit these buffer + * to decoder's buffer group. Then decoder will recycle these buffer and return buffer reference + * to MediaPlayer for display. + * + * mpp_buffer_import usage: + * + * Transfer a external buffer info to MppBuffer but it is not expected to attached to certain + * buffer group. So the group is set to NULL. Then this buffer can be used for MppFrame/MppPacket. + * Typical usage is for image processing. Image processing normally will be a oneshot operation + * It does not need complicated group management. But in other hand mpp still need to know the + * imported buffer is leak or not and trace its usage inside mpp process. So we attach this kind + * of buffer to default misc buffer group for management. + */ +#define mpp_buffer_commit(group, info) \ + mpp_buffer_import_with_tag(group, info, NULL, MODULE_TAG, __FUNCTION__) + +#define mpp_buffer_import(buffer, info) \ + mpp_buffer_import_with_tag(NULL, info, buffer, MODULE_TAG, __FUNCTION__) + +#define mpp_buffer_get(group, buffer, size) \ + mpp_buffer_get_with_tag(group, buffer, size, MODULE_TAG, __FUNCTION__) + +#define mpp_buffer_put(buffer) \ + mpp_buffer_put_with_caller(buffer, __FUNCTION__) + +#define mpp_buffer_inc_ref(buffer) \ + mpp_buffer_inc_ref_with_caller(buffer, __FUNCTION__) + +#define mpp_buffer_info_get(buffer, info) \ + mpp_buffer_info_get_with_caller(buffer, info, __FUNCTION__) + +#define mpp_buffer_read(buffer, offset, data, size) \ + mpp_buffer_read_with_caller(buffer, offset, data, size, __FUNCTION__) + +#define mpp_buffer_write(buffer, offset, data, size) \ + mpp_buffer_write_with_caller(buffer, offset, data, size, __FUNCTION__) + +#define mpp_buffer_get_ptr(buffer) \ + mpp_buffer_get_ptr_with_caller(buffer, __FUNCTION__) + +#define mpp_buffer_get_fd(buffer) \ + mpp_buffer_get_fd_with_caller(buffer, __FUNCTION__) + +#define mpp_buffer_get_size(buffer) \ + mpp_buffer_get_size_with_caller(buffer, __FUNCTION__) + +#define mpp_buffer_get_index(buffer) \ + mpp_buffer_get_index_with_caller(buffer, __FUNCTION__) + +#define mpp_buffer_set_index(buffer, index) \ + mpp_buffer_set_index_with_caller(buffer, index, __FUNCTION__) + +#define mpp_buffer_get_offset(buffer) \ + mpp_buffer_get_offset_with_caller(buffer, __FUNCTION__) + +#define mpp_buffer_set_offset(buffer, offset) \ + mpp_buffer_set_offset_with_caller(buffer, offset, __FUNCTION__) + +#define mpp_buffer_sync_begin(buffer) \ + mpp_buffer_sync_begin_f(buffer, 0, __FUNCTION__) +#define mpp_buffer_sync_end(buffer) \ + mpp_buffer_sync_end_f(buffer, 0, __FUNCTION__) +#define mpp_buffer_sync_partial_begin(buffer, offset, length) \ + mpp_buffer_sync_partial_begin_f(buffer, 0, offset, length, __FUNCTION__) +#define mpp_buffer_sync_partial_end(buffer, offset, length) \ + mpp_buffer_sync_partial_end_f(buffer, 0, offset, length, __FUNCTION__) + +#define mpp_buffer_sync_ro_begin(buffer) \ + mpp_buffer_sync_begin_f(buffer, 1, __FUNCTION__) +#define mpp_buffer_sync_ro_end(buffer) \ + mpp_buffer_sync_end_f(buffer, 1, __FUNCTION__) +#define mpp_buffer_sync_ro_partial_begin(buffer, offset, length) \ + mpp_buffer_sync_partial_begin_f(buffer, 1, offset, length, __FUNCTION__) +#define mpp_buffer_sync_ro_partial_end(buffer, offset, length) \ + mpp_buffer_sync_partial_end_f(buffer, 1, offset, length, __FUNCTION__) + +#define mpp_buffer_group_get_internal(group, type, ...) \ + mpp_buffer_group_get(group, (MppBufferType)(type), MPP_BUFFER_INTERNAL, MODULE_TAG, __FUNCTION__) + +#define mpp_buffer_group_get_external(group, type, ...) \ + mpp_buffer_group_get(group, (MppBufferType)(type), MPP_BUFFER_EXTERNAL, MODULE_TAG, __FUNCTION__) + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * MppBuffer interface + * these interface will change value of group and buffer so before calling functions + * parameter need to be checked. + * + * IMPORTANT: + * mpp_buffer_import_with_tag - compounded interface for commit and import + * + */ +MPP_RET mpp_buffer_import_with_tag(MppBufferGroup group, MppBufferInfo *info, MppBuffer *buffer, + const char *tag, const char *caller); +MPP_RET mpp_buffer_get_with_tag(MppBufferGroup group, MppBuffer *buffer, size_t size, + const char *tag, const char *caller); +MPP_RET mpp_buffer_put_with_caller(MppBuffer buffer, const char *caller); +MPP_RET mpp_buffer_inc_ref_with_caller(MppBuffer buffer, const char *caller); + +MPP_RET mpp_buffer_info_get_with_caller(MppBuffer buffer, MppBufferInfo *info, const char *caller); +MPP_RET mpp_buffer_read_with_caller(MppBuffer buffer, size_t offset, void *data, size_t size, const char *caller); +MPP_RET mpp_buffer_write_with_caller(MppBuffer buffer, size_t offset, void *data, size_t size, const char *caller); +void *mpp_buffer_get_ptr_with_caller(MppBuffer buffer, const char *caller); +int mpp_buffer_get_fd_with_caller(MppBuffer buffer, const char *caller); +size_t mpp_buffer_get_size_with_caller(MppBuffer buffer, const char *caller); +int mpp_buffer_get_index_with_caller(MppBuffer buffer, const char *caller); +MPP_RET mpp_buffer_set_index_with_caller(MppBuffer buffer, int index, const char *caller); +size_t mpp_buffer_get_offset_with_caller(MppBuffer buffer, const char *caller); +MPP_RET mpp_buffer_set_offset_with_caller(MppBuffer buffer, size_t offset, const char *caller); + +/** + * @brief MppBuffer cache operation function + * @param buffer The MppBuffer to run the cache operation + * @param ro for readonly option + * @param offset partial sync data start offset + * @param length partial sync data length + */ +MPP_RET mpp_buffer_sync_begin_f(MppBuffer buffer, RK_S32 ro, const char* caller); +MPP_RET mpp_buffer_sync_end_f(MppBuffer buffer, RK_S32 ro, const char* caller); +MPP_RET mpp_buffer_sync_partial_begin_f(MppBuffer buffer, RK_S32 ro, RK_U32 offset, RK_U32 length, const char* caller); +MPP_RET mpp_buffer_sync_partial_end_f(MppBuffer buffer, RK_S32 ro, RK_U32 offset, RK_U32 length, const char* caller); + +MPP_RET mpp_buffer_group_get(MppBufferGroup *group, MppBufferType type, MppBufferMode mode, + const char *tag, const char *caller); +MPP_RET mpp_buffer_group_put(MppBufferGroup group); +MPP_RET mpp_buffer_group_clear(MppBufferGroup group); +RK_S32 mpp_buffer_group_unused(MppBufferGroup group); +size_t mpp_buffer_group_usage(MppBufferGroup group); +MppBufferMode mpp_buffer_group_mode(MppBufferGroup group); +MppBufferType mpp_buffer_group_type(MppBufferGroup group); + +/* + * size : 0 - no limit, other - max buffer size + * count : 0 - no limit, other - max buffer count + */ +MPP_RET mpp_buffer_group_limit_config(MppBufferGroup group, size_t size, RK_S32 count); + +RK_U32 mpp_buffer_total_now(); +RK_U32 mpp_buffer_total_max(); + +#ifdef __cplusplus +} +#endif + +#endif /*__MPP_BUFFER_H__*/ diff --git a/dev_reference/rockchip/mpp_compat.h b/dev_reference/rockchip/mpp_compat.h new file mode 100644 index 0000000..22a3f17 --- /dev/null +++ b/dev_reference/rockchip/mpp_compat.h @@ -0,0 +1,62 @@ +/* + * Copyright 2021 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MPP_COMPAT_H__ +#define __MPP_COMPAT_H__ + +#include "rk_type.h" +#include "mpp_err.h" + +typedef enum MppCompatId_e { + MPP_COMPAT_INC_FBC_BUF_SIZE, + MPP_COMPAT_ENC_ASYNC_INPUT, + MPP_COMPAT_DEC_FBC_HDR_256_ODD, + MPP_COMPAT_BUTT, +} MppCompatId; + +typedef enum MppCompatType_e { + MPP_COMPAT_BOOL, + MPP_COMPAT_S32, + MPP_COMPAT_TYPE_BUTT, +} MppCompatType; + +typedef struct MppCompat_t MppCompat; + +/* external user can only update value_ext to notify mpp to change its behavior */ +struct MppCompat_t { + const MppCompatId feature_id; + const MppCompatType feature_type; + const RK_S32 value_mpp; + RK_S32 value_usr; + const char *name; + MppCompat * const next; +}; + +#ifdef __cplusplus +extern "C" { +#endif + +MppCompat *mpp_compat_query(void); +MppCompat *mpp_compat_query_by_id(MppCompatId id); +MPP_RET mpp_compat_update(MppCompat *compat, RK_S32 value); + +void mpp_compat_show(void); + +#ifdef __cplusplus +} +#endif + +#endif /*__MPP_COMPAT_H__*/ diff --git a/dev_reference/rockchip/mpp_err.h b/dev_reference/rockchip/mpp_err.h new file mode 100644 index 0000000..469c681 --- /dev/null +++ b/dev_reference/rockchip/mpp_err.h @@ -0,0 +1,54 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MPP_ERR_H__ +#define __MPP_ERR_H__ + +#define RK_OK 0 +#define RK_SUCCESS 0 + +typedef enum { + MPP_SUCCESS = RK_SUCCESS, + MPP_OK = RK_OK, + + MPP_NOK = -1, + MPP_ERR_UNKNOW = -2, + MPP_ERR_NULL_PTR = -3, + MPP_ERR_MALLOC = -4, + MPP_ERR_OPEN_FILE = -5, + MPP_ERR_VALUE = -6, + MPP_ERR_READ_BIT = -7, + MPP_ERR_TIMEOUT = -8, + MPP_ERR_PERM = -9, + + MPP_ERR_BASE = -1000, + + /* The error in stream processing */ + MPP_ERR_LIST_STREAM = MPP_ERR_BASE - 1, + MPP_ERR_INIT = MPP_ERR_BASE - 2, + MPP_ERR_VPU_CODEC_INIT = MPP_ERR_BASE - 3, + MPP_ERR_STREAM = MPP_ERR_BASE - 4, + MPP_ERR_FATAL_THREAD = MPP_ERR_BASE - 5, + MPP_ERR_NOMEM = MPP_ERR_BASE - 6, + MPP_ERR_PROTOL = MPP_ERR_BASE - 7, + MPP_FAIL_SPLIT_FRAME = MPP_ERR_BASE - 8, + MPP_ERR_VPUHW = MPP_ERR_BASE - 9, + MPP_EOS_STREAM_REACHED = MPP_ERR_BASE - 11, + MPP_ERR_BUFFER_FULL = MPP_ERR_BASE - 12, + MPP_ERR_DISPLAY_FULL = MPP_ERR_BASE - 13, +} MPP_RET; + +#endif /*__MPP_ERR_H__*/ diff --git a/dev_reference/rockchip/mpp_frame.h b/dev_reference/rockchip/mpp_frame.h new file mode 100644 index 0000000..4268769 --- /dev/null +++ b/dev_reference/rockchip/mpp_frame.h @@ -0,0 +1,432 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MPP_FRAME_H__ +#define __MPP_FRAME_H__ + +#include "mpp_buffer.h" +#include "mpp_meta.h" + +/* + * bit definition for mode flag in MppFrame + */ +/* progressive frame */ +#define MPP_FRAME_FLAG_FRAME (0x00000000) +/* top field only */ +#define MPP_FRAME_FLAG_TOP_FIELD (0x00000001) +/* bottom field only */ +#define MPP_FRAME_FLAG_BOT_FIELD (0x00000002) +/* paired field */ +#define MPP_FRAME_FLAG_PAIRED_FIELD (MPP_FRAME_FLAG_TOP_FIELD|MPP_FRAME_FLAG_BOT_FIELD) +/* paired field with field order of top first */ +#define MPP_FRAME_FLAG_TOP_FIRST (0x00000004) +/* paired field with field order of bottom first */ +#define MPP_FRAME_FLAG_BOT_FIRST (0x00000008) +/* paired field with unknown field order (MBAFF) */ +#define MPP_FRAME_FLAG_DEINTERLACED (MPP_FRAME_FLAG_TOP_FIRST|MPP_FRAME_FLAG_BOT_FIRST) +#define MPP_FRAME_FLAG_FIELD_ORDER_MASK (0x0000000C) +// for multiview stream +#define MPP_FRAME_FLAG_VIEW_ID_MASK (0x000000f0) + +#define MPP_FRAME_FLAG_IEP_DEI_MASK (0x00000f00) +#define MPP_FRAME_FLAG_IEP_DEI_I2O1 (0x00000100) +#define MPP_FRAME_FLAG_IEP_DEI_I4O2 (0x00000200) +#define MPP_FRAME_FLAG_IEP_DEI_I4O1 (0x00000300) + +/* + * MPEG vs JPEG YUV range. + */ +typedef enum { + MPP_FRAME_RANGE_UNSPECIFIED = 0, + MPP_FRAME_RANGE_MPEG = 1, ///< the normal 219*2^(n-8) "MPEG" YUV ranges + MPP_FRAME_RANGE_JPEG = 2, ///< the normal 2^n-1 "JPEG" YUV ranges + MPP_FRAME_RANGE_NB, ///< Not part of ABI +} MppFrameColorRange; + +typedef enum { + MPP_FRAME_VIDEO_FMT_COMPONEMT = 0, + MPP_FRAME_VIDEO_FMT_PAL = 1, + MPP_FRAME_VIDEO_FMT_NTSC = 2, + MPP_FRAME_VIDEO_FMT_SECAM = 3, + MPP_FRAME_VIDEO_FMT_MAC = 4, + MPP_FRAME_VIDEO_FMT_UNSPECIFIED = 5, + MPP_FRAME_VIDEO_FMT_RESERVED0 = 6, + MPP_FRAME_VIDEO_FMT_RESERVED1 = 7, +} MppFrameVideoFormat; + +/* + * Chromaticity coordinates of the source primaries. + */ +typedef enum { + MPP_FRAME_PRI_RESERVED0 = 0, + MPP_FRAME_PRI_BT709 = 1, ///< also ITU-R BT1361 / IEC 61966-2-4 / SMPTE RP177 Annex B + MPP_FRAME_PRI_UNSPECIFIED = 2, + MPP_FRAME_PRI_RESERVED = 3, + MPP_FRAME_PRI_BT470M = 4, ///< also FCC Title 47 Code of Federal Regulations 73.682 (a)(20) + + MPP_FRAME_PRI_BT470BG = 5, ///< also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM + MPP_FRAME_PRI_SMPTE170M = 6, ///< also ITU-R BT601-6 525 / ITU-R BT1358 525 / ITU-R BT1700 NTSC/SMPTE ST 170 (2004) + MPP_FRAME_PRI_SMPTE240M = 7, ///< functionally identical to above/SMPTE ST 240 + MPP_FRAME_PRI_FILM = 8, ///< colour filters using Illuminant C + MPP_FRAME_PRI_BT2020 = 9, ///< ITU-R BT2020 / ITU-R BT.2100-2 + MPP_FRAME_PRI_SMPTEST428_1 = 10, ///< SMPTE ST 428-1 (CIE 1931 XYZ) + MPP_FRAME_PRI_SMPTE431 = 11, ///< SMPTE ST 431-2 (2011) / DCI P3 + MPP_FRAME_PRI_SMPTE432 = 12, ///< SMPTE ST 432-1 (2010) / P3 D65 / Display P3 + MPP_FRAME_PRI_JEDEC_P22 = 22, ///< JEDEC P22 phosphors + MPP_FRAME_PRI_NB, ///< Not part of ABI +} MppFrameColorPrimaries; + +/* + * Color Transfer Characteristic. + */ +typedef enum { + MPP_FRAME_TRC_RESERVED0 = 0, + MPP_FRAME_TRC_BT709 = 1, ///< also ITU-R BT1361 + MPP_FRAME_TRC_UNSPECIFIED = 2, + MPP_FRAME_TRC_RESERVED = 3, + MPP_FRAME_TRC_GAMMA22 = 4, ///< also ITU-R BT470M / ITU-R BT1700 625 PAL & SECAM + MPP_FRAME_TRC_GAMMA28 = 5, ///< also ITU-R BT470BG + MPP_FRAME_TRC_SMPTE170M = 6, ///< also ITU-R BT601-6 525 or 625 / ITU-R BT1358 525 or 625 / ITU-R BT1700 NTSC + MPP_FRAME_TRC_SMPTE240M = 7, + MPP_FRAME_TRC_LINEAR = 8, ///< "Linear transfer characteristics" + MPP_FRAME_TRC_LOG = 9, ///< "Logarithmic transfer characteristic (100:1 range)" + MPP_FRAME_TRC_LOG_SQRT = 10, ///< "Logarithmic transfer characteristic (100 * Sqrt(10) : 1 range)" + MPP_FRAME_TRC_IEC61966_2_4 = 11, ///< IEC 61966-2-4 + MPP_FRAME_TRC_BT1361_ECG = 12, ///< ITU-R BT1361 Extended Colour Gamut + MPP_FRAME_TRC_IEC61966_2_1 = 13, ///< IEC 61966-2-1 (sRGB or sYCC) + MPP_FRAME_TRC_BT2020_10 = 14, ///< ITU-R BT2020 for 10 bit system + MPP_FRAME_TRC_BT2020_12 = 15, ///< ITU-R BT2020 for 12 bit system + MPP_FRAME_TRC_SMPTEST2084 = 16, ///< SMPTE ST 2084 for 10-, 12-, 14- and 16-bit systems + MPP_FRAME_TRC_SMPTEST428_1 = 17, ///< SMPTE ST 428-1 + MPP_FRAME_TRC_ARIB_STD_B67 = 18, ///< ARIB STD-B67, known as "Hybrid log-gamma" + MPP_FRAME_TRC_NB, ///< Not part of ABI +} MppFrameColorTransferCharacteristic; + +/* + * YUV colorspace type. + */ +typedef enum { + MPP_FRAME_SPC_RGB = 0, ///< order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB) + MPP_FRAME_SPC_BT709 = 1, ///< also ITU-R BT1361 / IEC 61966-2-4 xvYCC709 / SMPTE RP177 Annex B + MPP_FRAME_SPC_UNSPECIFIED = 2, + MPP_FRAME_SPC_RESERVED = 3, + MPP_FRAME_SPC_FCC = 4, ///< FCC Title 47 Code of Federal Regulations 73.682 (a)(20) + MPP_FRAME_SPC_BT470BG = 5, ///< also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601 + MPP_FRAME_SPC_SMPTE170M = 6, ///< also ITU-R BT601-6 525 / ITU-R BT1358 525 / ITU-R BT1700 NTSC / functionally identical to above + MPP_FRAME_SPC_SMPTE240M = 7, + MPP_FRAME_SPC_YCOCG = 8, ///< Used by Dirac / VC-2 and H.264 FRext, see ITU-T SG16 + MPP_FRAME_SPC_BT2020_NCL = 9, ///< ITU-R BT2020 non-constant luminance system + MPP_FRAME_SPC_BT2020_CL = 10, ///< ITU-R BT2020 constant luminance system + MPP_FRAME_SPC_SMPTE2085 = 11, ///< SMPTE 2085, Y'D'zD'x + MPP_FRAME_SPC_CHROMA_DERIVED_NCL = 12, ///< Chromaticity-derived non-constant luminance system + MPP_FRAME_SPC_CHROMA_DERIVED_CL = 13, ///< Chromaticity-derived constant luminance system + MPP_FRAME_SPC_ICTCP = 14, ///< ITU-R BT.2100-0, ICtCp + MPP_FRAME_SPC_NB, ///< Not part of ABI +} MppFrameColorSpace; + +/* + * Location of chroma samples. + * + * Illustration showing the location of the first (top left) chroma sample of the + * image, the left shows only luma, the right + * shows the location of the chroma sample, the 2 could be imagined to overlay + * each other but are drawn separately due to limitations of ASCII + * + * 1st 2nd 1st 2nd horizontal luma sample positions + * v v v v + * ______ ______ + *1st luma line > |X X ... |3 4 X ... X are luma samples, + * | |1 2 1-6 are possible chroma positions + *2nd luma line > |X X ... |5 6 X ... 0 is undefined/unknown position + */ +typedef enum { + MPP_CHROMA_LOC_UNSPECIFIED = 0, + MPP_CHROMA_LOC_LEFT = 1, ///< mpeg2/4 4:2:0, h264 default for 4:2:0 + MPP_CHROMA_LOC_CENTER = 2, ///< mpeg1 4:2:0, jpeg 4:2:0, h263 4:2:0 + MPP_CHROMA_LOC_TOPLEFT = 3, ///< ITU-R 601, SMPTE 274M 296M S314M(DV 4:1:1), mpeg2 4:2:2 + MPP_CHROMA_LOC_TOP = 4, + MPP_CHROMA_LOC_BOTTOMLEFT = 5, + MPP_CHROMA_LOC_BOTTOM = 6, + MPP_CHROMA_LOC_NB, ///< Not part of ABI +} MppFrameChromaLocation; + +#define MPP_FRAME_FMT_MASK (0x000fffff) +#define MPP_FRAME_FMT_PROP_MASK (0x0ff00000) + +#define MPP_FRAME_FMT_COLOR_MASK (0x000f0000) +#define MPP_FRAME_FMT_YUV (0x00000000) +#define MPP_FRAME_FMT_RGB (0x00010000) + +#define MPP_FRAME_FBC_MASK (0x00f00000) +#define MPP_FRAME_FBC_NONE (0x00000000) + +#define MPP_FRAME_HDR_MASK (0x0c000000) +#define MPP_FRAME_HDR_NONE (0x00000000) +#define MPP_FRAME_HDR (0x04000000) + +/* + * AFBC_V1 is for ISP output. + * It has default payload offset to be calculated * from width and height: + * Payload offset = MPP_ALIGN(MPP_ALIGN(width, 16) * MPP_ALIGN(height, 16) / 16, SZ_4K) + */ +#define MPP_FRAME_FBC_AFBC_V1 (0x00100000) +/* + * AFBC_V2 is for video decoder output. + * It stores payload offset in first 32-bit in header address + * Payload offset is always set to zero. + */ +#define MPP_FRAME_FBC_AFBC_V2 (0x00200000) + +#define MPP_FRAME_FMT_LE_MASK (0x01000000) + +#define MPP_FRAME_FMT_IS_YUV(fmt) (((fmt & MPP_FRAME_FMT_COLOR_MASK) == MPP_FRAME_FMT_YUV) && \ + ((fmt & MPP_FRAME_FMT_MASK) < MPP_FMT_YUV_BUTT)) +#define MPP_FRAME_FMT_IS_YUV_10BIT(fmt) ((fmt & MPP_FRAME_FMT_MASK) == MPP_FMT_YUV420SP_10BIT || \ + (fmt & MPP_FRAME_FMT_MASK) == MPP_FMT_YUV422SP_10BIT) +#define MPP_FRAME_FMT_IS_RGB(fmt) (((fmt & MPP_FRAME_FMT_COLOR_MASK) == MPP_FRAME_FMT_RGB) && \ + ((fmt & MPP_FRAME_FMT_MASK) < MPP_FMT_RGB_BUTT)) + +/* + * For MPP_FRAME_FBC_AFBC_V1 the 16byte aligned stride is used. + */ +#define MPP_FRAME_FMT_IS_FBC(fmt) (fmt & MPP_FRAME_FBC_MASK) + +#define MPP_FRAME_FMT_IS_HDR(fmt) (fmt & MPP_FRAME_HDR_MASK) + +#define MPP_FRAME_FMT_IS_LE(fmt) ((fmt & MPP_FRAME_FMT_LE_MASK) == MPP_FRAME_FMT_LE_MASK) +#define MPP_FRAME_FMT_IS_BE(fmt) ((fmt & MPP_FRAME_FMT_LE_MASK) == 0) + +/* mpp color format index definition */ +typedef enum { + MPP_FMT_YUV420SP = (MPP_FRAME_FMT_YUV + 0), /* YYYY... UV... (NV12) */ + /* + * A rockchip specific pixel format, without gap between pixel aganist + * the P010_10LE/P010_10BE + */ + MPP_FMT_YUV420SP_10BIT = (MPP_FRAME_FMT_YUV + 1), + MPP_FMT_YUV422SP = (MPP_FRAME_FMT_YUV + 2), /* YYYY... UVUV... (NV16) */ + MPP_FMT_YUV422SP_10BIT = (MPP_FRAME_FMT_YUV + 3), ///< Not part of ABI + MPP_FMT_YUV420P = (MPP_FRAME_FMT_YUV + 4), /* YYYY... U...V... (I420) */ + MPP_FMT_YUV420SP_VU = (MPP_FRAME_FMT_YUV + 5), /* YYYY... VUVUVU... (NV21) */ + MPP_FMT_YUV422P = (MPP_FRAME_FMT_YUV + 6), /* YYYY... UU...VV...(422P) */ + MPP_FMT_YUV422SP_VU = (MPP_FRAME_FMT_YUV + 7), /* YYYY... VUVUVU... (NV61) */ + MPP_FMT_YUV422_YUYV = (MPP_FRAME_FMT_YUV + 8), /* YUYVYUYV... (YUY2) */ + MPP_FMT_YUV422_YVYU = (MPP_FRAME_FMT_YUV + 9), /* YVYUYVYU... (YVY2) */ + MPP_FMT_YUV422_UYVY = (MPP_FRAME_FMT_YUV + 10), /* UYVYUYVY... (UYVY) */ + MPP_FMT_YUV422_VYUY = (MPP_FRAME_FMT_YUV + 11), /* VYUYVYUY... (VYUY) */ + MPP_FMT_YUV400 = (MPP_FRAME_FMT_YUV + 12), /* YYYY... */ + MPP_FMT_YUV440SP = (MPP_FRAME_FMT_YUV + 13), /* YYYY... UVUV... */ + MPP_FMT_YUV411SP = (MPP_FRAME_FMT_YUV + 14), /* YYYY... UV... */ + MPP_FMT_YUV444SP = (MPP_FRAME_FMT_YUV + 15), /* YYYY... UVUVUVUV... */ + MPP_FMT_YUV444P = (MPP_FRAME_FMT_YUV + 16), /* YYYY... UUUU... VVVV... */ + MPP_FMT_YUV_BUTT, + + MPP_FMT_RGB565 = (MPP_FRAME_FMT_RGB + 0), /* 16-bit RGB */ + MPP_FMT_BGR565 = (MPP_FRAME_FMT_RGB + 1), /* 16-bit RGB */ + MPP_FMT_RGB555 = (MPP_FRAME_FMT_RGB + 2), /* 15-bit RGB */ + MPP_FMT_BGR555 = (MPP_FRAME_FMT_RGB + 3), /* 15-bit RGB */ + MPP_FMT_RGB444 = (MPP_FRAME_FMT_RGB + 4), /* 12-bit RGB */ + MPP_FMT_BGR444 = (MPP_FRAME_FMT_RGB + 5), /* 12-bit RGB */ + MPP_FMT_RGB888 = (MPP_FRAME_FMT_RGB + 6), /* 24-bit RGB */ + MPP_FMT_BGR888 = (MPP_FRAME_FMT_RGB + 7), /* 24-bit RGB */ + MPP_FMT_RGB101010 = (MPP_FRAME_FMT_RGB + 8), /* 30-bit RGB */ + MPP_FMT_BGR101010 = (MPP_FRAME_FMT_RGB + 9), /* 30-bit RGB */ + MPP_FMT_ARGB8888 = (MPP_FRAME_FMT_RGB + 10), /* 32-bit RGB */ + MPP_FMT_ABGR8888 = (MPP_FRAME_FMT_RGB + 11), /* 32-bit RGB */ + MPP_FMT_BGRA8888 = (MPP_FRAME_FMT_RGB + 12), /* 32-bit RGB */ + MPP_FMT_RGBA8888 = (MPP_FRAME_FMT_RGB + 13), /* 32-bit RGB */ + MPP_FMT_RGB_BUTT, + + MPP_FMT_BUTT, +} MppFrameFormat; + +/** + * Rational number (pair of numerator and denominator). + */ +typedef struct MppFrameRational { + RK_S32 num; ///< Numerator + RK_S32 den; ///< Denominator +} MppFrameRational; + +typedef struct MppFrameMasteringDisplayMetadata { + RK_U16 display_primaries[3][2]; + RK_U16 white_point[2]; + RK_U32 max_luminance; + RK_U32 min_luminance; +} MppFrameMasteringDisplayMetadata; + +typedef struct MppFrameContentLightMetadata { + RK_U16 MaxCLL; + RK_U16 MaxFALL; +} MppFrameContentLightMetadata; + +typedef struct MppFrameHdrDynamicMeta { + RK_U32 hdr_fmt; + RK_U32 size; + RK_U8 data[]; +} MppFrameHdrDynamicMeta; + +typedef enum MppFrameError { + /* General error not specified */ + MPP_FRAME_ERR_UNKNOW = 0x0001, + + /* Critical error for decoder not support error */ + MPP_FRAME_ERR_UNSUPPORT = 0x0002, + + /* + * Fatal error for decoder can not parse a valid frame for hardware. + * the pixel data is all invalid. + */ + MPP_FRAME_ERR_DEC_INVALID = 0x0010, + + /* + * Normal error for decoder found hardware error on decoding. + */ + MPP_FRAME_ERR_DEC_HW_ERR = 0x0100, + + /* + * Normal error for decoder found missing reference frame on decoding. + */ + MPP_FRAME_ERR_DEC_MISS_REF = 0x0200, +} MppFrameError; + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * MppFrame interface + */ +MPP_RET mpp_frame_init(MppFrame *frame); +MPP_RET mpp_frame_deinit(MppFrame *frame); + +/* + * normal parameter + * + * offset_x + * <--------> + * + * <---------------+ hor_stride +---------------> + * + * +------------------------------------------------------+ ^ ^ + * | | | | + * | | | | offset_y + * | | | | + * | +--------------------------------+ ^ | | v + * | | | | | | + * | | | + | + + * | | | | + * | | valid data area | height | ver_stride + * | | | | + * | | | + | + + * | | | | | | + * | +--------------------------------+ v | | + * | | | + * | <----------+ width +---------> | | + * | | | + * +------------------------------------------------------+ v + * + */ +RK_U32 mpp_frame_get_width(const MppFrame frame); +void mpp_frame_set_width(MppFrame frame, RK_U32 width); +RK_U32 mpp_frame_get_height(const MppFrame frame); +void mpp_frame_set_height(MppFrame frame, RK_U32 height); +RK_U32 mpp_frame_get_hor_stride(const MppFrame frame); +void mpp_frame_set_hor_stride(MppFrame frame, RK_U32 hor_stride); +RK_U32 mpp_frame_get_ver_stride(const MppFrame frame); +void mpp_frame_set_ver_stride(MppFrame frame, RK_U32 ver_stride); +void mpp_frame_set_hor_stride_pixel(MppFrame frame, RK_U32 hor_stride_pixel); +RK_U32 mpp_frame_get_hor_stride_pixel(const MppFrame frame); +void mpp_frame_set_fbc_hdr_stride(MppFrame frame, RK_U32 fbc_hdr_stride); +RK_U32 mpp_frame_get_fbc_hdr_stride(const MppFrame frame); + +RK_U32 mpp_frame_get_offset_x(const MppFrame frame); +void mpp_frame_set_offset_x(MppFrame frame, RK_U32 offset_x); +RK_U32 mpp_frame_get_offset_y(const MppFrame frame); +void mpp_frame_set_offset_y(MppFrame frame, RK_U32 offset_y); +RK_U32 mpp_frame_get_mode(const MppFrame frame); +void mpp_frame_set_mode(MppFrame frame, RK_U32 mode); +RK_U32 mpp_frame_get_discard(const MppFrame frame); +void mpp_frame_set_discard(MppFrame frame, RK_U32 discard); +RK_U32 mpp_frame_get_viewid(const MppFrame frame); +void mpp_frame_set_viewid(MppFrame frame, RK_U32 viewid); +RK_U32 mpp_frame_get_poc(const MppFrame frame); +void mpp_frame_set_poc(MppFrame frame, RK_U32 poc); +RK_S64 mpp_frame_get_pts(const MppFrame frame); +void mpp_frame_set_pts(MppFrame frame, RK_S64 pts); +RK_S64 mpp_frame_get_dts(const MppFrame frame); +void mpp_frame_set_dts(MppFrame frame, RK_S64 dts); +RK_U32 mpp_frame_get_errinfo(const MppFrame frame); +void mpp_frame_set_errinfo(MppFrame frame, RK_U32 errinfo); +size_t mpp_frame_get_buf_size(const MppFrame frame); +void mpp_frame_set_buf_size(MppFrame frame, size_t buf_size); +void mpp_frame_set_thumbnail_en(MppFrame frame, RK_U32 thumbnail_en); +RK_U32 mpp_frame_get_thumbnail_en(const MppFrame frame); + +/* + * flow control parmeter + */ +RK_U32 mpp_frame_get_eos(const MppFrame frame); +void mpp_frame_set_eos(MppFrame frame, RK_U32 eos); +RK_U32 mpp_frame_get_info_change(const MppFrame frame); +void mpp_frame_set_info_change(MppFrame frame, RK_U32 info_change); + +/* + * buffer parameter + */ +MppBuffer mpp_frame_get_buffer(const MppFrame frame); +void mpp_frame_set_buffer(MppFrame frame, MppBuffer buffer); + +/* + * meta data parameter + */ +RK_S32 mpp_frame_has_meta(const MppFrame frame); +MppMeta mpp_frame_get_meta(const MppFrame frame); +void mpp_frame_set_meta(MppFrame frame, MppMeta meta); + +/* + * color related parameter + */ +MppFrameColorRange mpp_frame_get_color_range(const MppFrame frame); +void mpp_frame_set_color_range(MppFrame frame, MppFrameColorRange color_range); +MppFrameColorPrimaries mpp_frame_get_color_primaries(const MppFrame frame); +void mpp_frame_set_color_primaries(MppFrame frame, MppFrameColorPrimaries color_primaries); +MppFrameColorTransferCharacteristic mpp_frame_get_color_trc(const MppFrame frame); +void mpp_frame_set_color_trc(MppFrame frame, MppFrameColorTransferCharacteristic color_trc); +MppFrameColorSpace mpp_frame_get_colorspace(const MppFrame frame); +void mpp_frame_set_colorspace(MppFrame frame, MppFrameColorSpace colorspace); +MppFrameChromaLocation mpp_frame_get_chroma_location(const MppFrame frame); +void mpp_frame_set_chroma_location(MppFrame frame, MppFrameChromaLocation chroma_location); +MppFrameFormat mpp_frame_get_fmt(MppFrame frame); +void mpp_frame_set_fmt(MppFrame frame, MppFrameFormat fmt); +MppFrameRational mpp_frame_get_sar(const MppFrame frame); +void mpp_frame_set_sar(MppFrame frame, MppFrameRational sar); +MppFrameMasteringDisplayMetadata mpp_frame_get_mastering_display(const MppFrame frame); +void mpp_frame_set_mastering_display(MppFrame frame, MppFrameMasteringDisplayMetadata mastering_display); +MppFrameContentLightMetadata mpp_frame_get_content_light(const MppFrame frame); +void mpp_frame_set_content_light(MppFrame frame, MppFrameContentLightMetadata content_light); +MppFrameHdrDynamicMeta* mpp_frame_get_hdr_dynamic_meta(const MppFrame frame); +void mpp_frame_set_hdr_dynamic_meta(MppFrame frame, MppFrameHdrDynamicMeta *vivi_data); + +/* + * HDR parameter + */ + +#ifdef __cplusplus +} +#endif + +#endif /*__MPP_FRAME_H__*/ diff --git a/dev_reference/rockchip/mpp_log.h b/dev_reference/rockchip/mpp_log.h new file mode 100644 index 0000000..2b38eab --- /dev/null +++ b/dev_reference/rockchip/mpp_log.h @@ -0,0 +1,99 @@ +/* + * Copyright 2022 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MPP_LOG_H__ +#define __MPP_LOG_H__ + +#include "rk_type.h" +#include "mpp_log_def.h" + +/* + * _c function will add condition check + * _f function will add function name to the log + * _cf function will add both function name and condition check + */ + +/* + * mpp runtime log system usage: + * mpp_logf is for fatal logging. For use when aborting + * mpp_loge is for error logging. For use with unrecoverable failures. + * mpp_logw is for warning logging. For use with recoverable failures. + * mpp_logi is for informational logging. + * mpp_logd is for debug logging. + * mpp_logv is for verbose logging + */ + +#define mpp_logf(fmt, ...) _mpp_log_l(MPP_LOG_FATAL, MODULE_TAG, fmt, NULL, ## __VA_ARGS__) +#define mpp_loge(fmt, ...) _mpp_log_l(MPP_LOG_ERROR, MODULE_TAG, fmt, NULL, ## __VA_ARGS__) +#define mpp_logw(fmt, ...) _mpp_log_l(MPP_LOG_WARN, MODULE_TAG, fmt, NULL, ## __VA_ARGS__) +#define mpp_logi(fmt, ...) _mpp_log_l(MPP_LOG_INFO, MODULE_TAG, fmt, NULL, ## __VA_ARGS__) +#define mpp_logd(fmt, ...) _mpp_log_l(MPP_LOG_DEBUG, MODULE_TAG, fmt, NULL, ## __VA_ARGS__) +#define mpp_logv(fmt, ...) _mpp_log_l(MPP_LOG_VERBOSE, MODULE_TAG, fmt, NULL, ## __VA_ARGS__) + +#define mpp_logf_f(fmt, ...) _mpp_log_l(MPP_LOG_FATAL, MODULE_TAG, fmt, __FUNCTION__, ## __VA_ARGS__) +#define mpp_loge_f(fmt, ...) _mpp_log_l(MPP_LOG_ERROR, MODULE_TAG, fmt, __FUNCTION__, ## __VA_ARGS__) +#define mpp_logw_f(fmt, ...) _mpp_log_l(MPP_LOG_WARN, MODULE_TAG, fmt, __FUNCTION__, ## __VA_ARGS__) +#define mpp_logi_f(fmt, ...) _mpp_log_l(MPP_LOG_INFO, MODULE_TAG, fmt, __FUNCTION__, ## __VA_ARGS__) +#define mpp_logd_f(fmt, ...) _mpp_log_l(MPP_LOG_DEBUG, MODULE_TAG, fmt, __FUNCTION__, ## __VA_ARGS__) +#define mpp_logv_f(fmt, ...) _mpp_log_l(MPP_LOG_VERBOSE, MODULE_TAG, fmt, __FUNCTION__, ## __VA_ARGS__) + +#define mpp_logf_c(cond, fmt, ...) do { if (cond) mpp_logf(fmt, ## __VA_ARGS__); } while (0) +#define mpp_loge_c(cond, fmt, ...) do { if (cond) mpp_loge(fmt, ## __VA_ARGS__); } while (0) +#define mpp_logw_c(cond, fmt, ...) do { if (cond) mpp_logw(fmt, ## __VA_ARGS__); } while (0) +#define mpp_logi_c(cond, fmt, ...) do { if (cond) mpp_logi(fmt, ## __VA_ARGS__); } while (0) +#define mpp_logd_c(cond, fmt, ...) do { if (cond) mpp_logd(fmt, ## __VA_ARGS__); } while (0) +#define mpp_logv_c(cond, fmt, ...) do { if (cond) mpp_logv(fmt, ## __VA_ARGS__); } while (0) + +#define mpp_logf_cf(cond, fmt, ...) do { if (cond) mpp_logf_f(fmt, ## __VA_ARGS__); } while (0) +#define mpp_loge_cf(cond, fmt, ...) do { if (cond) mpp_loge_f(fmt, ## __VA_ARGS__); } while (0) +#define mpp_logw_cf(cond, fmt, ...) do { if (cond) mpp_logw_f(fmt, ## __VA_ARGS__); } while (0) +#define mpp_logi_cf(cond, fmt, ...) do { if (cond) mpp_logi_f(fmt, ## __VA_ARGS__); } while (0) +#define mpp_logd_cf(cond, fmt, ...) do { if (cond) mpp_logd_f(fmt, ## __VA_ARGS__); } while (0) +#define mpp_logv_cf(cond, fmt, ...) do { if (cond) mpp_logv_f(fmt, ## __VA_ARGS__); } while (0) + +/* + * mpp runtime log system usage: + * mpp_err is for error status message, it will print for sure. + * mpp_log is for important message like open/close/reset/flush, it will print too. + */ + +#define mpp_log(fmt, ...) mpp_logi(fmt, ## __VA_ARGS__) +#define mpp_err(fmt, ...) mpp_loge(fmt, ## __VA_ARGS__) + +#define mpp_log_f(fmt, ...) mpp_logi_f(fmt, ## __VA_ARGS__) +#define mpp_err_f(fmt, ...) mpp_loge_f(fmt, ## __VA_ARGS__) + +#define mpp_log_c(cond, fmt, ...) do { if (cond) mpp_log(fmt, ## __VA_ARGS__); } while (0) +#define mpp_log_cf(cond, fmt, ...) do { if (cond) mpp_log_f(fmt, ## __VA_ARGS__); } while (0) + +#ifdef __cplusplus +extern "C" { +#endif + +void _mpp_log_l(int level, const char *tag, const char *fmt, const char *func, ...); + +void mpp_set_log_level(int level); +int mpp_get_log_level(void); + +/* deprecated function */ +void _mpp_log(const char *tag, const char *fmt, const char *func, ...); +void _mpp_err(const char *tag, const char *fmt, const char *func, ...); + +#ifdef __cplusplus +} +#endif + +#endif /*__MPP_LOG_H__*/ diff --git a/dev_reference/rockchip/mpp_log_def.h b/dev_reference/rockchip/mpp_log_def.h new file mode 100644 index 0000000..0b17c1b --- /dev/null +++ b/dev_reference/rockchip/mpp_log_def.h @@ -0,0 +1,37 @@ +/* + * Copyright 2022 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MPP_LOG_DEF_H__ +#define __MPP_LOG_DEF_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define MPP_LOG_UNKNOWN 0 /* internal use only */ +#define MPP_LOG_FATAL 1 /* fatal error on aborting */ +#define MPP_LOG_ERROR 2 /* error log on unrecoverable failures */ +#define MPP_LOG_WARN 3 /* warning log on recoverable failures */ +#define MPP_LOG_INFO 4 /* Informational log */ +#define MPP_LOG_DEBUG 5 /* Debug log */ +#define MPP_LOG_VERBOSE 6 /* Verbose log */ +#define MPP_LOG_SILENT 7 /* internal use only */ + +#ifdef __cplusplus +} +#endif + +#endif /*__MPP_LOG_DEF_H__*/ diff --git a/dev_reference/rockchip/mpp_meta.h b/dev_reference/rockchip/mpp_meta.h new file mode 100644 index 0000000..b033551 --- /dev/null +++ b/dev_reference/rockchip/mpp_meta.h @@ -0,0 +1,194 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MPP_META_H__ +#define __MPP_META_H__ + +#include +#include "rk_type.h" + +#define FOURCC_META(a, b, c, d) ((RK_U32)(a) << 24 | \ + ((RK_U32)(b) << 16) | \ + ((RK_U32)(c) << 8) | \ + ((RK_U32)(d) << 0)) + +/* + * Mpp Metadata definition + * + * Metadata is for information transmision in mpp. + * Mpp task will contain two meta data: + * + * 1. Data flow metadata + * This metadata contains information of input / output data flow. For example + * A. decoder input side task the input packet must be defined and output frame + * may not be defined. Then decoder will try malloc or use committed buffer to + * complete decoding. + * B. decoder output side task + * + * + * 2. Flow control metadata + * + */ +typedef enum MppMetaDataType_e { + /* + * mpp meta data of data flow + * reference counter will be used for these meta data type + */ + TYPE_FRAME = FOURCC_META('m', 'f', 'r', 'm'), + TYPE_PACKET = FOURCC_META('m', 'p', 'k', 't'), + TYPE_BUFFER = FOURCC_META('m', 'b', 'u', 'f'), + + /* mpp meta data of normal data type */ + TYPE_S32 = FOURCC_META('s', '3', '2', ' '), + TYPE_S64 = FOURCC_META('s', '6', '4', ' '), + TYPE_PTR = FOURCC_META('p', 't', 'r', ' '), +} MppMetaType; + +typedef enum MppMetaKey_e { + /* data flow key */ + KEY_INPUT_FRAME = FOURCC_META('i', 'f', 'r', 'm'), + KEY_INPUT_PACKET = FOURCC_META('i', 'p', 'k', 't'), + KEY_OUTPUT_FRAME = FOURCC_META('o', 'f', 'r', 'm'), + KEY_OUTPUT_PACKET = FOURCC_META('o', 'p', 'k', 't'), + /* output motion information for motion detection */ + KEY_MOTION_INFO = FOURCC_META('m', 'v', 'i', 'f'), + KEY_HDR_INFO = FOURCC_META('h', 'd', 'r', ' '), + KEY_HDR_META_OFFSET = FOURCC_META('h', 'd', 'r', 'o'), + KEY_HDR_META_SIZE = FOURCC_META('h', 'd', 'r', 'l'), + + /* flow control key */ + KEY_INPUT_BLOCK = FOURCC_META('i', 'b', 'l', 'k'), + KEY_OUTPUT_BLOCK = FOURCC_META('o', 'b', 'l', 'k'), + KEY_INPUT_IDR_REQ = FOURCC_META('i', 'i', 'd', 'r'), /* input idr frame request flag */ + KEY_OUTPUT_INTRA = FOURCC_META('o', 'i', 'd', 'r'), /* output intra frame indicator */ + + /* mpp_frame / mpp_packet meta data info key */ + KEY_TEMPORAL_ID = FOURCC_META('t', 'l', 'i', 'd'), + KEY_LONG_REF_IDX = FOURCC_META('l', 't', 'i', 'd'), + KEY_ENC_AVERAGE_QP = FOURCC_META('a', 'v', 'g', 'q'), + KEY_ENC_START_QP = FOURCC_META('s', 't', 'r', 'q'), + KEY_ROI_DATA = FOURCC_META('r', 'o', 'i', ' '), + KEY_OSD_DATA = FOURCC_META('o', 's', 'd', ' '), + KEY_OSD_DATA2 = FOURCC_META('o', 's', 'd', '2'), + KEY_USER_DATA = FOURCC_META('u', 's', 'r', 'd'), + KEY_USER_DATAS = FOURCC_META('u', 'r', 'd', 's'), + + /* num of inter different size predicted block */ + KEY_LVL64_INTER_NUM = FOURCC_META('l', '6', '4', 'p'), + KEY_LVL32_INTER_NUM = FOURCC_META('l', '3', '2', 'p'), + KEY_LVL16_INTER_NUM = FOURCC_META('l', '1', '6', 'p'), + KEY_LVL8_INTER_NUM = FOURCC_META('l', '8', 'p', ' '), + /* num of intra different size predicted block */ + KEY_LVL32_INTRA_NUM = FOURCC_META('l', '3', '2', 'i'), + KEY_LVL16_INTRA_NUM = FOURCC_META('l', '1', '6', 'i'), + KEY_LVL8_INTRA_NUM = FOURCC_META('l', '8', 'i', ' '), + KEY_LVL4_INTRA_NUM = FOURCC_META('l', '4', 'i', ' '), + /* output P skip frame indicator */ + KEY_OUTPUT_PSKIP = FOURCC_META('o', 'p', 's', 'p'), + KEY_ENC_SSE = FOURCC_META('e', 's', 's', 'e'), + + /* + * For vepu580 roi buffer config mode + * The encoder roi structure is so complex that we should provide a buffer + * tunnel for externl user to config encoder hardware by direct sending + * roi data buffer. + * This way can reduce the config parsing and roi buffer data generating + * overhead in mpp. + */ + KEY_ROI_DATA2 = FOURCC_META('r', 'o', 'i', '2'), + + /* + * qpmap for rv1109/1126 encoder qpmap config + * Input data is a MppBuffer which contains an array of 16bit Vepu541RoiCfg. + * And each 16bit represents a 16x16 block qp info. + * + * H.264 - 16x16 block qp is arranged in raster order: + * each value is a 16bit data + * 00 01 02 03 04 05 06 07 -> 00 01 02 03 04 05 06 07 + * 10 11 12 13 14 15 16 17 10 11 12 13 14 15 16 17 + * 20 21 22 23 24 25 26 27 20 21 22 23 24 25 26 27 + * 30 31 32 33 34 35 36 37 30 31 32 33 34 35 36 37 + * + * H.265 - 16x16 block qp is reorder to 64x64/32x32 ctu order then 64x64 / 32x32 ctu raster order + * 64x64 ctu + * 00 01 02 03 04 05 06 07 -> 00 01 02 03 10 11 12 13 20 21 22 23 30 31 32 33 04 05 06 07 14 15 16 17 24 25 26 27 34 35 36 37 + * 10 11 12 13 14 15 16 17 + * 20 21 22 23 24 25 26 27 + * 30 31 32 33 34 35 36 37 + * 32x32 ctu + * 00 01 02 03 04 05 06 07 -> 00 01 10 11 02 03 12 13 04 05 14 15 06 07 16 17 + * 10 11 12 13 14 15 16 17 20 21 30 31 22 23 32 33 24 25 34 35 26 27 36 37 + * 20 21 22 23 24 25 26 27 + * 30 31 32 33 34 35 36 37 + */ + KEY_QPMAP0 = FOURCC_META('e', 'q', 'm', '0'), + + /* input motion list for smart p rate control */ + KEY_MV_LIST = FOURCC_META('m', 'v', 'l', 't'), + + /* frame long-term reference frame operation */ + KEY_ENC_MARK_LTR = FOURCC_META('m', 'l', 't', 'r'), + KEY_ENC_USE_LTR = FOURCC_META('u', 'l', 't', 'r'), + + /* MLVEC specified encoder feature */ + KEY_ENC_FRAME_QP = FOURCC_META('f', 'r', 'm', 'q'), + KEY_ENC_BASE_LAYER_PID = FOURCC_META('b', 'p', 'i', 'd'), + + /* Thumbnail info for decoder output frame */ + KEY_DEC_TBN_EN = FOURCC_META('t', 'b', 'e', 'n'), + KEY_DEC_TBN_Y_OFFSET = FOURCC_META('t', 'b', 'y', 'o'), + KEY_DEC_TBN_UV_OFFSET = FOURCC_META('t', 'b', 'c', 'o'), +} MppMetaKey; + +#define mpp_meta_get(meta) mpp_meta_get_with_tag(meta, MODULE_TAG, __FUNCTION__) + +#include "mpp_frame.h" +#include "mpp_packet.h" + +#ifdef __cplusplus +extern "C" { +#endif + +MPP_RET mpp_meta_get_with_tag(MppMeta *meta, const char *tag, const char *caller); +MPP_RET mpp_meta_put(MppMeta meta); +RK_S32 mpp_meta_size(MppMeta meta); + +MPP_RET mpp_meta_set_s32(MppMeta meta, MppMetaKey key, RK_S32 val); +MPP_RET mpp_meta_set_s64(MppMeta meta, MppMetaKey key, RK_S64 val); +MPP_RET mpp_meta_set_ptr(MppMeta meta, MppMetaKey key, void *val); +MPP_RET mpp_meta_get_s32(MppMeta meta, MppMetaKey key, RK_S32 *val); +MPP_RET mpp_meta_get_s64(MppMeta meta, MppMetaKey key, RK_S64 *val); +MPP_RET mpp_meta_get_ptr(MppMeta meta, MppMetaKey key, void **val); + +MPP_RET mpp_meta_set_frame (MppMeta meta, MppMetaKey key, MppFrame frame); +MPP_RET mpp_meta_set_packet(MppMeta meta, MppMetaKey key, MppPacket packet); +MPP_RET mpp_meta_set_buffer(MppMeta meta, MppMetaKey key, MppBuffer buffer); +MPP_RET mpp_meta_get_frame (MppMeta meta, MppMetaKey key, MppFrame *frame); +MPP_RET mpp_meta_get_packet(MppMeta meta, MppMetaKey key, MppPacket *packet); +MPP_RET mpp_meta_get_buffer(MppMeta meta, MppMetaKey key, MppBuffer *buffer); + +MPP_RET mpp_meta_get_s32_d(MppMeta meta, MppMetaKey key, RK_S32 *val, RK_S32 def); +MPP_RET mpp_meta_get_s64_d(MppMeta meta, MppMetaKey key, RK_S64 *val, RK_S64 def); +MPP_RET mpp_meta_get_ptr_d(MppMeta meta, MppMetaKey key, void **val, void *def); +MPP_RET mpp_meta_get_frame_d(MppMeta meta, MppMetaKey key, MppFrame *frame, MppFrame def); +MPP_RET mpp_meta_get_packet_d(MppMeta meta, MppMetaKey key, MppPacket *packet, MppPacket def); +MPP_RET mpp_meta_get_buffer_d(MppMeta meta, MppMetaKey key, MppBuffer *buffer, MppBuffer def); + +#ifdef __cplusplus +} +#endif + +#endif /*__MPP_META_H__*/ diff --git a/dev_reference/rockchip/mpp_packet.h b/dev_reference/rockchip/mpp_packet.h new file mode 100644 index 0000000..9d2768b --- /dev/null +++ b/dev_reference/rockchip/mpp_packet.h @@ -0,0 +1,117 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MPP_PACKET_H__ +#define __MPP_PACKET_H__ + +#include "mpp_meta.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * MppPacket interface + * + * mpp_packet_init = mpp_packet_new + mpp_packet_set_data + mpp_packet_set_size + * mpp_packet_copy_init = mpp_packet_init + memcpy + */ +MPP_RET mpp_packet_new(MppPacket *packet); +MPP_RET mpp_packet_init(MppPacket *packet, void *data, size_t size); +MPP_RET mpp_packet_init_with_buffer(MppPacket *packet, MppBuffer buffer); +MPP_RET mpp_packet_copy_init(MppPacket *packet, const MppPacket src); +MPP_RET mpp_packet_deinit(MppPacket *packet); + +/* + * data : ( R/W ) start address of the whole packet memory + * size : ( R/W ) total size of the whole packet memory + * pos : ( R/W ) current access position of the whole packet memory, used for buffer read/write + * length : ( R/W ) the rest length from current position to end of buffer + * NOTE: normally length is updated only by set_pos, + * so set length must be used carefully for special usage + */ +void mpp_packet_set_data(MppPacket packet, void *data); +void mpp_packet_set_size(MppPacket packet, size_t size); +void mpp_packet_set_pos(MppPacket packet, void *pos); +void mpp_packet_set_length(MppPacket packet, size_t size); + +void* mpp_packet_get_data(const MppPacket packet); +void* mpp_packet_get_pos(const MppPacket packet); +size_t mpp_packet_get_size(const MppPacket packet); +size_t mpp_packet_get_length(const MppPacket packet); + + +void mpp_packet_set_pts(MppPacket packet, RK_S64 pts); +RK_S64 mpp_packet_get_pts(const MppPacket packet); +void mpp_packet_set_dts(MppPacket packet, RK_S64 dts); +RK_S64 mpp_packet_get_dts(const MppPacket packet); + +void mpp_packet_set_flag(MppPacket packet, RK_U32 flag); +RK_U32 mpp_packet_get_flag(const MppPacket packet); + +MPP_RET mpp_packet_set_eos(MppPacket packet); +MPP_RET mpp_packet_clr_eos(MppPacket packet); +RK_U32 mpp_packet_get_eos(MppPacket packet); +MPP_RET mpp_packet_set_extra_data(MppPacket packet); + +void mpp_packet_set_buffer(MppPacket packet, MppBuffer buffer); +MppBuffer mpp_packet_get_buffer(const MppPacket packet); + +/* + * data access interface + */ +MPP_RET mpp_packet_read(MppPacket packet, size_t offset, void *data, size_t size); +MPP_RET mpp_packet_write(MppPacket packet, size_t offset, void *data, size_t size); + +/* + * meta data access interface + */ +RK_S32 mpp_packet_has_meta(const MppPacket packet); +MppMeta mpp_packet_get_meta(const MppPacket packet); + +/* + * multi packet sequence interface for slice/split encoding/decoding + * partition - the packet is a part of a while image + * soi - Start Of Image + * eoi - End Of Image + */ +RK_U32 mpp_packet_is_partition(const MppPacket packet); +RK_U32 mpp_packet_is_soi(const MppPacket packet); +RK_U32 mpp_packet_is_eoi(const MppPacket packet); + +/* + * packet segement pack info for + * segment number - number of segment + * segment info - base address of segment info + */ +typedef struct MppPktSeg_t MppPktSeg; + +struct MppPktSeg_t { + RK_S32 index; + RK_S32 type; + RK_U32 offset; + RK_U32 len; + const MppPktSeg *next; +}; + +RK_U32 mpp_packet_get_segment_nb(const MppPacket packet); +const MppPktSeg *mpp_packet_get_segment_info(const MppPacket packet); + +#ifdef __cplusplus +} +#endif + +#endif /*__MPP_PACKET_H__*/ diff --git a/dev_reference/rockchip/mpp_rc_api.h b/dev_reference/rockchip/mpp_rc_api.h new file mode 100644 index 0000000..eedad34 --- /dev/null +++ b/dev_reference/rockchip/mpp_rc_api.h @@ -0,0 +1,263 @@ +/* + * Copyright 2016 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MPP_RC_API_H__ +#define __MPP_RC_API_H__ + +#include "mpp_err.h" +#include "rk_venc_rc.h" +#include "mpp_rc_defs.h" + +/* + * Mpp rate control has three parts: + * + * 1. MPI user config module + * MppEncRcCfg structure is provided to user for overall rate control config + * Mpp will receive MppEncRcCfg from user, check parameter and set it to + * encoder. + * + * 2. Encoder rate control module + * Encoder will implement the rate control strategy required by users + * including CBR, VBR, AVBR and so on. + * This module only implement the target bit calculation behavior and + * quality restriction. And the quality level will be controlled by hal. + * + * 3. Hal rate control module + * Hal will implement the rate control on hardware. Hal will calculate the + * QP parameter for hardware according to the frame level target bit + * specified by the encoder. And the report the real bitrate and quality to + * encoder. + * + * The header defines the communication interfaces and structures used between + * MPI, encoder and hal. + */ + +typedef enum RcMode_e { + RC_VBR, + RC_CBR, + RC_FIXQP, + RC_AVBR, + RC_CVBR, + RC_QVBR, + RC_LEARNING, + RC_MODE_BUTT, +} RcMode; + +typedef enum GopMode_e { + NORMAL_P, + SMART_P, +} GopMode; + +/* + * frame rate parameters have great effect on rate control + * + * fps_in_flex + * 0 - fix input frame rate + * 1 - variable input frame rate + * + * fps_in_num + * input frame rate numerator, if 0 then default 30 + * + * fps_in_denorm + * input frame rate denorminator, if 0 then default 1 + * + * fps_out_flex + * 0 - fix output frame rate + * 1 - variable output frame rate + * + * fps_out_num + * output frame rate numerator, if 0 then default 30 + * + * fps_out_denorm + * output frame rate denorminator, if 0 then default 1 + */ +typedef struct RcFpsCfg_t { + RK_S32 fps_in_flex; + RK_S32 fps_in_num; + RK_S32 fps_in_denorm; + RK_S32 fps_out_flex; + RK_S32 fps_out_num; + RK_S32 fps_out_denorm; +} RcFpsCfg; + +typedef struct RcSuperframeCfg_t { + MppEncRcSuperFrameMode super_mode; + RK_U32 super_i_thd; + RK_U32 super_p_thd; + MppEncRcPriority rc_priority; +} RcSuperframeCfg; + +typedef struct RcDebreathCfg_t { + RK_U32 enable; + RK_U32 strength; +} RcDebreathCfg; + +typedef struct RcHierQPCfg_t { + RK_S32 hier_qp_en; + RK_S32 hier_qp_delta[4]; + RK_S32 hier_frame_num[4]; +} RcHierQPCfg; + +/* + * Control parameter from external config + * + * It will be updated on rc/prep/gopref config changed. + */ +typedef struct RcCfg_s { + /* encode image size */ + RK_S32 width; + RK_S32 height; + + /* Use rc_mode to find different api */ + RcMode mode; + + RcFpsCfg fps; + + GopMode gop_mode; + /* I frame gop len */ + RK_S32 igop; + /* visual gop len */ + RK_S32 vgop; + + /* bitrate parameter */ + RK_S32 bps_min; + RK_S32 bps_target; + RK_S32 bps_max; + RK_S32 stats_time; + + /* max I frame bit ratio to P frame bit */ + RK_S32 max_i_bit_prop; + RK_S32 min_i_bit_prop; + RK_S32 init_ip_ratio; + /* layer bitrate proportion */ + RK_S32 layer_bit_prop[4]; + + /* quality parameter */ + RK_S32 init_quality; + RK_S32 max_quality; + RK_S32 min_quality; + RK_S32 max_i_quality; + RK_S32 min_i_quality; + RK_S32 i_quality_delta; + RK_S32 vi_quality_delta; + RK_S32 fqp_min_i; + RK_S32 fqp_min_p; + RK_S32 fqp_max_i; + RK_S32 fqp_max_p; + /* layer quality proportion */ + RK_S32 layer_quality_delta[4]; + + /* reencode parameter */ + RK_S32 max_reencode_times; + + /* still / motion desision parameter */ + RK_S32 min_still_prop; + RK_S32 max_still_quality; + + /* + * vbr parameter + * + * vbr_hi_prop - high proportion bitrate for reduce quality + * vbr_lo_prop - low proportion bitrate for increase quality + */ + RK_S32 vbr_hi_prop; + RK_S32 vbr_lo_prop; + + MppEncRcDropFrmMode drop_mode; + RK_U32 drop_thd; + RK_U32 drop_gap; + + RcSuperframeCfg super_cfg; + RcDebreathCfg debreath_cfg; + RcHierQPCfg hier_qp_cfg; + RK_U32 refresh_len; + RK_S32 scene_mode; + RK_U32 fps_chg_prop; +} RcCfg; + +/* + * Different rate control strategy will be implemented by different API config + */ +typedef struct RcImplApi_t { + char *name; + MppCodingType type; + RK_U32 ctx_size; + + MPP_RET (*init)(void *ctx, RcCfg *cfg); + MPP_RET (*deinit)(void *ctx); + + MPP_RET (*check_drop)(void *ctx, EncRcTask *task); + MPP_RET (*check_reenc)(void *ctx, EncRcTask *task); + + /* + * frm_start - frame level rate control frm_start. + * The EncRcTaskInfo will be output to hal for hardware to implement. + * frm_end - frame level rate control frm_end. + * The EncRcTaskInfo is returned for real quality and bitrate. + */ + MPP_RET (*frm_start)(void *ctx, EncRcTask *task); + MPP_RET (*frm_end)(void *ctx, EncRcTask *task); + + /* + * hal_start - hardware level rate control start. + * The EncRcTaskInfo will be output to hal for hardware to implement. + * hal_end - hardware level rate control end. + * The EncRcTaskInfo is returned for real quality and bitrate. + */ + MPP_RET (*hal_start)(void *ctx, EncRcTask *task); + MPP_RET (*hal_end)(void *ctx, EncRcTask *task); +} RcImplApi; + +/* + * structures for RC API register and query + */ +typedef struct RcApiBrief_t { + const char *name; + MppCodingType type; +} RcApiBrief; + +typedef struct RcApiQueryAll_t { + /* input param for query */ + RcApiBrief *brief; + RK_S32 max_count; + + /* output query count */ + RK_S32 count; +} RcApiQueryAll; + +typedef struct RcApiQueryType_t { + /* input param for query */ + RcApiBrief *brief; + RK_S32 max_count; + MppCodingType type; + + /* output query count */ + RK_S32 count; +} RcApiQueryType; + +#ifdef __cplusplus +extern "C" { +#endif + +MPP_RET rc_api_add(const RcImplApi *api); +MPP_RET rc_brief_get_all(RcApiQueryAll *query); +MPP_RET rc_brief_get_by_type(RcApiQueryType *query); + +#ifdef __cplusplus +} +#endif + +#endif /* __MPP_RC_API_H__ */ diff --git a/dev_reference/rockchip/mpp_rc_defs.h b/dev_reference/rockchip/mpp_rc_defs.h new file mode 100644 index 0000000..e8cb5b5 --- /dev/null +++ b/dev_reference/rockchip/mpp_rc_defs.h @@ -0,0 +1,223 @@ +/* + * Copyright 2016 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MPP_RC_DEFS_H__ +#define __MPP_RC_DEFS_H__ + +#include "rk_venc_ref.h" + +#define MAX_CPB_REFS (8) + +typedef enum EncFrmType_e { + INTER_P_FRAME = 0, + INTER_B_FRAME = 1, + INTRA_FRAME = 2, + INTER_VI_FRAME = 3, + INTRA_RFH_FRAME = 4, +} EncFrmType; + +/* + * EncFrmStatus controls record the encoding frame status and also control + * work flow of encoder. It is the communicat channel between encoder implement + * module, rate control module and hardware module. + * + * bit 0 ~ 31 frame status + * 0 ~ 15 current frame status + * 16 ~ 31 reference frame status + * bit 32 ~ 63 encoding flow control + */ +typedef union EncFrmStatus_u { + struct { + /* + * bit 0 ~ 31 frame status + */ + /* status flag */ + RK_U32 valid : 1; + /* + * 0 - write the reconstructed frame pixel to memory + * 1 - do not write the reconstructed frame pixel to memory + */ + RK_U32 non_recn : 1; + + /* + * 0 - normal frame and normal dpb management + * 1 - save recon frame as first pass extra frame. Used in two pass mode + */ + RK_U32 save_pass1 : 1; + + /* + * 0 - use normal input source frame as input + * 1 - use the previously stored first pass recon frame as input frame + */ + RK_U32 use_pass1 : 1; + + /* reference status flag */ + /* + * 0 - inter frame + * 1 - intra frame + */ + RK_U32 is_intra : 1; + + /* + * Valid when is_intra is true + * 0 - normal intra frame + * 1 - IDR frame + */ + RK_U32 is_idr : 1; + + /* + * 0 - mark as reference frame + * 1 - mark as non-refernce frame + */ + RK_U32 is_non_ref : 1; + + /* + * Valid when is_non_ref is false + * 0 - mark as short-term reference frame + * 1 - mark as long-term refernce frame + */ + RK_U32 is_lt_ref : 1; + + /* bit 8 - 15 */ + RK_U32 lt_idx : 4; + RK_U32 temporal_id : 4; + + /* distance between current frame and reference frame */ + MppEncRefMode ref_mode : 6; + RK_S32 ref_arg : 8; + RK_S32 ref_dist : 2; + + /* + * bit 32 ~ 63 encoder flow control flags + */ + /* + * 0 - normal frame encoding + * 1 - current frame will be dropped + */ + RK_U32 drop : 1; + + /* + * 0 - rate control module does not change frame type parameter + * 1 - rate control module changes frame type parameter reencode is needed + * to reprocess the dpb process. Also this means dpb module will follow + * the frame status parameter provided by rate control module. + */ + RK_U32 re_dpb_proc : 1; + + /* + * 0 - current frame encoding is in normal flow + * 1 - current frame encoding is in reencode flow + */ + RK_U32 reencode : 1; + + /* + * When true current frame size is super large then the frame should be reencoded. + */ + RK_U32 super_frame : 1; + + /* + * When true currnet frame is force to encoded as software skip frame + */ + RK_U32 force_pskip : 1; + + /* + * Current frame is intra refresh frame + */ + RK_U32 is_i_refresh : 1; + /* + * Current frame needs add recovery point prefix + */ + RK_U32 is_i_recovery : 1; + RK_U32 reserved1 : 1; + + /* reencode times */ + RK_U32 reencode_times : 8; + + /* sequential index for each frame */ + RK_U32 seq_idx : 16; + }; + RK_U64 val; +} EncFrmStatus; + +typedef struct EncCpbStatus_t { + RK_S32 seq_idx; + + EncFrmStatus curr; + EncFrmStatus refr; + + /* initial cpb status for current frame encoding */ + EncFrmStatus init[MAX_CPB_REFS]; + /* final cpb status after current frame encoding */ + EncFrmStatus final[MAX_CPB_REFS]; +} EncCpbStatus; + +#define ENC_RC_FORCE_QP (0x00000001) + +typedef struct EncRcForceCfg_t { + RK_U32 force_flag; + RK_S32 force_qp; + RK_U32 reserve[6]; +} EncRcForceCfg; + +/* + * communication channel between rc / hal / hardware + * + * rc -> hal bit_target / bit_max / bit_min + * hal -> hw quality_target / quality_max / quality_min + * hw -> rc / hal bit_real / quality_real / madi / madp + */ +typedef struct EncRcCommonInfo_t { + EncFrmType frame_type; + + /* rc to hal */ + RK_S32 bit_target; + RK_S32 bit_max; + RK_S32 bit_min; + + RK_S32 quality_target; + RK_S32 quality_max; + RK_S32 quality_min; + + /* rc from hardware */ + RK_S32 bit_real; + RK_S32 quality_real; + RK_S32 madi; + RK_S32 madp; + + RK_U32 iblk4_prop; // scale 256 + + RK_S64 sse; + RK_U32 lvl64_inter_num; + RK_U32 lvl32_inter_num; + RK_U32 lvl16_inter_num; + RK_U32 lvl8_inter_num; + RK_U32 lvl32_intra_num; + RK_U32 lvl16_intra_num; + RK_U32 lvl8_intra_num; + RK_U32 lvl4_intra_num; + + RK_S32 reserve[5]; +} EncRcTaskInfo; + +typedef struct EncRcTask_s { + EncCpbStatus cpb; + EncFrmStatus frm; + EncRcTaskInfo info; + EncRcForceCfg force; + MppFrame frame; +} EncRcTask; + +#endif /* __MPP_RC_DEFS_H__ */ diff --git a/dev_reference/rockchip/mpp_task.h b/dev_reference/rockchip/mpp_task.h new file mode 100644 index 0000000..d526e3a --- /dev/null +++ b/dev_reference/rockchip/mpp_task.h @@ -0,0 +1,237 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MPP_TASK_H__ +#define __MPP_TASK_H__ + +#include "mpp_meta.h" + +/* + * Advanced task flow + * Advanced task flow introduces three concepts: port, task and item + * + * Port is from OpenMAX + * Port has two type: input port and output port which are all for data transaction. + * Port work like a queue. task will be dequeue from or enqueue to one port. + * On input side user will dequeue task from input port, setup task and enqueue task + * back to input port. + * On output side user will dequeue task from output port, get the information from + * and then enqueue task back to output port. + * + * Task indicates one transaction on the port. + * Task has two working mode: async mode and sync mode + * If mpp is work in sync mode on task enqueue function return the task has been done + * If mpp is work in async mode on task enqueue function return the task is just put + * on the task queue for process. + * Task can carry different items. Task just like a container of items + * + * Item indicates MppPacket or MppFrame which is contained in one task + */ + +/* + * One mpp task queue has two ports: input and output + * + * The whole picture is: + * Top layer mpp has two ports: mpp_input_port and mpp_output_port + * But internally these two ports belongs to two task queue. + * The mpp_input_port is the mpp_input_task_queue's input port. + * The mpp_output_port is the mpp_output_task_queue's output port. + * + * Each port uses its task queue to communication + */ +typedef enum { + MPP_PORT_INPUT, + MPP_PORT_OUTPUT, + MPP_PORT_BUTT, +} MppPortType; + +/* + * Advance task work flow mode: + ****************************************************************************** + * 1. async mode (default_val) + * + * mpp_init(type, coding, MPP_WORK_ASYNC) + * + * input thread + * a - poll(input) + * b - dequeue(input, *task) + * c - task_set_item(packet/frame) + * d - enqueue(input, task) // when enqueue return the task is not done yet + * + * output thread + * a - poll(output) + * b - dequeue(output, *task) + * c - task_get_item(frame/packet) + * d - enqueue(output, task) + ****************************************************************************** + * 2. sync mode + * + * mpp_init(type, coding, MPP_WORK_SYNC) + * + * a - poll(input) + * b - dequeue(input, *task) + * c - task_set_item(packet/frame) + * d - enqueue(task) // when enqueue return the task is finished + ****************************************************************************** + */ +typedef enum { + MPP_TASK_ASYNC, + MPP_TASK_SYNC, + MPP_TASK_WORK_MODE_BUTT, +} MppTaskWorkMode; + +/* + * Mpp port poll type + * + * MPP_POLL_BLOCK - for block poll + * MPP_POLL_NON_BLOCK - for non-block poll + * small than MPP_POLL_MAX - for poll with timeout in ms + * small than MPP_POLL_BUTT or larger than MPP_POLL_MAX is invalid value + */ +typedef enum { + MPP_POLL_BUTT = -2, + MPP_POLL_BLOCK = -1, + MPP_POLL_NON_BLOCK = 0, + MPP_POLL_MAX = 8000, +} MppPollType; + +/* + * Mpp timeout define + * MPP_TIMEOUT_BLOCK - for block poll + * MPP_TIMEOUT_NON_BLOCK - for non-block poll + * small than MPP_TIMEOUT_MAX - for poll with timeout in ms + * small than MPP_TIMEOUT_BUTT or larger than MPP_TIMEOUT_MAX is invalid value + */ +#define MPP_TIMEOUT_BUTT (-2L) +#define MPP_TIMEOUT_BLOCK (-1L) +#define MPP_TIMEOUT_NON_BLOCK (0L) +#define MPP_TIMEOUT_MAX (8000L) + +/* + * MppTask is descriptor of a task which send to mpp for process + * mpp can support different type of work mode, for example: + * + * decoder: + * + * 1. typical decoder mode: + * input - MppPacket (normal cpu buffer, need cpu copy) + * output - MppFrame (ion/drm buffer in external/internal mode) + * 2. secure decoder mode: + * input - MppPacket (externel ion/drm buffer, cpu can not access) + * output - MppFrame (ion/drm buffer in external/internal mode, cpu can not access) + * + * interface usage: + * + * typical flow + * input side: + * task_dequeue(ctx, PORT_INPUT, &task); + * task_put_item(task, MODE_INPUT, packet) + * task_enqueue(ctx, PORT_INPUT, task); + * output side: + * task_dequeue(ctx, PORT_OUTPUT, &task); + * task_get_item(task, MODE_OUTPUT, &frame) + * task_enqueue(ctx, PORT_OUTPUT, task); + * + * secure flow + * input side: + * task_dequeue(ctx, PORT_INPUT, &task); + * task_put_item(task, MODE_INPUT, packet) + * task_put_item(task, MODE_OUTPUT, frame) // buffer will be specified here + * task_enqueue(ctx, PORT_INPUT, task); + * output side: + * task_dequeue(ctx, PORT_OUTPUT, &task); + * task_get_item(task, MODE_OUTPUT, &frame) + * task_enqueue(ctx, PORT_OUTPUT, task); + * + * encoder: + * + * 1. typical encoder mode: + * input - MppFrame (ion/drm buffer in external mode) + * output - MppPacket (normal cpu buffer, need cpu copy) + * 2. user input encoder mode: + * input - MppFrame (normal cpu buffer, need to build hardware table for this buffer) + * output - MppPacket (normal cpu buffer, need cpu copy) + * 3. secure encoder mode: + * input - MppFrame (ion/drm buffer in external mode, cpu can not access) + * output - MppPacket (externel ion/drm buffer, cpu can not access) + * + * typical / user input flow + * input side: + * task_dequeue(ctx, PORT_INPUT, &task); + * task_put_item(task, MODE_INPUT, frame) + * task_enqueue(ctx, PORT_INPUT, task); + * output side: + * task_dequeue(ctx, PORT_OUTPUT, &task); + * task_get_item(task, MODE_OUTPUT, &packet) + * task_enqueue(ctx, PORT_OUTPUT, task); + * + * secure flow + * input side: + * task_dequeue(ctx, PORT_INPUT, &task); + * task_put_item(task, MODE_OUTPUT, packet) // buffer will be specified here + * task_put_item(task, MODE_INPUT, frame) + * task_enqueue(ctx, PORT_INPUT, task); + * output side: + * task_dequeue(ctx, PORT_OUTPUT, &task); + * task_get_item(task, MODE_OUTPUT, &packet) + * task_get_item(task, MODE_OUTPUT, &frame) + * task_enqueue(ctx, PORT_OUTPUT, task); + * + * NOTE: this flow can specify the output frame. User will setup both intput frame and output packet + * buffer at the input side. Then at output side when user gets a finished task user can get the output + * packet and corresponding released input frame. + * + * image processing + * + * 1. typical image process mode: + * input - MppFrame (ion/drm buffer in external mode) + * output - MppFrame (ion/drm buffer in external mode) + * + * typical / user input flow + * input side: + * task_dequeue(ctx, PORT_INPUT, &task); + * task_put_item(task, MODE_INPUT, frame) + * task_enqueue(ctx, PORT_INPUT, task); + * output side: + * task_dequeue(ctx, PORT_OUTPUT, &task); + * task_get_item(task, MODE_OUTPUT, &frame) + * task_enqueue(ctx, PORT_OUTPUT, task); + */ +/* NOTE: use index rather then handle to descripbe task */ + +#ifdef __cplusplus +extern "C" { +#endif + +MPP_RET mpp_task_meta_set_s32(MppTask task, MppMetaKey key, RK_S32 val); +MPP_RET mpp_task_meta_set_s64(MppTask task, MppMetaKey key, RK_S64 val); +MPP_RET mpp_task_meta_set_ptr(MppTask task, MppMetaKey key, void *val); +MPP_RET mpp_task_meta_set_frame (MppTask task, MppMetaKey key, MppFrame frame); +MPP_RET mpp_task_meta_set_packet(MppTask task, MppMetaKey key, MppPacket packet); +MPP_RET mpp_task_meta_set_buffer(MppTask task, MppMetaKey key, MppBuffer buffer); + +MPP_RET mpp_task_meta_get_s32(MppTask task, MppMetaKey key, RK_S32 *val, RK_S32 default_val); +MPP_RET mpp_task_meta_get_s64(MppTask task, MppMetaKey key, RK_S64 *val, RK_S64 default_val); +MPP_RET mpp_task_meta_get_ptr(MppTask task, MppMetaKey key, void **val, void *default_val); +MPP_RET mpp_task_meta_get_frame (MppTask task, MppMetaKey key, MppFrame *frame); +MPP_RET mpp_task_meta_get_packet(MppTask task, MppMetaKey key, MppPacket *packet); +MPP_RET mpp_task_meta_get_buffer(MppTask task, MppMetaKey key, MppBuffer *buffer); + +#ifdef __cplusplus +} +#endif + +#endif /*__MPP_QUEUE_H__*/ diff --git a/dev_reference/rockchip/rk_hdr_meta_com.h b/dev_reference/rockchip/rk_hdr_meta_com.h new file mode 100644 index 0000000..3f46638 --- /dev/null +++ b/dev_reference/rockchip/rk_hdr_meta_com.h @@ -0,0 +1,118 @@ +/* + * Copyright 2022 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __RK_HDR_META_COM_H__ +#define __RK_HDR_META_COM_H__ + +#include "rk_type.h" + +typedef enum HdrCodecType_e { + HDR_AVS2 = 0, + HDR_HEVC = 1, + HDR_H264 = 2, + HDR_AV1 = 3, + HDR_CODEC_BUT, +} HdrCodecType; + +typedef enum HdrFormat_e { + HDR_NONE = 0, + HDR10 = 1, + HLG = 2, +// RESERVED3 = 3, //reserved for more future static hdr format +// RESERVED4 = 4, //reserved for more future static hdr format + HDRVIVID = 5, +// RESERVED6 = 6, //reserved for hdr vivid +// RESERVED7 = 7, //reserved for hdr vivid + HDR10PLUS = 8, +// RESERVED9 = 9, //reserved for hdr10+ +// RESERVED10 = 10,//reserved for hdr10+ + DOLBY = 11, +// RESERVED12 = 12, //reserved for other dynamic hdr format +// RESERVED13 = 13, //reserved for other dynamic hdr format + HDR_FORMAT_MAX, +} HdrFormat; + +typedef enum HdrPayloadFormat_e { + STATIC = 0, + DYNAMIC = 1, + HDR_PAYLOAD_FORMAT_MAX, +} HdrPayloadFormat; + +typedef struct HdrStaticMeta_t { + RK_U32 color_space; + RK_U32 color_primaries; + RK_U32 color_trc; + RK_U32 red_x; + RK_U32 red_y; + RK_U32 green_x; + RK_U32 green_y; + RK_U32 blue_x; + RK_U32 blue_y; + RK_U32 white_point_x; + RK_U32 white_point_y; + RK_U32 min_luminance; + RK_U32 max_luminance; + RK_U32 max_cll; + RK_U32 max_fall; + RK_U32 reserved[4]; +} HdrStaticMeta; + +/* + * HDR metadata format from codec + * + * +----------+ + * | header1 | + * +----------+ + * | | + * | payload | + * | | + * +----------+ + * | header2 | + * +----------+ + * | | + * | payload | + * | | + * +----------+ + * | header3 | + * +----------+ + * | | + * | payload | + * | | + * +----------+ + */ +typedef struct RkMetaHdrHeader_t { + /* For transmission */ + RK_U16 magic; /* magic word for checking overwrite error */ + RK_U16 size; /* total header+payload length including header */ + RK_U16 message_total; /* total message count in current transmission */ + RK_U16 message_index; /* current message index in the transmission */ + + /* For payload identification */ + RK_U16 version; /* payload structure version */ + RK_U16 hdr_format; /* HDR protocol: HDR10, HLG, Dolby, HDRVivid ... */ + RK_U16 hdr_payload_type; /* HDR data type: static data, dynamic data ... */ + RK_U16 video_format; /* video format: H.264, H.265, AVS2 ... */ + + /* For extenstion usage */ + RK_U32 reserve[4]; + + /* payload data aligned to 32bits */ + RK_U32 payload[]; +} RkMetaHdrHeader; + +void fill_hdr_meta_to_frame(MppFrame frame, HdrCodecType codec_type); + +#endif diff --git a/dev_reference/rockchip/rk_mpi.h b/dev_reference/rockchip/rk_mpi.h new file mode 100644 index 0000000..2cce897 --- /dev/null +++ b/dev_reference/rockchip/rk_mpi.h @@ -0,0 +1,274 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __RK_MPI_H__ +#define __RK_MPI_H__ + +/** + * @addtogroup rk_mpi + * @brief Rockchip Media Process Interface + * @details Media Process Platform(MPP) provides application programming + * interface for the application layer, by which applications can + * call hardware encode and decode. Current MPP fully supports + * chipset RK3288/RK3228/RK3229/RK3399/RK3328/RV1108. Old chipset + * like RK29xx/RK30xx/RK31XX/RK3368 is partly supported due to lack + * of some hardware register generation module. + */ + +#include "rk_mpi_cmd.h" +#include "mpp_task.h" + +/** + * @ingroup rk_mpi + * @brief MPP main work function set + * @details all api function are seperated into two sets: data io api set + * and control api set + * + * (1). the data api set is for data input/output flow including: + * + * (1.1) simple data api set: + * + * decode : both send video stream packet to decoder and get video frame from + * decoder at the same time. + * + * encode : both send video frame to encoder and get encoded video stream from + * encoder at the same time. + * + * decode_put_packet: send video stream packet to decoder only, async interface + * + * decode_get_frame : get video frame from decoder only, async interface + * + * encode_put_frame : send video frame to encoder only, async interface + * + * encode_get_packet: get encoded video packet from encoder only, async interface + * + * (1.2) advanced task api set: + * + * poll : poll port for dequeue + * + * dequeue : pop a task from mpp task queue + * + * enqueue : push a task to mpp task queue + * + * (2). the control api set is for mpp context control including: + * + * control : similiar to ioctl in kernel driver, setup or get mpp internal parameter + * + * reset : clear all data in mpp context, discard all packet and frame, + * reset all components to initialized status + */ +typedef struct MppApi_t { + /** + * @brief size of struct MppApi + */ + RK_U32 size; + /** + * @brief mpp api version, generated by Git + */ + RK_U32 version; + + // simple data flow interface + /** + * @brief both send video stream packet to decoder and get video frame from + * decoder at the same time + * @param[in] ctx The context of mpp, created by mpp_create() and initiated + * by mpp_init(). + * @param[in] packet The input video stream, its usage can refer mpp_packet.h. + * @param[out] frame The output picture, its usage can refer mpp_frame.h. + * @return 0 and positive for success, negative for failure. The return + * value is an error code. For details, please refer mpp_err.h. + */ + MPP_RET (*decode)(MppCtx ctx, MppPacket packet, MppFrame *frame); + /** + * @brief send video stream packet to decoder only, async interface + * @param[in] ctx The context of mpp, created by mpp_create() and initiated + * by mpp_init(). + * @param[in] packet The input video stream, its usage can refer mpp_packet.h. + * @return 0 and positive for success, negative for failure. The return + * value is an error code. For details, please refer mpp_err.h. + */ + MPP_RET (*decode_put_packet)(MppCtx ctx, MppPacket packet); + /** + * @brief get video frame from decoder only, async interface + * @param[in] ctx The context of mpp, created by mpp_create() and initiated + * by mpp_init(). + * @param[out] frame The output picture, its usage can refer mpp_frame.h. + * @return 0 and positive for success, negative for failure. The return + * value is an error code. For details, please refer mpp_err.h. + */ + MPP_RET (*decode_get_frame)(MppCtx ctx, MppFrame *frame); + /** + * @brief both send video frame to encoder and get encoded video stream from + * encoder at the same time + * @param[in] ctx The context of mpp, created by mpp_create() and initiated + * by mpp_init(). + * @param[in] frame The input video data, its usage can refer mpp_frame.h. + * @param[out] packet The output compressed data, its usage can refer mpp_packet.h. + * @return 0 and positive for success, negative for failure. The return + * value is an error code. For details, please refer mpp_err.h. + */ + MPP_RET (*encode)(MppCtx ctx, MppFrame frame, MppPacket *packet); + /** + * @brief send video frame to encoder only, async interface + * @param[in] ctx The context of mpp, created by mpp_create() and initiated + * by mpp_init(). + * @param[in] frame The input video data, its usage can refer mpp_frame.h. + * @return 0 and positive for success, negative for failure. The return + * value is an error code. For details, please refer mpp_err.h. + */ + MPP_RET (*encode_put_frame)(MppCtx ctx, MppFrame frame); + /** + * @brief get encoded video packet from encoder only, async interface + * @param[in] ctx The context of mpp, created by mpp_create() and initiated + * by mpp_init(). + * @param[out] packet The output compressed data, its usage can refer mpp_packet.h. + * @return 0 and positive for success, negative for failure. The return + * value is an error code. For details, please refer mpp_err.h. + */ + MPP_RET (*encode_get_packet)(MppCtx ctx, MppPacket *packet); + + /** + * @brief ISP interface, will be supported in the future. + */ + MPP_RET (*isp)(MppCtx ctx, MppFrame dst, MppFrame src); + /** + * @brief ISP interface, will be supported in the future. + */ + MPP_RET (*isp_put_frame)(MppCtx ctx, MppFrame frame); + /** + * @brief ISP interface, will be supported in the future. + */ + MPP_RET (*isp_get_frame)(MppCtx ctx, MppFrame *frame); + + // advance data flow interface + /** + * @brief poll port for dequeue + * @param[in] ctx The context of mpp, created by mpp_create() and initiated + * by mpp_init(). + * @param[in] type input port or output port which are both for data transaction + * @param[in] timeout mpp poll type, its usage can refer mpp_task.h. + * @return 0 and positive for success, negative for failure. The return + * value is an error code. For details, please refer mpp_err.h. + */ + MPP_RET (*poll)(MppCtx ctx, MppPortType type, MppPollType timeout); + /** + * @brief dequeue MppTask, pop a task from mpp task queue + * @param[in] ctx The context of mpp, created by mpp_create() and initiated + * by mpp_init(). + * @param[in] type input port or output port which are both for data transaction + * @param[out] task MppTask popped from mpp task queue, its usage can refer mpp_task.h. + * @return 0 and positive for success, negative for failure. The return + * value is an error code. For details, please refer mpp_err.h. + */ + MPP_RET (*dequeue)(MppCtx ctx, MppPortType type, MppTask *task); + /** + * @brief enqueue MppTask, push a task to mpp task queue + * @param[in] ctx The context of mpp, created by mpp_create() and initiated + * by mpp_init(). + * @param[in] type input port or output port which are both for data transaction + * @param[in] task MppTask which is sent to mpp for process, its usage can refer mpp_task.h. + * @return 0 and positive for success, negative for failure. The return + * value is an error code. For details, please refer mpp_err.h. + */ + MPP_RET (*enqueue)(MppCtx ctx, MppPortType type, MppTask task); + + // control interface + /** + * @brief discard all packet and frame, reset all component, + * for both decoder and encoder + * @param[in] ctx The context of mpp, created by mpp_create() and initiated + * by mpp_init(). + * @return 0 for success, others for failure. The return value is an + * error code. For details, please refer mpp_err.h. + */ + MPP_RET (*reset)(MppCtx ctx); + /** + * @brief control function for mpp property setting + * @param[in] ctx The context of mpp, created by mpp_create() and initiated + * by mpp_init(). + * @param[in] cmd The mpi command, its definition can refer rk_mpi_cmd.h. + * @param[in,out] param The mpi command parameter + * @return 0 for success, others for failure. The return value is an + * error code. For details, please refer mpp_err.h. + */ + MPP_RET (*control)(MppCtx ctx, MpiCmd cmd, MppParam param); + + /** + * @brief The reserved segment, may be used in the future + */ + RK_U32 reserv[16]; +} MppApi; + + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @ingroup rk_mpi + * @brief Create empty context structure and mpi function pointers. + * Use functions in MppApi to access mpp services. + * @param[in,out] ctx pointer of the mpp context, refer to MpiImpl_t. + * @param[in,out] mpi pointer of mpi function, refer to MppApi. + * @return 0 for success, others for failure. The return value is an + * error code. For details, please refer mpp_err.h. + * @note This interface creates base flow context, all function calls + * are based on it. + */ +MPP_RET mpp_create(MppCtx *ctx, MppApi **mpi); +/** + * @ingroup rk_mpi + * @brief Call after mpp_create to setup mpp type and video format. + * This function will call internal context init function. + * @param[in] ctx The context of mpp, created by mpp_create(). + * @param[in] type specify decoder or encoder, refer to MppCtxType. + * @param[in] coding specify video compression coding, refer to MppCodingType. + * @return 0 for success, others for failure. The return value is an + * error code. For details, please refer mpp_err.h. + */ +MPP_RET mpp_init(MppCtx ctx, MppCtxType type, MppCodingType coding); +/** + * @ingroup rk_mpi + * @brief Destroy mpp context and free both context and mpi structure, + * it matches with mpp_init(). + * @param[in] ctx The context of mpp, created by mpp_create(). + * @return 0 for success, others for failure. The return value is an + * error code. For details, please refer mpp_err.h. + */ +MPP_RET mpp_destroy(MppCtx ctx); +/** + * @ingroup rk_mpi + * @brief judge given format is supported or not by MPP. + * @param[in] type specify decoder or encoder, refer to MppCtxType. + * @param[in] coding specify video compression coding, refer to MppCodingType. + * @return 0 for support, -1 for unsupported. + */ +MPP_RET mpp_check_support_format(MppCtxType type, MppCodingType coding); +/** + * @ingroup rk_mpi + * @brief List all formats supported by MPP + * @param NULL no need to input parameter + * @return No return value. This function just prints format information supported + * by MPP on standard output. + */ +void mpp_show_support_format(void); +void mpp_show_color_format(void); + +#ifdef __cplusplus +} +#endif + +#endif /*__RK_MPI_H__*/ diff --git a/dev_reference/rockchip/rk_mpi_cmd.h b/dev_reference/rockchip/rk_mpi_cmd.h new file mode 100644 index 0000000..391df8e --- /dev/null +++ b/dev_reference/rockchip/rk_mpi_cmd.h @@ -0,0 +1,209 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __RK_MPI_CMD_H__ +#define __RK_MPI_CMD_H__ + +/* + * Command id bit usage is defined as follows: + * bit 20 - 23 - module id + * bit 16 - 19 - contex id + * bit 0 - 15 - command id + */ +#define CMD_MODULE_ID_MASK (0x00F00000) +#define CMD_MODULE_OSAL (0x00100000) +#define CMD_MODULE_MPP (0x00200000) +#define CMD_MODULE_CODEC (0x00300000) +#define CMD_MODULE_HAL (0x00400000) + +#define CMD_CTX_ID_MASK (0x000F0000) +#define CMD_CTX_ID_DEC (0x00010000) +#define CMD_CTX_ID_ENC (0x00020000) +#define CMD_CTX_ID_ISP (0x00030000) + +/* separate encoder / decoder control command to different segment */ +#define CMD_CFG_ID_MASK (0x0000FF00) + +/* mpp status control command */ +#define CMD_STATE_OPS (0x00000100) + +/* decoder control command */ +#define CMD_DEC_CFG_ALL (0x00000000) +#define CMD_DEC_QUERY (0x00000100) +#define CMD_DEC_CFG (0x00000200) + +/* encoder control command */ +#define CMD_ENC_CFG_ALL (0x00000000) +#define CMD_ENC_QUERY (0x00000100) +#define CMD_ENC_CFG_RC_API (0x00000200) + +#define CMD_ENC_CFG_MISC (0x00008000) +#define CMD_ENC_CFG_SPLIT (0x00008100) +#define CMD_ENC_CFG_REF (0x00008200) +#define CMD_ENC_CFG_ROI (0x00008300) +#define CMD_ENC_CFG_OSD (0x00008400) + +typedef enum { + MPP_OSAL_CMD_BASE = CMD_MODULE_OSAL, + MPP_OSAL_CMD_END, + + MPP_CMD_BASE = CMD_MODULE_MPP, + MPP_ENABLE_DEINTERLACE, + MPP_SET_INPUT_BLOCK, /* deprecated */ + MPP_SET_INTPUT_BLOCK_TIMEOUT, /* deprecated */ + MPP_SET_OUTPUT_BLOCK, /* deprecated */ + MPP_SET_OUTPUT_BLOCK_TIMEOUT, /* deprecated */ + /* + * timeout setup, refer to MPP_TIMEOUT_XXX + * zero - non block + * negative - block with no timeout + * positive - timeout in milisecond + */ + MPP_SET_INPUT_TIMEOUT, /* parameter type RK_S64 */ + MPP_SET_OUTPUT_TIMEOUT, /* parameter type RK_S64 */ + MPP_SET_DISABLE_THREAD, /* MPP no thread mode and use external thread to decode */ + + MPP_STATE_CMD_BASE = CMD_MODULE_MPP | CMD_STATE_OPS, + MPP_START, + MPP_STOP, + MPP_PAUSE, + MPP_RESUME, + + MPP_CMD_END, + + MPP_CODEC_CMD_BASE = CMD_MODULE_CODEC, + MPP_CODEC_GET_FRAME_INFO, + MPP_CODEC_CMD_END, + + MPP_DEC_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_DEC, + MPP_DEC_SET_FRAME_INFO, /* vpu api legacy control for buffer slot dimension init */ + MPP_DEC_SET_EXT_BUF_GROUP, /* IMPORTANT: set external buffer group to mpp decoder */ + MPP_DEC_SET_INFO_CHANGE_READY, + MPP_DEC_SET_PRESENT_TIME_ORDER, /* use input time order for output */ + MPP_DEC_SET_PARSER_SPLIT_MODE, /* Need to setup before init */ + MPP_DEC_SET_PARSER_FAST_MODE, /* Need to setup before init */ + MPP_DEC_GET_STREAM_COUNT, + MPP_DEC_GET_VPUMEM_USED_COUNT, + MPP_DEC_SET_VC1_EXTRA_DATA, + MPP_DEC_SET_OUTPUT_FORMAT, + MPP_DEC_SET_DISABLE_ERROR, /* When set it will disable sw/hw error (H.264 / H.265) */ + MPP_DEC_SET_IMMEDIATE_OUT, + MPP_DEC_SET_ENABLE_DEINTERLACE, /* MPP enable deinterlace by default. Vpuapi can disable it */ + MPP_DEC_SET_ENABLE_FAST_PLAY, /* enable idr output immediately */ + MPP_DEC_SET_DISABLE_THREAD, /* MPP no thread mode and use external thread to decode */ + MPP_DEC_SET_MAX_USE_BUFFER_SIZE, + MPP_DEC_SET_ENABLE_MVC, /* enable MVC decoding*/ + + MPP_DEC_CMD_QUERY = CMD_MODULE_CODEC | CMD_CTX_ID_DEC | CMD_DEC_QUERY, + /* query decoder runtime information for decode stage */ + MPP_DEC_QUERY, /* set and get MppDecQueryCfg structure */ + + CMD_DEC_CMD_CFG = CMD_MODULE_CODEC | CMD_CTX_ID_DEC | CMD_DEC_CFG, + MPP_DEC_SET_CFG, /* set MppDecCfg structure */ + MPP_DEC_GET_CFG, /* get MppDecCfg structure */ + + MPP_DEC_CMD_END, + + MPP_ENC_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_ENC, + /* basic encoder setup control */ + MPP_ENC_SET_CFG, /* set MppEncCfg structure */ + MPP_ENC_GET_CFG, /* get MppEncCfg structure */ + MPP_ENC_SET_PREP_CFG, /* deprecated set MppEncPrepCfg structure, use MPP_ENC_SET_CFG instead */ + MPP_ENC_GET_PREP_CFG, /* deprecated get MppEncPrepCfg structure, use MPP_ENC_GET_CFG instead */ + MPP_ENC_SET_RC_CFG, /* deprecated set MppEncRcCfg structure, use MPP_ENC_SET_CFG instead */ + MPP_ENC_GET_RC_CFG, /* deprecated get MppEncRcCfg structure, use MPP_ENC_GET_CFG instead */ + MPP_ENC_SET_CODEC_CFG, /* deprecated set MppEncCodecCfg structure, use MPP_ENC_SET_CFG instead */ + MPP_ENC_GET_CODEC_CFG, /* deprecated get MppEncCodecCfg structure, use MPP_ENC_GET_CFG instead */ + /* runtime encoder setup control */ + MPP_ENC_SET_IDR_FRAME, /* next frame will be encoded as intra frame */ + MPP_ENC_SET_OSD_LEGACY_0, /* deprecated */ + MPP_ENC_SET_OSD_LEGACY_1, /* deprecated */ + MPP_ENC_SET_OSD_LEGACY_2, /* deprecated */ + MPP_ENC_GET_HDR_SYNC, /* get vps / sps / pps which has better sync behavior parameter is MppPacket */ + MPP_ENC_GET_EXTRA_INFO, /* deprecated */ + MPP_ENC_SET_SEI_CFG, /* SEI: Supplement Enhancemant Information, parameter is MppSeiMode */ + MPP_ENC_GET_SEI_DATA, /* SEI: Supplement Enhancemant Information, parameter is MppPacket */ + MPP_ENC_PRE_ALLOC_BUFF, /* deprecated */ + MPP_ENC_SET_QP_RANGE, /* used for adjusting qp range, the parameter can be 1 or 2 */ + MPP_ENC_SET_ROI_CFG, /* set MppEncROICfg structure */ + MPP_ENC_SET_CTU_QP, /* for H265 Encoder,set CTU's size and QP */ + + MPP_ENC_CMD_QUERY = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_QUERY, + /* query encoder runtime information for encode stage */ + MPP_ENC_QUERY, /* set and get MppEncQueryCfg structure */ + + /* User define rate control stategy API control */ + MPP_ENC_CFG_RC_API = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_RC_API, + /* + * Get RcApiQueryAll structure + * Get all available rate control stategy string and count + */ + MPP_ENC_GET_RC_API_ALL = MPP_ENC_CFG_RC_API + 1, + /* + * Get RcApiQueryType structure + * Get available rate control stategy string with certain type + */ + MPP_ENC_GET_RC_API_BY_TYPE = MPP_ENC_CFG_RC_API + 2, + /* + * Set RcImplApi structure + * Add new or update rate control stategy function pointers + */ + MPP_ENC_SET_RC_API_CFG = MPP_ENC_CFG_RC_API + 3, + /* + * Get RcApiBrief structure + * Get current used rate control stategy brief information (type and name) + */ + MPP_ENC_GET_RC_API_CURRENT = MPP_ENC_CFG_RC_API + 4, + /* + * Set RcApiBrief structure + * Set current used rate control stategy brief information (type and name) + */ + MPP_ENC_SET_RC_API_CURRENT = MPP_ENC_CFG_RC_API + 5, + + MPP_ENC_CFG_MISC = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_MISC, + MPP_ENC_SET_HEADER_MODE, /* set MppEncHeaderMode */ + MPP_ENC_GET_HEADER_MODE, /* get MppEncHeaderMode */ + + MPP_ENC_CFG_SPLIT = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_SPLIT, + MPP_ENC_SET_SPLIT, /* set MppEncSliceSplit structure */ + MPP_ENC_GET_SPLIT, /* get MppEncSliceSplit structure */ + + MPP_ENC_CFG_REF = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_REF, + MPP_ENC_SET_REF_CFG, /* set MppEncRefCfg structure */ + + MPP_ENC_CFG_OSD = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_OSD, + MPP_ENC_SET_OSD_PLT_CFG, /* set OSD palette, parameter should be pointer to MppEncOSDPltCfg */ + MPP_ENC_GET_OSD_PLT_CFG, /* get OSD palette, parameter should be pointer to MppEncOSDPltCfg */ + MPP_ENC_SET_OSD_DATA_CFG, /* set OSD data with at most 8 regions, parameter should be pointer to MppEncOSDData */ + + MPP_ENC_CMD_END, + + MPP_ISP_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_ISP, + MPP_ISP_CMD_END, + + MPP_HAL_CMD_BASE = CMD_MODULE_HAL, + MPP_HAL_CMD_END, + + MPI_CMD_BUTT, +} MpiCmd; + +#include "rk_vdec_cmd.h" +#include "rk_vdec_cfg.h" +#include "rk_venc_cmd.h" +#include "rk_venc_cfg.h" +#include "rk_venc_ref.h" + +#endif /*__RK_MPI_CMD_H__*/ diff --git a/dev_reference/rockchip/rk_type.h b/dev_reference/rockchip/rk_type.h new file mode 100644 index 0000000..cb1666b --- /dev/null +++ b/dev_reference/rockchip/rk_type.h @@ -0,0 +1,142 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __RK_TYPE_H__ +#define __RK_TYPE_H__ + +#include + +#if defined(_WIN32) && !defined(__MINGW32CE__) + +typedef unsigned char RK_U8; +typedef unsigned short RK_U16; +typedef unsigned int RK_U32; +typedef unsigned long RK_ULONG; +typedef unsigned __int64 RK_U64; + +typedef signed char RK_S8; +typedef signed short RK_S16; +typedef signed int RK_S32; +typedef signed long RK_LONG; +typedef signed __int64 RK_S64; + +#else + +typedef unsigned char RK_U8; +typedef unsigned short RK_U16; +typedef unsigned int RK_U32; +typedef unsigned long RK_ULONG; +typedef unsigned long long int RK_U64; + + +typedef signed char RK_S8; +typedef signed short RK_S16; +typedef signed int RK_S32; +typedef signed long RK_LONG; +typedef signed long long int RK_S64; + +#endif + +#ifndef MODULE_TAG +#define MODULE_TAG NULL +#endif + +/** + * @ingroup rk_mpi + * @brief The type of mpp context + * @details This type is used when calling mpp_init(), which including decoder, + * encoder and Image Signal Process(ISP). So far decoder and encoder + * are supported perfectly, and ISP will be supported in the future. + */ +typedef enum { + MPP_CTX_DEC, /**< decoder */ + MPP_CTX_ENC, /**< encoder */ + MPP_CTX_ISP, /**< isp */ + MPP_CTX_BUTT, /**< undefined */ +} MppCtxType; + +/** + * @ingroup rk_mpi + * @brief Enumeration used to define the possible video compression codings. + * sync with the omx_video.h + * + * @note This essentially refers to file extensions. If the coding is + * being used to specify the ENCODE type, then additional work + * must be done to configure the exact flavor of the compression + * to be used. For decode cases where the user application can + * not differentiate between MPEG-4 and H.264 bit streams, it is + * up to the codec to handle this. + */ +typedef enum { + MPP_VIDEO_CodingUnused, /**< Value when coding is N/A */ + MPP_VIDEO_CodingAutoDetect, /**< Autodetection of coding type */ + MPP_VIDEO_CodingMPEG2, /**< AKA: H.262 */ + MPP_VIDEO_CodingH263, /**< H.263 */ + MPP_VIDEO_CodingMPEG4, /**< MPEG-4 */ + MPP_VIDEO_CodingWMV, /**< Windows Media Video (WMV1,WMV2,WMV3)*/ + MPP_VIDEO_CodingRV, /**< all versions of Real Video */ + MPP_VIDEO_CodingAVC, /**< H.264/AVC */ + MPP_VIDEO_CodingMJPEG, /**< Motion JPEG */ + MPP_VIDEO_CodingVP8, /**< VP8 */ + MPP_VIDEO_CodingVP9, /**< VP9 */ + MPP_VIDEO_CodingVC1 = 0x01000000, /**< Windows Media Video (WMV1,WMV2,WMV3)*/ + MPP_VIDEO_CodingFLV1, /**< Sorenson H.263 */ + MPP_VIDEO_CodingDIVX3, /**< DIVX3 */ + MPP_VIDEO_CodingVP6, + MPP_VIDEO_CodingHEVC, /**< H.265/HEVC */ + MPP_VIDEO_CodingAVSPLUS, /**< AVS+ */ + MPP_VIDEO_CodingAVS, /**< AVS profile=0x20 */ + MPP_VIDEO_CodingAVS2, /**< AVS2 */ + MPP_VIDEO_CodingAV1, /**< av1 */ + MPP_VIDEO_CodingKhronosExtensions = 0x6F000000, /**< Reserved region for introducing Khronos Standard Extensions */ + MPP_VIDEO_CodingVendorStartUnused = 0x7F000000, /**< Reserved region for introducing Vendor Extensions */ + MPP_VIDEO_CodingMax = 0x7FFFFFFF +} MppCodingType; + +/* + * All external interface object list here. + * The interface object is defined as void * for expandability + * The cross include between these objects will introduce extra + * compiling difficulty. So we move them together in this header. + * + * Object interface header list: + * + * MppCtx - rk_mpi.h + * MppParam - rk_mpi.h + * + * MppFrame - mpp_frame.h + * MppPacket - mpp_packet.h + * + * MppBuffer - mpp_buffer.h + * MppBufferGroup - mpp_buffer.h + * + * MppTask - mpp_task.h + * MppMeta - mpp_meta.h + */ + +typedef void* MppCtx; +typedef void* MppParam; + +typedef void* MppFrame; +typedef void* MppPacket; + +typedef void* MppBuffer; +typedef void* MppBufferGroup; + +typedef void* MppTask; +typedef void* MppMeta; + +#endif /*__RK_TYPE_H__*/ diff --git a/dev_reference/rockchip/rk_vdec_cfg.h b/dev_reference/rockchip/rk_vdec_cfg.h new file mode 100644 index 0000000..30dc932 --- /dev/null +++ b/dev_reference/rockchip/rk_vdec_cfg.h @@ -0,0 +1,50 @@ +/* + * Copyright 2020 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __RK_VDEC_CFG_H__ +#define __RK_VDEC_CFG_H__ + +#include "rk_type.h" +#include "mpp_err.h" + +typedef void* MppDecCfg; + +#ifdef __cplusplus +extern "C" { +#endif + +MPP_RET mpp_dec_cfg_init(MppDecCfg *cfg); +MPP_RET mpp_dec_cfg_deinit(MppDecCfg cfg); + +MPP_RET mpp_dec_cfg_set_s32(MppDecCfg cfg, const char *name, RK_S32 val); +MPP_RET mpp_dec_cfg_set_u32(MppDecCfg cfg, const char *name, RK_U32 val); +MPP_RET mpp_dec_cfg_set_s64(MppDecCfg cfg, const char *name, RK_S64 val); +MPP_RET mpp_dec_cfg_set_u64(MppDecCfg cfg, const char *name, RK_U64 val); +MPP_RET mpp_dec_cfg_set_ptr(MppDecCfg cfg, const char *name, void *val); + +MPP_RET mpp_dec_cfg_get_s32(MppDecCfg cfg, const char *name, RK_S32 *val); +MPP_RET mpp_dec_cfg_get_u32(MppDecCfg cfg, const char *name, RK_U32 *val); +MPP_RET mpp_dec_cfg_get_s64(MppDecCfg cfg, const char *name, RK_S64 *val); +MPP_RET mpp_dec_cfg_get_u64(MppDecCfg cfg, const char *name, RK_U64 *val); +MPP_RET mpp_dec_cfg_get_ptr(MppDecCfg cfg, const char *name, void **val); + +void mpp_dec_cfg_show(void); + +#ifdef __cplusplus +} +#endif + +#endif /*__RK_VDEC_CFG_H__*/ diff --git a/dev_reference/rockchip/rk_vdec_cmd.h b/dev_reference/rockchip/rk_vdec_cmd.h new file mode 100644 index 0000000..adeeb35 --- /dev/null +++ b/dev_reference/rockchip/rk_vdec_cmd.h @@ -0,0 +1,69 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __RK_VDEC_CMD_H__ +#define __RK_VDEC_CMD_H__ + +#include "rk_type.h" +#include "mpp_err.h" + +/* + * decoder query interface is only for debug usage + */ +#define MPP_DEC_QUERY_STATUS (0x00000001) +#define MPP_DEC_QUERY_WAIT (0x00000002) +#define MPP_DEC_QUERY_FPS (0x00000004) +#define MPP_DEC_QUERY_BPS (0x00000008) +#define MPP_DEC_QUERY_DEC_IN_PKT (0x00000010) +#define MPP_DEC_QUERY_DEC_WORK (0x00000020) +#define MPP_DEC_QUERY_DEC_OUT_FRM (0x00000040) + +#define MPP_DEC_QUERY_ALL (MPP_DEC_QUERY_STATUS | \ + MPP_DEC_QUERY_WAIT | \ + MPP_DEC_QUERY_FPS | \ + MPP_DEC_QUERY_BPS | \ + MPP_DEC_QUERY_DEC_IN_PKT | \ + MPP_DEC_QUERY_DEC_WORK | \ + MPP_DEC_QUERY_DEC_OUT_FRM) + +typedef struct MppDecQueryCfg_t { + /* + * 32 bit query flag for query data check + * Each bit represent a query data switch. + * bit 0 - for querying decoder runtime status + * bit 1 - for querying decoder runtime waiting status + * bit 2 - for querying decoder realtime decode fps + * bit 3 - for querying decoder realtime input bps + * bit 4 - for querying decoder input packet count + * bit 5 - for querying decoder start hardware times + * bit 6 - for querying decoder output frame count + */ + RK_U32 query_flag; + + /* 64 bit query data output */ + RK_U32 rt_status; + RK_U32 rt_wait; + RK_U32 rt_fps; + RK_U32 rt_bps; + RK_U32 dec_in_pkt_cnt; + RK_U32 dec_hw_run_cnt; + RK_U32 dec_out_frm_cnt; +} MppDecQueryCfg; + +typedef void* MppExtCbCtx; +typedef MPP_RET (*MppExtCbFunc)(MppExtCbCtx cb_ctx, MppCtx mpp, RK_S32 cmd, void *arg); + +#endif /*__RK_VDEC_CMD_H__*/ diff --git a/dev_reference/rockchip/rk_venc_cfg.h b/dev_reference/rockchip/rk_venc_cfg.h new file mode 100644 index 0000000..9f84952 --- /dev/null +++ b/dev_reference/rockchip/rk_venc_cfg.h @@ -0,0 +1,52 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __RK_VENC_CFG_H__ +#define __RK_VENC_CFG_H__ + +#include "rk_type.h" +#include "mpp_err.h" + +typedef void* MppEncCfg; + +#ifdef __cplusplus +extern "C" { +#endif + +MPP_RET mpp_enc_cfg_init(MppEncCfg *cfg); +MPP_RET mpp_enc_cfg_deinit(MppEncCfg cfg); + +MPP_RET mpp_enc_cfg_set_s32(MppEncCfg cfg, const char *name, RK_S32 val); +MPP_RET mpp_enc_cfg_set_u32(MppEncCfg cfg, const char *name, RK_U32 val); +MPP_RET mpp_enc_cfg_set_s64(MppEncCfg cfg, const char *name, RK_S64 val); +MPP_RET mpp_enc_cfg_set_u64(MppEncCfg cfg, const char *name, RK_U64 val); +MPP_RET mpp_enc_cfg_set_ptr(MppEncCfg cfg, const char *name, void *val); +MPP_RET mpp_enc_cfg_set_st(MppEncCfg cfg, const char *name, void *val); + +MPP_RET mpp_enc_cfg_get_s32(MppEncCfg cfg, const char *name, RK_S32 *val); +MPP_RET mpp_enc_cfg_get_u32(MppEncCfg cfg, const char *name, RK_U32 *val); +MPP_RET mpp_enc_cfg_get_s64(MppEncCfg cfg, const char *name, RK_S64 *val); +MPP_RET mpp_enc_cfg_get_u64(MppEncCfg cfg, const char *name, RK_U64 *val); +MPP_RET mpp_enc_cfg_get_ptr(MppEncCfg cfg, const char *name, void **val); +MPP_RET mpp_enc_cfg_get_st(MppEncCfg cfg, const char *name, void *val); + +void mpp_enc_cfg_show(void); + +#ifdef __cplusplus +} +#endif + +#endif /*__RK_VENC_CFG_H__*/ diff --git a/dev_reference/rockchip/rk_venc_cmd.h b/dev_reference/rockchip/rk_venc_cmd.h new file mode 100644 index 0000000..9f5fe2f --- /dev/null +++ b/dev_reference/rockchip/rk_venc_cmd.h @@ -0,0 +1,1420 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __RK_VENC_CMD_H__ +#define __RK_VENC_CMD_H__ + +#include "mpp_frame.h" +#include "rk_venc_rc.h" + +/* + * Configure of encoder is very complicated. So we divide configures into + * four parts: + * + * 1. Rate control parameter + * This is quality and bitrate request from user. + * + * 2. Data source MppFrame parameter + * This is data source buffer information. + * Now it is PreP config + * PreP : Encoder Preprocess configuration + * + * 3. Video codec infomation + * This is user custormized stream information. + * including: + * H.264 / H.265 / vp8 / mjpeg + * + * 4. Misc parameter + * including: + * Split : Slice split configuration + * GopRef: Reference gop configuration + * ROI : Region Of Interest + * OSD : On Screen Display + * MD : Motion Detection + * + * The module transcation flow is as follows: + * + * + + + * User | Mpi/Mpp | EncImpl + * | | Hal + * | | + * +----------+ | +---------+ | +-----------+ + * | | | | +-----RcCfg-----> | + * | RcCfg +---------> | | | EncImpl | + * | | | | | +-Frame-----> | + * +----------+ | | | | | +--+-----^--+ + * | | | | | | | + * | | | | | | | + * +----------+ | | | | | syntax | + * | | | | | | | | | + * | MppFrame +---------> MppEnc +---+ | | result + * | | | | | | | | | + * +----------+ | | | | | | | + * | | | | | +--v-----+--+ + * | | | +-Frame-----> | + * +----------+ | | | | | | + * | | | | +---CodecCfg----> Hal | + * | CodecCfg +---------> | | | | + * | | | | <-----Extra-----> | + * +----------+ | +---------+ | +-----------+ + * | | + * | | + * + + + * + * The function call flow is shown below: + * + * mpi mpp_enc controller hal + * + + + + + * | | | | + * | | | | + * +----------init------------> | | + * | | | | + * | | | | + * | PrepCfg | | | + * +---------control----------> PrepCfg | | + * | +-----control-----> | + * | | | PrepCfg | + * | +--------------------------control--------> + * | | | allocate + * | | | buffer + * | | | | + * | RcCfg | | | + * +---------control----------> RcCfg | | + * | +-----control-----> | + * | | rc_init | + * | | | | + * | | | | + * | CodecCfg | | | + * +---------control----------> | CodecCfg | + * | +--------------------------control--------> + * | | | generate + * | | | sps/pps + * | | | Get extra info | + * | +--------------------------control--------> + * | Get extra info | | | + * +---------control----------> | | + * | | | | + * | | | | + * | ROICfg | | | + * +---------control----------> | ROICfg | + * | +--------------------------control--------> + * | | | | + * | OSDCfg | | | + * +---------control----------> | OSDCfg | + * | +--------------------------control--------> + * | | | | + * | MDCfg | | | + * +---------control----------> | MDCfg | + * | +--------------------------control--------> + * | | | | + * | Set extra info | | | + * +---------control----------> | Set extra info | + * | +--------------------------control--------> + * | | | | + * | task | | | + * +----------encode----------> task | | + * | +-----encode------> | + * | | encode | + * | | | syntax | + * | +--------------------------gen_reg--------> + * | | | | + * | | | | + * | +---------------------------start---------> + * | | | | + * | | | | + * | +---------------------------wait----------> + * | | | | + * | | callback | | + * | +-----------------> | + * +--OSD-MD--encode----------> | | + * | . | | | + * | . | | | + * | . | | | + * +--OSD-MD--encode----------> | | + * | | | | + * +----------deinit----------> | | + * + + + + + */ + +/* + * encoder query interface is only for debug usage + */ +#define MPP_ENC_QUERY_STATUS (0x00000001) +#define MPP_ENC_QUERY_WAIT (0x00000002) +#define MPP_ENC_QUERY_FPS (0x00000004) +#define MPP_ENC_QUERY_BPS (0x00000008) +#define MPP_ENC_QUERY_ENC_IN_FRM (0x00000010) +#define MPP_ENC_QUERY_ENC_WORK (0x00000020) +#define MPP_ENC_QUERY_ENC_OUT_PKT (0x00000040) + +#define MPP_ENC_QUERY_ALL (MPP_ENC_QUERY_STATUS | \ + MPP_ENC_QUERY_WAIT | \ + MPP_ENC_QUERY_FPS | \ + MPP_ENC_QUERY_BPS | \ + MPP_ENC_QUERY_ENC_IN_FRM | \ + MPP_ENC_QUERY_ENC_WORK | \ + MPP_ENC_QUERY_ENC_OUT_PKT) + +typedef struct MppEncQueryCfg_t { + /* + * 32 bit query flag for query data check + * Each bit represent a query data switch. + * bit 0 - for querying encoder runtime status + * bit 1 - for querying encoder runtime waiting status + * bit 2 - for querying encoder realtime encode fps + * bit 3 - for querying encoder realtime output bps + * bit 4 - for querying encoder input frame count + * bit 5 - for querying encoder start hardware times + * bit 6 - for querying encoder output packet count + */ + RK_U32 query_flag; + + /* 64 bit query data output */ + RK_U32 rt_status; + RK_U32 rt_wait; + RK_U32 rt_fps; + RK_U32 rt_bps; + RK_U32 enc_in_frm_cnt; + RK_U32 enc_hw_run_cnt; + RK_U32 enc_out_pkt_cnt; +} MppEncQueryCfg; + +/* + * base working mode parameter + */ +typedef enum MppEncBaseCfgChange_e { + MPP_ENC_BASE_CFG_CHANGE_LOW_DELAY = (1 << 0), + MPP_ENC_BASE_CFG_CHANGE_ALL = (0xFFFFFFFF), +} MppEncBaseCfgChange; + +typedef struct MppEncBaseCfg_t { + RK_U32 change; + + RK_S32 low_delay; +} MppEncBaseCfg; + +/* + * Rate control parameter + */ +typedef enum MppEncRcCfgChange_e { + MPP_ENC_RC_CFG_CHANGE_RC_MODE = (1 << 0), + MPP_ENC_RC_CFG_CHANGE_QUALITY = (1 << 1), + MPP_ENC_RC_CFG_CHANGE_BPS = (1 << 2), /* change on bps target / max / min */ + MPP_ENC_RC_CFG_CHANGE_FPS_IN = (1 << 5), /* change on fps in flex / numerator / denorminator */ + MPP_ENC_RC_CFG_CHANGE_FPS_OUT = (1 << 6), /* change on fps out flex / numerator / denorminator */ + MPP_ENC_RC_CFG_CHANGE_GOP = (1 << 7), + MPP_ENC_RC_CFG_CHANGE_SKIP_CNT = (1 << 8), + MPP_ENC_RC_CFG_CHANGE_MAX_REENC = (1 << 9), + MPP_ENC_RC_CFG_CHANGE_DROP_FRM = (1 << 10), + MPP_ENC_RC_CFG_CHANGE_MAX_I_PROP = (1 << 11), + MPP_ENC_RC_CFG_CHANGE_MIN_I_PROP = (1 << 12), + MPP_ENC_RC_CFG_CHANGE_INIT_IP_RATIO = (1 << 13), + MPP_ENC_RC_CFG_CHANGE_PRIORITY = (1 << 14), + MPP_ENC_RC_CFG_CHANGE_SUPER_FRM = (1 << 15), + /* qp related change flag */ + MPP_ENC_RC_CFG_CHANGE_QP_INIT = (1 << 16), + MPP_ENC_RC_CFG_CHANGE_QP_RANGE = (1 << 17), + MPP_ENC_RC_CFG_CHANGE_QP_RANGE_I = (1 << 18), + MPP_ENC_RC_CFG_CHANGE_QP_MAX_STEP = (1 << 19), + MPP_ENC_RC_CFG_CHANGE_QP_IP = (1 << 20), + MPP_ENC_RC_CFG_CHANGE_QP_VI = (1 << 21), + MPP_ENC_RC_CFG_CHANGE_QP_ROW = (1 << 22), + MPP_ENC_RC_CFG_CHANGE_QP_ROW_I = (1 << 23), + MPP_ENC_RC_CFG_CHANGE_DEBREATH = (1 << 24), + MPP_ENC_RC_CFG_CHANGE_HIER_QP = (1 << 25), + MPP_ENC_RC_CFG_CHANGE_ST_TIME = (1 << 26), + MPP_ENC_RC_CFG_CHANGE_REFRESH = (1 << 27), + MPP_ENC_RC_CFG_CHANGE_GOP_REF_CFG = (1 << 28), + MPP_ENC_RC_CFG_CHANGE_FQP = (1 << 29), + MPP_ENC_RC_CFG_CHANGE_ALL = (0xFFFFFFFF), +} MppEncRcCfgChange; + +typedef enum MppEncRcQuality_e { + MPP_ENC_RC_QUALITY_WORST, + MPP_ENC_RC_QUALITY_WORSE, + MPP_ENC_RC_QUALITY_MEDIUM, + MPP_ENC_RC_QUALITY_BETTER, + MPP_ENC_RC_QUALITY_BEST, + MPP_ENC_RC_QUALITY_CQP, + MPP_ENC_RC_QUALITY_AQ_ONLY, + MPP_ENC_RC_QUALITY_BUTT +} MppEncRcQuality; + +typedef struct MppEncRcCfg_t { + RK_U32 change; + + /* + * rc_mode - rate control mode + * + * mpp provide two rate control mode: + * + * Constant Bit Rate (CBR) mode + * - paramter 'bps*' define target bps + * - paramter quality and qp will not take effect + * + * Variable Bit Rate (VBR) mode + * - paramter 'quality' define 5 quality levels + * - paramter 'bps*' is used as reference but not strict condition + * - special Constant QP (CQP) mode is under VBR mode + * CQP mode will work with qp in CodecCfg. But only use for test + * + * default: CBR + */ + MppEncRcMode rc_mode; + + /* + * quality - quality parameter, only takes effect in VBR mode + * + * Mpp does not give the direct parameter in different protocol. + * + * Mpp provide total 5 quality level: + * Worst - worse - Medium - better - best + * + * extra CQP level means special constant-qp (CQP) mode + * + * default value: Medium + */ + MppEncRcQuality quality; + + /* + * bit rate parameters + * mpp gives three bit rate control parameter for control + * bps_target - target bit rate, unit: bit per second + * bps_max - maximun bit rate, unit: bit per second + * bps_min - minimun bit rate, unit: bit per second + * if user need constant bit rate set parameters to the similar value + * if user need variable bit rate set parameters as they need + */ + RK_S32 bps_target; + RK_S32 bps_max; + RK_S32 bps_min; + + /* + * frame rate parameters have great effect on rate control + * + * fps_in_flex + * 0 - fix input frame rate + * 1 - variable input frame rate + * + * fps_in_num + * input frame rate numerator, if 0 then default 30 + * + * fps_in_denorm + * input frame rate denorminator, if 0 then default 1 + * + * fps_out_flex + * 0 - fix output frame rate + * 1 - variable output frame rate + * + * fps_out_num + * output frame rate numerator, if 0 then default 30 + * + * fps_out_denorm + * output frame rate denorminator, if 0 then default 1 + */ + RK_S32 fps_in_flex; + RK_S32 fps_in_num; + RK_S32 fps_in_denorm; + RK_S32 fps_out_flex; + RK_S32 fps_out_num; + RK_S32 fps_out_denorm; + + /* + * gop - group of picture, gap between Intra frame + * 0 for only 1 I frame the rest are all P frames + * 1 for all I frame + * 2 for I P I P I P + * 3 for I P P I P P + * etc... + */ + RK_S32 gop; + void *ref_cfg; + + /* + * skip_cnt - max continuous frame skip count + * 0 - frame skip is not allow + */ + RK_S32 skip_cnt; + + /* + * max_reenc_times - max reencode time for one frame + * 0 - reencode is not allowed + * 1~3 max reencode time is limited to 3 + */ + RK_U32 max_reenc_times; + + /* + * stats_time - the time of bitrate statistics + */ + RK_S32 stats_time; + + /* + * drop frame parameters + * used on bitrate is far over the max bitrate + * + * drop_mode + * + * MPP_ENC_RC_DROP_FRM_DISABLED + * - do not drop frame when bitrate overflow. + * MPP_ENC_RC_DROP_FRM_NORMAL + * - do not encode the dropped frame when bitrate overflow. + * MPP_ENC_RC_DROP_FRM_PSKIP + * - encode a all skip frame when bitrate overflow. + * + * drop_threshold + * + * The percentage threshold over max_bitrate for trigger frame drop. + * + * drop_gap + * The max continuous frame drop number + */ + MppEncRcDropFrmMode drop_mode; + RK_U32 drop_threshold; + RK_U32 drop_gap; + + MppEncRcSuperFrameMode super_mode; + RK_U32 super_i_thd; + RK_U32 super_p_thd; + + MppEncRcPriority rc_priority; + + RK_U32 debreath_en; + RK_U32 debre_strength; + RK_S32 max_i_prop; + RK_S32 min_i_prop; + RK_S32 init_ip_ratio; + + /* general qp control */ + RK_S32 qp_init; + RK_S32 qp_max; + RK_S32 qp_max_i; + RK_S32 qp_min; + RK_S32 qp_min_i; + RK_S32 qp_max_step; /* delta qp between each two P frame */ + RK_S32 qp_delta_ip; /* delta qp between I and P */ + RK_S32 qp_delta_vi; /* delta qp between vi and P */ + RK_S32 fqp_min_i; + RK_S32 fqp_min_p; + RK_S32 fqp_max_i; + RK_S32 fqp_max_p; + + RK_S32 hier_qp_en; + RK_S32 hier_qp_delta[4]; + RK_S32 hier_frame_num[4]; + + RK_U32 refresh_en; + MppEncRcRefreshMode refresh_mode; + RK_U32 refresh_num; + RK_S32 refresh_length; +} MppEncRcCfg; + + +typedef enum MppEncHwCfgChange_e { + /* qp related hardware config flag */ + MPP_ENC_HW_CFG_CHANGE_QP_ROW = (1 << 0), + MPP_ENC_HW_CFG_CHANGE_QP_ROW_I = (1 << 1), + MPP_ENC_HW_CFG_CHANGE_AQ_THRD_I = (1 << 2), + MPP_ENC_HW_CFG_CHANGE_AQ_THRD_P = (1 << 3), + MPP_ENC_HW_CFG_CHANGE_AQ_STEP_I = (1 << 4), + MPP_ENC_HW_CFG_CHANGE_AQ_STEP_P = (1 << 5), + MPP_ENC_HW_CFG_CHANGE_MB_RC = (1 << 6), + MPP_ENC_HW_CFG_CHANGE_CU_MODE_BIAS = (1 << 8), + MPP_ENC_HW_CFG_CHANGE_CU_SKIP_BIAS = (1 << 9), + MPP_ENC_HW_CFG_CHANGE_QBIAS_I = (1 << 10), + MPP_ENC_HW_CFG_CHANGE_QBIAS_P = (1 << 11), + MPP_ENC_HW_CFG_CHANGE_QBIAS_EN = (1 << 12), + MPP_ENC_HW_CFG_CHANGE_ALL = (0xFFFFFFFF), +} MppEncHwCfgChange; + +/* + * Hardware related rate control config + * + * This config will open some detail feature to external user to control + * hardware behavior directly. + */ +typedef struct MppEncHwCfg_t { + RK_U32 change; + + /* vepu541/vepu540 */ + RK_S32 qp_delta_row; /* delta qp between two row in P frame */ + RK_S32 qp_delta_row_i; /* delta qp between two row in I frame */ + RK_S32 qbias_i; + RK_S32 qbias_p; + RK_S32 qbias_en; + RK_U32 aq_thrd_i[16]; + RK_U32 aq_thrd_p[16]; + RK_S32 aq_step_i[16]; + RK_S32 aq_step_p[16]; + + /* vepu1/2 */ + RK_S32 mb_rc_disable; + + /* vepu580 */ + RK_S32 extra_buf; + + /* + * block mode decision bias config + * 0 - intra32x32 + * 1 - intra16x16 + * 2 - intra8x8 + * 3 - intra4x4 + * 4 - inter64x64 + * 5 - inter32x32 + * 6 - inter16x16 + * 7 - inter8x8 + * value range 0 ~ 15, default : 8 + * If the value is smaller then encoder will be more likely to encode corresponding block mode. + */ + RK_S32 mode_bias[8]; + + /* + * skip mode bias config + * skip_bias_en - enable flag for skip bias config + * skip_sad - sad threshold for skip / non-skip + * skip_bias - tendency for skip, value range 0 ~ 15, default : 8 + * If the value is smaller then encoder will be more likely to encode skip block. + */ + RK_S32 skip_bias_en; + RK_S32 skip_sad; + RK_S32 skip_bias; +} MppEncHwCfg; + +/* + * Mpp preprocess parameter + */ +typedef enum MppEncPrepCfgChange_e { + MPP_ENC_PREP_CFG_CHANGE_INPUT = (1 << 0), /* change on input config */ + MPP_ENC_PREP_CFG_CHANGE_FORMAT = (1 << 2), /* change on format */ + /* transform parameter */ + MPP_ENC_PREP_CFG_CHANGE_ROTATION = (1 << 4), /* change on rotation */ + MPP_ENC_PREP_CFG_CHANGE_MIRRORING = (1 << 5), /* change on mirroring */ + MPP_ENC_PREP_CFG_CHANGE_FLIP = (1 << 6), /* change on flip */ + /* enhancement parameter */ + MPP_ENC_PREP_CFG_CHANGE_DENOISE = (1 << 8), /* change on denoise */ + MPP_ENC_PREP_CFG_CHANGE_SHARPEN = (1 << 9), /* change on denoise */ + /* color related parameter */ + MPP_ENC_PREP_CFG_CHANGE_COLOR_RANGE = (1 << 16), /* change on color range */ + MPP_ENC_PREP_CFG_CHANGE_COLOR_SPACE = (1 << 17), /* change on color range */ + MPP_ENC_PREP_CFG_CHANGE_COLOR_PRIME = (1 << 18), /* change on color primaries */ + MPP_ENC_PREP_CFG_CHANGE_COLOR_TRC = (1 << 19), /* change on color transfer */ + + MPP_ENC_PREP_CFG_CHANGE_ALL = (0xFFFFFFFF), +} MppEncPrepCfgChange; + +/* + * Preprocess sharpen parameter + * + * 5x5 sharpen core + * + * enable_y - enable luma sharpen + * enable_uv - enable chroma sharpen + */ +typedef struct { + RK_U32 enable_y; + RK_U32 enable_uv; + RK_S32 coef[5]; + RK_S32 div; + RK_S32 threshold; +} MppEncPrepSharpenCfg; + +/* + * input frame rotation parameter + * 0 - disable rotation + * 1 - 90 degree + * 2 - 180 degree + * 3 - 270 degree + */ +typedef enum MppEncRotationCfg_e { + MPP_ENC_ROT_0, + MPP_ENC_ROT_90, + MPP_ENC_ROT_180, + MPP_ENC_ROT_270, + MPP_ENC_ROT_BUTT +} MppEncRotationCfg; + +typedef struct MppEncPrepCfg_t { + RK_U32 change; + + /* + * Mpp encoder input data dimension config + * + * width / height / hor_stride / ver_stride / format + * These information will be used for buffer allocation and rc config init + * The output format is always YUV420. So if input is RGB then color + * conversion will be done internally + */ + RK_S32 width; + RK_S32 height; + RK_S32 hor_stride; + RK_S32 ver_stride; + + /* + * Mpp encoder input data format config + */ + MppFrameFormat format; + MppFrameColorSpace color; + MppFrameColorPrimaries colorprim; + MppFrameColorTransferCharacteristic colortrc; + MppFrameColorRange range; + + /* suffix ext means the user set config externally */ + MppEncRotationCfg rotation; + MppEncRotationCfg rotation_ext; + + /* + * input frame mirroring parameter + * 0 - disable mirroring + * 1 - horizontal mirroring + */ + RK_S32 mirroring; + RK_S32 mirroring_ext; + + /* + * input frame flip parameter + * 0 - disable flip + * 1 - flip, vertical mirror transformation + */ + RK_S32 flip; + + /* + * TODO: + */ + RK_S32 denoise; + + MppEncPrepSharpenCfg sharpen; +} MppEncPrepCfg; + +/* + * Mpp Motion Detection parameter + * + * Mpp can output Motion Detection infomation for each frame. + * If user euqueue a encode task with KEY_MOTION_INFO by following function + * then encoder will output Motion Detection information to the buffer. + * + * mpp_task_meta_set_buffer(task, KEY_MOTION_INFO, buffer); + * + * Motion Detection information will be organized in this way: + * 1. Each 16x16 block will have a 32 bit block information which contains + * 15 bit SAD(Sum of Abstract Difference value + * 9 bit signed horizontal motion vector + * 8 bit signed vertical motion vector + * 2. The sequence of MD information in the buffer is corresponding to the + * block position in the frame, left-to right, top-to-bottom. + * 3. If the width of the frame is not a multiple of 256 pixels (16 macro + * blocks), DMA would extend the frame to a multiple of 256 pixels and + * the extended blocks' MD information are 32'h0000_0000. + * 4. Buffer must be ion buffer and 1024 byte aligned. + */ +typedef struct MppEncMDBlkInfo_t { + RK_U32 sad : 15; /* bit 0~14 - SAD */ + RK_S32 mvx : 9; /* bit 15~23 - signed horizontal mv */ + RK_S32 mvy : 8; /* bit 24~31 - signed vertical mv */ +} MppEncMDBlkInfo; + +typedef enum MppEncHeaderMode_e { + /* default mode: attach vps/sps/pps only on first frame */ + MPP_ENC_HEADER_MODE_DEFAULT, + /* IDR mode: attach vps/sps/pps on each IDR frame */ + MPP_ENC_HEADER_MODE_EACH_IDR, + MPP_ENC_HEADER_MODE_BUTT, +} MppEncHeaderMode; + +typedef enum MppEncSeiMode_e { + MPP_ENC_SEI_MODE_DISABLE, /* default mode, SEI writing is disabled */ + MPP_ENC_SEI_MODE_ONE_SEQ, /* one sequence has only one SEI */ + MPP_ENC_SEI_MODE_ONE_FRAME /* one frame may have one SEI, if SEI info has changed */ +} MppEncSeiMode; + +/* + * Mpp codec parameter + * parameter is defined from here + */ + +/* + * H.264 configurable parameter + */ +typedef enum MppEncH264CfgChange_e { + /* change on stream type */ + MPP_ENC_H264_CFG_STREAM_TYPE = (1 << 0), + /* change on svc / profile / level */ + MPP_ENC_H264_CFG_CHANGE_PROFILE = (1 << 1), + /* change on entropy_coding_mode / cabac_init_idc */ + MPP_ENC_H264_CFG_CHANGE_ENTROPY = (1 << 2), + + /* change on transform8x8_mode */ + MPP_ENC_H264_CFG_CHANGE_TRANS_8x8 = (1 << 4), + /* change on constrained_intra_pred_mode */ + MPP_ENC_H264_CFG_CHANGE_CONST_INTRA = (1 << 5), + /* change on chroma_cb_qp_offset/ chroma_cr_qp_offset */ + MPP_ENC_H264_CFG_CHANGE_CHROMA_QP = (1 << 6), + /* change on deblock_disable / deblock_offset_alpha / deblock_offset_beta */ + MPP_ENC_H264_CFG_CHANGE_DEBLOCKING = (1 << 7), + /* change on use_longterm */ + MPP_ENC_H264_CFG_CHANGE_LONG_TERM = (1 << 8), + /* change on scaling_list_mode */ + MPP_ENC_H264_CFG_CHANGE_SCALING_LIST = (1 << 9), + /* change on poc type */ + MPP_ENC_H264_CFG_CHANGE_POC_TYPE = (1 << 10), + /* change on log2 max poc lsb minus 4 */ + MPP_ENC_H264_CFG_CHANGE_MAX_POC_LSB = (1 << 11), + /* change on log2 max frame number minus 4 */ + MPP_ENC_H264_CFG_CHANGE_MAX_FRM_NUM = (1 << 12), + /* change on gaps_in_frame_num_value_allowed_flag */ + MPP_ENC_H264_CFG_CHANGE_GAPS_IN_FRM_NUM = (1 << 13), + + /* change on max_qp / min_qp */ + MPP_ENC_H264_CFG_CHANGE_QP_LIMIT = (1 << 16), + /* change on max_qp_i / min_qp_i */ + MPP_ENC_H264_CFG_CHANGE_QP_LIMIT_I = (1 << 17), + /* change on max_qp_step */ + MPP_ENC_H264_CFG_CHANGE_MAX_QP_STEP = (1 << 18), + /* change on qp_delta_ip */ + MPP_ENC_H264_CFG_CHANGE_QP_DELTA = (1 << 19), + /* change on intra_refresh_mode / intra_refresh_arg */ + MPP_ENC_H264_CFG_CHANGE_INTRA_REFRESH = (1 << 20), + /* change on max long-term reference frame count */ + MPP_ENC_H264_CFG_CHANGE_MAX_LTR = (1 << 21), + /* change on max temporal id */ + MPP_ENC_H264_CFG_CHANGE_MAX_TID = (1 << 22), + /* change on adding prefix nal */ + MPP_ENC_H264_CFG_CHANGE_ADD_PREFIX = (1 << 23), + /* change on base layer priority id */ + MPP_ENC_H264_CFG_CHANGE_BASE_LAYER_PID = (1 << 24), + + /* change on vui */ + MPP_ENC_H264_CFG_CHANGE_VUI = (1 << 28), + + /* change on constraint */ + MPP_ENC_H264_CFG_CHANGE_CONSTRAINT_SET = (1 << 29), + + MPP_ENC_H264_CFG_CHANGE_ALL = (0xFFFFFFFF), +} MppEncH264CfgChange; + +/* default H.264 hardware config */ +typedef struct MppEncH264HwCfg_t { + /* + * VEPU 1/2 : 2 + * others : 0 + */ + RK_U32 hw_poc_type; + /* + * VEPU 1/2 : fixed to 12 + * others : changeable, default 12 + */ + RK_U32 hw_log2_max_frame_num_minus4; +} MppEncH264HwCfg; + +typedef struct MppEncH264Cfg_t { + RK_U32 change; + + /* + * H.264 stream format + * 0 - H.264 Annex B: NAL unit starts with '00 00 00 01' + * 1 - Plain NAL units without startcode + */ + RK_S32 stream_type; + + /* + * H.264 codec syntax config + * + * do NOT setup the three option below unless you are familiar with encoder detail + * poc_type - picture order count type 0 ~ 2 + * log2_max_poc_lsb - used in sps with poc_type 0, + * log2_max_frame_num - used in sps + */ + RK_U32 poc_type; + RK_U32 log2_max_poc_lsb; + RK_U32 log2_max_frame_num; /* actually log2_max_frame_num_minus4 */ + RK_U32 gaps_not_allowed; + + MppEncH264HwCfg hw_cfg; + + /* + * H.264 profile_idc parameter + * 66 - Baseline profile + * 77 - Main profile + * 100 - High profile + */ + RK_S32 profile; + + /* + * H.264 level_idc parameter + * 10 / 11 / 12 / 13 - qcif@15fps / cif@7.5fps / cif@15fps / cif@30fps + * 20 / 21 / 22 - cif@30fps / half-D1@@25fps / D1@12.5fps + * 30 / 31 / 32 - D1@25fps / 720p@30fps / 720p@60fps + * 40 / 41 / 42 - 1080p@30fps / 1080p@30fps / 1080p@60fps + * 50 / 51 / 52 - 4K@30fps + */ + RK_S32 level; + + /* + * H.264 entropy coding method + * 0 - CAVLC + * 1 - CABAC + * When CABAC is select cabac_init_idc can be range 0~2 + */ + RK_S32 entropy_coding_mode; + RK_S32 entropy_coding_mode_ex; + RK_S32 cabac_init_idc; + RK_S32 cabac_init_idc_ex; + + /* + * 8x8 intra prediction and 8x8 transform enable flag + * This flag can only be enable under High profile + * 0 : disable (BP/MP) + * 1 : enable (HP) + */ + RK_S32 transform8x8_mode; + RK_S32 transform8x8_mode_ex; + + /* + * 0 : disable + * 1 : enable + */ + RK_S32 constrained_intra_pred_mode; + + /* + * 0 : flat scaling list + * 1 : default scaling list for all cases + * 2 : customized scaling list (not supported) + */ + RK_S32 scaling_list_mode; + + /* + * chroma qp offset (-12 - 12) + */ + RK_S32 chroma_cb_qp_offset; + RK_S32 chroma_cr_qp_offset; + + /* + * H.264 deblock filter mode flag + * 0 : enable + * 1 : disable + * 2 : disable deblocking filter at slice boundaries + * + * deblock filter offset alpha (-6 - 6) + * deblock filter offset beta (-6 - 6) + */ + RK_S32 deblock_disable; + RK_S32 deblock_offset_alpha; + RK_S32 deblock_offset_beta; + + /* + * H.264 long term reference picture enable flag + * 0 - disable + * 1 - enable + */ + RK_S32 use_longterm; + + /* + * quality config + * qp_max - 8 ~ 51 + * qp_max_i - 10 ~ 40 + * qp_min - 8 ~ 48 + * qp_min_i - 10 ~ 40 + * qp_max_step - max delta qp step between two frames + */ + RK_S32 qp_init; + RK_S16 qp_max; + RK_S16 qp_max_i; + RK_S16 qp_min; + RK_S16 qp_min_i; + RK_S16 qp_max_step; + RK_S16 qp_delta_ip; + + /* + * intra fresh config + * + * intra_refresh_mode + * 0 - no intra refresh + * 1 - intra refresh by MB row + * 2 - intra refresh by MB column + * 3 - intra refresh by MB gap + * + * intra_refresh_arg + * mode 0 - no effect + * mode 1 - refresh MB row number + * mode 2 - refresh MB colmn number + * mode 3 - refresh MB gap count + */ + RK_S32 intra_refresh_mode; + RK_S32 intra_refresh_arg; + + /* extra mode config */ + RK_S32 max_ltr_frames; + RK_S32 max_tid; + RK_S32 prefix_mode; + RK_S32 base_layer_pid; + /* + * Mpp encoder constraint_set parameter + * Mpp encoder constraint_set controls constraint_setx_flag in AVC. + * Mpp encoder constraint_set uses type RK_U32 to store force_flag and constraint_force as followed. + * | 00 | force_flag | 00 | constraint_force | + * As for force_flag and constraint_force, only low 6 bits are valid, + * corresponding to constraint_setx_flag from 5 to 0. + * If force_flag bit is enabled, constraint_setx_flag will be set correspondingly. + * Otherwise, constraint_setx_flag will use default value. + */ + RK_U32 constraint_set; +} MppEncH264Cfg; + +#define H265E_MAX_ROI_NUMBER 64 + +typedef struct H265eRect_t { + RK_S32 left; + RK_S32 right; + RK_S32 top; + RK_S32 bottom; +} H265eRect; + +typedef struct H265eRoi_Region_t { + RK_U8 level; + H265eRect rect; +} H265eRoiRegion; + +/* + * roi region only can be setting when rc_enable = 1 + */ +typedef struct MppEncH265RoiCfg_t { + /* + * the value is defined by H265eCtuMethod + */ + + RK_U8 method; + /* + * the number of roi,the value must less than H265E_MAX_ROI_NUMBER + */ + RK_S32 num; + + /* delat qp using in roi region*/ + RK_U32 delta_qp; + + /* roi region */ + H265eRoiRegion region[H265E_MAX_ROI_NUMBER]; +} MppEncH265RoiCfg; + +typedef struct H265eCtuQp_t { + /* the qp value using in ctu region */ + RK_U32 qp; + + /* + * define the ctu region + * method = H265E_METHOD_CUT_SIZE, the value of rect is in ctu size + * method = H264E_METHOD_COORDINATE,the value of rect is in coordinates + */ + H265eRect rect; +} H265eCtu; + +typedef struct H265eCtuRegion_t { + /* + * the value is defined by H265eCtuMethod + */ + RK_U8 method; + + /* + * the number of ctu,the value must less than H265E_MAX_ROI_NUMBER + */ + RK_S32 num; + + /* ctu region */ + H265eCtu ctu[H265E_MAX_ROI_NUMBER]; +} MppEncH265CtuCfg; + +/* + * define the method when set CTU/ROI parameters + * this value is using by method in H265eCtuRegion or H265eRoi struct + */ +typedef enum { + H265E_METHOD_CTU_SIZE, + H264E_METHOD_COORDINATE, +} H265eCtuMethod; + +/* + * H.265 configurable parameter + */ +typedef struct MppEncH265VuiCfg_t { + RK_U32 change; + RK_S32 vui_present; + RK_S32 vui_aspect_ratio; + RK_S32 vui_sar_size; + RK_S32 full_range; + RK_S32 time_scale; +} MppEncH265VuiCfg; + +typedef enum MppEncH265CfgChange_e { + /* change on stream type */ + MPP_ENC_H265_CFG_PROFILE_LEVEL_TILER_CHANGE = (1 << 0), + MPP_ENC_H265_CFG_INTRA_QP_CHANGE = (1 << 1), + MPP_ENC_H265_CFG_FRAME_RATE_CHANGE = (1 << 2), + MPP_ENC_H265_CFG_BITRATE_CHANGE = (1 << 3), + MPP_ENC_H265_CFG_GOP_SIZE = (1 << 4), + MPP_ENC_H265_CFG_RC_QP_CHANGE = (1 << 5), + MPP_ENC_H265_CFG_INTRA_REFRESH_CHANGE = (1 << 6), + MPP_ENC_H265_CFG_INDEPEND_SLICE_CHANGE = (1 << 7), + MPP_ENC_H265_CFG_DEPEND_SLICE_CHANGE = (1 << 8), + MPP_ENC_H265_CFG_CTU_CHANGE = (1 << 9), + MPP_ENC_H265_CFG_ROI_CHANGE = (1 << 10), + MPP_ENC_H265_CFG_CU_CHANGE = (1 << 11), + MPP_ENC_H265_CFG_DBLK_CHANGE = (1 << 12), + MPP_ENC_H265_CFG_SAO_CHANGE = (1 << 13), + MPP_ENC_H265_CFG_TRANS_CHANGE = (1 << 14), + MPP_ENC_H265_CFG_SLICE_CHANGE = (1 << 15), + MPP_ENC_H265_CFG_ENTROPY_CHANGE = (1 << 16), + MPP_ENC_H265_CFG_MERGE_CHANGE = (1 << 17), + MPP_ENC_H265_CFG_CHANGE_VUI = (1 << 18), + MPP_ENC_H265_CFG_RC_I_QP_CHANGE = (1 << 19), + MPP_ENC_H265_CFG_RC_MAX_QP_STEP_CHANGE = (1 << 21), + MPP_ENC_H265_CFG_RC_IP_DELTA_QP_CHANGE = (1 << 20), + MPP_ENC_H265_CFG_TILE_CHANGE = (1 << 22), + MPP_ENC_H265_CFG_SLICE_LPFACS_CHANGE = (1 << 23), + MPP_ENC_H265_CFG_TILE_LPFACS_CHANGE = (1 << 24), + MPP_ENC_H265_CFG_CHANGE_ALL = (0xFFFFFFFF), +} MppEncH265CfgChange; + +typedef struct MppEncH265SliceCfg_t { + /* default value: 0, means no slice split*/ + RK_U32 split_enable; + + /* 0: by bits number; 1: by lcu line number*/ + RK_U32 split_mode; + + /* + * when splitmode is 0, this value presents bits number, + * when splitmode is 1, this value presents lcu line number + */ + RK_U32 slice_size; + RK_U32 slice_out; +} MppEncH265SliceCfg; + +typedef struct MppEncH265CuCfg_t { + RK_U32 cu32x32_en; /*default: 1 */ + RK_U32 cu16x16_en; /*default: 1 */ + RK_U32 cu8x8_en; /*default: 1 */ + RK_U32 cu4x4_en; /*default: 1 */ + + // intra pred + RK_U32 constrained_intra_pred_flag; /*default: 0 */ + RK_U32 strong_intra_smoothing_enabled_flag; /*INTRA_SMOOTH*/ + RK_U32 pcm_enabled_flag; /*default: 0, enable ipcm*/ + RK_U32 pcm_loop_filter_disabled_flag; + +} MppEncH265CuCfg; + +typedef struct MppEncH265RefCfg_t { + RK_U32 num_lt_ref_pic; /*default: 0*/ +} MppEncH265RefCfg; + + +typedef struct MppEncH265DblkCfg_t { + RK_U32 slice_deblocking_filter_disabled_flag; /* default value: 0. {0,1} */ + RK_S32 slice_beta_offset_div2; /* default value: 0. [-6,+6] */ + RK_S32 slice_tc_offset_div2; /* default value: 0. [-6,+6] */ +} MppEncH265DblkCfg_t; + +typedef struct MppEncH265SaoCfg_t { + RK_U32 slice_sao_luma_disable; + RK_U32 slice_sao_chroma_disable; +} MppEncH265SaoCfg; + +typedef struct MppEncH265TransCfg_t { + RK_U32 transquant_bypass_enabled_flag; + RK_U32 transform_skip_enabled_flag; + RK_U32 defalut_ScalingList_enable; /* default: 0 */ + RK_S32 cb_qp_offset; + RK_S32 cr_qp_offset; +} MppEncH265TransCfg; + +typedef struct MppEncH265MergeCfg_t { + RK_U32 max_mrg_cnd; + RK_U32 merge_up_flag; + RK_U32 merge_left_flag; +} MppEncH265MergesCfg; + +typedef struct MppEncH265EntropyCfg_t { + RK_U32 cabac_init_flag; /* default: 0 */ +} MppEncH265EntropyCfg; + +typedef struct MppEncH265Cfg_t { + RK_U32 change; + + /* H.265 codec syntax config */ + RK_S32 profile; + RK_S32 level; + RK_S32 tier; + + /* constraint intra prediction flag */ + RK_S32 const_intra_pred; + RK_S32 ctu_size; + RK_S32 max_cu_size; + RK_S32 tmvp_enable; + RK_S32 amp_enable; + RK_S32 wpp_enable; + RK_S32 merge_range; + RK_S32 sao_enable; + RK_U32 num_ref; + + /* quality config */ + RK_S32 max_qp; + RK_S32 min_qp; + RK_S32 max_i_qp; + RK_S32 min_i_qp; + RK_S32 ip_qp_delta; + RK_S32 max_delta_qp; + RK_S32 intra_qp; + RK_S32 gop_delta_qp; + RK_S32 qp_init; + RK_S32 qp_max_step; + RK_S32 raw_dealt_qp; + RK_U8 qpmax_map[8]; + RK_U8 qpmin_map[8]; + RK_S32 qpmap_mode; + + /* intra fresh config */ + RK_S32 intra_refresh_mode; + RK_S32 intra_refresh_arg; + + /* slice mode config */ + RK_S32 independ_slice_mode; + RK_S32 independ_slice_arg; + RK_S32 depend_slice_mode; + RK_S32 depend_slice_arg; + + MppEncH265CuCfg cu_cfg; + MppEncH265SliceCfg slice_cfg; + MppEncH265EntropyCfg entropy_cfg; + MppEncH265TransCfg trans_cfg; + MppEncH265SaoCfg sao_cfg; + MppEncH265DblkCfg_t dblk_cfg; + MppEncH265RefCfg ref_cfg; + MppEncH265MergesCfg merge_cfg; + RK_S32 auto_tile; + RK_U32 lpf_acs_sli_en; + RK_U32 lpf_acs_tile_disable; + + /* extra info */ + MppEncH265VuiCfg vui; + + MppEncH265CtuCfg ctu; + MppEncH265RoiCfg roi; +} MppEncH265Cfg; + +/* + * motion jpeg configurable parameter + */ +typedef enum MppEncJpegCfgChange_e { + /* change on quant parameter */ + MPP_ENC_JPEG_CFG_CHANGE_QP = (1 << 0), + MPP_ENC_JPEG_CFG_CHANGE_QTABLE = (1 << 1), + MPP_ENC_JPEG_CFG_CHANGE_QFACTOR = (1 << 2), + MPP_ENC_JPEG_CFG_CHANGE_ALL = (0xFFFFFFFF), +} MppEncJpegCfgChange; + +typedef struct MppEncJpegCfg_t { + RK_U32 change; + RK_S32 quant; + /* + * quality factor config + * + * q_factor - 1 ~ 99 + * qf_max - 1 ~ 99 + * qf_min - 1 ~ 99 + * qtable_y: qtable for luma + * qtable_u: qtable for chroma + * qtable_v: default equal qtable_u + */ + RK_S32 q_factor; + RK_S32 qf_max; + RK_S32 qf_min; + RK_U8 *qtable_y; + RK_U8 *qtable_u; + RK_U8 *qtable_v; +} MppEncJpegCfg; + +/* + * vp8 configurable parameter + */ +typedef enum MppEncVP8CfgChange_e { + MPP_ENC_VP8_CFG_CHANGE_QP = (1 << 0), + MPP_ENC_VP8_CFG_CHANGE_DIS_IVF = (1 << 1), + MPP_ENC_VP8_CFG_CHANGE_ALL = (0xFFFFFFFF), +} MppEncVP8CfgChange; + +typedef struct MppEncVp8Cfg_t { + RK_U32 change; + RK_S32 quant; + + RK_S32 qp_init; + RK_S32 qp_max; + RK_S32 qp_max_i; + RK_S32 qp_min; + RK_S32 qp_min_i; + RK_S32 qp_max_step; + RK_S32 disable_ivf; +} MppEncVp8Cfg; + +/** + * @ingroup rk_mpi + * @brief MPP encoder codec configuration parameters + * @details The encoder codec configuration parameters are different for each + * compression codings. For example, H.264 encoder can configure + * profile, level, qp, etc. while jpeg encoder can configure qp + * only. The detailed parameters can refer the corresponding data + * structure such as MppEncH264Cfg and MppEncJpegCfg. This data + * structure is associated with MPP_ENC_SET_CODEC_CFG command. + */ +typedef struct MppEncCodecCfg_t { + MppCodingType coding; + + union { + RK_U32 change; + MppEncH264Cfg h264; + MppEncH265Cfg h265; + MppEncJpegCfg jpeg; + MppEncVp8Cfg vp8; + }; +} MppEncCodecCfg; + +typedef enum MppEncSliceSplit_e { + /* change on quant parameter */ + MPP_ENC_SPLIT_CFG_CHANGE_MODE = (1 << 0), + MPP_ENC_SPLIT_CFG_CHANGE_ARG = (1 << 1), + MPP_ENC_SPLIT_CFG_CHANGE_OUTPUT = (1 << 2), + MPP_ENC_SPLIT_CFG_CHANGE_ALL = (0xFFFFFFFF), +} MppEncSliceSplitChange; + +typedef enum MppEncSplitMode_e { + MPP_ENC_SPLIT_NONE, + MPP_ENC_SPLIT_BY_BYTE, + MPP_ENC_SPLIT_BY_CTU, +} MppEncSplitMode; + +typedef enum MppEncSplitOutMode_e { + MPP_ENC_SPLIT_OUT_LOWDELAY = (1 << 0), + MPP_ENC_SPLIT_OUT_SEGMENT = (1 << 1), +} MppEncSplitOutMode; + +typedef struct MppEncSliceSplit_t { + RK_U32 change; + + /* + * slice split mode + * + * MPP_ENC_SPLIT_NONE - No slice is split + * MPP_ENC_SPLIT_BY_BYTE - Slice is split by byte number + * MPP_ENC_SPLIT_BY_CTU - Slice is split by macroblock / ctu number + */ + RK_U32 split_mode; + + /* + * slice split size parameter + * + * When split by byte number this value is the max byte number for each + * slice. + * When split by macroblock / ctu number this value is the MB/CTU number + * for each slice. + */ + RK_U32 split_arg; + + /* + * slice split output mode + * + * MPP_ENC_SPLIT_OUT_LOWDELAY + * - When enabled encoder will lowdelay output each slice in a single packet + * MPP_ENC_SPLIT_OUT_SEGMENT + * - When enabled encoder will packet with segment info for each slice + */ + RK_U32 split_out; +} MppEncSliceSplit; + +/** + * @brief Mpp ROI parameter + * Region configure define a rectangle as ROI + * @note x, y, w, h are calculated in pixels, which had better be 16-pixel aligned. + * These parameters MUST retain in memory when encoder is running. + * Both absolute qp and relative qp are supported in vepu541. + * Only absolute qp is supported in rv1108 + */ +typedef struct MppEncROIRegion_t { + RK_U16 x; /**< horizontal position of top left corner */ + RK_U16 y; /**< vertical position of top left corner */ + RK_U16 w; /**< width of ROI rectangle */ + RK_U16 h; /**< height of ROI rectangle */ + RK_U16 intra; /**< flag of forced intra macroblock */ + RK_S16 quality; /**< absolute / relative qp of macroblock */ + RK_U16 qp_area_idx; /**< qp min max area select*/ + RK_U8 area_map_en; /**< enable area map */ + RK_U8 abs_qp_en; /**< absolute qp enable flag*/ +} MppEncROIRegion; + +/** + * @brief MPP encoder's ROI configuration + */ +typedef struct MppEncROICfg_t { + RK_U32 number; /**< ROI rectangle number */ + MppEncROIRegion *regions; /**< ROI parameters */ +} MppEncROICfg; + +/** + * @brief Mpp ROI parameter for vepu54x / vepu58x + * @note These encoders have more complex roi configure structure. + * User need to generate roi structure data for different soc. + * And send buffers to encoder through metadata. + */ +typedef struct MppEncROICfg2_t { + MppBuffer base_cfg_buf; + MppBuffer qp_cfg_buf; + MppBuffer amv_cfg_buf; + MppBuffer mv_cfg_buf; + + RK_U32 roi_qp_en : 1; + RK_U32 roi_amv_en : 1; + RK_U32 roi_mv_en : 1; + RK_U32 reserve_bits : 29; + RK_U32 reserve[3]; +} MppEncROICfg2; + +/* + * Mpp OSD parameter + * + * Mpp OSD support total 8 regions + * Mpp OSD support 256-color palette two mode palette: + * 1. Configurable OSD palette + * When palette is set. + * 2. fixed OSD palette + * When palette is NULL. + * + * if MppEncOSDPlt.buf != NULL , palette includes maximun 256 levels, + * every level composed of 32 bits defined below: + * Y : 8 bits + * U : 8 bits + * V : 8 bits + * alpha : 8 bits + */ +#define MPP_ENC_OSD_PLT_WHITE ((255<<24)|(128<<16)|(128<<8)|235) +#define MPP_ENC_OSD_PLT_YELLOW ((255<<24)|(146<<16)|( 16<<8)|210) +#define MPP_ENC_OSD_PLT_CYAN ((255<<24)|( 16<<16)|(166<<8)|170) +#define MPP_ENC_OSD_PLT_GREEN ((255<<24)|( 34<<16)|( 54<<8)|145) +#define MPP_ENC_OSD_PLT_TRANS (( 0<<24)|(222<<16)|(202<<8)|106) +#define MPP_ENC_OSD_PLT_RED ((255<<24)|(240<<16)|( 90<<8)| 81) +#define MPP_ENC_OSD_PLT_BLUE ((255<<24)|(110<<16)|(240<<8)| 41) +#define MPP_ENC_OSD_PLT_BLACK ((255<<24)|(128<<16)|(128<<8)| 16) + +typedef enum MppEncOSDPltType_e { + MPP_ENC_OSD_PLT_TYPE_DEFAULT, + MPP_ENC_OSD_PLT_TYPE_USERDEF, + MPP_ENC_OSD_PLT_TYPE_BUTT, +} MppEncOSDPltType; + +/* OSD palette value define */ +typedef union MppEncOSDPltVal_u { + struct { + RK_U32 v : 8; + RK_U32 u : 8; + RK_U32 y : 8; + RK_U32 alpha : 8; + }; + RK_U32 val; +} MppEncOSDPltVal; + +typedef struct MppEncOSDPlt_t { + MppEncOSDPltVal data[256]; +} MppEncOSDPlt; + +typedef enum MppEncOSDPltCfgChange_e { + MPP_ENC_OSD_PLT_CFG_CHANGE_MODE = (1 << 0), /* change osd plt type */ + MPP_ENC_OSD_PLT_CFG_CHANGE_PLT_VAL = (1 << 1), /* change osd plt table value */ + MPP_ENC_OSD_PLT_CFG_CHANGE_ALL = (0xFFFFFFFF), +} MppEncOSDPltCfgChange; + +typedef struct MppEncOSDPltCfg_t { + RK_U32 change; + MppEncOSDPltType type; + MppEncOSDPlt *plt; +} MppEncOSDPltCfg; + +/* position info is unit in 16 pixels(one MB), and + * x-directon range in pixels = (rd_pos_x - lt_pos_x + 1) * 16; + * y-directon range in pixels = (rd_pos_y - lt_pos_y + 1) * 16; + */ +typedef struct MppEncOSDRegion_t { + RK_U32 enable; + RK_U32 inverse; + RK_U32 start_mb_x; + RK_U32 start_mb_y; + RK_U32 num_mb_x; + RK_U32 num_mb_y; + RK_U32 buf_offset; +} MppEncOSDRegion; + +/* if num_region > 0 && region==NULL + * use old osd data + */ +typedef struct MppEncOSDData_t { + MppBuffer buf; + RK_U32 num_region; + MppEncOSDRegion region[8]; +} MppEncOSDData; + +typedef struct MppEncOSDRegion2_t { + RK_U32 enable; + RK_U32 inverse; + RK_U32 start_mb_x; + RK_U32 start_mb_y; + RK_U32 num_mb_x; + RK_U32 num_mb_y; + RK_U32 buf_offset; + MppBuffer buf; +} MppEncOSDRegion2; + +typedef struct MppEncOSDData2_t { + RK_U32 num_region; + MppEncOSDRegion2 region[8]; +} MppEncOSDData2; + +typedef struct MppEncUserData_t { + RK_U32 len; + void *pdata; +} MppEncUserData; + +typedef struct MppEncUserDataFull_t { + RK_U32 len; + RK_U8 *uuid; + void *pdata; +} MppEncUserDataFull; + +typedef struct MppEncUserDataSet_t { + RK_U32 count; + MppEncUserDataFull *datas; +} MppEncUserDataSet; + +typedef enum MppEncSceneMode_e { + MPP_ENC_SCENE_MODE_DEFAULT, + MPP_ENC_SCENE_MODE_IPC, + MPP_ENC_SCENE_MODE_BUTT, +} MppEncSceneMode; + +typedef enum MppEncFineTuneCfgChange_e { + /* change on scene mode */ + MPP_ENC_TUNE_CFG_CHANGE_SCENE_MODE = (1 << 0), +} MppEncFineTuneCfgChange; + +typedef struct MppEncFineTuneCfg_t { + RK_U32 change; + + MppEncSceneMode scene_mode; +} MppEncFineTuneCfg; + +#endif /*__RK_VENC_CMD_H__*/ diff --git a/dev_reference/rockchip/rk_venc_rc.h b/dev_reference/rockchip/rk_venc_rc.h new file mode 100644 index 0000000..b03289c --- /dev/null +++ b/dev_reference/rockchip/rk_venc_rc.h @@ -0,0 +1,66 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __RK_VENC_RC_H__ +#define __RK_VENC_RC_H__ + +#include "rk_type.h" + +#define MPP_ENC_MIN_BPS (SZ_1K) +#define MPP_ENC_MAX_BPS (SZ_1M * 200) + +/* Rate control parameter */ +typedef enum MppEncRcMode_e { + MPP_ENC_RC_MODE_VBR, + MPP_ENC_RC_MODE_CBR, + MPP_ENC_RC_MODE_FIXQP, + MPP_ENC_RC_MODE_AVBR, + MPP_ENC_RC_MODE_BUTT +} MppEncRcMode; + +typedef enum MppEncRcPriority_e { + MPP_ENC_RC_BY_BITRATE_FIRST, + MPP_ENC_RC_BY_FRM_SIZE_FIRST, + MPP_ENC_RC_PRIORITY_BUTT +} MppEncRcPriority; + +typedef enum MppEncRcDropFrmMode_e { + MPP_ENC_RC_DROP_FRM_DISABLED, + MPP_ENC_RC_DROP_FRM_NORMAL, + MPP_ENC_RC_DROP_FRM_PSKIP, + MPP_ENC_RC_DROP_FRM_BUTT +} MppEncRcDropFrmMode; + +typedef enum MppEncRcSuperFrameMode_t { + MPP_ENC_RC_SUPER_FRM_NONE, + MPP_ENC_RC_SUPER_FRM_DROP, + MPP_ENC_RC_SUPER_FRM_REENC, + MPP_ENC_RC_SUPER_FRM_BUTT +} MppEncRcSuperFrameMode; + +typedef enum MppEncRcGopMode_e { + MPP_ENC_RC_NORMAL_P, + MPP_ENC_RC_SMART_P, + MPP_ENC_RC_GOP_MODE_BUTT, +} MppEncRcGopMode; + +typedef enum MppEncRcIntraRefreshMode_e { + MPP_ENC_RC_INTRA_REFRESH_ROW = 0, + MPP_ENC_RC_INTRA_REFRESH_COL, + MPP_ENC_RC_INTRA_REFRESH_BUTT +} MppEncRcRefreshMode; + +#endif /*__RK_VENC_RC_H__*/ diff --git a/dev_reference/rockchip/rk_venc_ref.h b/dev_reference/rockchip/rk_venc_ref.h new file mode 100644 index 0000000..8a117f3 --- /dev/null +++ b/dev_reference/rockchip/rk_venc_ref.h @@ -0,0 +1,242 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __RK_VENC_REF_H__ +#define __RK_VENC_REF_H__ + +#include "rk_type.h" +#include "mpp_err.h" + +/* + * MPP reference management system follows the model of H.264/H.265 reference + * frame mangement. + * + * The reference frame is defined into two type: long-term reference frame and + * short-refernce frame (lt_ref and st_ref). + * + * The lt_ref can be only indexed by long-term reference frame index (lt_idx). + * The st_ref can be indexed by its temporal id (tid) and previous count. + * + * MppEncRefMode defined the way for user to reference the required frame. + * + * Normal reference mode without argument + * REF_TO_PREV_REF_FRM - refer to previous reference frame in encode order (No matter Lt or St) + * REF_TO_PREV_ST_REF - refer to previous short-term reference frame + * REF_TO_PREV_LT_REF - refer to previous long-term reference frame + * REF_TO_PREV_INTRA - refer to previous Intra / IDR frame + * REF_TO_ST_REF_SETUP - refer to refernce frame defined in StRefSetup + * + * Normal reference mode with argument + * REF_TO_TEMPORAL_LAYER - refer to previous reference frame with temporal id argument + * REF_TO_LT_REF_IDX - refer to long-term reference frame with lt_ref_idx argument + * REF_TO_ST_PREV_N_REF - refer to short-term reference frame with diff frame_num argument + * + * Long-term reference only mode + * REF_TO_ST_REF_SETUP - use corresponding mode of original short-term reference frame + * + * Short-term reference only mode + * REF_TO_LT_REF_SETUP - indicate that this frame will be overwrited by long-term config + * + * By combining frames with these modes user can define many kinds of reference hierarchy + * structure. But normally user should use simplified preset hierarchy pattern. + * + * The rules for virtual cpb management is similiar to H.264/H.265 + * 1. When one frame is marked as long-term reference frame it will be kept in cpb until + * it is replaced by other frame with the same lt_idx or IDR frame. + * 2. When one frame is marked as short-term reference frame it will be inert into cpb when + * there is enough storage space. When the number of total sum of long-term and short-term + * reference frame excess the cpb size limit the oldest short-term frame will be removed. + * This is call sliding window in H.264. + */ + +/* max 4 temporal layer */ +#define MPP_ENC_MAX_TEMPORAL_LAYER_NUM 4 +/* max 4 long-term reference frame */ +#define MPP_ENC_MAX_LT_REF_NUM 16 + +/* + * Group Of Picture (GOP) config is separated into three parts: + * + * 1. Intra / IDR frame config + * igop - the interval of two intra / IDR frames + * + * 2. Long-term reference config (MppEncRefLtFrmCfg) + * + * Setup long-term reference index max lt_idx, loop interval and reference + * mode for auto long-term reference frame generation. The encoder will + * mark frame to be long-term reference frame with given interval. + * + * 2.1 lt_idx + * The long-term reference frame index is unique identifier for a long-term + * reference frame. + * The max long-term reference frame index should NOT larger than + * max_num_ref_frames in sps. + * + * 2.2 lt_gap + * When lt_gap is zero the long-term reference frame generation is disabled. + * When lt_gap is non-zero (usually 2~3 second interval) then the long-term + * reference frame will be generated for error recovery or smart hierarchy. + * + * 2.2 lt_delay + * The lt_delay is the delay time for generation of long-term reference frame. + * The start point of lt_delay is the IDR/intra frame genertaed by igop. + * + * 2.4 ref_mode: Long-term refernce frame reference mode + * NOTE: temporal id of longterm reference frame is always zero. + * + * Examples: + * Sequence has only one lt_ref 0 and setup one long-term reference frame + * every 300 frame. + * { + * .lt_idx = 0, + * .lt_gap = 300, + * .lt_delay = 0, + * } + * result: + * frame 0 ...... 299 300 301 ...... 599 600 601 + * lt_idx 0 xxxxxx x 0 x xxxxxx x 0 x + * + * Sequence has lt_ref from 0 to 2 and setup a long-term reference frame + * every 100 frame. + * { + * .lt_idx = 0, + * .lt_gap = 300, + * .lt_delay = 0, + * } + * { + * .lt_idx = 1, + * .lt_gap = 300, + * .lt_delay = 100, + * } + * { + * .lt_idx = 2, + * .lt_gap = 300, + * .lt_delay = 200, + * } + * result: + * frame 0 ... 99 100 101 ... 199 200 201 ... 299 300 301 + * lt_idx 0 xxx x 1 x xxx x 2 x xxx x 0 x + * + * 3. Short-term reference config (MppEncStRefSetup) + * + * 3.1 is_non_ref + * The is_non_ref indicated the current frame is reference frame or not. + * + * 3.2 temporal_id + * The temporal id of the current frame configure. + * + * 3.3 ref_mode: short-term refernce frame reference mode + * + * 3.4 repeat + * The repeat time of the short-term reference frame configure. + * The overall frame count with the same config is repeat + 1. + * + * Examples: + * + */ + +#define REF_MODE_MODE_MASK (0x1F) +#define REF_MODE_ARG_MASK (0xFFFF0000) + +typedef enum MppEncRefMode_e { + /* max 32 mode in 32-bit */ + /* for default ref global config */ + REF_MODE_GLOBAL, + REF_TO_PREV_REF_FRM = REF_MODE_GLOBAL, + REF_TO_PREV_ST_REF, + REF_TO_PREV_LT_REF, + REF_TO_PREV_INTRA, + + /* for global config with args */ + REF_MODE_GLOBAL_WITH_ARG = 0x4, + /* with ref arg as temporal layer id */ + REF_TO_TEMPORAL_LAYER = REF_MODE_GLOBAL_WITH_ARG, + /* with ref arg as long-term reference picture index */ + REF_TO_LT_REF_IDX, + /* with ref arg as short-term reference picture difference frame_num */ + REF_TO_ST_PREV_N_REF, + REF_MODE_GLOBAL_BUTT, + + /* for lt-ref */ + REF_MODE_LT = 0x18, + REF_TO_ST_REF_SETUP, + REF_MODE_LT_BUTT, + + /* for st-ref */ + REF_MODE_ST = 0x1C, + REF_TO_LT_REF_SETUP, + REF_MODE_ST_BUTT, +} MppEncRefMode; + +typedef struct MppEncRefLtFrmCfg_t { + RK_S32 lt_idx; /* lt_idx of the reference frame */ + RK_S32 temporal_id; /* temporal_id of the reference frame */ + MppEncRefMode ref_mode; + RK_S32 ref_arg; + RK_S32 lt_gap; /* gap between two lt-ref with same lt_idx */ + RK_S32 lt_delay; /* delay offset to igop start frame */ +} MppEncRefLtFrmCfg; + +typedef struct MppEncRefStFrmCfg_t { + RK_S32 is_non_ref; + RK_S32 temporal_id; + MppEncRefMode ref_mode; + RK_S32 ref_arg; + RK_S32 repeat; /* repeat times */ +} MppEncRefStFrmCfg; + +typedef struct MppEncRefPreset_t { + /* input parameter for query */ + const char *name; + RK_S32 max_lt_cnt; + RK_S32 max_st_cnt; + MppEncRefLtFrmCfg *lt_cfg; + MppEncRefStFrmCfg *st_cfg; + + /* output parameter */ + RK_S32 lt_cnt; + RK_S32 st_cnt; +} MppEncRefPreset; + +typedef void* MppEncRefCfg; + +#ifdef __cplusplus +extern "C" { +#endif + +MPP_RET mpp_enc_ref_cfg_init(MppEncRefCfg *ref); +MPP_RET mpp_enc_ref_cfg_deinit(MppEncRefCfg *ref); + +MPP_RET mpp_enc_ref_cfg_reset(MppEncRefCfg ref); +MPP_RET mpp_enc_ref_cfg_set_cfg_cnt(MppEncRefCfg ref, RK_S32 lt_cnt, RK_S32 st_cnt); +MPP_RET mpp_enc_ref_cfg_add_lt_cfg(MppEncRefCfg ref, RK_S32 cnt, MppEncRefLtFrmCfg *frm); +MPP_RET mpp_enc_ref_cfg_add_st_cfg(MppEncRefCfg ref, RK_S32 cnt, MppEncRefStFrmCfg *frm); +MPP_RET mpp_enc_ref_cfg_check(MppEncRefCfg ref); + +/* + * A new reference configure will restart a new gop and clear cpb by default. + * The keep cpb function will let encoder keeps the current cpb status and do NOT + * reset all the reference frame in cpb. + */ +MPP_RET mpp_enc_ref_cfg_set_keep_cpb(MppEncRefCfg ref, RK_S32 keep); +MPP_RET mpp_enc_ref_cfg_get_preset(MppEncRefPreset *preset); +MPP_RET mpp_enc_ref_cfg_show(MppEncRefCfg ref); + +#ifdef __cplusplus +} +#endif + +#endif /*__RK_VENC_REF_H__*/ diff --git a/dev_reference/rockchip/vpu.h b/dev_reference/rockchip/vpu.h new file mode 100644 index 0000000..5ba3579 --- /dev/null +++ b/dev_reference/rockchip/vpu.h @@ -0,0 +1,123 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __VPU_H__ +#define __VPU_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "rk_type.h" + +#define VPU_SUCCESS (0) +#define VPU_FAILURE (-1) + +#define VPU_HW_WAIT_OK VPU_SUCCESS +#define VPU_HW_WAIT_ERROR VPU_FAILURE +#define VPU_HW_WAIT_TIMEOUT 1 + +// vpu decoder 60 registers, size 240B +#define VPU_REG_NUM_DEC (60) +// vpu post processor 41 registers, size 164B +#define VPU_REG_NUM_PP (41) +// vpu decoder + post processor 101 registers, size 404B +#define VPU_REG_NUM_DEC_PP (VPU_REG_NUM_DEC+VPU_REG_NUM_PP) +// vpu encoder 96 registers, size 384B +#define VPU_REG_NUM_ENC (96) + +typedef enum { + VPU_ENC = 0x0, + VPU_DEC = 0x1, + VPU_PP = 0x2, + VPU_DEC_PP = 0x3, + VPU_DEC_HEVC = 0x4, + VPU_DEC_RKV = 0x5, + VPU_ENC_RKV = 0x6, + VPU_DEC_AVSPLUS = 0x7, + VPU_ENC_VEPU22 = 0x8, + VPU_TYPE_BUTT , +} VPU_CLIENT_TYPE; + +/* Hardware decoder configuration description */ + +typedef struct VPUHwDecConfig { + RK_U32 maxDecPicWidth; /* Maximum video decoding width supported */ + RK_U32 maxPpOutPicWidth; /* Maximum output width of Post-Processor */ + RK_U32 h264Support; /* HW supports h.264 */ + RK_U32 jpegSupport; /* HW supports JPEG */ + RK_U32 mpeg4Support; /* HW supports MPEG-4 */ + RK_U32 customMpeg4Support; /* HW supports custom MPEG-4 features */ + RK_U32 vc1Support; /* HW supports VC-1 Simple */ + RK_U32 mpeg2Support; /* HW supports MPEG-2 */ + RK_U32 ppSupport; /* HW supports post-processor */ + RK_U32 ppConfig; /* HW post-processor functions bitmask */ + RK_U32 sorensonSparkSupport; /* HW supports Sorenson Spark */ + RK_U32 refBufSupport; /* HW supports reference picture buffering */ + RK_U32 vp6Support; /* HW supports VP6 */ + RK_U32 vp7Support; /* HW supports VP7 */ + RK_U32 vp8Support; /* HW supports VP8 */ + RK_U32 avsSupport; /* HW supports AVS */ + RK_U32 jpegESupport; /* HW supports JPEG extensions */ + RK_U32 rvSupport; /* HW supports REAL */ + RK_U32 mvcSupport; /* HW supports H264 MVC extension */ +} VPUHwDecConfig_t; + +/* Hardware encoder configuration description */ + +typedef struct VPUHwEndConfig { + RK_U32 maxEncodedWidth; /* Maximum supported width for video encoding (not JPEG) */ + RK_U32 h264Enabled; /* HW supports H.264 */ + RK_U32 jpegEnabled; /* HW supports JPEG */ + RK_U32 mpeg4Enabled; /* HW supports MPEG-4 */ + RK_U32 vsEnabled; /* HW supports video stabilization */ + RK_U32 rgbEnabled; /* HW supports RGB input */ + RK_U32 reg_size; /* HW bus type in use */ + RK_U32 reserv[2]; +} VPUHwEncConfig_t; + +typedef enum { + // common command + VPU_CMD_REGISTER , + VPU_CMD_REGISTER_ACK_OK , + VPU_CMD_REGISTER_ACK_FAIL , + VPU_CMD_UNREGISTER , + + VPU_SEND_CONFIG , + VPU_SEND_CONFIG_ACK_OK , + VPU_SEND_CONFIG_ACK_FAIL , + + VPU_GET_HW_INFO , + VPU_GET_HW_INFO_ACK_OK , + VPU_GET_HW_INFO_ACK_FAIL , + + VPU_CMD_BUTT , +} VPU_CMD_TYPE; + +int VPUClientInit(VPU_CLIENT_TYPE type); +RK_S32 VPUClientRelease(int socket); +RK_S32 VPUClientSendReg(int socket, RK_U32 *regs, RK_U32 nregs); +RK_S32 VPUClientSendReg2(RK_S32 socket, RK_S32 offset, RK_S32 size, void *param); +RK_S32 VPUClientWaitResult(int socket, RK_U32 *regs, RK_U32 nregs, VPU_CMD_TYPE *cmd, RK_S32 *len); +RK_S32 VPUClientGetHwCfg(int socket, RK_U32 *cfg, RK_U32 cfg_size); +RK_S32 VPUClientGetIOMMUStatus(); +RK_U32 VPUCheckSupportWidth(); + +#ifdef __cplusplus +} +#endif + +#endif /* __VPU_H__ */ diff --git a/dev_reference/rockchip/vpu_api.h b/dev_reference/rockchip/vpu_api.h new file mode 100644 index 0000000..80c7a59 --- /dev/null +++ b/dev_reference/rockchip/vpu_api.h @@ -0,0 +1,516 @@ +/* + * Copyright 2015 Rockchip Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __VPU_API_H__ +#define __VPU_API_H__ + +#include "rk_type.h" +#include "mpp_err.h" + +/** + * @brief rockchip media process interface + */ + +#define VPU_API_NOPTS_VALUE (0x8000000000000000LL) + +/* + * bit definition of ColorType in structure VPU_FRAME + */ +#define VPU_OUTPUT_FORMAT_TYPE_MASK (0x0000ffff) +#define VPU_OUTPUT_FORMAT_ARGB8888 (0x00000000) +#define VPU_OUTPUT_FORMAT_ABGR8888 (0x00000001) +#define VPU_OUTPUT_FORMAT_RGB888 (0x00000002) +#define VPU_OUTPUT_FORMAT_RGB565 (0x00000003) +#define VPU_OUTPUT_FORMAT_RGB555 (0x00000004) +#define VPU_OUTPUT_FORMAT_YUV420_SEMIPLANAR (0x00000005) +#define VPU_OUTPUT_FORMAT_YUV420_PLANAR (0x00000006) +#define VPU_OUTPUT_FORMAT_YUV422 (0x00000007) +#define VPU_OUTPUT_FORMAT_YUV444 (0x00000008) +#define VPU_OUTPUT_FORMAT_YCH420 (0x00000009) +#define VPU_OUTPUT_FORMAT_BIT_MASK (0x000f0000) +#define VPU_OUTPUT_FORMAT_BIT_8 (0x00000000) +#define VPU_OUTPUT_FORMAT_BIT_10 (0x00010000) +#define VPU_OUTPUT_FORMAT_BIT_12 (0x00020000) +#define VPU_OUTPUT_FORMAT_BIT_14 (0x00030000) +#define VPU_OUTPUT_FORMAT_BIT_16 (0x00040000) +#define VPU_OUTPUT_FORMAT_FBC_MASK (0x00f00000) +#define VPU_OUTPUT_FORMAT_FBC_AFBC_V1 (0x00100000) +#define VPU_OUTPUT_FORMAT_FBC_AFBC_V2 (0x00200000) +#define VPU_OUTPUT_FORMAT_DYNCRANGE_MASK (0x0f000000) +#define VPU_OUTPUT_FORMAT_DYNCRANGE_SDR (0x00000000) +#define VPU_OUTPUT_FORMAT_DYNCRANGE_HDR10 (0x01000000) +#define VPU_OUTPUT_FORMAT_DYNCRANGE_HDR_HLG (0x02000000) +#define VPU_OUTPUT_FORMAT_DYNCRANGE_HDR_DOLBY (0x03000000) + +/** + * @brief input picture type + */ +typedef enum { + ENC_INPUT_YUV420_PLANAR = 0, /**< YYYY... UUUU... VVVV */ + ENC_INPUT_YUV420_SEMIPLANAR = 1, /**< YYYY... UVUVUV... */ + ENC_INPUT_YUV422_INTERLEAVED_YUYV = 2, /**< YUYVYUYV... */ + ENC_INPUT_YUV422_INTERLEAVED_UYVY = 3, /**< UYVYUYVY... */ + ENC_INPUT_RGB565 = 4, /**< 16-bit RGB */ + ENC_INPUT_BGR565 = 5, /**< 16-bit RGB */ + ENC_INPUT_RGB555 = 6, /**< 15-bit RGB */ + ENC_INPUT_BGR555 = 7, /**< 15-bit RGB */ + ENC_INPUT_RGB444 = 8, /**< 12-bit RGB */ + ENC_INPUT_BGR444 = 9, /**< 12-bit RGB */ + ENC_INPUT_RGB888 = 10, /**< 24-bit RGB */ + ENC_INPUT_BGR888 = 11, /**< 24-bit RGB */ + ENC_INPUT_RGB101010 = 12, /**< 30-bit RGB */ + ENC_INPUT_BGR101010 = 13 /**< 30-bit RGB */ +} EncInputPictureType; + +typedef enum VPU_API_CMD { + VPU_API_ENC_SETCFG, + VPU_API_ENC_GETCFG, + VPU_API_ENC_SETFORMAT, + VPU_API_ENC_SETIDRFRAME, + + VPU_API_ENABLE_DEINTERLACE, + VPU_API_SET_VPUMEM_CONTEXT, + VPU_API_USE_PRESENT_TIME_ORDER, + VPU_API_SET_DEFAULT_WIDTH_HEIGH, + VPU_API_SET_INFO_CHANGE, + VPU_API_USE_FAST_MODE, + VPU_API_DEC_GET_STREAM_COUNT, + VPU_API_GET_VPUMEM_USED_COUNT, + VPU_API_GET_FRAME_INFO, + VPU_API_SET_OUTPUT_BLOCK, + VPU_API_GET_EOS_STATUS, + VPU_API_SET_OUTPUT_MODE, + + /* get sps/pps header */ + VPU_API_GET_EXTRA_INFO = 0x200, + + VPU_API_SET_IMMEDIATE_OUT = 0x1000, + VPU_API_SET_PARSER_SPLIT_MODE, /* NOTE: should control before init */ + VPU_API_DEC_OUT_FRM_STRUCT_TYPE, + VPU_API_DEC_EN_THUMBNAIL, + VPU_API_DEC_EN_HDR_META, + VPU_API_DEC_EN_MVC, + VPU_API_DEC_EN_FBC_HDR_256_ODD, + VPU_API_SET_INPUT_BLOCK, + + /* set pkt/frm ready callback */ + VPU_API_SET_PKT_RDY_CB = 0x1100, + VPU_API_SET_FRM_RDY_CB, + + VPU_API_ENC_VEPU22_START = 0x2000, + VPU_API_ENC_SET_VEPU22_CFG, + VPU_API_ENC_GET_VEPU22_CFG, + VPU_API_ENC_SET_VEPU22_CTU_QP, + VPU_API_ENC_SET_VEPU22_ROI, + + VPU_API_ENC_MPP = 0x3000, + VPU_API_ENC_MPP_SETCFG, + VPU_API_ENC_MPP_GETCFG, + + /* mlvec dynamic configure */ + VPU_API_ENC_MLVEC_CFG = 0x4000, + VPU_API_ENC_SET_MAX_TID, + VPU_API_ENC_SET_MARK_LTR, + VPU_API_ENC_SET_USE_LTR, + VPU_API_ENC_SET_FRAME_QP, + VPU_API_ENC_SET_BASE_LAYER_PID, +} VPU_API_CMD; + +typedef struct { + RK_U32 TimeLow; + RK_U32 TimeHigh; +} TIME_STAMP; + +typedef struct { + RK_U32 CodecType; + RK_U32 ImgWidth; + RK_U32 ImgHeight; + RK_U32 ImgHorStride; + RK_U32 ImgVerStride; + RK_U32 BufSize; +} VPU_GENERIC; + +typedef struct VPUMem { + RK_U32 phy_addr; + RK_U32 *vir_addr; + RK_U32 size; + RK_U32 *offset; +} VPUMemLinear_t; + +typedef struct tVPU_FRAME { + RK_U32 FrameBusAddr[2]; // 0: Y address; 1: UV address; + RK_U32 FrameWidth; // buffer horizontal stride + RK_U32 FrameHeight; // buffer vertical stride + RK_U32 OutputWidth; // deprecated + RK_U32 OutputHeight; // deprecated + RK_U32 DisplayWidth; // valid width for display + RK_U32 DisplayHeight; // valid height for display + RK_U32 CodingType; + RK_U32 FrameType; // frame; top_field_first; bot_field_first + RK_U32 ColorType; + RK_U32 DecodeFrmNum; + TIME_STAMP ShowTime; + RK_U32 ErrorInfo; // error information + RK_U32 employ_cnt; + VPUMemLinear_t vpumem; + struct tVPU_FRAME *next_frame; + union { + struct { + RK_U32 Res0[2]; + struct { + RK_U32 ColorPrimaries : 8; + RK_U32 ColorTransfer : 8; + RK_U32 ColorCoeffs : 8; + RK_U32 ColorRange : 1; + RK_U32 Res1 : 7; + }; + + RK_U32 Res2; + }; + + RK_U32 Res[4]; + }; +} VPU_FRAME; + +typedef struct FrameThumbInfo { + RK_U32 enable; + RK_U32 yOffset; + RK_U32 uvOffset; +} FrameThumbInfo_t; + +typedef struct FrameHdrInfo { + RK_U32 isHdr; + RK_U32 offset; + RK_U32 size; +} FrameHdrInfo_t; + +typedef struct VideoFrame { + VPU_FRAME vpuFrame; + FrameThumbInfo_t thumbInfo; + FrameHdrInfo_t hdrInfo; + RK_U32 viewId; + RK_U32 reserved[16]; +} VideoFrame_t; + +typedef struct VideoPacket { + RK_S64 pts; /* with unit of us*/ + RK_S64 dts; /* with unit of us*/ + RK_U8 *data; + RK_S32 size; + RK_U32 capability; + RK_U32 nFlags; +} VideoPacket_t; + +typedef struct DecoderOut { + RK_U8 *data; + RK_U32 size; + RK_S64 timeUs; + RK_S32 nFlags; +} DecoderOut_t; + +typedef struct ParserOut { + RK_U8 *data; + RK_U32 size; + RK_S64 timeUs; + RK_U32 nFlags; + RK_U32 width; + RK_U32 height; +} ParserOut_t; + +typedef struct EncInputStream { + RK_U8 *buf; + RK_S32 size; + RK_U32 bufPhyAddr; + RK_S64 timeUs; + RK_U32 nFlags; +} EncInputStream_t; + +typedef struct EncoderOut { + RK_U8 *data; + RK_S32 size; + RK_S64 timeUs; + RK_S32 keyFrame; + +} EncoderOut_t; + +typedef RK_S32 (*VpuFrmRdyCbFunc)(void *cb_ctx); + +typedef struct { + VpuFrmRdyCbFunc cb; + void *cbCtx; +} FrameRdyCB; + +/* + * @brief Enumeration used to define the possible video compression codings. + * @note This essentially refers to file extensions. If the coding is + * being used to specify the ENCODE type, then additional work + * must be done to configure the exact flavor of the compression + * to be used. For decode cases where the user application can + * not differentiate between MPEG-4 and H.264 bit streams, it is + * up to the codec to handle this. + * + * sync with the omx_video.h + */ +typedef enum OMX_RK_VIDEO_CODINGTYPE { + OMX_RK_VIDEO_CodingUnused, /**< Value when coding is N/A */ + OMX_RK_VIDEO_CodingAutoDetect, /**< Autodetection of coding type */ + OMX_RK_VIDEO_CodingMPEG2, /**< AKA: H.262 */ + OMX_RK_VIDEO_CodingH263, /**< H.263 */ + OMX_RK_VIDEO_CodingMPEG4, /**< MPEG-4 */ + OMX_RK_VIDEO_CodingWMV, /**< Windows Media Video (WMV1,WMV2,WMV3)*/ + OMX_RK_VIDEO_CodingRV, /**< all versions of Real Video */ + OMX_RK_VIDEO_CodingAVC, /**< H.264/AVC */ + OMX_RK_VIDEO_CodingMJPEG, /**< Motion JPEG */ + OMX_RK_VIDEO_CodingVP8, /**< VP8 */ + OMX_RK_VIDEO_CodingVP9, /**< VP9 */ + OMX_RK_VIDEO_CodingVC1 = 0x01000000, /**< Windows Media Video (WMV1,WMV2,WMV3)*/ + OMX_RK_VIDEO_CodingFLV1, /**< Sorenson H.263 */ + OMX_RK_VIDEO_CodingDIVX3, /**< DIVX3 */ + OMX_RK_VIDEO_CodingVP6, + OMX_RK_VIDEO_CodingHEVC, /**< H.265/HEVC */ + OMX_RK_VIDEO_CodingAVSPLUS, /**< AVS+ profile 0x48 */ + OMX_RK_VIDEO_CodingAVS, /**< AVS profile 0x20 */ + OMX_RK_VIDEO_CodingAVS2, /**< AVS2 */ + OMX_RK_VIDEO_CodingAV1, /**< av1 */ + OMX_RK_VIDEO_CodingKhronosExtensions = 0x6F000000, /**< Reserved region for introducing Khronos Standard Extensions */ + OMX_RK_VIDEO_CodingVendorStartUnused = 0x7F000000, /**< Reserved region for introducing Vendor Extensions */ + OMX_RK_VIDEO_CodingMax = 0x7FFFFFFF +} OMX_RK_VIDEO_CODINGTYPE; + +typedef enum CODEC_TYPE { + CODEC_NONE, + CODEC_DECODER, + CODEC_ENCODER, + CODEC_BUTT, +} CODEC_TYPE; + +typedef enum VPU_API_ERR { + VPU_API_OK = 0, + VPU_API_ERR_UNKNOW = -1, + VPU_API_ERR_BASE = -1000, + VPU_API_ERR_LIST_STREAM = VPU_API_ERR_BASE - 1, + VPU_API_ERR_INIT = VPU_API_ERR_BASE - 2, + VPU_API_ERR_VPU_CODEC_INIT = VPU_API_ERR_BASE - 3, + VPU_API_ERR_STREAM = VPU_API_ERR_BASE - 4, + VPU_API_ERR_FATAL_THREAD = VPU_API_ERR_BASE - 5, + VPU_API_EOS_STREAM_REACHED = VPU_API_ERR_BASE - 11, + + VPU_API_ERR_BUTT, +} VPU_API_ERR; + +typedef enum VPU_FRAME_ERR { + VPU_FRAME_ERR_UNKNOW = 0x0001, + VPU_FRAME_ERR_UNSUPPORT = 0x0002, + +} VPU_FRAME_ERR; + +typedef struct EncParameter { + RK_S32 width; + RK_S32 height; + RK_S32 rc_mode; /* 0 - CQP mode; 1 - CBR mode; 2 - FIXQP mode*/ + RK_S32 bitRate; /* target bitrate */ + RK_S32 framerate; + RK_S32 qp; + RK_S32 enableCabac; + RK_S32 cabacInitIdc; + RK_S32 format; + RK_S32 intraPicRate; + RK_S32 framerateout; + RK_S32 profileIdc; + RK_S32 levelIdc; + RK_S32 reserved[3]; +} EncParameter_t; + +typedef struct EXtraCfg { + RK_S32 vc1extra_size; + RK_S32 vp6codeid; + RK_S32 tsformat; + RK_U32 ori_vpu; /* use origin vpu framework */ + /* below used in decode */ + RK_U32 mpp_mode; /* use mpp framework */ + RK_U32 bit_depth; /* 8 or 10 bit */ + RK_U32 yuv_format; /* 0:420 1:422 2:444 */ + RK_U32 reserved[16]; +} EXtraCfg_t; + +/** + * @brief vpu function interface + */ +typedef struct VpuCodecContext { + void* vpuApiObj; + + CODEC_TYPE codecType; + OMX_RK_VIDEO_CODINGTYPE videoCoding; + + RK_U32 width; + RK_U32 height; + void *extradata; + RK_S32 extradata_size; + + RK_U8 enableparsing; + + RK_S32 no_thread; + EXtraCfg_t extra_cfg; + + void* private_data; + + /* + ** 1: error state(not working) 0: working + */ + RK_S32 decoder_err; + + + /** + * Allocate and initialize an VpuCodecContext. + * + * @param ctx The context of vpu api, allocated in this function. + * @param extraData The extra data of codec, some codecs need / can + * use extradata like Huffman tables, also live VC1 codec can + * use extradata to initialize itself. + * @param extra_size The size of extra data. + * + * @return 0 for init success, others for failure. + * @note check whether ctx has been allocated success after you do init. + */ + RK_S32 (*init)(struct VpuCodecContext *ctx, RK_U8 *extraData, RK_U32 extra_size); + /** + * @brief both send video stream packet to decoder and get video frame from + * decoder at the same time + * @param ctx The context of vpu codec + * @param pkt[in] Stream to be decoded + * @param aDecOut[out] Decoding frame + * @return 0 for decode success, others for failure. + */ + RK_S32 (*decode)(struct VpuCodecContext *ctx, VideoPacket_t *pkt, DecoderOut_t *aDecOut); + /** + * @brief both send video frame to encoder and get encoded video stream from + * encoder at the same time. + * @param ctx The context of vpu codec + * @param aEncInStrm[in] Frame to be encoded + * @param aEncOut[out] Encoding stream + * @return 0 for encode success, others for failure. + */ + RK_S32 (*encode)(struct VpuCodecContext *ctx, EncInputStream_t *aEncInStrm, EncoderOut_t *aEncOut); + /** + * @brief flush codec while do fast forward playing. + * @param ctx The context of vpu codec + * @return 0 for flush success, others for failure. + */ + RK_S32 (*flush)(struct VpuCodecContext *ctx); + RK_S32 (*control)(struct VpuCodecContext *ctx, VPU_API_CMD cmdType, void* param); + /** + * @brief send video stream packet to decoder only, async interface + * @param ctx The context of vpu codec + * @param pkt Stream to be decoded + * @return 0 for success, others for failure. + */ + RK_S32 (*decode_sendstream)(struct VpuCodecContext *ctx, VideoPacket_t *pkt); + /** + * @brief get video frame from decoder only, async interface + * @param ctx The context of vpu codec + * @param aDecOut Decoding frame + * @return 0 for success, others for failure. + */ + RK_S32 (*decode_getframe)(struct VpuCodecContext *ctx, DecoderOut_t *aDecOut); + /** + * @brief send video frame to encoder only, async interface + * @param ctx The context of vpu codec + * @param aEncInStrm Frame to be encoded + * @return 0 for success, others for failure. + */ + RK_S32 (*encoder_sendframe)(struct VpuCodecContext *ctx, EncInputStream_t *aEncInStrm); + /** + * @brief get encoded video packet from encoder only, async interface + * @param ctx The context of vpu codec + * @param aEncOut Encoding stream + * @return 0 for success, others for failure. + */ + RK_S32 (*encoder_getstream)(struct VpuCodecContext *ctx, EncoderOut_t *aEncOut); +} VpuCodecContext_t; + +/* allocated vpu codec context */ +#ifdef __cplusplus +extern "C" +{ +#endif + +/** + * @brief open context of vpu + * @param ctx pointer of vpu codec context + */ +RK_S32 vpu_open_context(struct VpuCodecContext **ctx); +/** + * @brief close context of vpu + * @param ctx pointer of vpu codec context + */ +RK_S32 vpu_close_context(struct VpuCodecContext **ctx); + +#ifdef __cplusplus +} +#endif + +/* + * vpu_mem api + */ +#define vpu_display_mem_pool_FIELDS \ + RK_S32 (*commit_hdl)(vpu_display_mem_pool *p, RK_S32 hdl, RK_S32 size); \ + void* (*get_free)(vpu_display_mem_pool *p); \ + RK_S32 (*inc_used)(vpu_display_mem_pool *p, void *hdl); \ + RK_S32 (*put_used)(vpu_display_mem_pool *p, void *hdl); \ + RK_S32 (*reset)(vpu_display_mem_pool *p); \ + RK_S32 (*get_unused_num)(vpu_display_mem_pool *p); \ + RK_S32 buff_size;\ + float version; \ + RK_S32 res[18]; + +typedef struct vpu_display_mem_pool vpu_display_mem_pool; + +struct vpu_display_mem_pool { + vpu_display_mem_pool_FIELDS +}; + +#ifdef __cplusplus +extern "C" +{ +#endif + +/* + * vpu memory handle interface + */ +RK_S32 VPUMemJudgeIommu(void); +RK_S32 VPUMallocLinear(VPUMemLinear_t *p, RK_U32 size); +RK_S32 VPUFreeLinear(VPUMemLinear_t *p); +RK_S32 VPUMemDuplicate(VPUMemLinear_t *dst, VPUMemLinear_t *src); +RK_S32 VPUMemLink(VPUMemLinear_t *p); +RK_S32 VPUMemFlush(VPUMemLinear_t *p); +RK_S32 VPUMemClean(VPUMemLinear_t *p); +RK_S32 VPUMemInvalidate(VPUMemLinear_t *p); +RK_S32 VPUMemGetFD(VPUMemLinear_t *p); +RK_S32 VPUMallocLinearFromRender(VPUMemLinear_t *p, RK_U32 size, void *ctx); + +/* + * vpu memory allocator and manager interface + */ +vpu_display_mem_pool* open_vpu_memory_pool(void); +void close_vpu_memory_pool(vpu_display_mem_pool *p); +int create_vpu_memory_pool_allocator(vpu_display_mem_pool **ipool, int num, int size); +void release_vpu_memory_pool_allocator(vpu_display_mem_pool *ipool); + +#ifdef __cplusplus +} +#endif + +#endif /*__VPU_API_H__*/