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			This patch adds MSA (MIPS-SIMD-Arch) optimizations for HEVC bi mc functions (qpel as well as epel) in new file hevc_mc_bi_msa.c Adds new generic macros (needed for this patch) in libavutil/mips/generic_macros_msa.h Adds HEVC specific macros (needed for this patch) in libavcodec/mips/hevc_macros_msa.h Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
		
			
				
	
	
		
			82 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			82 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2015 Manojkumar Bhosale (Manojkumar.Bhosale@imgtec.com)
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|  *
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|  * This file is part of FFmpeg.
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|  *
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|  * FFmpeg is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU Lesser General Public
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|  * License as published by the Free Software Foundation; either
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|  * version 2.1 of the License, or (at your option) any later version.
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|  *
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|  * FFmpeg is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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|  * Lesser General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU Lesser General Public
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|  * License along with FFmpeg; if not, write to the Free Software
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|  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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|  */
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| 
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| #ifndef AVCODEC_MIPS_HEVC_MACROS_MSA_H
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| #define AVCODEC_MIPS_HEVC_MACROS_MSA_H
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| 
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| #define HEVC_PCK_SW_SB2(in0, in1, out)                            \
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| {                                                                 \
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|     v8i16 tmp0_m;                                                 \
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|                                                                   \
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|     tmp0_m = __msa_pckev_h((v8i16) in0, (v8i16) in1);             \
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|     out = (v4i32) __msa_pckev_b((v16i8) tmp0_m, (v16i8) tmp0_m);  \
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| }
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| 
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| #define HEVC_PCK_SW_SB4(in0, in1, in2, in3, out)                  \
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| {                                                                 \
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|     v8i16 tmp0_m, tmp1_m;                                         \
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|                                                                   \
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|     PCKEV_H2_SH(in0, in1, in2, in3, tmp0_m, tmp1_m);              \
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|     out = (v4i32) __msa_pckev_b((v16i8) tmp1_m, (v16i8) tmp0_m);  \
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| }
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| 
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| #define HEVC_PCK_SW_SB8(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1)  \
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| {                                                                            \
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|     v8i16 tmp0_m, tmp1_m, tmp2_m, tmp3_m;                                    \
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|                                                                              \
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|     PCKEV_H4_SH(in0, in1, in2, in3, in4, in5, in6, in7,                      \
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|                 tmp0_m, tmp1_m, tmp2_m, tmp3_m);                             \
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|     PCKEV_B2_SW(tmp1_m, tmp0_m, tmp3_m, tmp2_m, out0, out1);                 \
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| }
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| 
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| #define HEVC_PCK_SW_SB12(in0, in1, in2, in3, in4, in5, in6, in7,   \
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|                          in8, in9, in10, in11, out0, out1, out2)   \
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| {                                                                  \
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|     v8i16 tmp0_m, tmp1_m, tmp2_m, tmp3_m, tmp4_m, tmp5_m;          \
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|                                                                    \
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|     PCKEV_H4_SH(in0, in1, in2, in3, in4, in5, in6, in7,            \
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|                 tmp0_m, tmp1_m, tmp2_m, tmp3_m);                   \
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|     PCKEV_H2_SH(in8, in9, in10, in11, tmp4_m, tmp5_m);             \
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|     PCKEV_B2_SW(tmp1_m, tmp0_m, tmp3_m, tmp2_m, out0, out1);       \
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|     out2 = (v4i32) __msa_pckev_b((v16i8) tmp5_m, (v16i8) tmp4_m);  \
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| }
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| 
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| #define HEVC_FILT_8TAP(in0, in1, in2, in3,                       \
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|                        filt0, filt1, filt2, filt3)               \
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| ( {                                                              \
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|     v4i32 out_m;                                                 \
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|                                                                  \
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|     out_m = __msa_dotp_s_w((v8i16) in0, (v8i16) filt0);          \
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|     out_m = __msa_dpadd_s_w(out_m, (v8i16) in1, (v8i16) filt1);  \
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|     DPADD_SH2_SW(in2, in3, filt2, filt3, out_m, out_m);          \
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|     out_m;                                                       \
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| } )
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| 
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| #define HEVC_FILT_4TAP(in0, in1, filt0, filt1)           \
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| ( {                                                      \
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|     v4i32 out_m;                                         \
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|                                                          \
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|     out_m = __msa_dotp_s_w(in0, (v8i16) filt0);          \
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|     out_m = __msa_dpadd_s_w(out_m, in1, (v8i16) filt1);  \
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|     out_m;                                               \
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| } )
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| 
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| #endif  /* AVCODEC_MIPS_HEVC_MACROS_MSA_H */
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