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https://github.com/nyanmisaka/ffmpeg-rockchip.git
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9d01bf7d66
* qatar/master: Consistently use "cpu_flags" as variable/parameter name for CPU flags Conflicts: libavcodec/x86/dsputil_init.c libavcodec/x86/h264dsp_init.c libavcodec/x86/hpeldsp_init.c libavcodec/x86/motion_est.c libavcodec/x86/mpegvideo.c libavcodec/x86/proresdsp_init.c Merged-by: Michael Niedermayer <michaelni@gmx.at>
157 lines
6.3 KiB
C
157 lines
6.3 KiB
C
/*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "config.h"
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#include "libavutil/attributes.h"
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#include "libavutil/cpu.h"
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#include "libavutil/float_dsp.h"
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#include "cpu.h"
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#include "asm.h"
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void ff_vector_fmul_sse(float *dst, const float *src0, const float *src1,
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int len);
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void ff_vector_fmul_avx(float *dst, const float *src0, const float *src1,
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int len);
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void ff_vector_fmac_scalar_sse(float *dst, const float *src, float mul,
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int len);
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void ff_vector_fmac_scalar_avx(float *dst, const float *src, float mul,
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int len);
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void ff_vector_fmul_scalar_sse(float *dst, const float *src, float mul,
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int len);
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void ff_vector_dmul_scalar_sse2(double *dst, const double *src,
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double mul, int len);
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void ff_vector_dmul_scalar_avx(double *dst, const double *src,
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double mul, int len);
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void ff_vector_fmul_add_sse(float *dst, const float *src0, const float *src1,
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const float *src2, int len);
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void ff_vector_fmul_add_avx(float *dst, const float *src0, const float *src1,
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const float *src2, int len);
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void ff_vector_fmul_reverse_sse(float *dst, const float *src0,
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const float *src1, int len);
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void ff_vector_fmul_reverse_avx(float *dst, const float *src0,
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const float *src1, int len);
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float ff_scalarproduct_float_sse(const float *v1, const float *v2, int order);
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void ff_butterflies_float_sse(float *src0, float *src1, int len);
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#if HAVE_6REGS && HAVE_INLINE_ASM
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static void vector_fmul_window_3dnowext(float *dst, const float *src0,
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const float *src1, const float *win,
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int len)
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{
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x86_reg i = -len * 4;
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x86_reg j = len * 4 - 8;
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__asm__ volatile (
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"1: \n"
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"pswapd (%5, %1), %%mm1 \n"
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"movq (%5, %0), %%mm0 \n"
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"pswapd (%4, %1), %%mm5 \n"
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"movq (%3, %0), %%mm4 \n"
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"movq %%mm0, %%mm2 \n"
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"movq %%mm1, %%mm3 \n"
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"pfmul %%mm4, %%mm2 \n" // src0[len + i] * win[len + i]
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"pfmul %%mm5, %%mm3 \n" // src1[j] * win[len + j]
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"pfmul %%mm4, %%mm1 \n" // src0[len + i] * win[len + j]
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"pfmul %%mm5, %%mm0 \n" // src1[j] * win[len + i]
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"pfadd %%mm3, %%mm2 \n"
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"pfsub %%mm0, %%mm1 \n"
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"pswapd %%mm2, %%mm2 \n"
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"movq %%mm1, (%2, %0) \n"
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"movq %%mm2, (%2, %1) \n"
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"sub $8, %1 \n"
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"add $8, %0 \n"
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"jl 1b \n"
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"femms \n"
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: "+r"(i), "+r"(j)
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: "r"(dst + len), "r"(src0 + len), "r"(src1), "r"(win + len)
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);
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}
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static void vector_fmul_window_sse(float *dst, const float *src0,
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const float *src1, const float *win, int len)
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{
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x86_reg i = -len * 4;
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x86_reg j = len * 4 - 16;
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__asm__ volatile (
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"1: \n"
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"movaps (%5, %1), %%xmm1 \n"
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"movaps (%5, %0), %%xmm0 \n"
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"movaps (%4, %1), %%xmm5 \n"
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"movaps (%3, %0), %%xmm4 \n"
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"shufps $0x1b, %%xmm1, %%xmm1 \n"
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"shufps $0x1b, %%xmm5, %%xmm5 \n"
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"movaps %%xmm0, %%xmm2 \n"
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"movaps %%xmm1, %%xmm3 \n"
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"mulps %%xmm4, %%xmm2 \n" // src0[len + i] * win[len + i]
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"mulps %%xmm5, %%xmm3 \n" // src1[j] * win[len + j]
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"mulps %%xmm4, %%xmm1 \n" // src0[len + i] * win[len + j]
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"mulps %%xmm5, %%xmm0 \n" // src1[j] * win[len + i]
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"addps %%xmm3, %%xmm2 \n"
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"subps %%xmm0, %%xmm1 \n"
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"shufps $0x1b, %%xmm2, %%xmm2 \n"
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"movaps %%xmm1, (%2, %0) \n"
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"movaps %%xmm2, (%2, %1) \n"
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"sub $16, %1 \n"
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"add $16, %0 \n"
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"jl 1b \n"
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: "+r"(i), "+r"(j)
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: "r"(dst + len), "r"(src0 + len), "r"(src1), "r"(win + len)
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);
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}
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#endif /* HAVE_6REGS && HAVE_INLINE_ASM */
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av_cold void ff_float_dsp_init_x86(AVFloatDSPContext *fdsp)
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{
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int cpu_flags = av_get_cpu_flags();
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#if HAVE_6REGS && HAVE_INLINE_ASM
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if (INLINE_AMD3DNOWEXT(cpu_flags)) {
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fdsp->vector_fmul_window = vector_fmul_window_3dnowext;
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}
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if (INLINE_SSE(cpu_flags)) {
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fdsp->vector_fmul_window = vector_fmul_window_sse;
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}
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#endif
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if (EXTERNAL_SSE(cpu_flags)) {
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fdsp->vector_fmul = ff_vector_fmul_sse;
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fdsp->vector_fmac_scalar = ff_vector_fmac_scalar_sse;
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fdsp->vector_fmul_scalar = ff_vector_fmul_scalar_sse;
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fdsp->vector_fmul_add = ff_vector_fmul_add_sse;
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fdsp->vector_fmul_reverse = ff_vector_fmul_reverse_sse;
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fdsp->scalarproduct_float = ff_scalarproduct_float_sse;
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fdsp->butterflies_float = ff_butterflies_float_sse;
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}
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if (EXTERNAL_SSE2(cpu_flags)) {
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fdsp->vector_dmul_scalar = ff_vector_dmul_scalar_sse2;
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}
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if (EXTERNAL_AVX(cpu_flags)) {
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fdsp->vector_fmul = ff_vector_fmul_avx;
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fdsp->vector_fmac_scalar = ff_vector_fmac_scalar_avx;
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fdsp->vector_dmul_scalar = ff_vector_dmul_scalar_avx;
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fdsp->vector_fmul_add = ff_vector_fmul_add_avx;
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fdsp->vector_fmul_reverse = ff_vector_fmul_reverse_avx;
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}
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}
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