mirror of
https://github.com/nyanmisaka/ffmpeg-rockchip.git
synced 2025-11-01 04:53:04 +08:00
377e5db3db
1. no longer use the register names directly and optimized code format
2. to be compatible with O32, specify type of address variable with mips_reg and handle the address variable with PTR_ operator
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
99 lines
5.0 KiB
C
99 lines
5.0 KiB
C
/*
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* Loongson SIMD optimized pixblockdsp
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*
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* Copyright (c) 2015 Loongson Technology Corporation Limited
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* Copyright (c) 2015 Zhou Xiaoyong <zhouxiaoyong@loongson.cn>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "pixblockdsp_mips.h"
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#include "libavutil/mips/asmdefs.h"
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void ff_get_pixels_8_mmi(int16_t *av_restrict block, const uint8_t *pixels,
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ptrdiff_t line_size)
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{
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double ftmp[6];
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mips_reg tmp[2];
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__asm__ volatile (
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"li %[tmp1], 0x08 \n\t"
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"move %[tmp0], $0 \n\t"
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"xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t"
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"1: \n\t"
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"gsldlc1 %[ftmp1], 0x07(%[pixels]) \n\t"
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"gsldrc1 %[ftmp1], 0x00(%[pixels]) \n\t"
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"punpcklbh %[ftmp2], %[ftmp1], %[ftmp0] \n\t"
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"punpckhbh %[ftmp5], %[ftmp1], %[ftmp0] \n\t"
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"gssdxc1 %[ftmp2], 0x00(%[block], %[tmp0]) \n\t"
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"gssdxc1 %[ftmp5], 0x08(%[block], %[tmp0]) \n\t"
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PTR_ADDI "%[tmp1], %[tmp1], -0x01 \n\t"
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PTR_ADDIU "%[tmp0], %[tmp0], 0x10 \n\t"
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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"bnez %[tmp1], 1b \n\t"
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
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[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
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[tmp0]"=&r"(tmp[0]), [tmp1]"=&r"(tmp[1]),
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[pixels]"+&r"(pixels)
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: [block]"r"((mips_reg)block), [line_size]"r"((mips_reg)line_size)
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: "memory"
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);
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}
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void ff_diff_pixels_mmi(int16_t *av_restrict block, const uint8_t *src1,
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const uint8_t *src2, int stride)
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{
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double ftmp[5];
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mips_reg tmp[1];
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__asm__ volatile (
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"li %[tmp0], 0x08 \n\t"
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"xor %[ftmp4], %[ftmp4], %[ftmp4] \n\t"
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"1: \n\t"
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"gsldlc1 %[ftmp0], 0x07(%[src1]) \n\t"
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"gsldrc1 %[ftmp0], 0x00(%[src1]) \n\t"
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"or %[ftmp1], %[ftmp0], %[ftmp0] \n\t"
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"gsldlc1 %[ftmp2], 0x07(%[src2]) \n\t"
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"gsldrc1 %[ftmp2], 0x00(%[src2]) \n\t"
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"or %[ftmp3], %[ftmp2], %[ftmp2] \n\t"
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"punpcklbh %[ftmp0], %[ftmp0], %[ftmp4] \n\t"
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"punpckhbh %[ftmp1], %[ftmp1], %[ftmp4] \n\t"
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"punpcklbh %[ftmp2], %[ftmp2], %[ftmp4] \n\t"
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"punpckhbh %[ftmp3], %[ftmp3], %[ftmp4] \n\t"
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"psubh %[ftmp0], %[ftmp0], %[ftmp2] \n\t"
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"psubh %[ftmp1], %[ftmp1], %[ftmp3] \n\t"
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"gssdlc1 %[ftmp0], 0x07(%[block]) \n\t"
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"gssdrc1 %[ftmp0], 0x00(%[block]) \n\t"
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"gssdlc1 %[ftmp1], 0x0f(%[block]) \n\t"
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"gssdrc1 %[ftmp1], 0x08(%[block]) \n\t"
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PTR_ADDI "%[tmp0], %[tmp0], -0x01 \n\t"
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PTR_ADDIU "%[block], %[block], 0x10 \n\t"
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PTR_ADDU "%[src1], %[src1], %[stride] \n\t"
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PTR_ADDU "%[src2], %[src2], %[stride] \n\t"
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"bgtz %[tmp0], 1b \n\t"
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
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[ftmp4]"=&f"(ftmp[4]),
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[tmp0]"=&r"(tmp[0]),
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[block]"+&r"(block), [src1]"+&r"(src1),
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[src2]"+&r"(src2)
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: [stride]"r"((mips_reg)stride)
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: "memory"
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);
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}
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