mirror of
https://github.com/nyanmisaka/ffmpeg-rockchip.git
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a3e572d96f
Changing details as following: 1. Remove the local variable 'out_m' in 'CLIP_SH' and store the result in source vector. 2. Refine the implementation of macro 'CLIP_SH_0_255' and 'CLIP_SW_0_255'. Performance of VP8 decoding has speed up about 1.1%(from 7.03x to 7.11x). Performance of H264 decoding has speed up about 0.5%(from 4.35x to 4.37x). Performance of Theora decoding has speed up about 0.7%(from 5.79x to 5.83x). 3. Remove redundant macro 'CLIP_SH/Wn_0_255_MAX_SATU' and use 'CLIP_SH/Wn_0_255' instead, because there are no difference in the effect of this two macros. Reviewed-by: Shiyou Yin <yinshiyou-hf@loongson.cn> Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
147 lines
5.4 KiB
C
147 lines
5.4 KiB
C
/*
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* Copyright (c) 2015 Manojkumar Bhosale (Manojkumar.Bhosale@imgtec.com)
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/mips/generic_macros_msa.h"
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#include "idctdsp_mips.h"
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static void put_pixels_clamped_msa(const int16_t *block, uint8_t *pixels,
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int32_t stride)
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{
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uint64_t in0_d, in1_d, in2_d, in3_d, in4_d, in5_d, in6_d, in7_d;
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v8i16 in0, in1, in2, in3, in4, in5, in6, in7;
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LD_SH8(block, 8, in0, in1, in2, in3, in4, in5, in6, in7);
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CLIP_SH8_0_255(in0, in1, in2, in3, in4, in5, in6, in7);
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PCKEV_B4_SH(in0, in0, in1, in1, in2, in2, in3, in3, in0, in1, in2, in3);
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PCKEV_B4_SH(in4, in4, in5, in5, in6, in6, in7, in7, in4, in5, in6, in7);
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in0_d = __msa_copy_u_d((v2i64) in0, 0);
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in1_d = __msa_copy_u_d((v2i64) in1, 0);
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in2_d = __msa_copy_u_d((v2i64) in2, 0);
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in3_d = __msa_copy_u_d((v2i64) in3, 0);
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in4_d = __msa_copy_u_d((v2i64) in4, 0);
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in5_d = __msa_copy_u_d((v2i64) in5, 0);
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in6_d = __msa_copy_u_d((v2i64) in6, 0);
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in7_d = __msa_copy_u_d((v2i64) in7, 0);
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SD4(in0_d, in1_d, in2_d, in3_d, pixels, stride);
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pixels += 4 * stride;
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SD4(in4_d, in5_d, in6_d, in7_d, pixels, stride);
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}
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static void put_signed_pixels_clamped_msa(const int16_t *block, uint8_t *pixels,
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int32_t stride)
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{
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uint64_t in0_d, in1_d, in2_d, in3_d, in4_d, in5_d, in6_d, in7_d;
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v8i16 in0, in1, in2, in3, in4, in5, in6, in7;
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LD_SH8(block, 8, in0, in1, in2, in3, in4, in5, in6, in7);
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in0 += 128;
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in1 += 128;
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in2 += 128;
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in3 += 128;
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in4 += 128;
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in5 += 128;
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in6 += 128;
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in7 += 128;
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CLIP_SH8_0_255(in0, in1, in2, in3, in4, in5, in6, in7);
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PCKEV_B4_SH(in0, in0, in1, in1, in2, in2, in3, in3, in0, in1, in2, in3);
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PCKEV_B4_SH(in4, in4, in5, in5, in6, in6, in7, in7, in4, in5, in6, in7);
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in0_d = __msa_copy_u_d((v2i64) in0, 0);
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in1_d = __msa_copy_u_d((v2i64) in1, 0);
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in2_d = __msa_copy_u_d((v2i64) in2, 0);
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in3_d = __msa_copy_u_d((v2i64) in3, 0);
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in4_d = __msa_copy_u_d((v2i64) in4, 0);
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in5_d = __msa_copy_u_d((v2i64) in5, 0);
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in6_d = __msa_copy_u_d((v2i64) in6, 0);
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in7_d = __msa_copy_u_d((v2i64) in7, 0);
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SD4(in0_d, in1_d, in2_d, in3_d, pixels, stride);
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pixels += 4 * stride;
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SD4(in4_d, in5_d, in6_d, in7_d, pixels, stride);
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}
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static void add_pixels_clamped_msa(const int16_t *block, uint8_t *pixels,
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int32_t stride)
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{
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uint64_t in0_d, in1_d, in2_d, in3_d, in4_d, in5_d, in6_d, in7_d;
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v8i16 in0, in1, in2, in3, in4, in5, in6, in7;
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v16u8 pix_in0, pix_in1, pix_in2, pix_in3;
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v16u8 pix_in4, pix_in5, pix_in6, pix_in7;
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v8u16 pix0, pix1, pix2, pix3, pix4, pix5, pix6, pix7;
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v8i16 zero = { 0 };
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LD_SH8(block, 8, in0, in1, in2, in3, in4, in5, in6, in7);
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LD_UB8(pixels, stride, pix_in0, pix_in1, pix_in2,
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pix_in3, pix_in4, pix_in5, pix_in6, pix_in7);
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ILVR_B4_UH(zero, pix_in0, zero, pix_in1, zero, pix_in2, zero, pix_in3,
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pix0, pix1, pix2, pix3);
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ILVR_B4_UH(zero, pix_in4, zero, pix_in5, zero, pix_in6, zero, pix_in7,
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pix4, pix5, pix6, pix7);
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in0 += (v8i16) pix0;
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in1 += (v8i16) pix1;
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in2 += (v8i16) pix2;
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in3 += (v8i16) pix3;
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in4 += (v8i16) pix4;
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in5 += (v8i16) pix5;
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in6 += (v8i16) pix6;
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in7 += (v8i16) pix7;
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CLIP_SH8_0_255(in0, in1, in2, in3, in4, in5, in6, in7);
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PCKEV_B4_SH(in0, in0, in1, in1, in2, in2, in3, in3, in0, in1, in2, in3);
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PCKEV_B4_SH(in4, in4, in5, in5, in6, in6, in7, in7, in4, in5, in6, in7);
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in0_d = __msa_copy_u_d((v2i64) in0, 0);
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in1_d = __msa_copy_u_d((v2i64) in1, 0);
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in2_d = __msa_copy_u_d((v2i64) in2, 0);
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in3_d = __msa_copy_u_d((v2i64) in3, 0);
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in4_d = __msa_copy_u_d((v2i64) in4, 0);
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in5_d = __msa_copy_u_d((v2i64) in5, 0);
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in6_d = __msa_copy_u_d((v2i64) in6, 0);
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in7_d = __msa_copy_u_d((v2i64) in7, 0);
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SD4(in0_d, in1_d, in2_d, in3_d, pixels, stride);
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pixels += 4 * stride;
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SD4(in4_d, in5_d, in6_d, in7_d, pixels, stride);
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}
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void ff_put_pixels_clamped_msa(const int16_t *block,
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uint8_t *av_restrict pixels,
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ptrdiff_t line_size)
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{
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put_pixels_clamped_msa(block, pixels, line_size);
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}
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void ff_put_signed_pixels_clamped_msa(const int16_t *block,
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uint8_t *av_restrict pixels,
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ptrdiff_t line_size)
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{
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put_signed_pixels_clamped_msa(block, pixels, line_size);
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}
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void ff_add_pixels_clamped_msa(const int16_t *block,
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uint8_t *av_restrict pixels,
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ptrdiff_t line_size)
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{
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add_pixels_clamped_msa(block, pixels, line_size);
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}
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