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https://github.com/nyanmisaka/ffmpeg-rockchip.git
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avcodec/mips: MSA (MIPS-SIMD-Arch) optimizations for AVC qpel functions
This patch adds MSA (MIPS-SIMD-Arch) optimizations for AVC qpel functions in new file h264qpel_msa.c Adds new generic macros (needed for this patch) in libavutil/mips/generic_macros_msa.h Added const to local static array. Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
This commit is contained in:
Shivraj Patil
committed by
Michael Niedermayer
Michael Niedermayer
parent
b8ba2d3915
commit
178ba1fd03
@@ -883,6 +883,14 @@
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}
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#define VSHF_H2_SH(...) VSHF_H2(v8i16, __VA_ARGS__)
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#define VSHF_H3(RTYPE, in0, in1, in2, in3, in4, in5, mask0, mask1, mask2, \
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out0, out1, out2) \
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{ \
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VSHF_H2(RTYPE, in0, in1, in2, in3, mask0, mask1, out0, out1); \
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out2 = (RTYPE) __msa_vshf_h((v8i16) mask2, (v8i16) in5, (v8i16) in4); \
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}
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#define VSHF_H3_SH(...) VSHF_H3(v8i16, __VA_ARGS__)
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/* Description : Shuffle byte vector elements as per mask vector
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Arguments : Inputs - in0, in1, in2, in3, mask0, mask1
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Outputs - out0, out1
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@@ -1107,6 +1115,29 @@
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out_m; \
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} )
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/* Description : Horizontal addition of signed byte vector elements
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Arguments : Inputs - in0, in1
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Outputs - out0, out1
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Return Type - as per RTYPE
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Details : Each signed odd byte element from 'in0' is added to
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even signed byte element from 'in0' (pairwise) and the
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halfword result is stored in 'out0'
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*/
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#define HADD_SB2(RTYPE, in0, in1, out0, out1) \
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{ \
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out0 = (RTYPE) __msa_hadd_s_h((v16i8) in0, (v16i8) in0); \
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out1 = (RTYPE) __msa_hadd_s_h((v16i8) in1, (v16i8) in1); \
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}
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#define HADD_SB2_SH(...) HADD_SB2(v8i16, __VA_ARGS__)
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#define HADD_SB4(RTYPE, in0, in1, in2, in3, out0, out1, out2, out3) \
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{ \
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HADD_SB2(RTYPE, in0, in1, out0, out1); \
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HADD_SB2(RTYPE, in2, in3, out2, out3); \
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}
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#define HADD_SB4_UH(...) HADD_SB4(v8u16, __VA_ARGS__)
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#define HADD_SB4_SH(...) HADD_SB4(v8i16, __VA_ARGS__)
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/* Description : Horizontal addition of unsigned byte vector elements
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Arguments : Inputs - in0, in1
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Outputs - out0, out1
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@@ -1212,6 +1243,8 @@
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out1 = (RTYPE) __msa_ilvev_h((v8i16) in3, (v8i16) in2); \
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}
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#define ILVEV_H2_UB(...) ILVEV_H2(v16u8, __VA_ARGS__)
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#define ILVEV_H2_SH(...) ILVEV_H2(v8i16, __VA_ARGS__)
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#define ILVEV_H2_SW(...) ILVEV_H2(v4i32, __VA_ARGS__)
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/* Description : Interleave even word elements from vectors
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Arguments : Inputs - in0, in1, in2, in3
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@@ -1738,6 +1771,24 @@
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}
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#define PCKEV_D4_UB(...) PCKEV_D4(v16u8, __VA_ARGS__)
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/* Description : Pack odd double word elements of vector pairs
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Arguments : Inputs - in0, in1
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Outputs - out0, out1
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Return Type - as per RTYPE
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Details : As operation is on same input 'in0' vector, index 1 double word
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element is overwritten to index 0 and result is written to out0
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As operation is on same input 'in1' vector, index 1 double word
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element is overwritten to index 0 and result is written to out1
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*/
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#define PCKOD_D2(RTYPE, in0, in1, in2, in3, out0, out1) \
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{ \
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out0 = (RTYPE) __msa_pckod_d((v2i64) in0, (v2i64) in1); \
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out1 = (RTYPE) __msa_pckod_d((v2i64) in2, (v2i64) in3); \
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}
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#define PCKOD_D2_UB(...) PCKOD_D2(v16u8, __VA_ARGS__)
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#define PCKOD_D2_SH(...) PCKOD_D2(v8i16, __VA_ARGS__)
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#define PCKOD_D2_SD(...) PCKOD_D2(v2i64, __VA_ARGS__)
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/* Description : Each byte element is logically xor'ed with immediate 128
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Arguments : Inputs - in0, in1
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Outputs - in0, in1 (in-place)
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@@ -2336,6 +2387,37 @@
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out3 = (v4i32) __msa_ilvl_d((v2i64) s3_m, (v2i64) s1_m); \
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}
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/* Description : Average rounded byte elements from pair of vectors and store
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8x4 byte block in destination memory
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Arguments : Inputs - in0, in1, in2, in3, in4, in5, in6, in7, pdst, stride
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Outputs -
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Return Type -
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Details : Each byte element from input vector pair 'in0' and 'in1' are
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average rounded (a + b + 1)/2 and stored in 'tmp0_m'
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Each byte element from input vector pair 'in2' and 'in3' are
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average rounded (a + b + 1)/2 and stored in 'tmp1_m'
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Each byte element from input vector pair 'in4' and 'in5' are
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average rounded (a + b + 1)/2 and stored in 'tmp2_m'
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Each byte element from input vector pair 'in6' and 'in7' are
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average rounded (a + b + 1)/2 and stored in 'tmp3_m'
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The half vector results from all 4 vectors are stored in
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destination memory as 8x4 byte block
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*/
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#define AVER_ST8x4_UB(in0, in1, in2, in3, in4, in5, in6, in7, pdst, stride) \
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{ \
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uint64_t out0_m, out1_m, out2_m, out3_m; \
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v16u8 tp0_m, tp1_m, tp2_m, tp3_m; \
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\
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AVER_UB4_UB(in0, in1, in2, in3, in4, in5, in6, in7, \
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tp0_m, tp1_m, tp2_m, tp3_m); \
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\
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out0_m = __msa_copy_u_d((v2i64) tp0_m, 0); \
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out1_m = __msa_copy_u_d((v2i64) tp1_m, 0); \
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out2_m = __msa_copy_u_d((v2i64) tp2_m, 0); \
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out3_m = __msa_copy_u_d((v2i64) tp3_m, 0); \
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SD4(out0_m, out1_m, out2_m, out3_m, pdst, stride); \
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}
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/* Description : Add block 4x4
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Arguments : Inputs - in0, in1, in2, in3, pdst, stride
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Outputs -
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@@ -2368,6 +2450,30 @@
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SW4(out0_m, out1_m, out2_m, out3_m, pdst, stride); \
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}
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/* Description : Dot product and addition of 3 signed halfword input vectors
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Arguments : Inputs - in0, in1, in2, coeff0, coeff1, coeff2
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Outputs - out0_m
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Return Type - signed halfword
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Details : Dot product of 'in0' with 'coeff0'
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Dot product of 'in1' with 'coeff1'
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Dot product of 'in2' with 'coeff2'
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Addition of all the 3 vector results
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out0_m = (in0 * coeff0) + (in1 * coeff1) + (in2 * coeff2)
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*/
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#define DPADD_SH3_SH(in0, in1, in2, coeff0, coeff1, coeff2) \
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( { \
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v8i16 tmp1_m; \
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v8i16 out0_m; \
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\
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out0_m = __msa_dotp_s_h((v16i8) in0, (v16i8) coeff0); \
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out0_m = __msa_dpadd_s_h(out0_m, (v16i8) in1, (v16i8) coeff1); \
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tmp1_m = __msa_dotp_s_h((v16i8) in2, (v16i8) coeff2); \
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out0_m = __msa_adds_s_h(out0_m, tmp1_m); \
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\
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out0_m; \
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} )
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/* Description : Pack even elements of input vectors & xor with 128
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Arguments : Inputs - in0, in1
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Outputs - out_m
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@@ -2384,6 +2490,24 @@
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out_m; \
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} )
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/* Description : Converts inputs to unsigned bytes, interleave, average & store
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as 8x4 unsigned byte block
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Arguments : Inputs - in0, in1, in2, in3, dst0, dst1, dst2, dst3,
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pdst, stride
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*/
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#define CONVERT_UB_AVG_ST8x4_UB(in0, in1, in2, in3, \
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dst0, dst1, dst2, dst3, pdst, stride) \
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{ \
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v16u8 tmp0_m, tmp1_m, tmp2_m, tmp3_m; \
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uint8_t *pdst_m = (uint8_t *) (pdst); \
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\
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tmp0_m = PCKEV_XORI128_UB(in0, in1); \
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tmp1_m = PCKEV_XORI128_UB(in2, in3); \
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ILVR_D2_UB(dst1, dst0, dst3, dst2, tmp2_m, tmp3_m); \
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AVER_UB2_UB(tmp0_m, tmp2_m, tmp1_m, tmp3_m, tmp0_m, tmp1_m); \
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ST8x4_UB(tmp0_m, tmp1_m, pdst_m, stride); \
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}
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/* Description : Pack even byte elements, extract 0 & 2 index words from pair
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of results and store 4 words in destination memory as per
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stride
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