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Fix outputs order of tensorrt (#18)
* fix trt output order * Update trt_backend.cc
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@@ -28,8 +28,8 @@
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#include "fastdeploy/backends/tensorrt/common/parserOnnxConfig.h"
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#include "fastdeploy/backends/tensorrt/common/sampleUtils.h"
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#include "NvInfer.h"
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#include <cuda_runtime_api.h>
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#include "NvInfer.h"
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namespace fastdeploy {
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using namespace samplesCommon;
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@@ -69,7 +69,7 @@ class TrtBackend : public BaseBackend {
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bool InitFromOnnx(const std::string& model_file,
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const TrtBackendOption& option = TrtBackendOption(),
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bool from_memory_buffer = false);
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bool InitFromTrt(const std::string& trt_engine_file,
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bool InitFromTrt(const std::string& trt_engine_file,
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const TrtBackendOption& option = TrtBackendOption());
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bool Infer(std::vector<FDTensor>& inputs, std::vector<FDTensor>* outputs);
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@@ -89,6 +89,13 @@ class TrtBackend : public BaseBackend {
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std::map<std::string, DeviceBuffer> inputs_buffer_;
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std::map<std::string, DeviceBuffer> outputs_buffer_;
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// Sometimes while the number of outputs > 1
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// the output order of tensorrt may not be same
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// with the original onnx model
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// So this parameter will record to origin outputs
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// order, to help recover the rigt order
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std::map<std::string, int> outputs_order_;
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void GetInputOutputInfo();
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void AllocateBufferInDynamicShape(const std::vector<FDTensor>& inputs,
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std::vector<FDTensor>* outputs);
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@@ -96,4 +103,4 @@ class TrtBackend : public BaseBackend {
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const TrtBackendOption& option);
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};
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} // namespace fastdeploy
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} // namespace fastdeploy
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