diff --git a/.github/update.log b/.github/update.log index 8715092019..5cc4e6589c 100644 --- a/.github/update.log +++ b/.github/update.log @@ -1036,3 +1036,4 @@ Update On Thu Jun 19 20:36:38 CEST 2025 Update On Fri Jun 20 20:38:08 CEST 2025 Update On Sat Jun 21 20:35:11 CEST 2025 Update On Sun Jun 22 20:36:41 CEST 2025 +Update On Mon Jun 23 20:37:49 CEST 2025 diff --git a/clash-nyanpasu/.github/workflows/publish.yml b/clash-nyanpasu/.github/workflows/publish.yml index fbf0940f44..afbd440500 100644 --- a/clash-nyanpasu/.github/workflows/publish.yml +++ b/clash-nyanpasu/.github/workflows/publish.yml @@ -81,7 +81,7 @@ jobs: GITHUB_REPO: ${{ github.repository }} GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} - name: Commit changes - uses: stefanzweifel/git-auto-commit-action@v5 + uses: stefanzweifel/git-auto-commit-action@v6 with: commit_message: 'chore: bump version to v${{ steps.update-version.outputs.version }}' commit_user_name: 'github-actions[bot]' diff --git a/clash-nyanpasu/frontend/nyanpasu/package.json b/clash-nyanpasu/frontend/nyanpasu/package.json index 6cf0664e4c..b94151393b 100644 --- a/clash-nyanpasu/frontend/nyanpasu/package.json +++ b/clash-nyanpasu/frontend/nyanpasu/package.json @@ -58,9 +58,9 @@ "@iconify/json": "2.2.351", "@monaco-editor/react": "4.7.0", "@tanstack/react-query": "5.81.2", - "@tanstack/react-router": "1.121.27", - "@tanstack/react-router-devtools": "1.121.27", - "@tanstack/router-plugin": "1.121.29", + "@tanstack/react-router": "1.121.34", + "@tanstack/react-router-devtools": "1.121.34", + "@tanstack/router-plugin": "1.121.34", "@tauri-apps/plugin-clipboard-manager": "2.2.2", "@tauri-apps/plugin-dialog": "2.2.2", "@tauri-apps/plugin-fs": "2.3.0", diff --git a/clash-nyanpasu/package.json b/clash-nyanpasu/package.json index b04cb479f0..8ec0d4aaa6 100644 --- a/clash-nyanpasu/package.json +++ b/clash-nyanpasu/package.json @@ -92,13 +92,13 @@ "postcss-html": "1.8.0", "postcss-import": "16.1.1", "postcss-scss": "4.0.9", - "prettier": "3.5.3", + "prettier": "3.6.0", "prettier-plugin-tailwindcss": "0.6.13", "prettier-plugin-toml": "2.0.5", "react-devtools": "6.1.2", "stylelint": "16.21.0", "stylelint-config-html": "1.1.0", - "stylelint-config-recess-order": "6.1.0", + "stylelint-config-recess-order": "7.1.0", "stylelint-config-standard": "38.0.0", "stylelint-declaration-block-no-ignored-properties": "2.8.0", "stylelint-order": "7.0.0", @@ -108,7 +108,7 @@ "typescript": "5.8.3", "typescript-eslint": "8.34.1" }, - "packageManager": "pnpm@10.12.1", + "packageManager": "pnpm@10.12.2", "engines": { "node": "22.16.0" }, diff --git a/clash-nyanpasu/pnpm-lock.yaml b/clash-nyanpasu/pnpm-lock.yaml index 65c9c87e97..b9fde2ff94 100644 --- a/clash-nyanpasu/pnpm-lock.yaml +++ b/clash-nyanpasu/pnpm-lock.yaml @@ -33,7 +33,7 @@ importers: version: 3.3.1 '@ianvs/prettier-plugin-sort-imports': specifier: 4.4.2 - version: 4.4.2(prettier@3.5.3) + version: 4.4.2(prettier@3.6.0) '@tauri-apps/cli': specifier: 2.5.0 version: 2.5.0 @@ -84,7 +84,7 @@ importers: version: 17.20.0(eslint@9.29.0(jiti@2.4.2))(typescript@5.8.3) eslint-plugin-prettier: specifier: 5.5.0 - version: 5.5.0(eslint-config-prettier@10.1.5(eslint@9.29.0(jiti@2.4.2)))(eslint@9.29.0(jiti@2.4.2))(prettier@3.5.3) + version: 5.5.0(eslint-config-prettier@10.1.5(eslint@9.29.0(jiti@2.4.2)))(eslint@9.29.0(jiti@2.4.2))(prettier@3.6.0) eslint-plugin-promise: specifier: 7.2.1 version: 7.2.1(eslint@9.29.0(jiti@2.4.2)) @@ -125,14 +125,14 @@ importers: specifier: 4.0.9 version: 4.0.9(postcss@8.5.6) prettier: - specifier: 3.5.3 - version: 3.5.3 + specifier: 3.6.0 + version: 3.6.0 prettier-plugin-tailwindcss: specifier: 0.6.13 - version: 0.6.13(@ianvs/prettier-plugin-sort-imports@4.4.2(prettier@3.5.3))(@trivago/prettier-plugin-sort-imports@4.3.0(prettier@3.5.3))(prettier@3.5.3) + version: 0.6.13(@ianvs/prettier-plugin-sort-imports@4.4.2(prettier@3.6.0))(@trivago/prettier-plugin-sort-imports@4.3.0(prettier@3.6.0))(prettier@3.6.0) prettier-plugin-toml: specifier: 2.0.5 - version: 2.0.5(prettier@3.5.3) + version: 2.0.5(prettier@3.6.0) react-devtools: specifier: 6.1.2 version: 6.1.2(bufferutil@4.0.8)(utf-8-validate@5.0.10) @@ -143,8 +143,8 @@ importers: specifier: 1.1.0 version: 1.1.0(postcss-html@1.8.0)(stylelint@16.21.0(typescript@5.8.3)) stylelint-config-recess-order: - specifier: 6.1.0 - version: 6.1.0(stylelint@16.21.0(typescript@5.8.3)) + specifier: 7.1.0 + version: 7.1.0(stylelint-order@7.0.0(stylelint@16.21.0(typescript@5.8.3)))(stylelint@16.21.0(typescript@5.8.3)) stylelint-config-standard: specifier: 38.0.0 version: 38.0.0(stylelint@16.21.0(typescript@5.8.3)) @@ -247,7 +247,7 @@ importers: version: 4.1.10 '@tanstack/router-zod-adapter': specifier: 1.81.5 - version: 1.81.5(@tanstack/react-router@1.121.27(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(zod@3.25.67) + version: 1.81.5(@tanstack/react-router@1.121.34(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(zod@3.25.67) '@tauri-apps/api': specifier: 2.5.0 version: 2.5.0 @@ -346,14 +346,14 @@ importers: specifier: 5.81.2 version: 5.81.2(react@19.1.0) '@tanstack/react-router': - specifier: 1.121.27 - version: 1.121.27(react-dom@19.1.0(react@19.1.0))(react@19.1.0) + specifier: 1.121.34 + version: 1.121.34(react-dom@19.1.0(react@19.1.0))(react@19.1.0) '@tanstack/react-router-devtools': - specifier: 1.121.27 - version: 1.121.27(@tanstack/react-router@1.121.27(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(@tanstack/router-core@1.121.27)(csstype@3.1.3)(react-dom@19.1.0(react@19.1.0))(react@19.1.0)(solid-js@1.9.5)(tiny-invariant@1.3.3) + specifier: 1.121.34 + version: 1.121.34(@tanstack/react-router@1.121.34(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(@tanstack/router-core@1.121.34)(csstype@3.1.3)(react-dom@19.1.0(react@19.1.0))(react@19.1.0)(solid-js@1.9.5)(tiny-invariant@1.3.3) '@tanstack/router-plugin': - specifier: 1.121.29 - version: 1.121.29(@tanstack/react-router@1.121.27(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(vite@6.3.5(@types/node@22.15.32)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.30.1)(sass-embedded@1.89.2)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.20.3)(yaml@2.8.0)) + specifier: 1.121.34 + version: 1.121.34(@tanstack/react-router@1.121.34(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(vite@6.3.5(@types/node@22.15.32)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.30.1)(sass-embedded@1.89.2)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.20.3)(yaml@2.8.0)) '@tauri-apps/plugin-clipboard-manager': specifier: 2.2.2 version: 2.2.2 @@ -440,7 +440,7 @@ importers: version: 3.2.2(vite@6.3.5(@types/node@22.15.32)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.30.1)(sass-embedded@1.89.2)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.20.3)(yaml@2.8.0)) vite-plugin-sass-dts: specifier: 1.3.31 - version: 1.3.31(postcss@8.5.6)(prettier@3.5.3)(sass-embedded@1.89.2)(vite@6.3.5(@types/node@22.15.32)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.30.1)(sass-embedded@1.89.2)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.20.3)(yaml@2.8.0)) + version: 1.3.31(postcss@8.5.6)(prettier@3.6.0)(sass-embedded@1.89.2)(vite@6.3.5(@types/node@22.15.32)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.30.1)(sass-embedded@1.89.2)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.20.3)(yaml@2.8.0)) vite-plugin-svgr: specifier: 4.3.0 version: 4.3.0(rollup@4.40.0)(typescript@5.8.3)(vite@6.3.5(@types/node@22.15.32)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.30.1)(sass-embedded@1.89.2)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.20.3)(yaml@2.8.0)) @@ -2845,8 +2845,8 @@ packages: '@tailwindcss/postcss@4.1.10': resolution: {integrity: sha512-B+7r7ABZbkXJwpvt2VMnS6ujcDoR2OOcFaqrLIo1xbcdxje4Vf+VgJdBzNNbrAjBj/rLZ66/tlQ1knIGNLKOBQ==} - '@tanstack/history@1.121.21': - resolution: {integrity: sha512-8BFGA7fpElicM1aEfZRDoEiWgMrNb/fVuJjSKv+nYtbp7jdtqt57fROi/uDGf6PLlgJbMoT3GWxqveZisOUEKA==} + '@tanstack/history@1.121.34': + resolution: {integrity: sha512-YL8dGi5ZU+xvtav2boRlw4zrRghkY6hvdcmHhA0RGSJ/CBgzv+cbADW9eYJLx74XMZvIQ1pp6VMbrpXnnM5gHA==} engines: {node: '>=12'} '@tanstack/match-sorter-utils@8.19.4': @@ -2861,16 +2861,16 @@ packages: peerDependencies: react: ^18 || ^19 - '@tanstack/react-router-devtools@1.121.27': - resolution: {integrity: sha512-hPOI1FGVWSf9U70eW7NevF/i68Id44KLTM7YjKtDcQi+MWEoxqvXiyXrl/HUAm1IBqLNwO5ktnEdcDuAG/efDg==} + '@tanstack/react-router-devtools@1.121.34': + resolution: {integrity: sha512-rqbgqTT5QaxeEX5oEI3K/9kDRRhCq3daszjZIWEWa9KKA8Fo4cE9F5OIQeXKdFu7QrIlHurlE7HB2uLkjgVviw==} engines: {node: '>=12'} peerDependencies: - '@tanstack/react-router': ^1.121.27 + '@tanstack/react-router': ^1.121.34 react: '>=18.0.0 || >=19.0.0' react-dom: '>=18.0.0 || >=19.0.0' - '@tanstack/react-router@1.121.27': - resolution: {integrity: sha512-zuLy8IC5fF52fzTTG61nMW2pMoK8LW4kSpeW21deb4gx/kMFKDOaYTe/soT63CO9/x0X6TYcbfjRj67038J0pQ==} + '@tanstack/react-router@1.121.34': + resolution: {integrity: sha512-nQYUXh459/YX9tDOGUqBb8yCiUw4JjcCf1o9wtb9fMxy3hnP0iQNU2TeV1A1N4KCGKXV3ZzkhpBb6sJe3kd43Q==} engines: {node: '>=12'} peerDependencies: react: '>=18.0.0 || >=19.0.0' @@ -2895,15 +2895,15 @@ packages: react: ^16.8.0 || ^17.0.0 || ^18.0.0 || ^19.0.0 react-dom: ^16.8.0 || ^17.0.0 || ^18.0.0 || ^19.0.0 - '@tanstack/router-core@1.121.27': - resolution: {integrity: sha512-6lCQ3p7KhJ8Qy33TPRM6wIkQ1XKaikD5qqx3K2fPr3YtyDNefKQValbSAkb2CBB+hlDodfHNyxemE9alnQr55A==} + '@tanstack/router-core@1.121.34': + resolution: {integrity: sha512-CRH9dC8uLfFOKUGTbtOcMPv+weNVt2xs+me34KLX0Yja2yHG99oAUCBwamXsVQPpfjLFPYeJuKyo98+Mg+Ppeg==} engines: {node: '>=12'} - '@tanstack/router-devtools-core@1.121.27': - resolution: {integrity: sha512-taeINd8CSIg+0916myI52HbQxjqfgxqHp68Ha6uxjXAHhHQKg/hBFCWpDs4Dwxi290mhT8j2oeXNyDaGMvVumQ==} + '@tanstack/router-devtools-core@1.121.34': + resolution: {integrity: sha512-WAFYxJ7qViKxqkFmf+VsrtMT4TfYqdfWTBRhVU/6qi0k/+7TO2EHjl8/aGBhg6q0/IwO9wyGvcbDhJxm0DwWag==} engines: {node: '>=12'} peerDependencies: - '@tanstack/router-core': ^1.121.27 + '@tanstack/router-core': ^1.121.34 csstype: ^3.0.10 solid-js: '>=1.9.5' tiny-invariant: ^1.3.3 @@ -2911,16 +2911,16 @@ packages: csstype: optional: true - '@tanstack/router-generator@1.121.27': - resolution: {integrity: sha512-tIb2w8cno85BPu+7v9IK6eki9LIAWJIEaZJvqOwbdhX+X7LgL8K1xMgIRZfcd4a+7VwJaf66cR/0GzIYlWOggg==} + '@tanstack/router-generator@1.121.34': + resolution: {integrity: sha512-JmxlhK8f7LIxHV8BAHikeiYGfwM9p5nxbEMpujNgTmC0dBwSyes+Zm0DzEL0EotVXZy+CyI/9bVa7z+9nWvqlA==} engines: {node: '>=12'} - '@tanstack/router-plugin@1.121.29': - resolution: {integrity: sha512-MFVuYQY89Qilu+OIcKpfgOwXFUbCm5eidwYv1V/JG8HuiOIUcC6kcIm9t2OPyCBeroA3ywJSTvoOWMiHe2ybOw==} + '@tanstack/router-plugin@1.121.34': + resolution: {integrity: sha512-ZmX/tkdd/ZKLdr17ewKJTTBGkXQDeOfQKSCuuEW5IjiNfWjT5gx8rQDvcYUSRcZdpUZ0LvDBxJUI74oHQ3sAiw==} engines: {node: '>=12'} peerDependencies: '@rsbuild/core': '>=1.0.2' - '@tanstack/react-router': ^1.121.27 + '@tanstack/react-router': ^1.121.34 vite: '>=5.0.0 || >=6.0.0' vite-plugin-solid: ^2.11.2 webpack: '>=5.92.0' @@ -6680,11 +6680,6 @@ packages: resolution: {integrity: sha512-8sLjZwK0R+JlxlYcTuVnyT2v+htpdrjDOKuMcOVdYjt52Lh8hWRYpxBPoKx/Zg+bcjc3wx6fmQevMmUztS/ccA==} engines: {node: '>=4'} - postcss-sorting@8.0.2: - resolution: {integrity: sha512-M9dkSrmU00t/jK7rF6BZSZauA5MAaBW4i5EnJXspMwt4iqTh/L9j6fgMnbElEOfyRyfLfVbIHj/R52zHzAPe1Q==} - peerDependencies: - postcss: ^8.4.20 - postcss-sorting@9.1.0: resolution: {integrity: sha512-Mn8KJ45HNNG6JBpBizXcyf6LqY/qyqetGcou/nprDnFwBFBLGj0j/sNKV2lj2KMOVOwdXu14aEzqJv8CIV6e8g==} peerDependencies: @@ -6770,8 +6765,8 @@ packages: peerDependencies: prettier: ^3.0.3 - prettier@3.5.3: - resolution: {integrity: sha512-QQtaxnoDJeAkDvDKWCLiwIXkTgRhwYDEQCghU9Z6q03iyek/rxRh/2lC3HB7P8sWT2xC/y5JDctPLBIGzHKbhw==} + prettier@3.6.0: + resolution: {integrity: sha512-ujSB9uXHJKzM/2GBuE0hBOUgC77CN3Bnpqa+g80bkv3T3A93wL/xlzDATHhnhkzifz/UE2SNOvmbTz5hSkDlHw==} engines: {node: '>=14'} hasBin: true @@ -7546,10 +7541,11 @@ packages: postcss-html: ^1.0.0 stylelint: '>=14.0.0' - stylelint-config-recess-order@6.1.0: - resolution: {integrity: sha512-0rGZgJQjUKqv1PXZnRJxr13f3hb3i2snx2nIL6luDWUf4nD3BAweB8noS7jdfBQ56HQG3RKSF0a+MAHfBGFxgw==} + stylelint-config-recess-order@7.1.0: + resolution: {integrity: sha512-rFc4Z6SCGgEohr1khsmAZ83X56Tdi2dHY/GB7VT3qJkpKU1V2w+mYlK+b7Za5gpsxEng3jnb4FzWyIl/KTH0AQ==} peerDependencies: - stylelint: '>=16' + stylelint: '>=16.18' + stylelint-order: '>=7' stylelint-config-recommended@16.0.0: resolution: {integrity: sha512-4RSmPjQegF34wNcK1e1O3Uz91HN8P1aFdFzio90wNK9mjgAI19u5vsU868cVZboKzCaa5XbpvtTzAAGQAxpcXA==} @@ -7569,11 +7565,6 @@ packages: peerDependencies: stylelint: ^7.0.0 || ^8.0.0 || ^9.0.0 || ^10.0.0 || ^11.0.0 || ^12.0.0 || ^13.0.0 || ^14.0.0 || ^15.0.0 || ^16.0.0 - stylelint-order@6.0.4: - resolution: {integrity: sha512-0UuKo4+s1hgQ/uAxlYU4h0o0HS4NiQDud0NAUNI0aa8FJdmYHA5ZZTFHiV5FpmE3071e9pZx5j0QpVJW5zOCUA==} - peerDependencies: - stylelint: ^14.0.0 || ^15.0.0 || ^16.0.1 - stylelint-order@7.0.0: resolution: {integrity: sha512-rSWxx0KscYfxU02wEskKXES9lkRzuuONMMNkZ7SUc6uiF3tDKm7e+sE0Ax/SBlG4TUf1sp1R6f3/SlsPGmzthg==} engines: {node: '>=20.19.0'} @@ -9737,13 +9728,13 @@ snapshots: '@humanwhocodes/retry@0.4.2': {} - '@ianvs/prettier-plugin-sort-imports@4.4.2(prettier@3.5.3)': + '@ianvs/prettier-plugin-sort-imports@4.4.2(prettier@3.6.0)': dependencies: '@babel/generator': 7.27.0 '@babel/parser': 7.27.0 '@babel/traverse': 7.27.0 '@babel/types': 7.27.0 - prettier: 3.5.3 + prettier: 3.6.0 semver: 7.7.2 transitivePeerDependencies: - supports-color @@ -10774,7 +10765,7 @@ snapshots: postcss: 8.5.6 tailwindcss: 4.1.10 - '@tanstack/history@1.121.21': {} + '@tanstack/history@1.121.34': {} '@tanstack/match-sorter-utils@8.19.4': dependencies: @@ -10787,10 +10778,10 @@ snapshots: '@tanstack/query-core': 5.81.2 react: 19.1.0 - '@tanstack/react-router-devtools@1.121.27(@tanstack/react-router@1.121.27(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(@tanstack/router-core@1.121.27)(csstype@3.1.3)(react-dom@19.1.0(react@19.1.0))(react@19.1.0)(solid-js@1.9.5)(tiny-invariant@1.3.3)': + '@tanstack/react-router-devtools@1.121.34(@tanstack/react-router@1.121.34(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(@tanstack/router-core@1.121.34)(csstype@3.1.3)(react-dom@19.1.0(react@19.1.0))(react@19.1.0)(solid-js@1.9.5)(tiny-invariant@1.3.3)': dependencies: - '@tanstack/react-router': 1.121.27(react-dom@19.1.0(react@19.1.0))(react@19.1.0) - '@tanstack/router-devtools-core': 1.121.27(@tanstack/router-core@1.121.27)(csstype@3.1.3)(solid-js@1.9.5)(tiny-invariant@1.3.3) + '@tanstack/react-router': 1.121.34(react-dom@19.1.0(react@19.1.0))(react@19.1.0) + '@tanstack/router-devtools-core': 1.121.34(@tanstack/router-core@1.121.34)(csstype@3.1.3)(solid-js@1.9.5)(tiny-invariant@1.3.3) react: 19.1.0 react-dom: 19.1.0(react@19.1.0) transitivePeerDependencies: @@ -10799,11 +10790,11 @@ snapshots: - solid-js - tiny-invariant - '@tanstack/react-router@1.121.27(react-dom@19.1.0(react@19.1.0))(react@19.1.0)': + '@tanstack/react-router@1.121.34(react-dom@19.1.0(react@19.1.0))(react@19.1.0)': dependencies: - '@tanstack/history': 1.121.21 + '@tanstack/history': 1.121.34 '@tanstack/react-store': 0.7.0(react-dom@19.1.0(react@19.1.0))(react@19.1.0) - '@tanstack/router-core': 1.121.27 + '@tanstack/router-core': 1.121.34 jsesc: 3.1.0 react: 19.1.0 react-dom: 19.1.0(react@19.1.0) @@ -10829,15 +10820,15 @@ snapshots: react: 19.1.0 react-dom: 19.1.0(react@19.1.0) - '@tanstack/router-core@1.121.27': + '@tanstack/router-core@1.121.34': dependencies: - '@tanstack/history': 1.121.21 + '@tanstack/history': 1.121.34 '@tanstack/store': 0.7.0 tiny-invariant: 1.3.3 - '@tanstack/router-devtools-core@1.121.27(@tanstack/router-core@1.121.27)(csstype@3.1.3)(solid-js@1.9.5)(tiny-invariant@1.3.3)': + '@tanstack/router-devtools-core@1.121.34(@tanstack/router-core@1.121.34)(csstype@3.1.3)(solid-js@1.9.5)(tiny-invariant@1.3.3)': dependencies: - '@tanstack/router-core': 1.121.27 + '@tanstack/router-core': 1.121.34 clsx: 2.1.1 goober: 2.1.16(csstype@3.1.3) solid-js: 1.9.5 @@ -10845,12 +10836,12 @@ snapshots: optionalDependencies: csstype: 3.1.3 - '@tanstack/router-generator@1.121.27': + '@tanstack/router-generator@1.121.34': dependencies: - '@tanstack/router-core': 1.121.27 + '@tanstack/router-core': 1.121.34 '@tanstack/router-utils': 1.121.21 '@tanstack/virtual-file-routes': 1.121.21 - prettier: 3.5.3 + prettier: 3.6.0 recast: 0.23.11 source-map: 0.7.4 tsx: 4.20.3 @@ -10858,7 +10849,7 @@ snapshots: transitivePeerDependencies: - supports-color - '@tanstack/router-plugin@1.121.29(@tanstack/react-router@1.121.27(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(vite@6.3.5(@types/node@22.15.32)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.30.1)(sass-embedded@1.89.2)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.20.3)(yaml@2.8.0))': + '@tanstack/router-plugin@1.121.34(@tanstack/react-router@1.121.34(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(vite@6.3.5(@types/node@22.15.32)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.30.1)(sass-embedded@1.89.2)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.20.3)(yaml@2.8.0))': dependencies: '@babel/core': 7.27.4 '@babel/plugin-syntax-jsx': 7.27.1(@babel/core@7.27.4) @@ -10866,8 +10857,8 @@ snapshots: '@babel/template': 7.27.2 '@babel/traverse': 7.27.4 '@babel/types': 7.27.6 - '@tanstack/router-core': 1.121.27 - '@tanstack/router-generator': 1.121.27 + '@tanstack/router-core': 1.121.34 + '@tanstack/router-generator': 1.121.34 '@tanstack/router-utils': 1.121.21 '@tanstack/virtual-file-routes': 1.121.21 babel-dead-code-elimination: 1.0.10 @@ -10875,7 +10866,7 @@ snapshots: unplugin: 2.3.5 zod: 3.25.67 optionalDependencies: - '@tanstack/react-router': 1.121.27(react-dom@19.1.0(react@19.1.0))(react@19.1.0) + '@tanstack/react-router': 1.121.34(react-dom@19.1.0(react@19.1.0))(react@19.1.0) vite: 6.3.5(@types/node@22.15.32)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.30.1)(sass-embedded@1.89.2)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.20.3)(yaml@2.8.0) transitivePeerDependencies: - supports-color @@ -10891,9 +10882,9 @@ snapshots: transitivePeerDependencies: - supports-color - '@tanstack/router-zod-adapter@1.81.5(@tanstack/react-router@1.121.27(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(zod@3.25.67)': + '@tanstack/router-zod-adapter@1.81.5(@tanstack/react-router@1.121.34(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(zod@3.25.67)': dependencies: - '@tanstack/react-router': 1.121.27(react-dom@19.1.0(react@19.1.0))(react@19.1.0) + '@tanstack/react-router': 1.121.34(react-dom@19.1.0(react@19.1.0))(react@19.1.0) zod: 3.25.67 '@tanstack/store@0.7.0': {} @@ -10991,7 +10982,7 @@ snapshots: dependencies: '@tauri-apps/api': 2.5.0 - '@trivago/prettier-plugin-sort-imports@4.3.0(prettier@3.5.3)': + '@trivago/prettier-plugin-sort-imports@4.3.0(prettier@3.6.0)': dependencies: '@babel/generator': 7.17.7 '@babel/parser': 7.27.5 @@ -10999,7 +10990,7 @@ snapshots: '@babel/types': 7.17.0 javascript-natural-sort: 0.7.1 lodash: 4.17.21 - prettier: 3.5.3 + prettier: 3.6.0 transitivePeerDependencies: - supports-color optional: true @@ -13035,10 +13026,10 @@ snapshots: - supports-color - typescript - eslint-plugin-prettier@5.5.0(eslint-config-prettier@10.1.5(eslint@9.29.0(jiti@2.4.2)))(eslint@9.29.0(jiti@2.4.2))(prettier@3.5.3): + eslint-plugin-prettier@5.5.0(eslint-config-prettier@10.1.5(eslint@9.29.0(jiti@2.4.2)))(eslint@9.29.0(jiti@2.4.2))(prettier@3.6.0): dependencies: eslint: 9.29.0(jiti@2.4.2) - prettier: 3.5.3 + prettier: 3.6.0 prettier-linter-helpers: 1.0.0 synckit: 0.11.8 optionalDependencies: @@ -14717,7 +14708,7 @@ snapshots: mlly@1.7.4: dependencies: - acorn: 8.14.1 + acorn: 8.15.0 pathe: 2.0.3 pkg-types: 1.3.1 ufo: 1.5.4 @@ -14749,7 +14740,7 @@ snapshots: monaco-types: 0.1.0 monaco-worker-manager: 2.0.1(monaco-editor@0.52.2) path-browserify: 1.0.1 - prettier: 3.5.3 + prettier: 3.6.0 vscode-languageserver-textdocument: 1.0.12 vscode-languageserver-types: 3.17.5 vscode-uri: 3.0.8 @@ -15227,10 +15218,6 @@ snapshots: cssesc: 3.0.0 util-deprecate: 1.0.2 - postcss-sorting@8.0.2(postcss@8.5.6): - dependencies: - postcss: 8.5.6 - postcss-sorting@9.1.0(postcss@8.5.6): dependencies: postcss: 8.5.6 @@ -15251,19 +15238,19 @@ snapshots: dependencies: fast-diff: 1.3.0 - prettier-plugin-tailwindcss@0.6.13(@ianvs/prettier-plugin-sort-imports@4.4.2(prettier@3.5.3))(@trivago/prettier-plugin-sort-imports@4.3.0(prettier@3.5.3))(prettier@3.5.3): + prettier-plugin-tailwindcss@0.6.13(@ianvs/prettier-plugin-sort-imports@4.4.2(prettier@3.6.0))(@trivago/prettier-plugin-sort-imports@4.3.0(prettier@3.6.0))(prettier@3.6.0): dependencies: - prettier: 3.5.3 + prettier: 3.6.0 optionalDependencies: - '@ianvs/prettier-plugin-sort-imports': 4.4.2(prettier@3.5.3) - '@trivago/prettier-plugin-sort-imports': 4.3.0(prettier@3.5.3) + '@ianvs/prettier-plugin-sort-imports': 4.4.2(prettier@3.6.0) + '@trivago/prettier-plugin-sort-imports': 4.3.0(prettier@3.6.0) - prettier-plugin-toml@2.0.5(prettier@3.5.3): + prettier-plugin-toml@2.0.5(prettier@3.6.0): dependencies: '@taplo/lib': 0.5.0 - prettier: 3.5.3 + prettier: 3.6.0 - prettier@3.5.3: {} + prettier@3.6.0: {} progress@2.0.3: {} @@ -16110,10 +16097,10 @@ snapshots: postcss-html: 1.8.0 stylelint: 16.21.0(typescript@5.8.3) - stylelint-config-recess-order@6.1.0(stylelint@16.21.0(typescript@5.8.3)): + stylelint-config-recess-order@7.1.0(stylelint-order@7.0.0(stylelint@16.21.0(typescript@5.8.3)))(stylelint@16.21.0(typescript@5.8.3)): dependencies: stylelint: 16.21.0(typescript@5.8.3) - stylelint-order: 6.0.4(stylelint@16.21.0(typescript@5.8.3)) + stylelint-order: 7.0.0(stylelint@16.21.0(typescript@5.8.3)) stylelint-config-recommended@16.0.0(stylelint@16.21.0(typescript@5.8.3)): dependencies: @@ -16128,12 +16115,6 @@ snapshots: dependencies: stylelint: 16.21.0(typescript@5.8.3) - stylelint-order@6.0.4(stylelint@16.21.0(typescript@5.8.3)): - dependencies: - postcss: 8.5.6 - postcss-sorting: 8.0.2(postcss@8.5.6) - stylelint: 16.21.0(typescript@5.8.3) - stylelint-order@7.0.0(stylelint@16.21.0(typescript@5.8.3)): dependencies: postcss: 8.5.6 @@ -16309,7 +16290,7 @@ snapshots: terser@5.36.0: dependencies: '@jridgewell/source-map': 0.3.6 - acorn: 8.14.1 + acorn: 8.15.0 commander: 2.20.3 source-map-support: 0.5.21 @@ -16648,7 +16629,7 @@ snapshots: unplugin@2.3.5: dependencies: - acorn: 8.14.1 + acorn: 8.15.0 picomatch: 4.0.2 webpack-virtual-modules: 0.6.2 @@ -16763,11 +16744,11 @@ snapshots: pathe: 0.2.0 vite: 6.3.5(@types/node@22.15.32)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.30.1)(sass-embedded@1.89.2)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.20.3)(yaml@2.8.0) - vite-plugin-sass-dts@1.3.31(postcss@8.5.6)(prettier@3.5.3)(sass-embedded@1.89.2)(vite@6.3.5(@types/node@22.15.32)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.30.1)(sass-embedded@1.89.2)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.20.3)(yaml@2.8.0)): + vite-plugin-sass-dts@1.3.31(postcss@8.5.6)(prettier@3.6.0)(sass-embedded@1.89.2)(vite@6.3.5(@types/node@22.15.32)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.30.1)(sass-embedded@1.89.2)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.20.3)(yaml@2.8.0)): dependencies: postcss: 8.5.6 postcss-js: 4.0.1(postcss@8.5.6) - prettier: 3.5.3 + prettier: 3.6.0 sass-embedded: 1.89.2 vite: 6.3.5(@types/node@22.15.32)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.30.1)(sass-embedded@1.89.2)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.20.3)(yaml@2.8.0) diff --git a/clash-verge-rev/.husky/pre-push b/clash-verge-rev/.husky/pre-push index 0c95cbfdac..e7b0a02e9c 100644 --- a/clash-verge-rev/.husky/pre-push +++ b/clash-verge-rev/.husky/pre-push @@ -8,11 +8,9 @@ if git diff --cached --name-only | grep -q '^src-tauri/'; then fi fi -remote_name="$1" -remote_url=$(git remote get-url "$remote_name") - -if [[ "$remote_url" =~ github\.com[:/]+clash-verge-rev/clash-verge-rev(\.git)?$ ]]; then - echo "[pre-push] Detected push to clash-verge-rev/clash-verge-rev ($remote_url)" +# 检查所有 remote url 是否有目标仓库 +if git remote -v | grep -Eq 'github\\.com[:/]+clash-verge-rev/clash-verge-rev(\\.git)?'; then + echo "[pre-push] Detected push to clash-verge-rev/clash-verge-rev" echo "[pre-push] Running pnpm format:check..." pnpm format:check diff --git a/clash-verge-rev/UPDATELOG.md b/clash-verge-rev/UPDATELOG.md index 5472ddc2d9..fab7ad3620 100644 --- a/clash-verge-rev/UPDATELOG.md +++ b/clash-verge-rev/UPDATELOG.md @@ -5,6 +5,9 @@ - 修复系统代理端口不同步问题 - 修复自定义 `css` 背景图无法生效问题 - 修复在轻量模式下快速点击托盘图标带来的竞争态卡死问题 +- 修复同时开启静默启动与自动进入轻量模式后，自动进入轻量模式失效的问题 +- 修复静默启动时托盘工具栏轻量模式开启与关闭状态的同步 +- 修复导入订阅时非 http 协议链接被错误尝试导入 ### ✨ 新增功能 diff --git a/clash-verge-rev/src-tauri/src/module/lightweight.rs b/clash-verge-rev/src-tauri/src/module/lightweight.rs index f93cc170c2..0b8553e530 100644 --- a/clash-verge-rev/src-tauri/src/module/lightweight.rs +++ b/clash-verge-rev/src-tauri/src/module/lightweight.rs @@ -36,20 +36,20 @@ where pub fn run_once_auto_lightweight() { LightWeightState::default().run_once_time(|| { - let is_silent_start = Config::verge().data().enable_silent_start.unwrap_or(true); + let is_silent_start = Config::verge().data().enable_silent_start.unwrap_or(false); let enable_auto = Config::verge() .data() .enable_auto_light_weight_mode - .unwrap_or(true); + .unwrap_or(false); if enable_auto && is_silent_start { logging!( info, Type::Lightweight, true, - "正常创建窗口和添加定时器监听器" + "在静默启动的情况下，创建窗口再添加自动进入轻量模式窗口监听器" ); set_lightweight_mode(false); - disable_auto_light_weight_mode(); + enable_auto_light_weight_mode(); // 触发托盘更新 if let Err(e) = Tray::global().update_part() { @@ -65,8 +65,13 @@ pub fn auto_lightweight_mode_init() { let is_silent_start = { Config::verge().data().enable_silent_start }.unwrap_or(false); let enable_auto = { Config::verge().data().enable_auto_light_weight_mode }.unwrap_or(false); - if enable_auto && is_silent_start { - logging!(info, Type::Lightweight, true, "自动轻量模式静默启动"); + if enable_auto && !is_silent_start { + logging!( + info, + Type::Lightweight, + true, + "非静默启动直接挂载自动进入轻量模式监听器！" + ); set_lightweight_mode(true); enable_auto_light_weight_mode(); @@ -84,7 +89,7 @@ pub fn is_in_lightweight_mode() -> bool { } // 设置轻量模式状态 -fn set_lightweight_mode(value: bool) { +pub fn set_lightweight_mode(value: bool) { with_lightweight_status(|state| { state.set_lightweight_mode(value); }); @@ -126,7 +131,6 @@ pub fn entry_lightweight_mode() { } #[cfg(target_os = "macos")] AppHandleManager::global().set_activation_policy_accessory(); - logging!(info, Type::Lightweight, true, "轻量模式已开启"); } set_lightweight_mode(true); let _ = cancel_light_weight_timer(); @@ -163,7 +167,6 @@ pub fn exit_lightweight_mode() { } set_lightweight_mode(false); - logging!(info, Type::Lightweight, true, "正在退出轻量模式"); // macOS激活策略 #[cfg(target_os = "macos")] diff --git a/clash-verge-rev/src-tauri/src/utils/resolve.rs b/clash-verge-rev/src-tauri/src/utils/resolve.rs index dada58ec65..06701846f3 100644 --- a/clash-verge-rev/src-tauri/src/utils/resolve.rs +++ b/clash-verge-rev/src-tauri/src/utils/resolve.rs @@ -295,6 +295,7 @@ pub fn create_window(is_show: bool) -> bool { if !is_show { logging!(info, Type::Window, true, "静默模式启动时不创建窗口"); + lightweight::set_lightweight_mode(true); handle::Handle::notify_startup_completed(); return false; } diff --git a/clash-verge-rev/src-tauri/src/utils/window_manager.rs b/clash-verge-rev/src-tauri/src/utils/window_manager.rs index c06cb5190f..f627e213d4 100644 --- a/clash-verge-rev/src-tauri/src/utils/window_manager.rs +++ b/clash-verge-rev/src-tauri/src/utils/window_manager.rs @@ -86,20 +86,27 @@ pub struct WindowManager; impl WindowManager { pub fn get_main_window_state() -> WindowState { - if let Some(window) = Self::get_main_window() { - if window.is_minimized().unwrap_or(false) { - WindowState::Minimized - } else if window.is_visible().unwrap_or(false) { - if window.is_focused().unwrap_or(false) { + match Self::get_main_window() { + Some(window) => { + let is_minimized = window.is_minimized().unwrap_or(false); + let is_visible = window.is_visible().unwrap_or(false); + let is_focused = window.is_focused().unwrap_or(false); + + if is_minimized { + return WindowState::Minimized; + } + + if !is_visible { + return WindowState::Hidden; + } + + if is_focused { WindowState::VisibleFocused } else { WindowState::VisibleUnfocused } - } else { - WindowState::Hidden } - } else { - WindowState::NotExist + None => WindowState::NotExist, } } @@ -316,17 +323,21 @@ impl WindowManager { pub fn hide_main_window() -> WindowOperationResult { logging!(info, Type::Window, true, "开始隐藏主窗口"); - if let Some(window) = Self::get_main_window() { - if window.hide().is_ok() { - logging!(info, Type::Window, true, "窗口已隐藏"); - WindowOperationResult::Hidden - } else { - logging!(warn, Type::Window, true, "隐藏窗口失败"); - WindowOperationResult::Failed + match Self::get_main_window() { + Some(window) => match window.hide() { + Ok(_) => { + logging!(info, Type::Window, true, "窗口已隐藏"); + WindowOperationResult::Hidden + } + Err(e) => { + logging!(warn, Type::Window, true, "隐藏窗口失败: {}", e); + WindowOperationResult::Failed + } + }, + None => { + logging!(info, Type::Window, true, "窗口不存在，无需隐藏"); + WindowOperationResult::NoAction } - } else { - logging!(info, Type::Window, true, "窗口不存在，无需隐藏"); - WindowOperationResult::NoAction } } diff --git a/clash-verge-rev/src/components/home/proxy-tun-card.tsx b/clash-verge-rev/src/components/home/proxy-tun-card.tsx index 5803c32652..6dcba565af 100644 --- a/clash-verge-rev/src/components/home/proxy-tun-card.tsx +++ b/clash-verge-rev/src/components/home/proxy-tun-card.tsx @@ -19,6 +19,7 @@ import { } from "@mui/icons-material"; import { useVerge } from "@/hooks/use-verge"; import { useSystemState } from "@/hooks/use-system-state"; +import { useSystemProxyState } from "@/hooks/use-system-proxy-state"; import { showNotice } from "@/services/noticeService"; import { getRunningMode } from "@/services/cmds"; import { mutate } from "swr"; @@ -145,8 +146,9 @@ export const ProxyTunCard: FC = () => { const { verge } = useVerge(); const { isAdminMode } = useSystemState(); + const { indicator: systemProxyIndicator } = useSystemProxyState(); - const { enable_system_proxy, enable_tun_mode } = verge ?? {}; + const { enable_tun_mode } = verge ?? {}; const updateLocalStatus = async () => { try { @@ -180,7 +182,7 @@ export const ProxyTunCard: FC = () => { const tabDescription = useMemo(() => { if (activeTab === "system") { return { - text: enable_system_proxy + text: systemProxyIndicator ? t("System Proxy Enabled") : t("System Proxy Disabled"), tooltip: t("System Proxy Info"), @@ -195,7 +197,7 @@ export const ProxyTunCard: FC = () => { tooltip: t("TUN Mode Intercept Info"), }; } - }, [activeTab, enable_system_proxy, enable_tun_mode, isTunAvailable, t]); + }, [activeTab, systemProxyIndicator, enable_tun_mode, isTunAvailable, t]); return ( @@ -214,7 +216,7 @@ export const ProxyTunCard: FC = () => { onClick={() => handleTabChange("system")} icon={ComputerRounded} label={t("System Proxy")} - hasIndicator={enable_system_proxy} + hasIndicator={systemProxyIndicator} /> { const { verge, mutateVerge, patchVerge } = useVerge(); const { installServiceAndRestartCore } = useServiceInstaller(); - - const { data: sysproxy } = useSWR("getSystemProxy", getSystemProxy); - const { data: autoproxy } = useSWR("getAutotemProxy", getAutotemProxy); + const { + actualState: systemProxyActualState, + indicator: systemProxyIndicator, + toggleSystemProxy, + } = useSystemProxyState(); const { isAdminMode, isServiceMode, mutateRunningMode } = useSystemState(); @@ -51,26 +48,14 @@ const SettingSystem = ({ onError }: Props) => { const sysproxyRef = useRef(null); const tunRef = useRef(null); - const { - enable_tun_mode, - enable_auto_launch, - enable_silent_start, - enable_system_proxy, - proxy_auto_config, - enable_hover_jump_navigator, - } = verge ?? {}; + const { enable_tun_mode, enable_auto_launch, enable_silent_start } = + verge ?? {}; const onSwitchFormat = (_e: any, value: boolean) => value; const onChangeData = (patch: Partial) => { mutateVerge({ ...verge, ...patch }, false); }; - const updateProxyStatus = async () => { - await new Promise((resolve) => setTimeout(resolve, 100)); - await mutate("getSystemProxy"); - await mutate("getAutotemProxy"); - }; - // 抽象服务操作逻辑 const handleServiceOperation = useLockFn( async ({ @@ -194,13 +179,7 @@ const SettingSystem = ({ onError }: Props) => { icon={SettingsRounded} onClick={() => sysproxyRef.current?.open()} /> - {proxy_auto_config ? ( - autoproxy?.enable ? ( - - ) : ( - - ) - ) : sysproxy?.enable ? ( + {systemProxyIndicator ? ( ) : ( @@ -209,44 +188,13 @@ const SettingSystem = ({ onError }: Props) => { } > { - if (autoproxy?.enable === false && sysproxy?.enable === false) { - onChangeData({ enable_system_proxy: !enable_system_proxy }); - } else { - onChangeData({ enable_system_proxy: e }); - } - }} - onGuard={async (e) => { - if (autoproxy?.enable === false && sysproxy?.enable === false) { - await patchVerge({ enable_system_proxy: !enable_system_proxy }); - await updateProxyStatus(); - return; - } - if (!e && verge?.auto_close_connection) { - closeAllConnections(); - } - await patchVerge({ enable_system_proxy: e }); - await updateProxyStatus(); - }} + onGuard={(e) => toggleSystemProxy(e)} > - + diff --git a/clash-verge-rev/src/components/shared/ProxyControlSwitches.tsx b/clash-verge-rev/src/components/shared/ProxyControlSwitches.tsx index dcf4a651c2..f96d5cbeb5 100644 --- a/clash-verge-rev/src/components/shared/ProxyControlSwitches.tsx +++ b/clash-verge-rev/src/components/shared/ProxyControlSwitches.tsx @@ -1,6 +1,6 @@ import { useRef } from "react"; import { useTranslation } from "react-i18next"; -import useSWR, { mutate } from "swr"; +import useSWR from "swr"; import { SettingsRounded, PlayCircleOutlineRounded, @@ -20,12 +20,8 @@ import { GuardState } from "@/components/setting/mods/guard-state"; import { SysproxyViewer } from "@/components/setting/mods/sysproxy-viewer"; import { TunViewer } from "@/components/setting/mods/tun-viewer"; import { useVerge } from "@/hooks/use-verge"; -import { - getSystemProxy, - getAutotemProxy, - getRunningMode, -} from "@/services/cmds"; -import { closeAllConnections } from "@/services/api"; +import { useSystemProxyState } from "@/hooks/use-system-proxy-state"; +import { getRunningMode } from "@/services/cmds"; import { showNotice } from "@/services/noticeService"; import { useServiceInstaller } from "@/hooks/useServiceInstaller"; @@ -44,12 +40,13 @@ const ProxyControlSwitches = ({ label, onError }: ProxySwitchProps) => { const theme = useTheme(); const { installServiceAndRestartCore } = useServiceInstaller(); - const { data: sysproxy } = useSWR("getSystemProxy", getSystemProxy); - const { data: autoproxy } = useSWR("getAutotemProxy", getAutotemProxy); - const { data: runningMode, mutate: mutateRunningMode } = useSWR( - "getRunningMode", - getRunningMode, - ); + const { + actualState: systemProxyActualState, + indicator: systemProxyIndicator, + toggleSystemProxy, + } = useSystemProxyState(); + + const { data: runningMode } = useSWR("getRunningMode", getRunningMode); // 是否以sidecar模式运行 const isSidecarMode = runningMode === "Sidecar"; @@ -57,8 +54,7 @@ const ProxyControlSwitches = ({ label, onError }: ProxySwitchProps) => { const sysproxyRef = useRef(null); const tunRef = useRef(null); - const { enable_tun_mode, enable_system_proxy, proxy_auto_config } = - verge ?? {}; + const { enable_tun_mode, enable_system_proxy } = verge ?? {}; // 确定当前显示哪个开关 const isSystemProxyMode = label === t("System Proxy") || !label; @@ -69,12 +65,6 @@ const ProxyControlSwitches = ({ label, onError }: ProxySwitchProps) => { mutateVerge({ ...verge, ...patch }, false); }; - const updateProxyStatus = async () => { - await new Promise((resolve) => setTimeout(resolve, 100)); - await mutate("getSystemProxy"); - await mutate("getAutotemProxy"); - }; - // 安装系统服务 const onInstallService = installServiceAndRestartCore; @@ -109,7 +99,7 @@ const ProxyControlSwitches = ({ label, onError }: ProxySwitchProps) => { }} > - {enable_system_proxy ? ( + {systemProxyIndicator ? ( @@ -151,18 +141,11 @@ const ProxyControlSwitches = ({ label, onError }: ProxySwitchProps) => { onChangeData({ enable_system_proxy: e })} - onGuard={async (e) => { - if (!e && verge?.auto_close_connection) { - closeAllConnections(); - } - await patchVerge({ enable_system_proxy: e }); - await updateProxyStatus(); - }} + onGuard={(e) => toggleSystemProxy(e)} > diff --git a/clash-verge-rev/src/hooks/use-system-proxy-state.ts b/clash-verge-rev/src/hooks/use-system-proxy-state.ts new file mode 100644 index 0000000000..2e4621ba18 --- /dev/null +++ b/clash-verge-rev/src/hooks/use-system-proxy-state.ts @@ -0,0 +1,72 @@ +import useSWR, { mutate } from "swr"; +import { useVerge } from "@/hooks/use-verge"; +import { getAutotemProxy } from "@/services/cmds"; +import { useAppData } from "@/providers/app-data-provider"; +import { closeAllConnections } from "@/services/api"; + +// 系统代理状态检测统一逻辑 +export const useSystemProxyState = () => { + const { verge, mutateVerge, patchVerge } = useVerge(); + const { sysproxy } = useAppData(); + const { data: autoproxy } = useSWR("getAutotemProxy", getAutotemProxy, { + revalidateOnFocus: true, + revalidateOnReconnect: true, + }); + + const { enable_system_proxy, proxy_auto_config } = verge ?? {}; + + const getSystemProxyActualState = () => { + const userEnabled = enable_system_proxy ?? false; + + if (userEnabled) { + return true; + } + + return autoproxy?.enable === false && sysproxy?.enable === false + ? false + : userEnabled; + }; + + const getSystemProxyIndicator = () => { + if (proxy_auto_config) { + return autoproxy?.enable ?? false; + } else { + return sysproxy?.enable ?? false; + } + }; + + const updateProxyStatus = async () => { + await new Promise((resolve) => setTimeout(resolve, 100)); + await mutate("getSystemProxy"); + await mutate("getAutotemProxy"); + }; + + const toggleSystemProxy = (enabled: boolean) => { + mutateVerge({ ...verge, enable_system_proxy: enabled }, false); + + setTimeout(async () => { + try { + if (!enabled && verge?.auto_close_connection) { + closeAllConnections(); + } + await patchVerge({ enable_system_proxy: enabled }); + + updateProxyStatus(); + } catch (error) { + mutateVerge({ ...verge, enable_system_proxy: !enabled }, false); + } + }, 0); + + return Promise.resolve(); + }; + + return { + actualState: getSystemProxyActualState(), + indicator: getSystemProxyIndicator(), + configState: enable_system_proxy ?? false, + sysproxy, + autoproxy, + proxy_auto_config, + toggleSystemProxy, + }; +}; diff --git a/clash-verge-rev/src/locales/en.json b/clash-verge-rev/src/locales/en.json index eb3f8c6e9d..740911dd53 100644 --- a/clash-verge-rev/src/locales/en.json +++ b/clash-verge-rev/src/locales/en.json @@ -623,5 +623,6 @@ "Originals Only": "Originals Only", "No (IP Banned By Disney+)": "No (IP Banned By Disney+)", "Unsupported Country/Region": "Unsupported Country/Region", - "Failed (Network Connection)": "Failed (Network Connection)" + "Failed (Network Connection)": "Failed (Network Connection)", + "Invalid Profile URL": "Invalid profile URL. Please enter a URL starting with http:// or https://" } diff --git a/clash-verge-rev/src/locales/ru.json b/clash-verge-rev/src/locales/ru.json index f4aa2350ca..0bdeab4871 100644 --- a/clash-verge-rev/src/locales/ru.json +++ b/clash-verge-rev/src/locales/ru.json @@ -581,5 +581,6 @@ "Originals Only": "Только Originals", "No (IP Banned By Disney+)": "Нет (IP забанен Disney+)", "Unsupported Country/Region": "Страна/регион не поддерживается", - "Failed (Network Connection)": "Ошибка подключения" + "Failed (Network Connection)": "Ошибка подключения", + "Invalid Profile URL": "Недопустимая ссылка на профиль, введите адрес, начинающийся с http:// или https://" } diff --git a/clash-verge-rev/src/locales/zh.json b/clash-verge-rev/src/locales/zh.json index 4689bfe634..aa13fc3b68 100644 --- a/clash-verge-rev/src/locales/zh.json +++ b/clash-verge-rev/src/locales/zh.json @@ -623,5 +623,6 @@ "Originals Only": "仅限原创", "No (IP Banned By Disney+)": "不支持（IP被Disney+禁止）", "Unsupported Country/Region": "不支持的国家/地区", - "Failed (Network Connection)": "测试失败（网络连接问题）" + "Failed (Network Connection)": "测试失败（网络连接问题）", + "Invalid Profile URL": "无效的订阅链接，请输入以 http:// 或 https:// 开头的地址" } diff --git a/clash-verge-rev/src/pages/profiles.tsx b/clash-verge-rev/src/pages/profiles.tsx index b9d74ac115..71bfd73b27 100644 --- a/clash-verge-rev/src/pages/profiles.tsx +++ b/clash-verge-rev/src/pages/profiles.tsx @@ -227,8 +227,12 @@ const ProfilePage = () => { const onImport = async () => { if (!url) return; + // 校验url是否为http/https + if (!/^https?:\/\//i.test(url)) { + showNotice("error", t("Invalid Profile URL")); + return; + } setLoading(true); - try { // 尝试正常导入 await importProfile(url); @@ -240,14 +244,12 @@ const ProfilePage = () => { // 首次导入失败，尝试使用自身代理 const errmsg = err.message || err.toString(); showNotice("info", t("Import failed, retrying with Clash proxy...")); - try { // 使用自身代理尝试导入 await importProfile(url, { with_proxy: false, self_proxy: true, }); - // 回退导入成功 showNotice("success", t("Profile Imported with Clash proxy")); setUrl(""); diff --git a/clash-verge-rev/src/providers/app-data-provider.tsx b/clash-verge-rev/src/providers/app-data-provider.tsx index 337c74de53..9e7ab3afd8 100644 --- a/clash-verge-rev/src/providers/app-data-provider.tsx +++ b/clash-verge-rev/src/providers/app-data-provider.tsx @@ -68,7 +68,7 @@ export const AppDataProvider = ({ getProxies, { refreshInterval: 5000, - revalidateOnFocus: false, + revalidateOnFocus: true, suspense: false, errorRetryCount: 3, }, @@ -243,7 +243,8 @@ export const AppDataProvider = ({ "getSystemProxy", getSystemProxy, { - revalidateOnFocus: false, + revalidateOnFocus: true, + revalidateOnReconnect: true, suspense: false, errorRetryCount: 3, }, diff --git a/lede/include/host-build.mk b/lede/include/host-build.mk index 72d6374a7c..be7285c7eb 100644 --- a/lede/include/host-build.mk +++ b/lede/include/host-build.mk @@ -105,11 +105,9 @@ define Host/Configure $(call Host/Configure/Default) endef -HOST_MAKE_PATH ?= . - define Host/Compile/Default +$(HOST_MAKE_VARS) \ - $(MAKE) $(HOST_JOBS) -C $(HOST_BUILD_DIR)/$(HOST_MAKE_PATH) \ + $(MAKE) $(HOST_JOBS) -C $(HOST_BUILD_DIR) \ $(HOST_MAKE_FLAGS) \ $(1) endef diff --git a/lede/include/trusted-firmware-a.mk b/lede/include/trusted-firmware-a.mk index d86fb1aa12..15bbb1d690 100644 --- a/lede/include/trusted-firmware-a.mk +++ b/lede/include/trusted-firmware-a.mk @@ -81,6 +81,7 @@ define Build/Compile/Trusted-Firmware-A $(if $(DTC),DTC="$(DTC)") \ PLAT=$(PLAT) \ BUILD_STRING="OpenWrt v$(PKG_VERSION)-$(PKG_RELEASE) ($(VARIANT))" \ + $(if $(CONFIG_BINUTILS_VERSION_2_37)$(CONFIG_BINUTILS_VERSION_2_38),,LDFLAGS="-no-warn-rwx-segments") \ $(TFA_MAKE_FLAGS) endef diff --git a/lede/package/boot/arm-trusted-firmware-stm32/Makefile b/lede/package/boot/arm-trusted-firmware-stm32/Makefile index 2d4717adb6..5d3b3d2b8a 100644 --- a/lede/package/boot/arm-trusted-firmware-stm32/Makefile +++ b/lede/package/boot/arm-trusted-firmware-stm32/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/rules.mk PKG_VERSION:=2.12 -PKG_RELEASE:=2 +PKG_RELEASE:=1 PKG_HASH:=b4c047493cac1152203e1ba121ae57267e4899b7bf56eb365e22a933342d31c9 PKG_MAINTAINER:=Thomas Richard diff --git a/lede/package/boot/opensbi/Makefile b/lede/package/boot/opensbi/Makefile index a339d86ac7..02efc9805a 100644 --- a/lede/package/boot/opensbi/Makefile +++ b/lede/package/boot/opensbi/Makefile @@ -29,7 +29,7 @@ include $(INCLUDE_DIR)/package.mk define Package/opensbi SECTION:=boot CATEGORY:=Boot Loaders - DEPENDS:=@(TARGET_sifiveu||TARGET_d1) + DEPENDS:=@(TARGET_sifiveu||TARGET_allwinner) URL:=https://github.com/riscv/opensbi/blob/master/README.md VARIANT:=$(subst _,/,$(subst opensbi_,,$(1))) TITLE:=OpenSBI generic diff --git a/lede/package/boot/uboot-d1/Makefile b/lede/package/boot/uboot-allwinner/Makefile similarity index 86% rename from lede/package/boot/uboot-d1/Makefile rename to lede/package/boot/uboot-allwinner/Makefile index 611922443b..d32d7c8296 100644 --- a/lede/package/boot/uboot-d1/Makefile +++ b/lede/package/boot/uboot-allwinner/Makefile @@ -6,19 +6,20 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_VERSION:=2023.01 +PKG_NAME:=uboot-d1 PKG_RELEASE:=1 -PKG_HASH:=69423bad380f89a0916636e89e6dcbd2e4512d584308d922d1039d1e4331950f - -include $(INCLUDE_DIR)/u-boot.mk -include $(INCLUDE_DIR)/package.mk +PKG_SOURCE_PROTO:=git +PKG_SOURCE_DATE:=2023-10-31 +PKG_SOURCE_URL:=https://github.com/smaeul/u-boot +PKG_SOURCE_VERSION:=2e89b706f5c956a70c989cd31665f1429e9a0b48 +PKG_MIRROR_HASH:=4ea8d90de7df01abcb2fa64251f0eb72c1438214cf16f973917a8a6923268d3a include $(INCLUDE_DIR)/u-boot.mk include $(INCLUDE_DIR)/package.mk define U-Boot/Default - BUILD_TARGET:=d1 + BUILD_TARGET:=allwinner BUILD_SUBTARGET:=generic UBOOT_IMAGE:=u-boot-sunxi-with-spl.bin UENV:=default diff --git a/lede/package/boot/uboot-d1/patches/100-mkimage-check-environment-for-dtc-binary-location.patch b/lede/package/boot/uboot-allwinner/patches/100-mkimage-check-environment-for-dtc-binary-location.patch similarity index 95% rename from lede/package/boot/uboot-d1/patches/100-mkimage-check-environment-for-dtc-binary-location.patch rename to lede/package/boot/uboot-allwinner/patches/100-mkimage-check-environment-for-dtc-binary-location.patch index 789172f21b..0307d6b99b 100644 --- a/lede/package/boot/uboot-d1/patches/100-mkimage-check-environment-for-dtc-binary-location.patch +++ b/lede/package/boot/uboot-allwinner/patches/100-mkimage-check-environment-for-dtc-binary-location.patch @@ -17,7 +17,7 @@ Cc: Simon Glass --- a/tools/fit_image.c +++ b/tools/fit_image.c -@@ -729,9 +729,14 @@ static int fit_handle_file(struct image_ +@@ -774,9 +774,14 @@ static int fit_handle_file(struct image_ } *cmd = '\0'; } else if (params->datafile) { diff --git a/lede/package/boot/uboot-d1/patches/130-fix-mkimage-host-build.patch b/lede/package/boot/uboot-allwinner/patches/130-fix-mkimage-host-build.patch similarity index 84% rename from lede/package/boot/uboot-d1/patches/130-fix-mkimage-host-build.patch rename to lede/package/boot/uboot-allwinner/patches/130-fix-mkimage-host-build.patch index cd65c1321f..86a424e8b7 100644 --- a/lede/package/boot/uboot-d1/patches/130-fix-mkimage-host-build.patch +++ b/lede/package/boot/uboot-allwinner/patches/130-fix-mkimage-host-build.patch @@ -1,6 +1,6 @@ --- a/tools/image-host.c +++ b/tools/image-host.c -@@ -1125,6 +1125,7 @@ static int fit_config_add_verification_d +@@ -1137,6 +1137,7 @@ static int fit_config_add_verification_d * 2) get public key (X509_get_pubkey) * 3) provide der format (d2i_RSAPublicKey) */ @@ -8,7 +8,7 @@ static int read_pub_key(const char *keydir, const void *name, unsigned char **pubkey, int *pubkey_len) { -@@ -1178,6 +1179,13 @@ err_cert: +@@ -1190,6 +1191,13 @@ err_cert: fclose(f); return ret; } diff --git a/lede/package/boot/uboot-d1/patches/211-no-kwbimage.patch b/lede/package/boot/uboot-allwinner/patches/211-no-kwbimage.patch similarity index 63% rename from lede/package/boot/uboot-d1/patches/211-no-kwbimage.patch rename to lede/package/boot/uboot-allwinner/patches/211-no-kwbimage.patch index 65d14f5bec..f83814b9b2 100644 --- a/lede/package/boot/uboot-d1/patches/211-no-kwbimage.patch +++ b/lede/package/boot/uboot-allwinner/patches/211-no-kwbimage.patch @@ -1,10 +1,10 @@ --- a/tools/Makefile +++ b/tools/Makefile -@@ -119,7 +119,6 @@ dumpimage-mkimage-objs := aisimage.o \ +@@ -114,7 +114,6 @@ dumpimage-mkimage-objs := aisimage.o \ imximage.o \ imx8image.o \ imx8mimage.o \ - kwbimage.o \ - lib/md5.o \ + generated/lib/md5.o \ lpc32xximage.o \ mxsimage.o \ diff --git a/lede/package/boot/uboot-d1/patches/300-force-pylibfdt-build.patch b/lede/package/boot/uboot-allwinner/patches/300-force-pylibfdt-build.patch similarity index 96% rename from lede/package/boot/uboot-d1/patches/300-force-pylibfdt-build.patch rename to lede/package/boot/uboot-allwinner/patches/300-force-pylibfdt-build.patch index e2312eaa5a..e55fad489b 100644 --- a/lede/package/boot/uboot-d1/patches/300-force-pylibfdt-build.patch +++ b/lede/package/boot/uboot-allwinner/patches/300-force-pylibfdt-build.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -2045,26 +2045,7 @@ endif +@@ -2011,26 +2011,7 @@ endif # Check dtc and pylibfdt, if DTC is provided, else build them PHONY += scripts_dtc scripts_dtc: scripts_basic diff --git a/lede/package/boot/uboot-d1/uEnv-default.txt b/lede/package/boot/uboot-allwinner/uEnv-default.txt similarity index 100% rename from lede/package/boot/uboot-d1/uEnv-default.txt rename to lede/package/boot/uboot-allwinner/uEnv-default.txt diff --git a/lede/package/boot/uboot-d1/patches/0001-ARM-dts-sun8i-A33-Add-iNet-U70B-REV01.patch b/lede/package/boot/uboot-d1/patches/0001-ARM-dts-sun8i-A33-Add-iNet-U70B-REV01.patch deleted file mode 100644 index 1dc6468c4b..0000000000 --- a/lede/package/boot/uboot-d1/patches/0001-ARM-dts-sun8i-A33-Add-iNet-U70B-REV01.patch +++ /dev/null @@ -1,197 +0,0 @@ -From d45e64aad18e5e324425b9efbe6a0ec9e1a343da Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 20 Nov 2021 13:19:13 -0600 -Subject: [PATCH 01/90] ARM: dts: sun8i: A33: Add iNet U70B REV01 - -Signed-off-by: Samuel Holland ---- - arch/arm/dts/Makefile | 1 + - arch/arm/dts/sun8i-a33-inet-u70b-rev1.dts | 172 ++++++++++++++++++++++ - 2 files changed, 173 insertions(+) - create mode 100644 arch/arm/dts/sun8i-a33-inet-u70b-rev1.dts - ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -644,6 +644,7 @@ dtb-$(CONFIG_MACH_SUN8I_A33) += \ - sun8i-a33-et-q8-v1.6.dtb \ - sun8i-a33-ga10h-v1.1.dtb \ - sun8i-a33-inet-d978-rev2.dtb \ -+ sun8i-a33-inet-u70b-rev1.dtb \ - sun8i-a33-ippo-q8h-v1.2.dtb \ - sun8i-a33-olinuxino.dtb \ - sun8i-a33-q8-tablet.dtb \ ---- /dev/null -+++ b/arch/arm/dts/sun8i-a33-inet-u70b-rev1.dts -@@ -0,0 +1,172 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+ -+/dts-v1/; -+ -+#include "sun8i-a33.dtsi" -+#include "sun8i-reference-design-tablet.dtsi" -+ -+/ { -+ model = "iNet U70B REV01"; -+ compatible = "inet-tek,inet-u70b-rev01", "allwinner,sun8i-a33"; -+ -+ aliases { -+ ethernet0 = &rtl8723cs; -+ }; -+ -+ panel: panel { -+ compatible = "panel-dpi"; -+ backlight = <&backlight>; -+ enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ -+ power-supply = <®_dc1sw>; -+ -+ panel-timing { -+ clock-frequency = <51000000>; -+ hactive = <1024>; -+ vactive = <600>; -+ hfront-porch = <162>; -+ hback-porch = <158>; -+ hsync-len = <20>; -+ vback-porch = <25>; -+ vfront-porch = <10>; -+ vsync-len = <3>; -+ hsync-active = <1>; -+ vsync-active = <1>; -+ }; -+ -+ port { -+ panel_in_tcon0: endpoint { -+ remote-endpoint = <&tcon0_out_panel>; -+ }; -+ }; -+ }; -+ -+ speaker_amp: audio-amplifier { -+ compatible = "simple-audio-amplifier"; -+ enable-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ -+ sound-name-prefix = "Speaker Amp"; -+ }; -+ -+ wifi_pwrseq: wifi-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */ -+ post-power-on-delay-ms = <200>; -+ }; -+}; -+ -+&codec { -+ status = "okay"; -+}; -+ -+&dai { -+ status = "okay"; -+}; -+ -+&de { -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <400000>; -+ -+ accelerometer@18 { -+ compatible = "bosch,bma250"; -+ reg = <0x18>; -+ interrupt-parent = <&pio>; -+ interrupts = <7 10 IRQ_TYPE_EDGE_RISING>; /* PH10 / EINT10 */ -+ }; -+}; -+ -+&mmc1 { -+ pinctrl-0 = <&mmc1_pg_pins>; -+ pinctrl-names = "default"; -+ bus-width = <4>; -+ non-removable; -+ vmmc-supply = <®_dldo1>; -+ vqmmc-supply = <®_dldo2>; -+ status = "okay"; -+ -+ rtl8723cs: wifi@1 { -+ reg = <1>; -+ interrupt-parent = <&r_pio>; -+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */ -+ }; -+}; -+ -+&nfc { -+ status = "okay"; -+ -+ nand@0 { -+ reg = <0>; -+ allwinner,rb = <0>; -+ nand-ecc-maximize; -+ }; -+}; -+ -+&r_uart { -+ status = "disabled"; -+}; -+ -+®_dldo2 { -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-wifi-io"; -+}; -+ -+&simplefb_lcd { -+ status = "okay"; -+}; -+ -+&sound { -+ simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>; -+ simple-audio-card,widgets = "Headphone", "Headphone Jack", -+ "Microphone", "Internal Microphone", -+ "Speaker", "Internal Speaker"; -+ simple-audio-card,routing = "Headphone Jack", "HP", -+ "Internal Speaker", "Speaker Amp OUTL", -+ "Internal Speaker", "Speaker Amp OUTR", -+ "Speaker Amp INL", "HP", /* PHONEOUT ??? */ -+ "Speaker Amp INR", "HP", /* PHONEOUT ??? */ -+ "Left DAC", "DACL", -+ "Right DAC", "DACR", -+ "ADCL", "Left ADC", -+ "ADCR", "Right ADC", -+ "MIC1", "Internal Microphone", -+ "MIC2", "Headset Microphone", -+ "Headset Microphone", "HBIAS", -+ "Internal Microphone", "MBIAS"; -+ status = "okay"; -+}; -+ -+&tcon0 { -+ pinctrl-0 = <&lcd_rgb666_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&tcon0_out { -+ tcon0_out_panel: endpoint { -+ remote-endpoint = <&panel_in_tcon0>; -+ }; -+}; -+ -+&touchscreen { -+ reg = <0x40>; -+ compatible = "silead,gsl1680"; -+ avdd-supply = <®_ldo_io1>; -+ touchscreen-size-x = <1024>; -+ touchscreen-size-y = <600>; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pg_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "realtek,rtl8723cs-bt"; -+ device-wake-gpios = <&r_pio 0 10 GPIO_ACTIVE_LOW>; /* PL10 */ -+ enable-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ -+ host-wake-gpios = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */ -+ }; -+}; diff --git a/lede/package/boot/uboot-d1/patches/0002-sunxi-Add-iNet_U70B_rev1_defconfig.patch b/lede/package/boot/uboot-d1/patches/0002-sunxi-Add-iNet_U70B_rev1_defconfig.patch deleted file mode 100644 index 40f649b7fe..0000000000 --- a/lede/package/boot/uboot-d1/patches/0002-sunxi-Add-iNet_U70B_rev1_defconfig.patch +++ /dev/null @@ -1,46 +0,0 @@ -From ddb1f06d1c7758c538e286c0c7a9c8545d2af6b1 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 20 Nov 2021 13:26:36 -0600 -Subject: [PATCH 02/90] sunxi: Add iNet_U70B_rev1_defconfig - -Signed-off-by: Samuel Holland ---- - configs/iNet_U70B_rev1_defconfig | 32 ++++++++++++++++++++++++++++++++ - 1 file changed, 32 insertions(+) - create mode 100644 configs/iNet_U70B_rev1_defconfig - ---- /dev/null -+++ b/configs/iNet_U70B_rev1_defconfig -@@ -0,0 +1,32 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_SUNXI=y -+CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-u70b-rev1" -+# CONFIG_SPL_SERIAL is not set -+CONFIG_SPL=y -+CONFIG_MACH_SUN8I_A33=y -+CONFIG_DRAM_CLK=480 -+CONFIG_DRAM_ZQ=31675 -+CONFIG_DRAM_ODT_EN=y -+CONFIG_MMC0_CD_PIN="PB4" -+CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:51000,le:158,ri:162,up:25,lo:10,hs:20,vs:3,sync:3,vmode:0" -+CONFIG_VIDEO_LCD_DCLK_PHASE=0 -+CONFIG_VIDEO_LCD_POWER="PH7" -+CONFIG_VIDEO_LCD_BL_EN="PH6" -+CONFIG_VIDEO_LCD_BL_PWM="PH0" -+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -+CONFIG_CMD_BIND=y -+CONFIG_CMD_CLK=y -+CONFIG_CMD_PWM=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_WDT=y -+CONFIG_CMD_PMIC=y -+CONFIG_CMD_REGULATOR=y -+# CONFIG_NET is not set -+CONFIG_AXP_GPIO=y -+CONFIG_REGULATOR_AXP=y -+CONFIG_REGULATOR_AXP_USB_POWER=y -+CONFIG_AXP_DLDO1_VOLT=3300 -+CONFIG_DM_PWM=y -+CONFIG_PWM_SUNXI=y -+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set -+CONFIG_USB_MUSB_HOST=y diff --git a/lede/package/boot/uboot-d1/patches/0003-Adapt-iNet-U70B-REV01-for-development-FEL-serial.patch b/lede/package/boot/uboot-d1/patches/0003-Adapt-iNet-U70B-REV01-for-development-FEL-serial.patch deleted file mode 100644 index 03f1ca1175..0000000000 --- a/lede/package/boot/uboot-d1/patches/0003-Adapt-iNet-U70B-REV01-for-development-FEL-serial.patch +++ /dev/null @@ -1,85 +0,0 @@ -From ef808412055d1ef6fe77ff130d3f5a9432fef2d7 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Tue, 3 May 2022 22:35:12 -0500 -Subject: [PATCH 03/90] Adapt iNet U70B REV01 for development (FEL + serial) - -Signed-off-by: Samuel Holland ---- - arch/arm/dts/sun8i-a33-inet-u70b-rev1.dts | 11 +++++++++++ - configs/iNet_U70B_rev1_defconfig | 14 +++++--------- - 2 files changed, 16 insertions(+), 9 deletions(-) - ---- a/arch/arm/dts/sun8i-a33-inet-u70b-rev1.dts -+++ b/arch/arm/dts/sun8i-a33-inet-u70b-rev1.dts -@@ -11,6 +11,7 @@ - - aliases { - ethernet0 = &rtl8723cs; -+ serial0 = &uart0; - }; - - panel: panel { -@@ -76,6 +77,10 @@ - }; - }; - -+&mmc0 { -+ status = "disabled"; -+}; -+ - &mmc1 { - pinctrl-0 = <&mmc1_pg_pins>; - pinctrl-names = "default"; -@@ -158,6 +163,12 @@ - status = "okay"; - }; - -+&uart0 { -+ pinctrl-0 = <&uart0_pf_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ - &uart1 { - pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pg_pins>; - pinctrl-names = "default"; ---- a/configs/iNet_U70B_rev1_defconfig -+++ b/configs/iNet_U70B_rev1_defconfig -@@ -1,12 +1,12 @@ - CONFIG_ARM=y - CONFIG_ARCH_SUNXI=y - CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-u70b-rev1" --# CONFIG_SPL_SERIAL is not set - CONFIG_SPL=y - CONFIG_MACH_SUN8I_A33=y - CONFIG_DRAM_CLK=480 - CONFIG_DRAM_ZQ=31675 - CONFIG_DRAM_ODT_EN=y -+CONFIG_UART0_PORT_F=y - CONFIG_MMC0_CD_PIN="PB4" - CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:51000,le:158,ri:162,up:25,lo:10,hs:20,vs:3,sync:3,vmode:0" - CONFIG_VIDEO_LCD_DCLK_PHASE=0 -@@ -14,19 +14,15 @@ CONFIG_VIDEO_LCD_POWER="PH7" - CONFIG_VIDEO_LCD_BL_EN="PH6" - CONFIG_VIDEO_LCD_BL_PWM="PH0" - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set --CONFIG_CMD_BIND=y --CONFIG_CMD_CLK=y --CONFIG_CMD_PWM=y --CONFIG_CMD_I2C=y --CONFIG_CMD_WDT=y -+CONFIG_PREBOOT="fastboot usb 0" - CONFIG_CMD_PMIC=y - CONFIG_CMD_REGULATOR=y --# CONFIG_NET is not set - CONFIG_AXP_GPIO=y - CONFIG_REGULATOR_AXP=y - CONFIG_REGULATOR_AXP_USB_POWER=y - CONFIG_AXP_DLDO1_VOLT=3300 - CONFIG_DM_PWM=y - CONFIG_PWM_SUNXI=y --# CONFIG_REQUIRE_SERIAL_CONSOLE is not set --CONFIG_USB_MUSB_HOST=y -+CONFIG_REMOTEPROC_SUN6I_AR100=y -+CONFIG_USB_MUSB_GADGET=y -+CONFIG_WATCHDOG_AUTOSTART=y diff --git a/lede/package/boot/uboot-d1/patches/0004-ARM-dts-sun6i-mixtile-loftq-Add-USB1-VBUS-regulator.patch b/lede/package/boot/uboot-d1/patches/0004-ARM-dts-sun6i-mixtile-loftq-Add-USB1-VBUS-regulator.patch deleted file mode 100644 index b6685936ad..0000000000 --- a/lede/package/boot/uboot-d1/patches/0004-ARM-dts-sun6i-mixtile-loftq-Add-USB1-VBUS-regulator.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 40a0ec0fdb6a110d69151de5480148772877f267 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 26 Aug 2021 20:39:33 -0500 -Subject: [PATCH 04/90] ARM: dts: sun6i: mixtile-loftq: Add USB1 VBUS regulator - -This board is configured with CONFIG_USB1_VBUS_PIN="PH24", but no -regulator exists in its device tree. Add the regulator, so USB will -continue to work when the PHY driver switches to using the regulator -uclass instead of a GPIO. - -Update the device tree here because it does not exist in Linux. - -Signed-off-by: Samuel Holland ---- - arch/arm/dts/sun6i-a31-mixtile-loftq.dts | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) - ---- a/arch/arm/dts/sun6i-a31-mixtile-loftq.dts -+++ b/arch/arm/dts/sun6i-a31-mixtile-loftq.dts -@@ -6,6 +6,9 @@ - */ - - /dts-v1/; -+ -+#include -+ - #include "sun6i-a31.dtsi" - - / { -@@ -19,6 +22,15 @@ - chosen { - stdout-path = "serial0:115200n8"; - }; -+ -+ reg_usb1_vbus: usb1-vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb1-vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ enable-active-high; -+ gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; /* PH24 */ -+ }; - }; - - &ehci0 { -@@ -56,3 +68,8 @@ - pinctrl-0 = <&uart0_ph_pins>; - status = "okay"; - }; -+ -+&usbphy { -+ usb1_vbus-supply = <®_usb1_vbus>; -+ status = "okay"; -+}; diff --git a/lede/package/boot/uboot-d1/patches/0005-power-regulator-Add-a-driver-for-the-AXP-USB-power-s.patch b/lede/package/boot/uboot-d1/patches/0005-power-regulator-Add-a-driver-for-the-AXP-USB-power-s.patch deleted file mode 100644 index 62f81e3cd6..0000000000 --- a/lede/package/boot/uboot-d1/patches/0005-power-regulator-Add-a-driver-for-the-AXP-USB-power-s.patch +++ /dev/null @@ -1,97 +0,0 @@ -From e07c1d516c1a7842510d22a7cf88666d500a9a9a Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sun, 22 Aug 2021 21:35:45 -0500 -Subject: [PATCH 05/90] power: regulator: Add a driver for the AXP USB power - supply - -This driver reports the presence/absence of voltage on the PMIC's USB -VBUS pin. This information is used by the USB PHY driver. The -corresponding Linux driver uses the power supply class, which does not -exist in U-Boot. UCLASS_REGULATOR seems to be the closest match. - -Signed-off-by: Samuel Holland ---- - drivers/power/regulator/Kconfig | 7 ++++ - drivers/power/regulator/Makefile | 1 + - drivers/power/regulator/axp_usb_power.c | 49 +++++++++++++++++++++++++ - 3 files changed, 57 insertions(+) - create mode 100644 drivers/power/regulator/axp_usb_power.c - ---- a/drivers/power/regulator/Kconfig -+++ b/drivers/power/regulator/Kconfig -@@ -43,6 +43,13 @@ config REGULATOR_AS3722 - but does not yet support change voltages. Currently this must be - done using direct register writes to the PMIC. - -+config REGULATOR_AXP_USB_POWER -+ bool "Enable driver for X-Powers AXP PMIC USB power supply" -+ depends on DM_REGULATOR && PMIC_AXP -+ help -+ Enable support for reading the USB power supply status from -+ X-Powers AXP2xx and AXP8xx PMICs. -+ - config DM_REGULATOR_BD71837 - bool "Enable Driver Model for ROHM BD71837/BD71847 regulators" - depends on DM_REGULATOR && DM_PMIC_BD71837 ---- a/drivers/power/regulator/Makefile -+++ b/drivers/power/regulator/Makefile -@@ -7,6 +7,7 @@ - obj-$(CONFIG_$(SPL_)DM_REGULATOR) += regulator-uclass.o - obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o - obj-$(CONFIG_REGULATOR_AS3722) += as3722_regulator.o -+obj-$(CONFIG_$(SPL_)REGULATOR_AXP_USB_POWER) += axp_usb_power.o - obj-$(CONFIG_$(SPL_)DM_REGULATOR_DA9063) += da9063.o - obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o - obj-$(CONFIG_DM_REGULATOR_NPCM8XX) += npcm8xx_regulator.o ---- /dev/null -+++ b/drivers/power/regulator/axp_usb_power.c -@@ -0,0 +1,49 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+ -+#include -+#include -+#include -+#include -+ -+#define AXP_POWER_STATUS 0x00 -+#define AXP_POWER_STATUS_VBUS_PRESENT BIT(5) -+ -+static int axp_usb_power_get_enable(struct udevice *dev) -+{ -+ int ret; -+ -+ ret = pmic_reg_read(dev->parent, AXP_POWER_STATUS); -+ if (ret < 0) -+ return ret; -+ -+ return !!(ret & AXP_POWER_STATUS_VBUS_PRESENT); -+} -+ -+static const struct dm_regulator_ops axp_usb_power_ops = { -+ .get_enable = axp_usb_power_get_enable, -+}; -+ -+static int axp_usb_power_probe(struct udevice *dev) -+{ -+ struct dm_regulator_uclass_plat *uc_plat = dev_get_uclass_plat(dev); -+ -+ uc_plat->type = REGULATOR_TYPE_FIXED; -+ -+ return 0; -+} -+ -+static const struct udevice_id axp_usb_power_ids[] = { -+ { .compatible = "x-powers,axp202-usb-power-supply" }, -+ { .compatible = "x-powers,axp221-usb-power-supply" }, -+ { .compatible = "x-powers,axp223-usb-power-supply" }, -+ { .compatible = "x-powers,axp813-usb-power-supply" }, -+ { } -+}; -+ -+U_BOOT_DRIVER(axp_usb_power) = { -+ .name = "axp_usb_power", -+ .id = UCLASS_REGULATOR, -+ .of_match = axp_usb_power_ids, -+ .probe = axp_usb_power_probe, -+ .ops = &axp_usb_power_ops, -+}; diff --git a/lede/package/boot/uboot-d1/patches/0006-gpio-axp-sunxi-Remove-virtual-VBUS-detection-GPIO.patch b/lede/package/boot/uboot-d1/patches/0006-gpio-axp-sunxi-Remove-virtual-VBUS-detection-GPIO.patch deleted file mode 100644 index e890583bea..0000000000 --- a/lede/package/boot/uboot-d1/patches/0006-gpio-axp-sunxi-Remove-virtual-VBUS-detection-GPIO.patch +++ /dev/null @@ -1,122 +0,0 @@ -From c750151e1107a8d46ca0f9bd30c1da276b142ec1 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 26 Aug 2021 18:02:54 -0500 -Subject: [PATCH 06/90] gpio: axp/sunxi: Remove virtual VBUS detection GPIO - -Now that this functionality is modeled using the device tree and -regulator uclass, the named GPIO is not referenced anywhere. Remove it. - -Signed-off-by: Samuel Holland ---- - arch/arm/include/asm/arch-sunxi/gpio.h | 1 - - drivers/gpio/axp_gpio.c | 21 ++++----------------- - drivers/gpio/sunxi_gpio.c | 6 +----- - include/axp209.h | 1 - - include/axp221.h | 1 - - include/axp809.h | 1 - - include/axp818.h | 1 - - 7 files changed, 5 insertions(+), 27 deletions(-) - ---- a/arch/arm/include/asm/arch-sunxi/gpio.h -+++ b/arch/arm/include/asm/arch-sunxi/gpio.h -@@ -209,7 +209,6 @@ enum sunxi_gpio_number { - - /* Virtual AXP0 GPIOs */ - #define SUNXI_GPIO_AXP0_PREFIX "AXP0-" --#define SUNXI_GPIO_AXP0_VBUS_DETECT 4 - #define SUNXI_GPIO_AXP0_VBUS_ENABLE 5 - #define SUNXI_GPIO_AXP0_GPIO_COUNT 6 - ---- a/drivers/gpio/axp_gpio.c -+++ b/drivers/gpio/axp_gpio.c -@@ -36,18 +36,11 @@ static int axp_gpio_direction_input(stru - { - u8 reg; - -- switch (pin) { --#ifndef CONFIG_AXP152_POWER /* NA on axp152 */ -- case SUNXI_GPIO_AXP0_VBUS_DETECT: -- return 0; --#endif -- default: -- reg = axp_get_gpio_ctrl_reg(pin); -- if (reg == 0) -- return -EINVAL; -+ reg = axp_get_gpio_ctrl_reg(pin); -+ if (reg == 0) -+ return -EINVAL; - -- return pmic_bus_write(reg, AXP_GPIO_CTRL_INPUT); -- } -+ return pmic_bus_write(reg, AXP_GPIO_CTRL_INPUT); - } - - static int axp_gpio_direction_output(struct udevice *dev, unsigned pin, -@@ -83,12 +76,6 @@ static int axp_gpio_get_value(struct ude - int ret; - - switch (pin) { --#ifndef CONFIG_AXP152_POWER /* NA on axp152 */ -- case SUNXI_GPIO_AXP0_VBUS_DETECT: -- ret = pmic_bus_read(AXP_POWER_STATUS, &val); -- mask = AXP_POWER_STATUS_VBUS_PRESENT; -- break; --#endif - #ifdef AXP_MISC_CTRL_N_VBUSEN_FUNC - /* Only available on later PMICs */ - case SUNXI_GPIO_AXP0_VBUS_ENABLE: ---- a/drivers/gpio/sunxi_gpio.c -+++ b/drivers/gpio/sunxi_gpio.c -@@ -117,11 +117,7 @@ int sunxi_name_to_gpio(const char *name) - #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO - char lookup[8]; - -- if (strcasecmp(name, "AXP0-VBUS-DETECT") == 0) { -- sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d", -- SUNXI_GPIO_AXP0_VBUS_DETECT); -- name = lookup; -- } else if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) { -+ if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) { - sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d", - SUNXI_GPIO_AXP0_VBUS_ENABLE); - name = lookup; ---- a/include/axp209.h -+++ b/include/axp209.h -@@ -77,7 +77,6 @@ enum axp209_reg { - #ifdef CONFIG_AXP209_POWER - #define AXP_POWER_STATUS 0x00 - #define AXP_POWER_STATUS_ALDO_IN BIT(0) --#define AXP_POWER_STATUS_VBUS_PRESENT BIT(5) - #define AXP_GPIO0_CTRL 0x90 - #define AXP_GPIO1_CTRL 0x92 - #define AXP_GPIO2_CTRL 0x93 ---- a/include/axp221.h -+++ b/include/axp221.h -@@ -53,7 +53,6 @@ - #ifdef CONFIG_AXP221_POWER - #define AXP_POWER_STATUS 0x00 - #define AXP_POWER_STATUS_ALDO_IN BIT(0) --#define AXP_POWER_STATUS_VBUS_PRESENT BIT(5) - #define AXP_VBUS_IPSOUT 0x30 - #define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2) - #define AXP_MISC_CTRL 0x8f ---- a/include/axp809.h -+++ b/include/axp809.h -@@ -47,7 +47,6 @@ - #ifdef CONFIG_AXP809_POWER - #define AXP_POWER_STATUS 0x00 - #define AXP_POWER_STATUS_ALDO_IN BIT(0) --#define AXP_POWER_STATUS_VBUS_PRESENT BIT(5) - #define AXP_VBUS_IPSOUT 0x30 - #define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2) - #define AXP_MISC_CTRL 0x8f ---- a/include/axp818.h -+++ b/include/axp818.h -@@ -61,7 +61,6 @@ - #ifdef CONFIG_AXP818_POWER - #define AXP_POWER_STATUS 0x00 - #define AXP_POWER_STATUS_ALDO_IN BIT(0) --#define AXP_POWER_STATUS_VBUS_PRESENT BIT(5) - #define AXP_VBUS_IPSOUT 0x30 - #define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2) - #define AXP_MISC_CTRL 0x8f diff --git a/lede/package/boot/uboot-d1/patches/0007-power-regulator-Add-a-driver-for-the-AXP-PMIC-drivev.patch b/lede/package/boot/uboot-d1/patches/0007-power-regulator-Add-a-driver-for-the-AXP-PMIC-drivev.patch deleted file mode 100644 index 35b4597f98..0000000000 --- a/lede/package/boot/uboot-d1/patches/0007-power-regulator-Add-a-driver-for-the-AXP-PMIC-drivev.patch +++ /dev/null @@ -1,111 +0,0 @@ -From 25434a394705d2de92c50981e31347db4074204a Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 26 Aug 2021 21:32:15 -0500 -Subject: [PATCH 07/90] power: regulator: Add a driver for the AXP PMIC - drivevbus - -The first AXP regulator converted to use the regulator uclass is the -drivevbus switch, since it is used by the USB PHY driver. - -Signed-off-by: Samuel Holland ---- - drivers/power/regulator/Kconfig | 14 ++++++ - drivers/power/regulator/Makefile | 1 + - drivers/power/regulator/axp_regulator.c | 58 +++++++++++++++++++++++++ - 3 files changed, 73 insertions(+) - create mode 100644 drivers/power/regulator/axp_regulator.c - ---- a/drivers/power/regulator/Kconfig -+++ b/drivers/power/regulator/Kconfig -@@ -43,6 +43,20 @@ config REGULATOR_AS3722 - but does not yet support change voltages. Currently this must be - done using direct register writes to the PMIC. - -+config REGULATOR_AXP -+ bool "Enable driver for X-Powers AXP PMIC regulators" -+ depends on DM_REGULATOR && PMIC_AXP -+ help -+ Enable support for the regulators (DCDCs, LDOs) in the -+ X-Powers AXP152, AXP2xx, and AXP8xx PMICs. -+ -+config SPL_REGULATOR_AXP -+ bool "Enable driver for X-Powers AXP PMIC regulators in SPL" -+ depends on SPL_DM_REGULATOR && SPL_PMIC_AXP -+ help -+ Enable support in SPL for the regulators (DCDCs, LDOs) in the -+ X-Powers AXP152, AXP2xx, and AXP8xx PMICs. -+ - config REGULATOR_AXP_USB_POWER - bool "Enable driver for X-Powers AXP PMIC USB power supply" - depends on DM_REGULATOR && PMIC_AXP ---- a/drivers/power/regulator/Makefile -+++ b/drivers/power/regulator/Makefile -@@ -7,6 +7,7 @@ - obj-$(CONFIG_$(SPL_)DM_REGULATOR) += regulator-uclass.o - obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o - obj-$(CONFIG_REGULATOR_AS3722) += as3722_regulator.o -+obj-$(CONFIG_$(SPL_)REGULATOR_AXP) += axp_regulator.o - obj-$(CONFIG_$(SPL_)REGULATOR_AXP_USB_POWER) += axp_usb_power.o - obj-$(CONFIG_$(SPL_)DM_REGULATOR_DA9063) += da9063.o - obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o ---- /dev/null -+++ b/drivers/power/regulator/axp_regulator.c -@@ -0,0 +1,58 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+ -+#include -+#include -+#include -+#include -+ -+#define AXP_VBUS_IPSOUT 0x30 -+#define AXP_VBUS_IPSOUT_DRIVEBUS BIT(2) -+#define AXP_MISC_CTRL 0x8f -+#define AXP_MISC_CTRL_N_VBUSEN_FUNC BIT(4) -+ -+static int axp_drivevbus_get_enable(struct udevice *dev) -+{ -+ int ret; -+ -+ ret = pmic_reg_read(dev->parent, AXP_VBUS_IPSOUT); -+ if (ret < 0) -+ return ret; -+ -+ return !!(ret & AXP_VBUS_IPSOUT_DRIVEBUS); -+} -+ -+static int axp_drivevbus_set_enable(struct udevice *dev, bool enable) -+{ -+ return pmic_clrsetbits(dev->parent, AXP_VBUS_IPSOUT, -+ AXP_VBUS_IPSOUT_DRIVEBUS, -+ enable ? AXP_VBUS_IPSOUT_DRIVEBUS : 0); -+} -+ -+static const struct dm_regulator_ops axp_drivevbus_ops = { -+ .get_enable = axp_drivevbus_get_enable, -+ .set_enable = axp_drivevbus_set_enable, -+}; -+ -+static int axp_drivevbus_probe(struct udevice *dev) -+{ -+ struct dm_regulator_uclass_plat *uc_plat = dev_get_uclass_plat(dev); -+ int ret; -+ -+ uc_plat->type = REGULATOR_TYPE_FIXED; -+ -+ if (dev_read_bool(dev->parent, "x-powers,drive-vbus-en")) { -+ ret = pmic_clrsetbits(dev->parent, AXP_MISC_CTRL, -+ AXP_MISC_CTRL_N_VBUSEN_FUNC, 0); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+U_BOOT_DRIVER(axp_drivevbus) = { -+ .name = "axp_drivevbus", -+ .id = UCLASS_REGULATOR, -+ .probe = axp_drivevbus_probe, -+ .ops = &axp_drivevbus_ops, -+}; diff --git a/lede/package/boot/uboot-d1/patches/0008-power-pmic-axp-Probe-the-drivevbus-regulator-from-th.patch b/lede/package/boot/uboot-d1/patches/0008-power-pmic-axp-Probe-the-drivevbus-regulator-from-th.patch deleted file mode 100644 index 2e8ed790de..0000000000 --- a/lede/package/boot/uboot-d1/patches/0008-power-pmic-axp-Probe-the-drivevbus-regulator-from-th.patch +++ /dev/null @@ -1,41 +0,0 @@ -From a588c97f146b67bae47099bc419cf10c02eca169 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 26 Aug 2021 21:34:33 -0500 -Subject: [PATCH 08/90] power: pmic: axp: Probe the drivevbus regulator from - the DT - -Now that some regulator driver exists for this PMIC, add support for -probing regulator drivers from the device tree subnodes. - -Signed-off-by: Samuel Holland ---- - drivers/power/pmic/axp.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/drivers/power/pmic/axp.c -+++ b/drivers/power/pmic/axp.c -@@ -45,14 +45,24 @@ static struct dm_pmic_ops axp_pmic_ops = - .write = dm_i2c_write, - }; - -+static const struct pmic_child_info axp_pmic_child_info[] = { -+ { "drivevbus", "axp_drivevbus" }, -+ { } -+}; -+ - static int axp_pmic_bind(struct udevice *dev) - { -+ ofnode regulators_node; - int ret; - - ret = dm_scan_fdt_dev(dev); - if (ret) - return ret; - -+ regulators_node = dev_read_subnode(dev, "regulators"); -+ if (ofnode_valid(regulators_node)) -+ pmic_bind_children(dev, regulators_node, axp_pmic_child_info); -+ - if (CONFIG_IS_ENABLED(SYSRESET)) { - ret = device_bind_driver_to_node(dev, "axp_sysreset", "axp_sysreset", - dev_ofnode(dev), NULL); diff --git a/lede/package/boot/uboot-d1/patches/0009-phy-sun4i-usb-Control-USB-supplies-via-regulator-ucl.patch b/lede/package/boot/uboot-d1/patches/0009-phy-sun4i-usb-Control-USB-supplies-via-regulator-ucl.patch deleted file mode 100644 index bbbfd58617..0000000000 --- a/lede/package/boot/uboot-d1/patches/0009-phy-sun4i-usb-Control-USB-supplies-via-regulator-ucl.patch +++ /dev/null @@ -1,162 +0,0 @@ -From e8fb34342dfb79cd2059431dd1a0f03202a244ca Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 26 Aug 2021 22:11:37 -0500 -Subject: [PATCH 09/90] phy: sun4i-usb: Control USB supplies via regulator - uclass - -The device tree binding for the PHY provides VBUS supplies as regulator -references. Now that all boards have the appropriate regulator uclass -drivers enabled, the PHY driver can switch to using them. This replaces -direct GPIO usage, which in some cases needed a special DM-incompatible -"virtual" GPIO from the PMIC. - -The following boards provided a value for CONFIG_USB0_VBUS_PIN, but are -missing the "usb0_vbus-supply" property in their device tree. None of -them have the MUSB controller enabled in host or OTG mode, so they -should see no impact: - - Ainol_AW1_defconfig / sun7i-a20-ainol-aw1 - - Ampe_A76_defconfig / sun5i-a13-ampe-a76 - - CHIP_pro_defconfig / sun5i-gr8-chip-pro - - Cubieboard4_defconfig / sun9i-a80-cubieboard4 - - Merrii_A80_Optimus_defconfig / sun9i-a80-optimus - - Sunchip_CX-A99_defconfig / sun9i-a80-cx-a99 - - Yones_Toptech_BD1078_defconfig / sun7i-a20-yones-toptech-bd1078 - - Yones_Toptech_BS1078_V2_defconfig / - sun6i-a31s-yones-toptech-bs1078-v2 - - iNet_3F_defconfig / sun4i-a10-inet-3f - - iNet_3W_defconfig / sun4i-a10-inet-3w - - iNet_86VS_defconfig / sun5i-a13-inet-86vs - - iNet_D978_rev2_defconfig / sun8i-a33-inet-d978-rev2 - - icnova-a20-swac_defconfig / sun7i-a20-icnova-swac - - sun8i_a23_evb_defconfig / sun8i-a23-evb - -Similarly, the following boards set CONFIG_USB1_VBUS_PIN, but do not -have "usb1_vbus-supply" in their device tree. Neither of them have USB -enabled at all, so again there should be no impact: - - Cubieboard4_defconfig / sun9i-a80-cubieboard4 (also for USB3) - - sun8i_a23_evb_defconfig / sun8i-a23-evb - -The following boards use a different pin for USB1 VBUS between their -defconfig and their device tree. Depending on which is correct, they -may be broken: - - Linksprite_pcDuino3_Nano_defconfig (PH11) / - sun7i-a20-pcduino3-nano (PD2) - - icnova-a20-swac_defconfig (PG10) / sun7i-a20-icnova-swac (PH6) - -Finally, this board has conflicting pins given for its USB2 VBUS: - - Lamobo_R1_defconfig (PH3) / sun7i-a20-lamobo-r1 (PH12) - -Signed-off-by: Samuel Holland ---- - drivers/phy/allwinner/phy-sun4i-usb.c | 41 +++++++++++++-------------- - 1 file changed, 19 insertions(+), 22 deletions(-) - ---- a/drivers/phy/allwinner/phy-sun4i-usb.c -+++ b/drivers/phy/allwinner/phy-sun4i-usb.c -@@ -97,27 +97,22 @@ struct sun4i_usb_phy_cfg { - }; - - struct sun4i_usb_phy_info { -- const char *gpio_vbus; - const char *gpio_vbus_det; - const char *gpio_id_det; - } phy_info[] = { - { -- .gpio_vbus = CONFIG_USB0_VBUS_PIN, - .gpio_vbus_det = CONFIG_USB0_VBUS_DET, - .gpio_id_det = CONFIG_USB0_ID_DET, - }, - { -- .gpio_vbus = CONFIG_USB1_VBUS_PIN, - .gpio_vbus_det = NULL, - .gpio_id_det = NULL, - }, - { -- .gpio_vbus = CONFIG_USB2_VBUS_PIN, - .gpio_vbus_det = NULL, - .gpio_id_det = NULL, - }, - { -- .gpio_vbus = CONFIG_USB3_VBUS_PIN, - .gpio_vbus_det = NULL, - .gpio_id_det = NULL, - }, -@@ -125,11 +120,11 @@ struct sun4i_usb_phy_info { - - struct sun4i_usb_phy_plat { - void __iomem *pmu; -- struct gpio_desc gpio_vbus; - struct gpio_desc gpio_vbus_det; - struct gpio_desc gpio_id_det; - struct clk clocks; - struct reset_ctl resets; -+ struct udevice *vbus; - int id; - }; - -@@ -218,14 +213,18 @@ static int sun4i_usb_phy_power_on(struct - { - struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); - struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; -+ int ret; - - if (initial_usb_scan_delay) { - mdelay(initial_usb_scan_delay); - initial_usb_scan_delay = 0; - } - -- if (dm_gpio_is_valid(&usb_phy->gpio_vbus)) -- dm_gpio_set_value(&usb_phy->gpio_vbus, 1); -+ if (usb_phy->vbus) { -+ ret = regulator_set_enable(usb_phy->vbus, true); -+ if (ret && ret != -ENOSYS) -+ return ret; -+ } - - return 0; - } -@@ -234,9 +233,13 @@ static int sun4i_usb_phy_power_off(struc - { - struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); - struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; -+ int ret; - -- if (dm_gpio_is_valid(&usb_phy->gpio_vbus)) -- dm_gpio_set_value(&usb_phy->gpio_vbus, 0); -+ if (usb_phy->vbus) { -+ ret = regulator_set_enable(usb_phy->vbus, false); -+ if (ret && ret != -ENOSYS) -+ return ret; -+ } - - return 0; - } -@@ -450,22 +453,16 @@ static int sun4i_usb_phy_probe(struct ud - for (i = 0; i < data->cfg->num_phys; i++) { - struct sun4i_usb_phy_plat *phy = &plat[i]; - struct sun4i_usb_phy_info *info = &phy_info[i]; -- char name[16]; -+ char name[20]; - - if (data->cfg->missing_phys & BIT(i)) - continue; - -- ret = dm_gpio_lookup_name(info->gpio_vbus, &phy->gpio_vbus); -- if (ret == 0) { -- ret = dm_gpio_request(&phy->gpio_vbus, "usb_vbus"); -- if (ret) -- return ret; -- ret = dm_gpio_set_dir_flags(&phy->gpio_vbus, -- GPIOD_IS_OUT); -- if (ret) -- return ret; -- ret = dm_gpio_set_value(&phy->gpio_vbus, 0); -- if (ret) -+ snprintf(name, sizeof(name), "usb%d_vbus-supply", i); -+ ret = device_get_supply_regulator(dev, name, &phy->vbus); -+ if (phy->vbus) { -+ ret = regulator_set_enable(phy->vbus, false); -+ if (ret && ret != -ENOSYS) - return ret; - } - diff --git a/lede/package/boot/uboot-d1/patches/0010-sunxi-Remove-obsolete-USBx_VBUS_PIN-Kconfig-symbols.patch b/lede/package/boot/uboot-d1/patches/0010-sunxi-Remove-obsolete-USBx_VBUS_PIN-Kconfig-symbols.patch deleted file mode 100644 index edeae405ea..0000000000 --- a/lede/package/boot/uboot-d1/patches/0010-sunxi-Remove-obsolete-USBx_VBUS_PIN-Kconfig-symbols.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 649bb7845e30805c66f62fc5725c4dbf350f21cb Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 26 Aug 2021 22:26:40 -0500 -Subject: [PATCH 10/90] sunxi: Remove obsolete USBx_VBUS_PIN Kconfig symbols - -Now that the USB PHY driver uses the device tree to get VBUS supply -regulators, these Kconfig symbols are unused. Remove them. - -Signed-off-by: Samuel Holland ---- - arch/arm/mach-sunxi/Kconfig | 29 ----------------------------- - 1 file changed, 29 deletions(-) - ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -693,13 +693,6 @@ config MMC_SUNXI_SLOT_EXTRA - slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable - support for this. - --config USB0_VBUS_PIN -- string "Vbus enable pin for usb0 (otg)" -- default "" -- ---help--- -- Set the Vbus enable pin for usb0 (otg). This takes a string in the -- format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. -- - config USB0_VBUS_DET - string "Vbus detect pin for usb0 (otg)" - default "" -@@ -714,28 +707,6 @@ config USB0_ID_DET - Set the ID detect pin for usb0 (otg). This takes a string in the - format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. - --config USB1_VBUS_PIN -- string "Vbus enable pin for usb1 (ehci0)" -- default "PH6" if MACH_SUN4I || MACH_SUN7I -- default "PH27" if MACH_SUN6I -- ---help--- -- Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes -- a string in the format understood by sunxi_name_to_gpio, e.g. -- PH1 for pin 1 of port H. -- --config USB2_VBUS_PIN -- string "Vbus enable pin for usb2 (ehci1)" -- default "PH3" if MACH_SUN4I || MACH_SUN7I -- default "PH24" if MACH_SUN6I -- ---help--- -- See USB1_VBUS_PIN help text. -- --config USB3_VBUS_PIN -- string "Vbus enable pin for usb3 (ehci2)" -- default "" -- ---help--- -- See USB1_VBUS_PIN help text. -- - config I2C0_ENABLE - bool "Enable I2C/TWI controller 0" - default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_R40 diff --git a/lede/package/boot/uboot-d1/patches/0011-clk-sunxi-Add-support-for-the-D1-CCU.patch b/lede/package/boot/uboot-d1/patches/0011-clk-sunxi-Add-support-for-the-D1-CCU.patch deleted file mode 100644 index faa7f64327..0000000000 --- a/lede/package/boot/uboot-d1/patches/0011-clk-sunxi-Add-support-for-the-D1-CCU.patch +++ /dev/null @@ -1,393 +0,0 @@ -From 73d6c82e34e89cfde880d1948b3e0dc714adead8 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 30 Apr 2022 22:34:19 -0500 -Subject: [PATCH 11/90] clk: sunxi: Add support for the D1 CCU - -Since the D1 CCU binding is defined, we can add support for its -gates/resets, following the pattern of the existing drivers. - -Series-to: sunxi - -Signed-off-by: Samuel Holland ---- - drivers/clk/sunxi/Kconfig | 6 + - drivers/clk/sunxi/Makefile | 1 + - drivers/clk/sunxi/clk_d1.c | 82 ++++++++++++ - drivers/clk/sunxi/clk_sunxi.c | 5 + - include/dt-bindings/clock/sun20i-d1-ccu.h | 156 ++++++++++++++++++++++ - include/dt-bindings/reset/sun20i-d1-ccu.h | 77 +++++++++++ - 6 files changed, 327 insertions(+) - create mode 100644 drivers/clk/sunxi/clk_d1.c - create mode 100644 include/dt-bindings/clock/sun20i-d1-ccu.h - create mode 100644 include/dt-bindings/reset/sun20i-d1-ccu.h - ---- a/drivers/clk/sunxi/Kconfig -+++ b/drivers/clk/sunxi/Kconfig -@@ -87,6 +87,12 @@ config CLK_SUN8I_H3 - This enables common clock driver support for platforms based - on Allwinner H3/H5 SoC. - -+config CLK_SUN20I_D1 -+ bool "Clock driver for Allwinner D1" -+ help -+ This enables common clock driver support for platforms based -+ on Allwinner D1 SoC. -+ - config CLK_SUN50I_H6 - bool "Clock driver for Allwinner H6" - default MACH_SUN50I_H6 ---- a/drivers/clk/sunxi/Makefile -+++ b/drivers/clk/sunxi/Makefile -@@ -19,6 +19,7 @@ obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o - obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o - obj-$(CONFIG_CLK_SUN9I_A80) += clk_a80.o - obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o -+obj-$(CONFIG_CLK_SUN20I_D1) += clk_d1.o - obj-$(CONFIG_CLK_SUN50I_H6) += clk_h6.o - obj-$(CONFIG_CLK_SUN50I_H6_R) += clk_h6_r.o - obj-$(CONFIG_CLK_SUN50I_H616) += clk_h616.o ---- /dev/null -+++ b/drivers/clk/sunxi/clk_d1.c -@@ -0,0 +1,82 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (C) 2021 Samuel Holland -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static struct ccu_clk_gate d1_gates[] = { -+ [CLK_BUS_MMC0] = GATE(0x84c, BIT(0)), -+ [CLK_BUS_MMC1] = GATE(0x84c, BIT(1)), -+ [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)), -+ [CLK_BUS_UART0] = GATE(0x90c, BIT(0)), -+ [CLK_BUS_UART1] = GATE(0x90c, BIT(1)), -+ [CLK_BUS_UART2] = GATE(0x90c, BIT(2)), -+ [CLK_BUS_UART3] = GATE(0x90c, BIT(3)), -+ [CLK_BUS_UART4] = GATE(0x90c, BIT(4)), -+ [CLK_BUS_UART5] = GATE(0x90c, BIT(5)), -+ [CLK_BUS_I2C0] = GATE(0x91c, BIT(0)), -+ [CLK_BUS_I2C1] = GATE(0x91c, BIT(1)), -+ [CLK_BUS_I2C2] = GATE(0x91c, BIT(2)), -+ [CLK_BUS_I2C3] = GATE(0x91c, BIT(3)), -+ [CLK_SPI0] = GATE(0x940, BIT(31)), -+ [CLK_SPI1] = GATE(0x944, BIT(31)), -+ [CLK_BUS_SPI0] = GATE(0x96c, BIT(0)), -+ [CLK_BUS_SPI1] = GATE(0x96c, BIT(1)), -+ -+ [CLK_BUS_EMAC] = GATE(0x97c, BIT(0)), -+ -+ [CLK_USB_OHCI0] = GATE(0xa70, BIT(31)), -+ [CLK_USB_OHCI1] = GATE(0xa74, BIT(31)), -+ [CLK_BUS_OHCI0] = GATE(0xa8c, BIT(0)), -+ [CLK_BUS_OHCI1] = GATE(0xa8c, BIT(1)), -+ [CLK_BUS_EHCI0] = GATE(0xa8c, BIT(4)), -+ [CLK_BUS_EHCI1] = GATE(0xa8c, BIT(5)), -+ [CLK_BUS_OTG] = GATE(0xa8c, BIT(8)), -+ [CLK_BUS_LRADC] = GATE(0xa9c, BIT(0)), -+ -+ [CLK_RISCV] = GATE(0xd04, BIT(31)), -+}; -+ -+static struct ccu_reset d1_resets[] = { -+ [RST_BUS_MMC0] = RESET(0x84c, BIT(16)), -+ [RST_BUS_MMC1] = RESET(0x84c, BIT(17)), -+ [RST_BUS_MMC2] = RESET(0x84c, BIT(18)), -+ [RST_BUS_UART0] = RESET(0x90c, BIT(16)), -+ [RST_BUS_UART1] = RESET(0x90c, BIT(17)), -+ [RST_BUS_UART2] = RESET(0x90c, BIT(18)), -+ [RST_BUS_UART3] = RESET(0x90c, BIT(19)), -+ [RST_BUS_UART4] = RESET(0x90c, BIT(20)), -+ [RST_BUS_UART5] = RESET(0x90c, BIT(21)), -+ [RST_BUS_I2C0] = RESET(0x91c, BIT(16)), -+ [RST_BUS_I2C1] = RESET(0x91c, BIT(17)), -+ [RST_BUS_I2C2] = RESET(0x91c, BIT(18)), -+ [RST_BUS_I2C3] = RESET(0x91c, BIT(19)), -+ [RST_BUS_SPI0] = RESET(0x96c, BIT(16)), -+ [RST_BUS_SPI1] = RESET(0x96c, BIT(17)), -+ -+ [RST_BUS_EMAC] = RESET(0x97c, BIT(16)), -+ -+ [RST_USB_PHY0] = RESET(0xa70, BIT(30)), -+ [RST_USB_PHY1] = RESET(0xa74, BIT(30)), -+ [RST_BUS_OHCI0] = RESET(0xa8c, BIT(16)), -+ [RST_BUS_OHCI1] = RESET(0xa8c, BIT(17)), -+ [RST_BUS_EHCI0] = RESET(0xa8c, BIT(20)), -+ [RST_BUS_EHCI1] = RESET(0xa8c, BIT(21)), -+ [RST_BUS_OTG] = RESET(0xa8c, BIT(24)), -+ [RST_BUS_LRADC] = RESET(0xa9c, BIT(16)), -+}; -+ -+const struct ccu_desc d1_ccu_desc = { -+ .gates = d1_gates, -+ .resets = d1_resets, -+ .num_gates = ARRAY_SIZE(d1_gates), -+ .num_resets = ARRAY_SIZE(d1_resets), -+}; ---- a/drivers/clk/sunxi/clk_sunxi.c -+++ b/drivers/clk/sunxi/clk_sunxi.c -@@ -118,6 +118,7 @@ extern const struct ccu_desc a64_ccu_des - extern const struct ccu_desc a80_ccu_desc; - extern const struct ccu_desc a80_mmc_clk_desc; - extern const struct ccu_desc a83t_ccu_desc; -+extern const struct ccu_desc d1_ccu_desc; - extern const struct ccu_desc f1c100s_ccu_desc; - extern const struct ccu_desc h3_ccu_desc; - extern const struct ccu_desc h6_ccu_desc; -@@ -183,6 +184,10 @@ static const struct udevice_id sunxi_clk - { .compatible = "allwinner,sun9i-a80-mmc-config-clk", - .data = (ulong)&a80_mmc_clk_desc }, - #endif -+#ifdef CONFIG_CLK_SUN20I_D1 -+ { .compatible = "allwinner,sun20i-d1-ccu", -+ .data = (ulong)&d1_ccu_desc }, -+#endif - #ifdef CONFIG_CLK_SUN50I_A64 - { .compatible = "allwinner,sun50i-a64-ccu", - .data = (ulong)&a64_ccu_desc }, ---- /dev/null -+++ b/include/dt-bindings/clock/sun20i-d1-ccu.h -@@ -0,0 +1,156 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ -+/* -+ * Copyright (C) 2020 huangzhenwei@allwinnertech.com -+ * Copyright (C) 2021 Samuel Holland -+ */ -+ -+#ifndef _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_ -+#define _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_ -+ -+#define CLK_PLL_CPUX 0 -+#define CLK_PLL_DDR0 1 -+#define CLK_PLL_PERIPH0_4X 2 -+#define CLK_PLL_PERIPH0_2X 3 -+#define CLK_PLL_PERIPH0_800M 4 -+#define CLK_PLL_PERIPH0 5 -+#define CLK_PLL_PERIPH0_DIV3 6 -+#define CLK_PLL_VIDEO0_4X 7 -+#define CLK_PLL_VIDEO0_2X 8 -+#define CLK_PLL_VIDEO0 9 -+#define CLK_PLL_VIDEO1_4X 10 -+#define CLK_PLL_VIDEO1_2X 11 -+#define CLK_PLL_VIDEO1 12 -+#define CLK_PLL_VE 13 -+#define CLK_PLL_AUDIO0_4X 14 -+#define CLK_PLL_AUDIO0_2X 15 -+#define CLK_PLL_AUDIO0 16 -+#define CLK_PLL_AUDIO1 17 -+#define CLK_PLL_AUDIO1_DIV2 18 -+#define CLK_PLL_AUDIO1_DIV5 19 -+#define CLK_CPUX 20 -+#define CLK_CPUX_AXI 21 -+#define CLK_CPUX_APB 22 -+#define CLK_PSI_AHB 23 -+#define CLK_APB0 24 -+#define CLK_APB1 25 -+#define CLK_MBUS 26 -+#define CLK_DE 27 -+#define CLK_BUS_DE 28 -+#define CLK_DI 29 -+#define CLK_BUS_DI 30 -+#define CLK_G2D 31 -+#define CLK_BUS_G2D 32 -+#define CLK_CE 33 -+#define CLK_BUS_CE 34 -+#define CLK_VE 35 -+#define CLK_BUS_VE 36 -+#define CLK_BUS_DMA 37 -+#define CLK_BUS_MSGBOX0 38 -+#define CLK_BUS_MSGBOX1 39 -+#define CLK_BUS_MSGBOX2 40 -+#define CLK_BUS_SPINLOCK 41 -+#define CLK_BUS_HSTIMER 42 -+#define CLK_AVS 43 -+#define CLK_BUS_DBG 44 -+#define CLK_BUS_PWM 45 -+#define CLK_BUS_IOMMU 46 -+#define CLK_DRAM 47 -+#define CLK_MBUS_DMA 48 -+#define CLK_MBUS_VE 49 -+#define CLK_MBUS_CE 50 -+#define CLK_MBUS_TVIN 51 -+#define CLK_MBUS_CSI 52 -+#define CLK_MBUS_G2D 53 -+#define CLK_MBUS_RISCV 54 -+#define CLK_BUS_DRAM 55 -+#define CLK_MMC0 56 -+#define CLK_MMC1 57 -+#define CLK_MMC2 58 -+#define CLK_BUS_MMC0 59 -+#define CLK_BUS_MMC1 60 -+#define CLK_BUS_MMC2 61 -+#define CLK_BUS_UART0 62 -+#define CLK_BUS_UART1 63 -+#define CLK_BUS_UART2 64 -+#define CLK_BUS_UART3 65 -+#define CLK_BUS_UART4 66 -+#define CLK_BUS_UART5 67 -+#define CLK_BUS_I2C0 68 -+#define CLK_BUS_I2C1 69 -+#define CLK_BUS_I2C2 70 -+#define CLK_BUS_I2C3 71 -+#define CLK_SPI0 72 -+#define CLK_SPI1 73 -+#define CLK_BUS_SPI0 74 -+#define CLK_BUS_SPI1 75 -+#define CLK_EMAC_25M 76 -+#define CLK_BUS_EMAC 77 -+#define CLK_IR_TX 78 -+#define CLK_BUS_IR_TX 79 -+#define CLK_BUS_GPADC 80 -+#define CLK_BUS_THS 81 -+#define CLK_I2S0 82 -+#define CLK_I2S1 83 -+#define CLK_I2S2 84 -+#define CLK_I2S2_ASRC 85 -+#define CLK_BUS_I2S0 86 -+#define CLK_BUS_I2S1 87 -+#define CLK_BUS_I2S2 88 -+#define CLK_SPDIF_TX 89 -+#define CLK_SPDIF_RX 90 -+#define CLK_BUS_SPDIF 91 -+#define CLK_DMIC 92 -+#define CLK_BUS_DMIC 93 -+#define CLK_AUDIO_DAC 94 -+#define CLK_AUDIO_ADC 95 -+#define CLK_BUS_AUDIO 96 -+#define CLK_USB_OHCI0 97 -+#define CLK_USB_OHCI1 98 -+#define CLK_BUS_OHCI0 99 -+#define CLK_BUS_OHCI1 100 -+#define CLK_BUS_EHCI0 101 -+#define CLK_BUS_EHCI1 102 -+#define CLK_BUS_OTG 103 -+#define CLK_BUS_LRADC 104 -+#define CLK_BUS_DPSS_TOP 105 -+#define CLK_HDMI_24M 106 -+#define CLK_HDMI_CEC_32K 107 -+#define CLK_HDMI_CEC 108 -+#define CLK_BUS_HDMI 109 -+#define CLK_MIPI_DSI 110 -+#define CLK_BUS_MIPI_DSI 111 -+#define CLK_TCON_LCD0 112 -+#define CLK_BUS_TCON_LCD0 113 -+#define CLK_TCON_TV 114 -+#define CLK_BUS_TCON_TV 115 -+#define CLK_TVE 116 -+#define CLK_BUS_TVE_TOP 117 -+#define CLK_BUS_TVE 118 -+#define CLK_TVD 119 -+#define CLK_BUS_TVD_TOP 120 -+#define CLK_BUS_TVD 121 -+#define CLK_LEDC 122 -+#define CLK_BUS_LEDC 123 -+#define CLK_CSI_TOP 124 -+#define CLK_CSI_MCLK 125 -+#define CLK_BUS_CSI 126 -+#define CLK_TPADC 127 -+#define CLK_BUS_TPADC 128 -+#define CLK_BUS_TZMA 129 -+#define CLK_DSP 130 -+#define CLK_BUS_DSP_CFG 131 -+#define CLK_RISCV 132 -+#define CLK_RISCV_AXI 133 -+#define CLK_BUS_RISCV_CFG 134 -+#define CLK_FANOUT_24M 135 -+#define CLK_FANOUT_12M 136 -+#define CLK_FANOUT_16M 137 -+#define CLK_FANOUT_25M 138 -+#define CLK_FANOUT_32K 139 -+#define CLK_FANOUT_27M 140 -+#define CLK_FANOUT_PCLK 141 -+#define CLK_FANOUT0 142 -+#define CLK_FANOUT1 143 -+#define CLK_FANOUT2 144 -+ -+#endif /* _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_ */ ---- /dev/null -+++ b/include/dt-bindings/reset/sun20i-d1-ccu.h -@@ -0,0 +1,77 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ -+/* -+ * Copyright (c) 2020 huangzhenwei@allwinnertech.com -+ * Copyright (C) 2021 Samuel Holland -+ */ -+ -+#ifndef _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ -+#define _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ -+ -+#define RST_MBUS 0 -+#define RST_BUS_DE 1 -+#define RST_BUS_DI 2 -+#define RST_BUS_G2D 3 -+#define RST_BUS_CE 4 -+#define RST_BUS_VE 5 -+#define RST_BUS_DMA 6 -+#define RST_BUS_MSGBOX0 7 -+#define RST_BUS_MSGBOX1 8 -+#define RST_BUS_MSGBOX2 9 -+#define RST_BUS_SPINLOCK 10 -+#define RST_BUS_HSTIMER 11 -+#define RST_BUS_DBG 12 -+#define RST_BUS_PWM 13 -+#define RST_BUS_DRAM 14 -+#define RST_BUS_MMC0 15 -+#define RST_BUS_MMC1 16 -+#define RST_BUS_MMC2 17 -+#define RST_BUS_UART0 18 -+#define RST_BUS_UART1 19 -+#define RST_BUS_UART2 20 -+#define RST_BUS_UART3 21 -+#define RST_BUS_UART4 22 -+#define RST_BUS_UART5 23 -+#define RST_BUS_I2C0 24 -+#define RST_BUS_I2C1 25 -+#define RST_BUS_I2C2 26 -+#define RST_BUS_I2C3 27 -+#define RST_BUS_SPI0 28 -+#define RST_BUS_SPI1 29 -+#define RST_BUS_EMAC 30 -+#define RST_BUS_IR_TX 31 -+#define RST_BUS_GPADC 32 -+#define RST_BUS_THS 33 -+#define RST_BUS_I2S0 34 -+#define RST_BUS_I2S1 35 -+#define RST_BUS_I2S2 36 -+#define RST_BUS_SPDIF 37 -+#define RST_BUS_DMIC 38 -+#define RST_BUS_AUDIO 39 -+#define RST_USB_PHY0 40 -+#define RST_USB_PHY1 41 -+#define RST_BUS_OHCI0 42 -+#define RST_BUS_OHCI1 43 -+#define RST_BUS_EHCI0 44 -+#define RST_BUS_EHCI1 45 -+#define RST_BUS_OTG 46 -+#define RST_BUS_LRADC 47 -+#define RST_BUS_DPSS_TOP 48 -+#define RST_BUS_HDMI_SUB 49 -+#define RST_BUS_HDMI_MAIN 50 -+#define RST_BUS_MIPI_DSI 51 -+#define RST_BUS_TCON_LCD0 52 -+#define RST_BUS_TCON_TV 53 -+#define RST_BUS_LVDS0 54 -+#define RST_BUS_TVE 55 -+#define RST_BUS_TVE_TOP 56 -+#define RST_BUS_TVD 57 -+#define RST_BUS_TVD_TOP 58 -+#define RST_BUS_LEDC 59 -+#define RST_BUS_CSI 60 -+#define RST_BUS_TPADC 61 -+#define RST_DSP 62 -+#define RST_BUS_DSP_CFG 63 -+#define RST_BUS_DSP_DBG 64 -+#define RST_BUS_RISCV_CFG 65 -+ -+#endif /* _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ */ diff --git a/lede/package/boot/uboot-d1/patches/0012-gpio-axp-Remove-virtual-VBUS-enable-GPIO.patch b/lede/package/boot/uboot-d1/patches/0012-gpio-axp-Remove-virtual-VBUS-enable-GPIO.patch deleted file mode 100644 index 53f893c0ff..0000000000 --- a/lede/package/boot/uboot-d1/patches/0012-gpio-axp-Remove-virtual-VBUS-enable-GPIO.patch +++ /dev/null @@ -1,227 +0,0 @@ -From cbb281e0ec847b9de41970e470348b3534bb9a9f Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 26 Aug 2021 18:02:54 -0500 -Subject: [PATCH 12/90] gpio: axp: Remove virtual VBUS enable GPIO - -Now that this functionality is modeled using the device tree and -regulator uclass, the named GPIO is not referenced anywhere. Remove -it, along with the rest of the support for AXP virtual GPIOs. - -Signed-off-by: Samuel Holland ---- - arch/arm/include/asm/arch-sunxi/gpio.h | 8 --- - drivers/gpio/axp_gpio.c | 75 ++++++++------------------ - drivers/gpio/sunxi_gpio.c | 8 --- - include/axp221.h | 4 -- - include/axp809.h | 4 -- - include/axp818.h | 4 -- - 6 files changed, 21 insertions(+), 82 deletions(-) - ---- a/arch/arm/include/asm/arch-sunxi/gpio.h -+++ b/arch/arm/include/asm/arch-sunxi/gpio.h -@@ -111,7 +111,6 @@ enum sunxi_gpio_number { - SUNXI_GPIO_L_START = 352, - SUNXI_GPIO_M_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_L), - SUNXI_GPIO_N_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_M), -- SUNXI_GPIO_AXP0_START = 1024, - }; - - /* SUNXI GPIO number definitions */ -@@ -128,8 +127,6 @@ enum sunxi_gpio_number { - #define SUNXI_GPM(_nr) (SUNXI_GPIO_M_START + (_nr)) - #define SUNXI_GPN(_nr) (SUNXI_GPIO_N_START + (_nr)) - --#define SUNXI_GPAXP0(_nr) (SUNXI_GPIO_AXP0_START + (_nr)) -- - /* GPIO pin function config */ - #define SUNXI_GPIO_INPUT 0 - #define SUNXI_GPIO_OUTPUT 1 -@@ -207,11 +204,6 @@ enum sunxi_gpio_number { - #define SUNXI_GPIO_PULL_UP 1 - #define SUNXI_GPIO_PULL_DOWN 2 - --/* Virtual AXP0 GPIOs */ --#define SUNXI_GPIO_AXP0_PREFIX "AXP0-" --#define SUNXI_GPIO_AXP0_VBUS_ENABLE 5 --#define SUNXI_GPIO_AXP0_GPIO_COUNT 6 -- - struct sunxi_gpio_plat { - struct sunxi_gpio *regs; - char bank_name[3]; ---- a/drivers/gpio/axp_gpio.c -+++ b/drivers/gpio/axp_gpio.c -@@ -15,6 +15,9 @@ - #include - #include - -+#define AXP_GPIO_PREFIX "AXP0-" -+#define AXP_GPIO_COUNT 4 -+ - static int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val); - - static u8 axp_get_gpio_ctrl_reg(unsigned pin) -@@ -46,28 +49,14 @@ static int axp_gpio_direction_input(stru - static int axp_gpio_direction_output(struct udevice *dev, unsigned pin, - int val) - { -- __maybe_unused int ret; - u8 reg; - -- switch (pin) { --#ifdef AXP_MISC_CTRL_N_VBUSEN_FUNC -- /* Only available on later PMICs */ -- case SUNXI_GPIO_AXP0_VBUS_ENABLE: -- ret = pmic_bus_clrbits(AXP_MISC_CTRL, -- AXP_MISC_CTRL_N_VBUSEN_FUNC); -- if (ret) -- return ret; -- -- return axp_gpio_set_value(dev, pin, val); --#endif -- default: -- reg = axp_get_gpio_ctrl_reg(pin); -- if (reg == 0) -- return -EINVAL; -+ reg = axp_get_gpio_ctrl_reg(pin); -+ if (reg == 0) -+ return -EINVAL; - -- return pmic_bus_write(reg, val ? AXP_GPIO_CTRL_OUTPUT_HIGH : -- AXP_GPIO_CTRL_OUTPUT_LOW); -- } -+ return pmic_bus_write(reg, val ? AXP_GPIO_CTRL_OUTPUT_HIGH : -+ AXP_GPIO_CTRL_OUTPUT_LOW); - } - - static int axp_gpio_get_value(struct udevice *dev, unsigned pin) -@@ -75,25 +64,16 @@ static int axp_gpio_get_value(struct ude - u8 reg, val, mask; - int ret; - -- switch (pin) { --#ifdef AXP_MISC_CTRL_N_VBUSEN_FUNC -- /* Only available on later PMICs */ -- case SUNXI_GPIO_AXP0_VBUS_ENABLE: -- ret = pmic_bus_read(AXP_VBUS_IPSOUT, &val); -- mask = AXP_VBUS_IPSOUT_DRIVEBUS; -- break; --#endif -- default: -- reg = axp_get_gpio_ctrl_reg(pin); -- if (reg == 0) -- return -EINVAL; -+ reg = axp_get_gpio_ctrl_reg(pin); -+ if (reg == 0) -+ return -EINVAL; - -- ret = pmic_bus_read(AXP_GPIO_STATE, &val); -- mask = 1 << (pin + AXP_GPIO_STATE_OFFSET); -- } -+ ret = pmic_bus_read(AXP_GPIO_STATE, &val); - if (ret) - return ret; - -+ mask = 1 << (pin + AXP_GPIO_STATE_OFFSET); -+ - return (val & mask) ? 1 : 0; - } - -@@ -101,25 +81,12 @@ static int axp_gpio_set_value(struct ude - { - u8 reg; - -- switch (pin) { --#ifdef AXP_MISC_CTRL_N_VBUSEN_FUNC -- /* Only available on later PMICs */ -- case SUNXI_GPIO_AXP0_VBUS_ENABLE: -- if (val) -- return pmic_bus_setbits(AXP_VBUS_IPSOUT, -- AXP_VBUS_IPSOUT_DRIVEBUS); -- else -- return pmic_bus_clrbits(AXP_VBUS_IPSOUT, -- AXP_VBUS_IPSOUT_DRIVEBUS); --#endif -- default: -- reg = axp_get_gpio_ctrl_reg(pin); -- if (reg == 0) -- return -EINVAL; -+ reg = axp_get_gpio_ctrl_reg(pin); -+ if (reg == 0) -+ return -EINVAL; - -- return pmic_bus_write(reg, val ? AXP_GPIO_CTRL_OUTPUT_HIGH : -- AXP_GPIO_CTRL_OUTPUT_LOW); -- } -+ return pmic_bus_write(reg, val ? AXP_GPIO_CTRL_OUTPUT_HIGH : -+ AXP_GPIO_CTRL_OUTPUT_LOW); - } - - static const struct dm_gpio_ops gpio_axp_ops = { -@@ -134,8 +101,8 @@ static int gpio_axp_probe(struct udevice - struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); - - /* Tell the uclass how many GPIOs we have */ -- uc_priv->bank_name = strdup(SUNXI_GPIO_AXP0_PREFIX); -- uc_priv->gpio_count = SUNXI_GPIO_AXP0_GPIO_COUNT; -+ uc_priv->bank_name = AXP_GPIO_PREFIX; -+ uc_priv->gpio_count = AXP_GPIO_COUNT; - - return 0; - } ---- a/drivers/gpio/sunxi_gpio.c -+++ b/drivers/gpio/sunxi_gpio.c -@@ -114,15 +114,7 @@ int sunxi_name_to_gpio(const char *name) - { - unsigned int gpio; - int ret; --#if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO -- char lookup[8]; - -- if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) { -- sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d", -- SUNXI_GPIO_AXP0_VBUS_ENABLE); -- name = lookup; -- } --#endif - ret = gpio_lookup_name(name, NULL, NULL, &gpio); - - return ret ? ret : gpio; ---- a/include/axp221.h -+++ b/include/axp221.h -@@ -53,10 +53,6 @@ - #ifdef CONFIG_AXP221_POWER - #define AXP_POWER_STATUS 0x00 - #define AXP_POWER_STATUS_ALDO_IN BIT(0) --#define AXP_VBUS_IPSOUT 0x30 --#define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2) --#define AXP_MISC_CTRL 0x8f --#define AXP_MISC_CTRL_N_VBUSEN_FUNC (1 << 4) - #define AXP_GPIO0_CTRL 0x90 - #define AXP_GPIO1_CTRL 0x92 - #define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ ---- a/include/axp809.h -+++ b/include/axp809.h -@@ -47,10 +47,6 @@ - #ifdef CONFIG_AXP809_POWER - #define AXP_POWER_STATUS 0x00 - #define AXP_POWER_STATUS_ALDO_IN BIT(0) --#define AXP_VBUS_IPSOUT 0x30 --#define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2) --#define AXP_MISC_CTRL 0x8f --#define AXP_MISC_CTRL_N_VBUSEN_FUNC (1 << 4) - #define AXP_GPIO0_CTRL 0x90 - #define AXP_GPIO1_CTRL 0x92 - #define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ ---- a/include/axp818.h -+++ b/include/axp818.h -@@ -61,10 +61,6 @@ - #ifdef CONFIG_AXP818_POWER - #define AXP_POWER_STATUS 0x00 - #define AXP_POWER_STATUS_ALDO_IN BIT(0) --#define AXP_VBUS_IPSOUT 0x30 --#define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2) --#define AXP_MISC_CTRL 0x8f --#define AXP_MISC_CTRL_N_VBUSEN_FUNC (1 << 4) - #define AXP_GPIO0_CTRL 0x90 - #define AXP_GPIO1_CTRL 0x92 - #define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ diff --git a/lede/package/boot/uboot-d1/patches/0013-clk-sunxi-Add-a-driver-for-the-legacy-A31-A23-A33-PR.patch b/lede/package/boot/uboot-d1/patches/0013-clk-sunxi-Add-a-driver-for-the-legacy-A31-A23-A33-PR.patch deleted file mode 100644 index 2c0029a29b..0000000000 --- a/lede/package/boot/uboot-d1/patches/0013-clk-sunxi-Add-a-driver-for-the-legacy-A31-A23-A33-PR.patch +++ /dev/null @@ -1,160 +0,0 @@ -From 5a909f4d4d10f3a7a59b3b75eee502937e166891 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Mon, 2 May 2022 22:00:05 -0500 -Subject: [PATCH 13/90] clk: sunxi: Add a driver for the legacy A31/A23/A33 - PRCM - -Signed-off-by: Samuel Holland ---- - drivers/clk/sunxi/Kconfig | 13 ++++- - drivers/clk/sunxi/Makefile | 1 + - drivers/clk/sunxi/clk_a31_apb0.c | 97 ++++++++++++++++++++++++++++++++ - include/clk/sunxi.h | 1 + - 4 files changed, 110 insertions(+), 2 deletions(-) - create mode 100644 drivers/clk/sunxi/clk_a31_apb0.c - ---- a/drivers/clk/sunxi/Kconfig -+++ b/drivers/clk/sunxi/Kconfig -@@ -38,12 +38,21 @@ config CLK_SUN6I_A31 - This enables common clock driver support for platforms based - on Allwinner A31/A31s SoC. - -+config CLK_SUN6I_A31_APB0 -+ bool "Clock driver for Allwinner A31 generation PRCM (legacy)" -+ default MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 -+ help -+ This enables common clock driver support for the PRCM -+ in Allwinner A31/A31s/A23/A33 SoCs using the legacy PRCM -+ MFD binding. -+ - config CLK_SUN6I_A31_R -- bool "Clock driver for Allwinner A31 generation PRCM" -+ bool "Clock driver for Allwinner A31 generation PRCM (CCU)" - default SUNXI_GEN_SUN6I - help - This enables common clock driver support for the PRCM -- in Allwinner A31/A31s/A23/A33/A83T/H3/A64/H5 SoCs. -+ in Allwinner A31/A31s/A23/A33/A83T/H3/A64/H5 SoCs using -+ the new CCU binding. - - config CLK_SUN8I_A23 - bool "Clock driver for Allwinner A23/A33" ---- a/drivers/clk/sunxi/Makefile -+++ b/drivers/clk/sunxi/Makefile -@@ -12,6 +12,7 @@ obj-$(CONFIG_CLK_SUNIV_F1C100S) += clk_f - obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o - obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o - obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o -+obj-$(CONFIG_CLK_SUN6I_A31_APB0) += clk_a31_apb0.o - obj-$(CONFIG_CLK_SUN6I_A31_R) += clk_a31_r.o - obj-$(CONFIG_CLK_SUN8I_A23) += clk_a23.o - obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o ---- /dev/null -+++ b/drivers/clk/sunxi/clk_a31_apb0.c -@@ -0,0 +1,97 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (C) Samuel Holland -+ */ -+ -+#include -+#include -+#include -+#include -+ -+static struct ccu_clk_gate sun6i_apb0_gates[] = { -+ [0] = GATE(0x028, BIT(0)), -+ [1] = GATE(0x028, BIT(1)), -+ [2] = GATE(0x028, BIT(2)), -+ [3] = GATE(0x028, BIT(3)), -+ [4] = GATE(0x028, BIT(4)), -+ [5] = GATE(0x028, BIT(5)), -+ [6] = GATE(0x028, BIT(6)), -+ [7] = GATE(0x028, BIT(7)), -+}; -+ -+static struct ccu_reset sun6i_apb0_resets[] = { -+ [0] = RESET(0x0b0, BIT(0)), -+ [1] = RESET(0x0b0, BIT(1)), -+ [2] = RESET(0x0b0, BIT(2)), -+ [3] = RESET(0x0b0, BIT(3)), -+ [4] = RESET(0x0b0, BIT(4)), -+ [5] = RESET(0x0b0, BIT(5)), -+ [6] = RESET(0x0b0, BIT(6)), -+ [7] = RESET(0x0b0, BIT(7)), -+}; -+ -+const struct ccu_desc sun6i_apb0_clk_desc = { -+ .gates = sun6i_apb0_gates, -+ .resets = sun6i_apb0_resets, -+ .num_gates = ARRAY_SIZE(sun6i_apb0_gates), -+ .num_resets = ARRAY_SIZE(sun6i_apb0_resets), -+}; -+ -+static int sun6i_apb0_of_to_plat(struct udevice *dev) -+{ -+ struct ccu_plat *plat = dev_get_plat(dev); -+ -+ plat->base = dev_read_addr_ptr(dev->parent); -+ if (!plat->base) -+ return -ENOMEM; -+ -+ plat->desc = (const struct ccu_desc *)dev_get_driver_data(dev); -+ if (!plat->desc) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static const struct udevice_id sun6i_apb0_clk_ids[] = { -+ { .compatible = "allwinner,sun6i-a31-apb0-gates-clk", -+ .data = (ulong)&sun6i_apb0_clk_desc }, -+ { .compatible = "allwinner,sun8i-a23-apb0-gates-clk", -+ .data = (ulong)&sun6i_apb0_clk_desc }, -+ { } -+}; -+ -+U_BOOT_DRIVER(sun6i_apb0_clk) = { -+ .name = "sun6i_apb0_clk", -+ .id = UCLASS_CLK, -+ .of_match = sun6i_apb0_clk_ids, -+ .of_to_plat = sun6i_apb0_of_to_plat, -+ .plat_auto = sizeof(struct ccu_plat), -+ .ops = &sunxi_clk_ops, -+}; -+ -+static const struct udevice_id sun6i_apb0_reset_ids[] = { -+ { .compatible = "allwinner,sun6i-a31-clock-reset", -+ .data = (ulong)&sun6i_apb0_clk_desc }, -+ { } -+}; -+ -+U_BOOT_DRIVER(sun6i_apb0_reset) = { -+ .name = "sun6i_apb0_reset", -+ .id = UCLASS_RESET, -+ .of_match = sun6i_apb0_reset_ids, -+ .of_to_plat = sun6i_apb0_of_to_plat, -+ .plat_auto = sizeof(struct ccu_plat), -+ .ops = &sunxi_reset_ops, -+}; -+ -+static const struct udevice_id sun6i_prcm_mfd_ids[] = { -+ { .compatible = "allwinner,sun6i-a31-prcm" }, -+ { .compatible = "allwinner,sun8i-a23-prcm" }, -+ { } -+}; -+ -+U_BOOT_DRIVER(sun6i_prcm_mfd) = { -+ .name = "sun6i_prcm_mfd", -+ .id = UCLASS_SIMPLE_BUS, -+ .of_match = sun6i_prcm_mfd_ids, -+}; ---- a/include/clk/sunxi.h -+++ b/include/clk/sunxi.h -@@ -86,5 +86,6 @@ struct ccu_plat { - }; - - extern struct clk_ops sunxi_clk_ops; -+extern struct reset_ops sunxi_reset_ops; - - #endif /* _CLK_SUNXI_H */ diff --git a/lede/package/boot/uboot-d1/patches/0014-clk-sunxi-Use-the-right-symbol-in-the-Makefile.patch b/lede/package/boot/uboot-d1/patches/0014-clk-sunxi-Use-the-right-symbol-in-the-Makefile.patch deleted file mode 100644 index 858af896aa..0000000000 --- a/lede/package/boot/uboot-d1/patches/0014-clk-sunxi-Use-the-right-symbol-in-the-Makefile.patch +++ /dev/null @@ -1,21 +0,0 @@ -From 3d97f99cb173422ee8a15b7ec1df83ff61e68204 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sun, 30 Oct 2022 14:28:23 -0500 -Subject: [PATCH 14/90] clk: sunxi: Use the right symbol in the Makefile - -Signed-off-by: Samuel Holland ---- - drivers/clk/Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/clk/Makefile -+++ b/drivers/clk/Makefile -@@ -25,7 +25,7 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ - obj-$(CONFIG_ARCH_SOCFPGA) += altera/ - obj-$(CONFIG_ARCH_STM32) += stm32/ - obj-$(CONFIG_ARCH_STM32MP) += stm32/ --obj-$(CONFIG_ARCH_SUNXI) += sunxi/ -+obj-$(CONFIG_CLK_SUNXI) += sunxi/ - obj-$(CONFIG_CLK_AT91) += at91/ - obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o - obj-$(CONFIG_CLK_BOSTON) += clk_boston.o diff --git a/lede/package/boot/uboot-d1/patches/0015-net-sun8i-emac-Use-common-syscon-setup-for-R40.patch b/lede/package/boot/uboot-d1/patches/0015-net-sun8i-emac-Use-common-syscon-setup-for-R40.patch deleted file mode 100644 index 41e72bdd2f..0000000000 --- a/lede/package/boot/uboot-d1/patches/0015-net-sun8i-emac-Use-common-syscon-setup-for-R40.patch +++ /dev/null @@ -1,100 +0,0 @@ -From 9766169812418aee10dbc8d40aca27c1c576f521 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 14 Jul 2022 23:39:46 -0500 -Subject: [PATCH 15/90] net: sun8i-emac: Use common syscon setup for R40 - -While R40 puts the EMAC syscon register at a different address from -other variants, the relevant portion of the register's layout is the -same. Factor out the register offset so the same code can be shared -by all variants. This matches what the Linux driver does. - -This change provides two benefits beyond the simplification: - - R40 boards now respect the RX delays from the devicetree - - This resolves a warning on architectures where readl/writel - expect the address to have a pointer type, not phys_addr_t. - -Series-to: sunxi - -Cover-letter: -net: sun8i-emac: Allwinner D1 Support -D1 is a RISC-V SoC containing an EMAC compatible with the A64 EMAC. -However, there are a couple of issues with the driver preventing it -being built for RISC-V. These are resolved by patches 2-3. Patch 1 is -a general cleanup. -END - -Signed-off-by: Samuel Holland ---- - drivers/net/sun8i_emac.c | 29 ++++++++++++----------------- - 1 file changed, 12 insertions(+), 17 deletions(-) - ---- a/drivers/net/sun8i_emac.c -+++ b/drivers/net/sun8i_emac.c -@@ -162,7 +162,7 @@ struct emac_eth_dev { - - enum emac_variant variant; - void *mac_reg; -- phys_addr_t sysctl_reg; -+ void *sysctl_reg; - struct phy_device *phydev; - struct mii_dev *bus; - struct clk tx_clk; -@@ -317,18 +317,7 @@ static int sun8i_emac_set_syscon(struct - { - u32 reg; - -- if (priv->variant == R40_GMAC) { -- /* Select RGMII for R40 */ -- reg = readl(priv->sysctl_reg + 0x164); -- reg |= SC_ETCS_INT_GMII | -- SC_EPIT | -- (CONFIG_GMAC_TX_DELAY << SC_ETXDC_OFFSET); -- -- writel(reg, priv->sysctl_reg + 0x164); -- return 0; -- } -- -- reg = readl(priv->sysctl_reg + 0x30); -+ reg = readl(priv->sysctl_reg); - - reg = sun8i_emac_set_syscon_ephy(priv, reg); - -@@ -369,7 +358,7 @@ static int sun8i_emac_set_syscon(struct - reg |= ((pdata->rx_delay_ps / 100) << SC_ERXDC_OFFSET) - & SC_ERXDC_MASK; - -- writel(reg, priv->sysctl_reg + 0x30); -+ writel(reg, priv->sysctl_reg); - - return 0; - } -@@ -792,6 +781,7 @@ static int sun8i_emac_eth_of_to_plat(str - struct sun8i_eth_pdata *sun8i_pdata = dev_get_plat(dev); - struct eth_pdata *pdata = &sun8i_pdata->eth_pdata; - struct emac_eth_dev *priv = dev_get_priv(dev); -+ phys_addr_t syscon_base; - const fdt32_t *reg; - int node = dev_of_offset(dev); - int offset = 0; -@@ -837,13 +827,18 @@ static int sun8i_emac_eth_of_to_plat(str - __func__); - return -EINVAL; - } -- priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob, -- offset, reg); -- if (priv->sysctl_reg == FDT_ADDR_T_NONE) { -+ -+ syscon_base = fdt_translate_address((void *)gd->fdt_blob, offset, reg); -+ if (syscon_base == FDT_ADDR_T_NONE) { - debug("%s: Cannot find syscon base address\n", __func__); - return -EINVAL; - } - -+ if (priv->variant == R40_GMAC) -+ priv->sysctl_reg = (void *)syscon_base + 0x164; -+ else -+ priv->sysctl_reg = (void *)syscon_base + 0x30; -+ - pdata->phy_interface = -1; - priv->phyaddr = -1; - priv->use_internal_phy = false; diff --git a/lede/package/boot/uboot-d1/patches/0016-sunxi-mmc-ignore-card-detect-in-SPL.patch b/lede/package/boot/uboot-d1/patches/0016-sunxi-mmc-ignore-card-detect-in-SPL.patch deleted file mode 100644 index a8fe0cb830..0000000000 --- a/lede/package/boot/uboot-d1/patches/0016-sunxi-mmc-ignore-card-detect-in-SPL.patch +++ /dev/null @@ -1,92 +0,0 @@ -From 2cde6c8a7c41c13137298c19b4e104e4f5d6851c Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Wed, 13 Jul 2022 17:21:43 +0100 -Subject: [PATCH 16/90] sunxi: mmc: ignore card detect in SPL - -The sunxi MMC code does not use the DM in the SPL, as we don't have a -device tree available that early, also no space for it. -This also means we cannot access the card-detect GPIO information from -there, so we have Kconfig symbols called CONFIG_MMCx_CD_PIN, which each -board has to define. This is a burden, also requires extra GPIO code in -the SPL. -As the SPL is the natural successor of the BootROM (from which we are -loaded), we can actually ignore the CD pin completely, as this is what -the BootROM does as well: CD GPIOs are board specific, but the BootROM -is not, so accesses the MMC devices anyway. - -Remove the card detect code from the non-DM implementation of the sunxi -MMC driver, to get rid of this unneeded code. - -Signed-off-by: Andre Przywara ---- - drivers/mmc/sunxi_mmc.c | 37 ++----------------------------------- - 1 file changed, 2 insertions(+), 35 deletions(-) - ---- a/drivers/mmc/sunxi_mmc.c -+++ b/drivers/mmc/sunxi_mmc.c -@@ -44,22 +44,10 @@ struct sunxi_mmc_priv { - /* support 4 mmc hosts */ - struct sunxi_mmc_priv mmc_host[4]; - --static int sunxi_mmc_getcd_gpio(int sdc_no) --{ -- switch (sdc_no) { -- case 0: return sunxi_name_to_gpio(CONFIG_MMC0_CD_PIN); -- case 1: return sunxi_name_to_gpio(CONFIG_MMC1_CD_PIN); -- case 2: return sunxi_name_to_gpio(CONFIG_MMC2_CD_PIN); -- case 3: return sunxi_name_to_gpio(CONFIG_MMC3_CD_PIN); -- } -- return -EINVAL; --} -- - static int mmc_resource_init(int sdc_no) - { - struct sunxi_mmc_priv *priv = &mmc_host[sdc_no]; - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; -- int cd_pin, ret = 0; - - debug("init mmc %d resource\n", sdc_no); - -@@ -90,16 +78,7 @@ static int mmc_resource_init(int sdc_no) - } - priv->mmc_no = sdc_no; - -- cd_pin = sunxi_mmc_getcd_gpio(sdc_no); -- if (cd_pin >= 0) { -- ret = gpio_request(cd_pin, "mmc_cd"); -- if (!ret) { -- sunxi_gpio_set_pull(cd_pin, SUNXI_GPIO_PULL_UP); -- ret = gpio_direction_input(cd_pin); -- } -- } -- -- return ret; -+ return 0; - } - #endif - -@@ -523,23 +502,11 @@ static int sunxi_mmc_send_cmd_legacy(str - return sunxi_mmc_send_cmd_common(priv, mmc, cmd, data); - } - --static int sunxi_mmc_getcd_legacy(struct mmc *mmc) --{ -- struct sunxi_mmc_priv *priv = mmc->priv; -- int cd_pin; -- -- cd_pin = sunxi_mmc_getcd_gpio(priv->mmc_no); -- if (cd_pin < 0) -- return 1; -- -- return !gpio_get_value(cd_pin); --} -- -+/* .get_cd is not needed by the SPL */ - static const struct mmc_ops sunxi_mmc_ops = { - .send_cmd = sunxi_mmc_send_cmd_legacy, - .set_ios = sunxi_mmc_set_ios_legacy, - .init = sunxi_mmc_core_init, -- .getcd = sunxi_mmc_getcd_legacy, - }; - - struct mmc *sunxi_mmc_init(int sdc_no) diff --git a/lede/package/boot/uboot-d1/patches/0017-sunxi-mmc-group-non-DM-specific-functions.patch b/lede/package/boot/uboot-d1/patches/0017-sunxi-mmc-group-non-DM-specific-functions.patch deleted file mode 100644 index 6161c33187..0000000000 --- a/lede/package/boot/uboot-d1/patches/0017-sunxi-mmc-group-non-DM-specific-functions.patch +++ /dev/null @@ -1,177 +0,0 @@ -From 74afc3a4e0ff780eddd859a25de7142e4baeeed5 Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Wed, 13 Jul 2022 17:21:44 +0100 -Subject: [PATCH 17/90] sunxi: mmc: group non-DM specific functions - -As the SPL code for sunxi boards does not use the driver model, we have -two mmc_ops structures, one for DM, one for non-DM. The actual hardware -access code is shared, with the respective callback functions using that -common code. - -To make this more obvious and easier to read, reorder the functions to -group them: we first have the common code, then the non-DM bits, and -the proper DM implementation at the end. -Also document this structure in the comment at the beginning of the file. - -No functional change intended. - -Signed-off-by: Andre Przywara ---- - drivers/mmc/sunxi_mmc.c | 117 +++++++++++++++++++++------------------- - 1 file changed, 61 insertions(+), 56 deletions(-) - ---- a/drivers/mmc/sunxi_mmc.c -+++ b/drivers/mmc/sunxi_mmc.c -@@ -5,6 +5,12 @@ - * Aaron - * - * MMC driver for allwinner sunxi platform. -+ * -+ * This driver is used by the (ARM) SPL with the legacy MMC interface, and -+ * by U-Boot proper using the full DM interface. The actual hardware access -+ * code is common, and comes first in this file. -+ * The legacy MMC interface implementation comes next, followed by the -+ * proper DM_MMC implementation at the end. - */ - - #include -@@ -40,48 +46,6 @@ struct sunxi_mmc_priv { - struct mmc_config cfg; - }; - --#if !CONFIG_IS_ENABLED(DM_MMC) --/* support 4 mmc hosts */ --struct sunxi_mmc_priv mmc_host[4]; -- --static int mmc_resource_init(int sdc_no) --{ -- struct sunxi_mmc_priv *priv = &mmc_host[sdc_no]; -- struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; -- -- debug("init mmc %d resource\n", sdc_no); -- -- switch (sdc_no) { -- case 0: -- priv->reg = (struct sunxi_mmc *)SUNXI_MMC0_BASE; -- priv->mclkreg = &ccm->sd0_clk_cfg; -- break; -- case 1: -- priv->reg = (struct sunxi_mmc *)SUNXI_MMC1_BASE; -- priv->mclkreg = &ccm->sd1_clk_cfg; -- break; --#ifdef SUNXI_MMC2_BASE -- case 2: -- priv->reg = (struct sunxi_mmc *)SUNXI_MMC2_BASE; -- priv->mclkreg = &ccm->sd2_clk_cfg; -- break; --#endif --#ifdef SUNXI_MMC3_BASE -- case 3: -- priv->reg = (struct sunxi_mmc *)SUNXI_MMC3_BASE; -- priv->mclkreg = &ccm->sd3_clk_cfg; -- break; --#endif -- default: -- printf("Wrong mmc number %d\n", sdc_no); -- return -1; -- } -- priv->mmc_no = sdc_no; -- -- return 0; --} --#endif -- - /* - * All A64 and later MMC controllers feature auto-calibration. This would - * normally be detected via the compatible string, but we need something -@@ -269,19 +233,6 @@ static int sunxi_mmc_set_ios_common(stru - return 0; - } - --#if !CONFIG_IS_ENABLED(DM_MMC) --static int sunxi_mmc_core_init(struct mmc *mmc) --{ -- struct sunxi_mmc_priv *priv = mmc->priv; -- -- /* Reset controller */ -- writel(SUNXI_MMC_GCTRL_RESET, &priv->reg->gctrl); -- udelay(1000); -- -- return 0; --} --#endif -- - static int mmc_trans_data_by_cpu(struct sunxi_mmc_priv *priv, struct mmc *mmc, - struct mmc_data *data) - { -@@ -486,7 +437,60 @@ out: - return error; - } - -+/* non-DM code here is used by the (ARM) SPL only */ -+ - #if !CONFIG_IS_ENABLED(DM_MMC) -+/* support 4 mmc hosts */ -+struct sunxi_mmc_priv mmc_host[4]; -+ -+static int mmc_resource_init(int sdc_no) -+{ -+ struct sunxi_mmc_priv *priv = &mmc_host[sdc_no]; -+ struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; -+ -+ debug("init mmc %d resource\n", sdc_no); -+ -+ switch (sdc_no) { -+ case 0: -+ priv->reg = (struct sunxi_mmc *)SUNXI_MMC0_BASE; -+ priv->mclkreg = &ccm->sd0_clk_cfg; -+ break; -+ case 1: -+ priv->reg = (struct sunxi_mmc *)SUNXI_MMC1_BASE; -+ priv->mclkreg = &ccm->sd1_clk_cfg; -+ break; -+#ifdef SUNXI_MMC2_BASE -+ case 2: -+ priv->reg = (struct sunxi_mmc *)SUNXI_MMC2_BASE; -+ priv->mclkreg = &ccm->sd2_clk_cfg; -+ break; -+#endif -+#ifdef SUNXI_MMC3_BASE -+ case 3: -+ priv->reg = (struct sunxi_mmc *)SUNXI_MMC3_BASE; -+ priv->mclkreg = &ccm->sd3_clk_cfg; -+ break; -+#endif -+ default: -+ printf("Wrong mmc number %d\n", sdc_no); -+ return -1; -+ } -+ priv->mmc_no = sdc_no; -+ -+ return 0; -+} -+ -+static int sunxi_mmc_core_init(struct mmc *mmc) -+{ -+ struct sunxi_mmc_priv *priv = mmc->priv; -+ -+ /* Reset controller */ -+ writel(SUNXI_MMC_GCTRL_RESET, &priv->reg->gctrl); -+ udelay(1000); -+ -+ return 0; -+} -+ - static int sunxi_mmc_set_ios_legacy(struct mmc *mmc) - { - struct sunxi_mmc_priv *priv = mmc->priv; -@@ -562,7 +566,8 @@ struct mmc *sunxi_mmc_init(int sdc_no) - - return mmc_create(cfg, priv); - } --#else -+ -+#else /* CONFIG_DM_MMC code below, as used by U-Boot proper */ - - static int sunxi_mmc_set_ios(struct udevice *dev) - { diff --git a/lede/package/boot/uboot-d1/patches/0018-sunxi-remove-CONFIG_MMC-_CD_PIN.patch b/lede/package/boot/uboot-d1/patches/0018-sunxi-remove-CONFIG_MMC-_CD_PIN.patch deleted file mode 100644 index a87b6e26ce..0000000000 --- a/lede/package/boot/uboot-d1/patches/0018-sunxi-remove-CONFIG_MMC-_CD_PIN.patch +++ /dev/null @@ -1,509 +0,0 @@ -From bcc2e01668041c146d964ed5f77b819dcc35b3e2 Mon Sep 17 00:00:00 2001 -From: Zoltan HERPAI -Date: Tue, 6 Jun 2023 15:07:47 +0000 -Subject: [PATCH 18/90] sunxi: remove CONFIG_MMC?_CD_PIN - -For legacy reasons we were defining the card detect GPIO for all sunxi -boards in each board's defconfig. -There is actually no need for a card-detect check in the SPL code (which -consequently has been removed already), and also in U-Boot proper we -have DM code to query the CD GPIO name from the device tree. - -That means we don't have any user of that information left, so can -remove the definitions from the defconfigs. - -Signed-off-by: Andre Przywara -Signed-off-by: Zoltan HERPAI ---- - arch/arm/mach-sunxi/Kconfig | 27 -------------------- - configs/A10-OLinuXino-Lime_defconfig | 1 - - configs/A10s-OLinuXino-M_defconfig | 2 -- - configs/A13-OLinuXino_defconfig | 1 - - configs/A20-OLinuXino-Lime2-eMMC_defconfig | 1 - - configs/A20-OLinuXino-Lime_defconfig | 1 - - configs/A20-OLinuXino_MICRO-eMMC_defconfig | 1 - - configs/A20-OLinuXino_MICRO_defconfig | 2 -- - configs/A20-Olimex-SOM-EVB_defconfig | 2 -- - configs/A20-Olimex-SOM204-EVB-eMMC_defconfig | 1 - - configs/Bananapi_M2_Ultra_defconfig | 1 - - configs/Bananapi_m2m_defconfig | 1 - - configs/Cubieboard2_defconfig | 1 - - configs/Cubieboard4_defconfig | 1 - - configs/Cubieboard_defconfig | 1 - - configs/Itead_Ibox_A20_defconfig | 1 - - configs/Lamobo_R1_defconfig | 1 - - configs/Mele_M3_defconfig | 1 - - configs/Mele_M5_defconfig | 1 - - configs/Merrii_A80_Optimus_defconfig | 1 - - configs/Orangepi_mini_defconfig | 2 -- - configs/Sinlinx_SinA31s_defconfig | 1 - - configs/Sinlinx_SinA33_defconfig | 1 - - configs/Sunchip_CX-A99_defconfig | 1 - - configs/UTOO_P66_defconfig | 1 - - configs/Yones_Toptech_BD1078_defconfig | 2 -- - configs/bananapi_m2_zero_defconfig | 1 - - configs/bananapi_m64_defconfig | 1 - - configs/beelink_gs1_defconfig | 1 - - configs/nanopi_m1_plus_defconfig | 1 - - configs/oceanic_5205_5inmfd_defconfig | 1 - - configs/orangepi_3_defconfig | 1 - - configs/orangepi_lite2_defconfig | 1 - - configs/orangepi_one_plus_defconfig | 1 - - configs/orangepi_zero2_defconfig | 1 - - configs/orangepi_zero_plus2_defconfig | 1 - - configs/orangepi_zero_plus2_h3_defconfig | 1 - - configs/parrot_r16_defconfig | 1 - - configs/pine64-lts_defconfig | 1 - - configs/pine_h64_defconfig | 1 - - configs/sopine_baseboard_defconfig | 1 - - configs/tanix_tx6_defconfig | 1 - - 42 files changed, 73 deletions(-) - ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -652,33 +652,6 @@ config MACPWR - Set the pin used to power the MAC. This takes a string in the format - understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. - --config MMC0_CD_PIN -- string "Card detect pin for mmc0" -- default "PF6" if MACH_SUN8I_A83T || MACH_SUNXI_H3_H5 || MACH_SUN50I -- default "" -- ---help--- -- Set the card detect pin for mmc0, leave empty to not use cd. This -- takes a string in the format understood by sunxi_name_to_gpio, e.g. -- PH1 for pin 1 of port H. -- --config MMC1_CD_PIN -- string "Card detect pin for mmc1" -- default "" -- ---help--- -- See MMC0_CD_PIN help text. -- --config MMC2_CD_PIN -- string "Card detect pin for mmc2" -- default "" -- ---help--- -- See MMC0_CD_PIN help text. -- --config MMC3_CD_PIN -- string "Card detect pin for mmc3" -- default "" -- ---help--- -- See MMC0_CD_PIN help text. -- - config MMC1_PINS_PH - bool "Pins for mmc1 are on Port H" - depends on MACH_SUN4I || MACH_SUN7I || MACH_SUN8I_R40 ---- a/configs/A10-OLinuXino-Lime_defconfig -+++ b/configs/A10-OLinuXino-Lime_defconfig -@@ -6,7 +6,6 @@ CONFIG_MACH_SUN4I=y - CONFIG_DRAM_CLK=480 - CONFIG_DRAM_EMR1=4 - CONFIG_SYS_CLK_FREQ=912000000 --CONFIG_MMC0_CD_PIN="PH1" - CONFIG_I2C1_ENABLE=y - CONFIG_SATAPWR="PC3" - CONFIG_AHCI=y ---- a/configs/A10s-OLinuXino-M_defconfig -+++ b/configs/A10s-OLinuXino-M_defconfig -@@ -4,8 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-o - CONFIG_SPL=y - CONFIG_MACH_SUN5I=y - CONFIG_DRAM_CLK=432 --CONFIG_MMC0_CD_PIN="PG1" --CONFIG_MMC1_CD_PIN="PG13" - CONFIG_MMC_SUNXI_SLOT_EXTRA=1 - CONFIG_USB1_VBUS_PIN="PB10" - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ---- a/configs/A13-OLinuXino_defconfig -+++ b/configs/A13-OLinuXino_defconfig -@@ -5,7 +5,6 @@ CONFIG_SPL=y - CONFIG_MACH_SUN5I=y - CONFIG_DRAM_CLK=408 - CONFIG_DRAM_EMR1=0 --CONFIG_MMC0_CD_PIN="PG0" - CONFIG_USB0_VBUS_DET="PG1" - CONFIG_USB1_VBUS_PIN="PG11" - CONFIG_AXP_GPIO=y ---- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig -+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ol - CONFIG_SPL=y - CONFIG_MACH_SUN7I=y - CONFIG_DRAM_CLK=384 --CONFIG_MMC0_CD_PIN="PH1" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_USB0_VBUS_PIN="PC17" - CONFIG_USB0_VBUS_DET="PH5" ---- a/configs/A20-OLinuXino-Lime_defconfig -+++ b/configs/A20-OLinuXino-Lime_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ol - CONFIG_SPL=y - CONFIG_MACH_SUN7I=y - CONFIG_DRAM_CLK=384 --CONFIG_MMC0_CD_PIN="PH1" - CONFIG_I2C1_ENABLE=y - CONFIG_SATAPWR="PC3" - CONFIG_AHCI=y ---- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig -+++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ol - CONFIG_SPL=y - CONFIG_MACH_SUN7I=y - CONFIG_DRAM_CLK=384 --CONFIG_MMC0_CD_PIN="PH1" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_I2C1_ENABLE=y - CONFIG_VIDEO_VGA=y ---- a/configs/A20-OLinuXino_MICRO_defconfig -+++ b/configs/A20-OLinuXino_MICRO_defconfig -@@ -4,8 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ol - CONFIG_SPL=y - CONFIG_MACH_SUN7I=y - CONFIG_DRAM_CLK=384 --CONFIG_MMC0_CD_PIN="PH1" --CONFIG_MMC3_CD_PIN="PH11" - CONFIG_MMC_SUNXI_SLOT_EXTRA=3 - CONFIG_I2C1_ENABLE=y - CONFIG_VIDEO_VGA=y ---- a/configs/A20-Olimex-SOM-EVB_defconfig -+++ b/configs/A20-Olimex-SOM-EVB_defconfig -@@ -4,8 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ol - CONFIG_SPL=y - CONFIG_MACH_SUN7I=y - CONFIG_DRAM_CLK=384 --CONFIG_MMC0_CD_PIN="PH1" --CONFIG_MMC3_CD_PIN="PH0" - CONFIG_MMC_SUNXI_SLOT_EXTRA=3 - CONFIG_USB0_VBUS_PIN="PB9" - CONFIG_USB0_VBUS_DET="PH5" ---- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig -+++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ol - CONFIG_SPL=y - CONFIG_MACH_SUN7I=y - CONFIG_DRAM_CLK=384 --CONFIG_MMC0_CD_PIN="PH1" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_USB0_VBUS_PIN="PC17" - CONFIG_USB0_VBUS_DET="PH5" ---- a/configs/Bananapi_M2_Ultra_defconfig -+++ b/configs/Bananapi_M2_Ultra_defconfig -@@ -5,7 +5,6 @@ CONFIG_SPL=y - CONFIG_MACH_SUN8I_R40=y - CONFIG_DRAM_CLK=576 - CONFIG_MACPWR="PA17" --CONFIG_MMC0_CD_PIN="PH13" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_USB1_VBUS_PIN="PH23" - CONFIG_USB2_VBUS_PIN="PH23" ---- a/configs/Bananapi_m2m_defconfig -+++ b/configs/Bananapi_m2m_defconfig -@@ -6,7 +6,6 @@ CONFIG_MACH_SUN8I_A33=y - CONFIG_DRAM_CLK=600 - CONFIG_DRAM_ZQ=15291 - CONFIG_DRAM_ODT_EN=y --CONFIG_MMC0_CD_PIN="PB4" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_USB0_ID_DET="PH8" - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ---- a/configs/Cubieboard2_defconfig -+++ b/configs/Cubieboard2_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cu - CONFIG_SPL=y - CONFIG_MACH_SUN7I=y - CONFIG_DRAM_CLK=480 --CONFIG_MMC0_CD_PIN="PH1" - CONFIG_SATAPWR="PB8" - CONFIG_AHCI=y - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ---- a/configs/Cubieboard4_defconfig -+++ b/configs/Cubieboard4_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cu - CONFIG_SPL=y - CONFIG_MACH_SUN9I=y - CONFIG_DRAM_CLK=672 --CONFIG_MMC0_CD_PIN="PH18" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" - CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" ---- a/configs/Cubieboard_defconfig -+++ b/configs/Cubieboard_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cu - CONFIG_SPL=y - CONFIG_MACH_SUN4I=y - CONFIG_DRAM_CLK=480 --CONFIG_MMC0_CD_PIN="PH1" - CONFIG_SATAPWR="PB8" - CONFIG_AHCI=y - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ---- a/configs/Itead_Ibox_A20_defconfig -+++ b/configs/Itead_Ibox_A20_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-it - CONFIG_SPL=y - CONFIG_MACH_SUN7I=y - CONFIG_DRAM_CLK=480 --CONFIG_MMC0_CD_PIN="PH1" - CONFIG_SATAPWR="PB8" - CONFIG_AHCI=y - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ---- a/configs/Lamobo_R1_defconfig -+++ b/configs/Lamobo_R1_defconfig -@@ -5,7 +5,6 @@ CONFIG_SPL=y - CONFIG_MACH_SUN7I=y - CONFIG_DRAM_CLK=432 - CONFIG_MACPWR="PH23" --CONFIG_MMC0_CD_PIN="PH10" - CONFIG_SATAPWR="PB3" - CONFIG_GMAC_TX_DELAY=4 - CONFIG_AHCI=y ---- a/configs/Mele_M3_defconfig -+++ b/configs/Mele_M3_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3 - CONFIG_SPL=y - CONFIG_MACH_SUN7I=y - CONFIG_DRAM_CLK=384 --CONFIG_MMC0_CD_PIN="PH1" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_VIDEO_VGA=y - CONFIG_VIDEO_COMPOSITE=y ---- a/configs/Mele_M5_defconfig -+++ b/configs/Mele_M5_defconfig -@@ -5,7 +5,6 @@ CONFIG_SPL=y - CONFIG_MACH_SUN7I=y - CONFIG_DRAM_CLK=432 - CONFIG_DRAM_ZQ=122 --CONFIG_MMC0_CD_PIN="PH1" - CONFIG_VIDEO_COMPOSITE=y - CONFIG_AHCI=y - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ---- a/configs/Merrii_A80_Optimus_defconfig -+++ b/configs/Merrii_A80_Optimus_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-op - CONFIG_SPL=y - CONFIG_MACH_SUN9I=y - CONFIG_DRAM_CLK=672 --CONFIG_MMC0_CD_PIN="PH18" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" - CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" ---- a/configs/Orangepi_mini_defconfig -+++ b/configs/Orangepi_mini_defconfig -@@ -5,8 +5,6 @@ CONFIG_SPL=y - CONFIG_MACH_SUN7I=y - CONFIG_DRAM_CLK=432 - CONFIG_MACPWR="PH23" --CONFIG_MMC0_CD_PIN="PH10" --CONFIG_MMC3_CD_PIN="PH11" - CONFIG_MMC_SUNXI_SLOT_EXTRA=3 - CONFIG_USB1_VBUS_PIN="PH26" - CONFIG_USB2_VBUS_PIN="PH22" ---- a/configs/Sinlinx_SinA31s_defconfig -+++ b/configs/Sinlinx_SinA31s_defconfig -@@ -5,7 +5,6 @@ CONFIG_SPL=y - CONFIG_MACH_SUN6I=y - CONFIG_DRAM_CLK=432 - CONFIG_DRAM_ZQ=251 --CONFIG_MMC0_CD_PIN="PA4" - CONFIG_MMC_SUNXI_SLOT_EXTRA=3 - CONFIG_USB1_VBUS_PIN="" - CONFIG_USB2_VBUS_PIN="" ---- a/configs/Sinlinx_SinA33_defconfig -+++ b/configs/Sinlinx_SinA33_defconfig -@@ -5,7 +5,6 @@ CONFIG_SPL=y - CONFIG_MACH_SUN8I_A33=y - CONFIG_DRAM_CLK=552 - CONFIG_DRAM_ZQ=15291 --CONFIG_MMC0_CD_PIN="PB4" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_USB0_ID_DET="PH8" - CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:66000,le:90,ri:160,up:3,lo:127,hs:70,vs:20,sync:3,vmode:0" ---- a/configs/Sunchip_CX-A99_defconfig -+++ b/configs/Sunchip_CX-A99_defconfig -@@ -6,7 +6,6 @@ CONFIG_MACH_SUN9I=y - CONFIG_DRAM_CLK=600 - CONFIG_DRAM_ZQ=3881915 - CONFIG_DRAM_ODT_EN=y --CONFIG_MMC0_CD_PIN="PH17" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_USB0_VBUS_PIN="PH15" - CONFIG_USB1_VBUS_PIN="PL7" ---- a/configs/UTOO_P66_defconfig -+++ b/configs/UTOO_P66_defconfig -@@ -5,7 +5,6 @@ CONFIG_SPL=y - CONFIG_MACH_SUN5I=y - CONFIG_DRAM_CLK=432 - CONFIG_DRAM_EMR1=0 --CONFIG_MMC0_CD_PIN="PG0" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_USB0_VBUS_PIN="PB04" - CONFIG_USB0_VBUS_DET="PG01" ---- a/configs/Yones_Toptech_BD1078_defconfig -+++ b/configs/Yones_Toptech_BD1078_defconfig -@@ -4,8 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-yo - CONFIG_SPL=y - CONFIG_MACH_SUN7I=y - CONFIG_DRAM_CLK=408 --CONFIG_MMC0_CD_PIN="PH1" --CONFIG_MMC1_CD_PIN="PH2" - CONFIG_MMC1_PINS_PH=y - CONFIG_MMC_SUNXI_SLOT_EXTRA=1 - CONFIG_USB0_VBUS_PIN="PB9" ---- a/configs/bananapi_m2_zero_defconfig -+++ b/configs/bananapi_m2_zero_defconfig -@@ -4,5 +4,4 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plu - CONFIG_SPL=y - CONFIG_MACH_SUN8I_H3=y - CONFIG_DRAM_CLK=408 --CONFIG_MMC0_CD_PIN="" - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ---- a/configs/bananapi_m64_defconfig -+++ b/configs/bananapi_m64_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-b - CONFIG_SPL=y - CONFIG_MACH_SUN50I=y - CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y --CONFIG_MMC0_CD_PIN="PH13" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set - CONFIG_SUPPORT_EMMC_BOOT=y ---- a/configs/beelink_gs1_defconfig -+++ b/configs/beelink_gs1_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-be - CONFIG_SPL=y - CONFIG_MACH_SUN50I_H6=y - CONFIG_SUNXI_DRAM_H6_LPDDR3=y --CONFIG_MMC0_CD_PIN="PF6" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - # CONFIG_PSCI_RESET is not set - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ---- a/configs/nanopi_m1_plus_defconfig -+++ b/configs/nanopi_m1_plus_defconfig -@@ -5,7 +5,6 @@ CONFIG_SPL=y - CONFIG_MACH_SUN8I_H3=y - CONFIG_DRAM_CLK=408 - CONFIG_MACPWR="PD6" --CONFIG_MMC0_CD_PIN="PH13" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set - CONFIG_SUN8I_EMAC=y ---- a/configs/oceanic_5205_5inmfd_defconfig -+++ b/configs/oceanic_5205_5inmfd_defconfig -@@ -7,7 +7,6 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y - CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y - CONFIG_DRAM_CLK=552 - CONFIG_DRAM_ZQ=3881949 --CONFIG_MMC0_CD_PIN="" - CONFIG_SPL_SPI_SUNXI=y - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set - CONFIG_SUN8I_EMAC=y ---- a/configs/orangepi_3_defconfig -+++ b/configs/orangepi_3_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-or - CONFIG_SPL=y - CONFIG_MACH_SUN50I_H6=y - CONFIG_SUNXI_DRAM_H6_LPDDR3=y --CONFIG_MMC0_CD_PIN="PF6" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_BLUETOOTH_DT_DEVICE_FIXUP="brcm,bcm4345c5" - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ---- a/configs/orangepi_lite2_defconfig -+++ b/configs/orangepi_lite2_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-or - CONFIG_SPL=y - CONFIG_MACH_SUN50I_H6=y - CONFIG_SUNXI_DRAM_H6_LPDDR3=y --CONFIG_MMC0_CD_PIN="PF6" - # CONFIG_PSCI_RESET is not set - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set - CONFIG_USB_EHCI_HCD=y ---- a/configs/orangepi_one_plus_defconfig -+++ b/configs/orangepi_one_plus_defconfig -@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-or - CONFIG_SPL=y - CONFIG_MACH_SUN50I_H6=y - CONFIG_SUNXI_DRAM_H6_LPDDR3=y --CONFIG_MMC0_CD_PIN="PF6" - # CONFIG_PSCI_RESET is not set - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set - CONFIG_USB_EHCI_HCD=y ---- a/configs/orangepi_zero2_defconfig -+++ b/configs/orangepi_zero2_defconfig -@@ -7,7 +7,6 @@ CONFIG_DRAM_SUN50I_H616_READ_CALIBRATION - CONFIG_DRAM_SUN50I_H616_READ_TRAINING=y - CONFIG_DRAM_SUN50I_H616_WRITE_TRAINING=y - CONFIG_MACH_SUN50I_H616=y --CONFIG_MMC0_CD_PIN="PF6" - CONFIG_R_I2C_ENABLE=y - CONFIG_SPL_SPI_SUNXI=y - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ---- a/configs/orangepi_zero_plus2_defconfig -+++ b/configs/orangepi_zero_plus2_defconfig -@@ -6,7 +6,6 @@ CONFIG_MACH_SUN50I_H5=y - CONFIG_DRAM_CLK=672 - CONFIG_DRAM_ZQ=3881977 - # CONFIG_DRAM_ODT_EN is not set --CONFIG_MMC0_CD_PIN="PH13" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set - CONFIG_SUN8I_EMAC=y ---- a/configs/orangepi_zero_plus2_h3_defconfig -+++ b/configs/orangepi_zero_plus2_h3_defconfig -@@ -5,7 +5,6 @@ CONFIG_SPL=y - CONFIG_MACH_SUN8I_H3=y - CONFIG_DRAM_CLK=672 - # CONFIG_DRAM_ODT_EN is not set --CONFIG_MMC0_CD_PIN="PH13" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set - CONFIG_SUN8I_EMAC=y ---- a/configs/parrot_r16_defconfig -+++ b/configs/parrot_r16_defconfig -@@ -5,7 +5,6 @@ CONFIG_SPL=y - CONFIG_MACH_SUN8I_A33=y - CONFIG_DRAM_CLK=600 - CONFIG_DRAM_ZQ=15291 --CONFIG_MMC0_CD_PIN="PD14" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_USB0_ID_DET="PD10" - CONFIG_USB1_VBUS_PIN="PD12" ---- a/configs/pine64-lts_defconfig -+++ b/configs/pine64-lts_defconfig -@@ -6,7 +6,6 @@ CONFIG_MACH_SUN50I=y - CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y - CONFIG_DRAM_CLK=552 - CONFIG_DRAM_ZQ=3881949 --CONFIG_MMC0_CD_PIN="" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_SPL_SPI_SUNXI=y - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ---- a/configs/pine_h64_defconfig -+++ b/configs/pine_h64_defconfig -@@ -5,7 +5,6 @@ CONFIG_SPL=y - CONFIG_MACH_SUN50I_H6=y - CONFIG_SUNXI_DRAM_H6_LPDDR3=y - CONFIG_MACPWR="PC16" --CONFIG_MMC0_CD_PIN="PF6" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_USB3_VBUS_PIN="PL5" - CONFIG_SPL_SPI_SUNXI=y ---- a/configs/sopine_baseboard_defconfig -+++ b/configs/sopine_baseboard_defconfig -@@ -7,7 +7,6 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y - CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y - CONFIG_DRAM_CLK=552 - CONFIG_DRAM_ZQ=3881949 --CONFIG_MMC0_CD_PIN="" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - CONFIG_SPL_SPI_SUNXI=y - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ---- a/configs/tanix_tx6_defconfig -+++ b/configs/tanix_tx6_defconfig -@@ -5,6 +5,5 @@ CONFIG_SPL=y - CONFIG_MACH_SUN50I_H6=y - CONFIG_SUNXI_DRAM_H6_DDR3_1333=y - CONFIG_DRAM_CLK=648 --CONFIG_MMC0_CD_PIN="PF6" - CONFIG_MMC_SUNXI_SLOT_EXTRA=2 - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/lede/package/boot/uboot-d1/patches/0019-sunxi-mmc-Move-header-to-the-driver-directory.patch b/lede/package/boot/uboot-d1/patches/0019-sunxi-mmc-Move-header-to-the-driver-directory.patch deleted file mode 100644 index 3299ad49de..0000000000 --- a/lede/package/boot/uboot-d1/patches/0019-sunxi-mmc-Move-header-to-the-driver-directory.patch +++ /dev/null @@ -1,323 +0,0 @@ -From 4c0c00e7131baf410702555342337c178dd0de98 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sun, 30 Oct 2022 16:04:47 -0500 -Subject: [PATCH 19/90] sunxi: mmc: Move header to the driver directory - -The MMC controller driver is (and ought to be) the only user of these -register definitions. Put them in a header next to the driver to remove -the dependency on a specific ARM platform's headers. - -Due to the sunxi_mmc_init() prototype, the file was not renamed. None of -the register definitions were changed. - -Signed-off-by: Samuel Holland ---- - arch/arm/include/asm/arch-sunxi/mmc.h | 139 +------------------------- - drivers/mmc/sunxi_mmc.c | 4 + - drivers/mmc/sunxi_mmc.h | 138 +++++++++++++++++++++++++ - 3 files changed, 146 insertions(+), 135 deletions(-) - create mode 100644 drivers/mmc/sunxi_mmc.h - ---- a/arch/arm/include/asm/arch-sunxi/mmc.h -+++ b/arch/arm/include/asm/arch-sunxi/mmc.h -@@ -1,139 +1,8 @@ - /* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * (C) Copyright 2007-2011 -- * Allwinner Technology Co., Ltd. -- * Aaron -- * -- * MMC register definition for allwinner sunxi platform. -- */ - --#ifndef _SUNXI_MMC_H --#define _SUNXI_MMC_H -- --#include -- --struct sunxi_mmc { -- u32 gctrl; /* 0x00 global control */ -- u32 clkcr; /* 0x04 clock control */ -- u32 timeout; /* 0x08 time out */ -- u32 width; /* 0x0c bus width */ -- u32 blksz; /* 0x10 block size */ -- u32 bytecnt; /* 0x14 byte count */ -- u32 cmd; /* 0x18 command */ -- u32 arg; /* 0x1c argument */ -- u32 resp0; /* 0x20 response 0 */ -- u32 resp1; /* 0x24 response 1 */ -- u32 resp2; /* 0x28 response 2 */ -- u32 resp3; /* 0x2c response 3 */ -- u32 imask; /* 0x30 interrupt mask */ -- u32 mint; /* 0x34 masked interrupt status */ -- u32 rint; /* 0x38 raw interrupt status */ -- u32 status; /* 0x3c status */ -- u32 ftrglevel; /* 0x40 FIFO threshold watermark*/ -- u32 funcsel; /* 0x44 function select */ -- u32 cbcr; /* 0x48 CIU byte count */ -- u32 bbcr; /* 0x4c BIU byte count */ -- u32 dbgc; /* 0x50 debug enable */ -- u32 res0; /* 0x54 reserved */ -- u32 a12a; /* 0x58 Auto command 12 argument */ -- u32 ntsr; /* 0x5c New timing set register */ -- u32 res1[8]; -- u32 dmac; /* 0x80 internal DMA control */ -- u32 dlba; /* 0x84 internal DMA descr list base address */ -- u32 idst; /* 0x88 internal DMA status */ -- u32 idie; /* 0x8c internal DMA interrupt enable */ -- u32 chda; /* 0x90 */ -- u32 cbda; /* 0x94 */ -- u32 res2[26]; --#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) -- u32 res3[17]; -- u32 samp_dl; -- u32 res4[46]; --#endif -- u32 fifo; /* 0x100 / 0x200 FIFO access address */ --}; -- --#define SUNXI_MMC_CLK_POWERSAVE (0x1 << 17) --#define SUNXI_MMC_CLK_ENABLE (0x1 << 16) --#define SUNXI_MMC_CLK_DIVIDER_MASK (0xff) -- --#define SUNXI_MMC_GCTRL_SOFT_RESET (0x1 << 0) --#define SUNXI_MMC_GCTRL_FIFO_RESET (0x1 << 1) --#define SUNXI_MMC_GCTRL_DMA_RESET (0x1 << 2) --#define SUNXI_MMC_GCTRL_RESET (SUNXI_MMC_GCTRL_SOFT_RESET|\ -- SUNXI_MMC_GCTRL_FIFO_RESET|\ -- SUNXI_MMC_GCTRL_DMA_RESET) --#define SUNXI_MMC_GCTRL_DMA_ENABLE (0x1 << 5) --#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB (0x1 << 31) -- --#define SUNXI_MMC_CMD_RESP_EXPIRE (0x1 << 6) --#define SUNXI_MMC_CMD_LONG_RESPONSE (0x1 << 7) --#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC (0x1 << 8) --#define SUNXI_MMC_CMD_DATA_EXPIRE (0x1 << 9) --#define SUNXI_MMC_CMD_WRITE (0x1 << 10) --#define SUNXI_MMC_CMD_AUTO_STOP (0x1 << 12) --#define SUNXI_MMC_CMD_WAIT_PRE_OVER (0x1 << 13) --#define SUNXI_MMC_CMD_SEND_INIT_SEQ (0x1 << 15) --#define SUNXI_MMC_CMD_UPCLK_ONLY (0x1 << 21) --#define SUNXI_MMC_CMD_START (0x1 << 31) -- --#define SUNXI_MMC_RINT_RESP_ERROR (0x1 << 1) --#define SUNXI_MMC_RINT_COMMAND_DONE (0x1 << 2) --#define SUNXI_MMC_RINT_DATA_OVER (0x1 << 3) --#define SUNXI_MMC_RINT_TX_DATA_REQUEST (0x1 << 4) --#define SUNXI_MMC_RINT_RX_DATA_REQUEST (0x1 << 5) --#define SUNXI_MMC_RINT_RESP_CRC_ERROR (0x1 << 6) --#define SUNXI_MMC_RINT_DATA_CRC_ERROR (0x1 << 7) --#define SUNXI_MMC_RINT_RESP_TIMEOUT (0x1 << 8) --#define SUNXI_MMC_RINT_DATA_TIMEOUT (0x1 << 9) --#define SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE (0x1 << 10) --#define SUNXI_MMC_RINT_FIFO_RUN_ERROR (0x1 << 11) --#define SUNXI_MMC_RINT_HARD_WARE_LOCKED (0x1 << 12) --#define SUNXI_MMC_RINT_START_BIT_ERROR (0x1 << 13) --#define SUNXI_MMC_RINT_AUTO_COMMAND_DONE (0x1 << 14) --#define SUNXI_MMC_RINT_END_BIT_ERROR (0x1 << 15) --#define SUNXI_MMC_RINT_SDIO_INTERRUPT (0x1 << 16) --#define SUNXI_MMC_RINT_CARD_INSERT (0x1 << 30) --#define SUNXI_MMC_RINT_CARD_REMOVE (0x1 << 31) --#define SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT \ -- (SUNXI_MMC_RINT_RESP_ERROR | \ -- SUNXI_MMC_RINT_RESP_CRC_ERROR | \ -- SUNXI_MMC_RINT_DATA_CRC_ERROR | \ -- SUNXI_MMC_RINT_RESP_TIMEOUT | \ -- SUNXI_MMC_RINT_DATA_TIMEOUT | \ -- SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE | \ -- SUNXI_MMC_RINT_FIFO_RUN_ERROR | \ -- SUNXI_MMC_RINT_HARD_WARE_LOCKED | \ -- SUNXI_MMC_RINT_START_BIT_ERROR | \ -- SUNXI_MMC_RINT_END_BIT_ERROR) /* 0xbfc2 */ --#define SUNXI_MMC_RINT_INTERRUPT_DONE_BIT \ -- (SUNXI_MMC_RINT_AUTO_COMMAND_DONE | \ -- SUNXI_MMC_RINT_DATA_OVER | \ -- SUNXI_MMC_RINT_COMMAND_DONE | \ -- SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE) -- --#define SUNXI_MMC_STATUS_RXWL_FLAG (0x1 << 0) --#define SUNXI_MMC_STATUS_TXWL_FLAG (0x1 << 1) --#define SUNXI_MMC_STATUS_FIFO_EMPTY (0x1 << 2) --#define SUNXI_MMC_STATUS_FIFO_FULL (0x1 << 3) --#define SUNXI_MMC_STATUS_CARD_PRESENT (0x1 << 8) --#define SUNXI_MMC_STATUS_CARD_DATA_BUSY (0x1 << 9) --#define SUNXI_MMC_STATUS_DATA_FSM_BUSY (0x1 << 10) --#define SUNXI_MMC_STATUS_FIFO_LEVEL(reg) (((reg) >> 17) & 0x3fff) -- --#define SUNXI_MMC_NTSR_MODE_SEL_NEW (0x1 << 31) -- --#define SUNXI_MMC_IDMAC_RESET (0x1 << 0) --#define SUNXI_MMC_IDMAC_FIXBURST (0x1 << 1) --#define SUNXI_MMC_IDMAC_ENABLE (0x1 << 7) -- --#define SUNXI_MMC_IDIE_TXIRQ (0x1 << 0) --#define SUNXI_MMC_IDIE_RXIRQ (0x1 << 1) -- --#define SUNXI_MMC_COMMON_CLK_GATE (1 << 16) --#define SUNXI_MMC_COMMON_RESET (1 << 18) -- --#define SUNXI_MMC_CAL_DL_SW_EN (0x1 << 7) -+#ifndef _ASM_ARCH_MMC_H_ -+#define _ASM_ARCH_MMC_H_ - - struct mmc *sunxi_mmc_init(int sdc_no); --#endif /* _SUNXI_MMC_H */ -+ -+#endif /* _ASM_ARCH_MMC_H_ */ ---- a/drivers/mmc/sunxi_mmc.c -+++ b/drivers/mmc/sunxi_mmc.c -@@ -25,9 +25,13 @@ - #include - #include - #include -+#if !CONFIG_IS_ENABLED(DM_MMC) - #include -+#endif - #include - -+#include "sunxi_mmc.h" -+ - #ifndef CCM_MMC_CTRL_MODE_SEL_NEW - #define CCM_MMC_CTRL_MODE_SEL_NEW 0 - #endif ---- /dev/null -+++ b/drivers/mmc/sunxi_mmc.h -@@ -0,0 +1,138 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * (C) Copyright 2007-2011 -+ * Allwinner Technology Co., Ltd. -+ * Aaron -+ * -+ * MMC register definition for allwinner sunxi platform. -+ */ -+ -+#ifndef _SUNXI_MMC_H -+#define _SUNXI_MMC_H -+ -+#include -+ -+struct sunxi_mmc { -+ u32 gctrl; /* 0x00 global control */ -+ u32 clkcr; /* 0x04 clock control */ -+ u32 timeout; /* 0x08 time out */ -+ u32 width; /* 0x0c bus width */ -+ u32 blksz; /* 0x10 block size */ -+ u32 bytecnt; /* 0x14 byte count */ -+ u32 cmd; /* 0x18 command */ -+ u32 arg; /* 0x1c argument */ -+ u32 resp0; /* 0x20 response 0 */ -+ u32 resp1; /* 0x24 response 1 */ -+ u32 resp2; /* 0x28 response 2 */ -+ u32 resp3; /* 0x2c response 3 */ -+ u32 imask; /* 0x30 interrupt mask */ -+ u32 mint; /* 0x34 masked interrupt status */ -+ u32 rint; /* 0x38 raw interrupt status */ -+ u32 status; /* 0x3c status */ -+ u32 ftrglevel; /* 0x40 FIFO threshold watermark*/ -+ u32 funcsel; /* 0x44 function select */ -+ u32 cbcr; /* 0x48 CIU byte count */ -+ u32 bbcr; /* 0x4c BIU byte count */ -+ u32 dbgc; /* 0x50 debug enable */ -+ u32 res0; /* 0x54 reserved */ -+ u32 a12a; /* 0x58 Auto command 12 argument */ -+ u32 ntsr; /* 0x5c New timing set register */ -+ u32 res1[8]; -+ u32 dmac; /* 0x80 internal DMA control */ -+ u32 dlba; /* 0x84 internal DMA descr list base address */ -+ u32 idst; /* 0x88 internal DMA status */ -+ u32 idie; /* 0x8c internal DMA interrupt enable */ -+ u32 chda; /* 0x90 */ -+ u32 cbda; /* 0x94 */ -+ u32 res2[26]; -+#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) -+ u32 res3[17]; -+ u32 samp_dl; -+ u32 res4[46]; -+#endif -+ u32 fifo; /* 0x100 / 0x200 FIFO access address */ -+}; -+ -+#define SUNXI_MMC_CLK_POWERSAVE (0x1 << 17) -+#define SUNXI_MMC_CLK_ENABLE (0x1 << 16) -+#define SUNXI_MMC_CLK_DIVIDER_MASK (0xff) -+ -+#define SUNXI_MMC_GCTRL_SOFT_RESET (0x1 << 0) -+#define SUNXI_MMC_GCTRL_FIFO_RESET (0x1 << 1) -+#define SUNXI_MMC_GCTRL_DMA_RESET (0x1 << 2) -+#define SUNXI_MMC_GCTRL_RESET (SUNXI_MMC_GCTRL_SOFT_RESET|\ -+ SUNXI_MMC_GCTRL_FIFO_RESET|\ -+ SUNXI_MMC_GCTRL_DMA_RESET) -+#define SUNXI_MMC_GCTRL_DMA_ENABLE (0x1 << 5) -+#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB (0x1 << 31) -+ -+#define SUNXI_MMC_CMD_RESP_EXPIRE (0x1 << 6) -+#define SUNXI_MMC_CMD_LONG_RESPONSE (0x1 << 7) -+#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC (0x1 << 8) -+#define SUNXI_MMC_CMD_DATA_EXPIRE (0x1 << 9) -+#define SUNXI_MMC_CMD_WRITE (0x1 << 10) -+#define SUNXI_MMC_CMD_AUTO_STOP (0x1 << 12) -+#define SUNXI_MMC_CMD_WAIT_PRE_OVER (0x1 << 13) -+#define SUNXI_MMC_CMD_SEND_INIT_SEQ (0x1 << 15) -+#define SUNXI_MMC_CMD_UPCLK_ONLY (0x1 << 21) -+#define SUNXI_MMC_CMD_START (0x1 << 31) -+ -+#define SUNXI_MMC_RINT_RESP_ERROR (0x1 << 1) -+#define SUNXI_MMC_RINT_COMMAND_DONE (0x1 << 2) -+#define SUNXI_MMC_RINT_DATA_OVER (0x1 << 3) -+#define SUNXI_MMC_RINT_TX_DATA_REQUEST (0x1 << 4) -+#define SUNXI_MMC_RINT_RX_DATA_REQUEST (0x1 << 5) -+#define SUNXI_MMC_RINT_RESP_CRC_ERROR (0x1 << 6) -+#define SUNXI_MMC_RINT_DATA_CRC_ERROR (0x1 << 7) -+#define SUNXI_MMC_RINT_RESP_TIMEOUT (0x1 << 8) -+#define SUNXI_MMC_RINT_DATA_TIMEOUT (0x1 << 9) -+#define SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE (0x1 << 10) -+#define SUNXI_MMC_RINT_FIFO_RUN_ERROR (0x1 << 11) -+#define SUNXI_MMC_RINT_HARD_WARE_LOCKED (0x1 << 12) -+#define SUNXI_MMC_RINT_START_BIT_ERROR (0x1 << 13) -+#define SUNXI_MMC_RINT_AUTO_COMMAND_DONE (0x1 << 14) -+#define SUNXI_MMC_RINT_END_BIT_ERROR (0x1 << 15) -+#define SUNXI_MMC_RINT_SDIO_INTERRUPT (0x1 << 16) -+#define SUNXI_MMC_RINT_CARD_INSERT (0x1 << 30) -+#define SUNXI_MMC_RINT_CARD_REMOVE (0x1 << 31) -+#define SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT \ -+ (SUNXI_MMC_RINT_RESP_ERROR | \ -+ SUNXI_MMC_RINT_RESP_CRC_ERROR | \ -+ SUNXI_MMC_RINT_DATA_CRC_ERROR | \ -+ SUNXI_MMC_RINT_RESP_TIMEOUT | \ -+ SUNXI_MMC_RINT_DATA_TIMEOUT | \ -+ SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE | \ -+ SUNXI_MMC_RINT_FIFO_RUN_ERROR | \ -+ SUNXI_MMC_RINT_HARD_WARE_LOCKED | \ -+ SUNXI_MMC_RINT_START_BIT_ERROR | \ -+ SUNXI_MMC_RINT_END_BIT_ERROR) /* 0xbfc2 */ -+#define SUNXI_MMC_RINT_INTERRUPT_DONE_BIT \ -+ (SUNXI_MMC_RINT_AUTO_COMMAND_DONE | \ -+ SUNXI_MMC_RINT_DATA_OVER | \ -+ SUNXI_MMC_RINT_COMMAND_DONE | \ -+ SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE) -+ -+#define SUNXI_MMC_STATUS_RXWL_FLAG (0x1 << 0) -+#define SUNXI_MMC_STATUS_TXWL_FLAG (0x1 << 1) -+#define SUNXI_MMC_STATUS_FIFO_EMPTY (0x1 << 2) -+#define SUNXI_MMC_STATUS_FIFO_FULL (0x1 << 3) -+#define SUNXI_MMC_STATUS_CARD_PRESENT (0x1 << 8) -+#define SUNXI_MMC_STATUS_CARD_DATA_BUSY (0x1 << 9) -+#define SUNXI_MMC_STATUS_DATA_FSM_BUSY (0x1 << 10) -+#define SUNXI_MMC_STATUS_FIFO_LEVEL(reg) (((reg) >> 17) & 0x3fff) -+ -+#define SUNXI_MMC_NTSR_MODE_SEL_NEW (0x1 << 31) -+ -+#define SUNXI_MMC_IDMAC_RESET (0x1 << 0) -+#define SUNXI_MMC_IDMAC_FIXBURST (0x1 << 1) -+#define SUNXI_MMC_IDMAC_ENABLE (0x1 << 7) -+ -+#define SUNXI_MMC_IDIE_TXIRQ (0x1 << 0) -+#define SUNXI_MMC_IDIE_RXIRQ (0x1 << 1) -+ -+#define SUNXI_MMC_COMMON_CLK_GATE (1 << 16) -+#define SUNXI_MMC_COMMON_RESET (1 << 18) -+ -+#define SUNXI_MMC_CAL_DL_SW_EN (0x1 << 7) -+ -+#endif /* _SUNXI_MMC_H */ diff --git a/lede/package/boot/uboot-d1/patches/0020-pinctrl-sunxi-Add-support-for-the-D1.patch b/lede/package/boot/uboot-d1/patches/0020-pinctrl-sunxi-Add-support-for-the-D1.patch deleted file mode 100644 index 383db83d17..0000000000 --- a/lede/package/boot/uboot-d1/patches/0020-pinctrl-sunxi-Add-support-for-the-D1.patch +++ /dev/null @@ -1,72 +0,0 @@ -From fdf871a6089ee2f56439880b69d33a7d0d707d15 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 28 Aug 2021 22:24:28 -0500 -Subject: [PATCH 20/90] pinctrl: sunxi: Add support for the D1 - -Signed-off-by: Samuel Holland ---- - drivers/pinctrl/sunxi/Kconfig | 5 +++++ - drivers/pinctrl/sunxi/pinctrl-sunxi.c | 31 +++++++++++++++++++++++++++ - 2 files changed, 36 insertions(+) - ---- a/drivers/pinctrl/sunxi/Kconfig -+++ b/drivers/pinctrl/sunxi/Kconfig -@@ -89,6 +89,11 @@ config PINCTRL_SUN9I_A80_R - default MACH_SUN9I - select PINCTRL_SUNXI - -+config PINCTRL_SUN20I_D1 -+ bool "Support for the Allwinner D1 PIO" -+ default TARGET_SUN20I_D1 -+ select PINCTRL_SUNXI -+ - config PINCTRL_SUN50I_A64 - bool "Support for the Allwinner A64 PIO" - default MACH_SUN50I ---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c -+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c -@@ -588,6 +588,31 @@ static const struct sunxi_pinctrl_desc _ - .num_banks = 3, - }; - -+static const struct sunxi_pinctrl_function sun20i_d1_pinctrl_functions[] = { -+ { "emac", 8 }, /* PE0-PE15 */ -+ { "gpio_in", 0 }, -+ { "gpio_out", 1 }, -+ { "i2c0", 4 }, /* PB10-PB11 */ -+ { "mmc0", 2 }, /* PF0-PF5 */ -+ { "mmc1", 2 }, /* PG0-PG5 */ -+ { "mmc2", 3 }, /* PC2-PC7 */ -+ { "spi0", 2 }, /* PC2-PC7 */ -+#if IS_ENABLED(CONFIG_UART0_PORT_F) -+ { "uart0", 3 }, /* PF2-PF4 */ -+#else -+ { "uart0", 6 }, /* PB8-PB9 */ -+#endif -+ { "uart1", 2 }, /* PG6-PG7 */ -+ { "uart2", 7 }, /* PB0-PB1 */ -+}; -+ -+static const struct sunxi_pinctrl_desc __maybe_unused sun20i_d1_pinctrl_desc = { -+ .functions = sun20i_d1_pinctrl_functions, -+ .num_functions = ARRAY_SIZE(sun20i_d1_pinctrl_functions), -+ .first_bank = SUNXI_GPIO_A, -+ .num_banks = 7, -+}; -+ - static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = { - { "emac", 4 }, /* PD8-PD23 */ - { "gpio_in", 0 }, -@@ -849,6 +874,12 @@ static const struct udevice_id sunxi_pin - .data = (ulong)&sun9i_a80_r_pinctrl_desc, - }, - #endif -+#ifdef CONFIG_PINCTRL_SUN20I_D1 -+ { -+ .compatible = "allwinner,sun20i-d1-pinctrl", -+ .data = (ulong)&sun20i_d1_pinctrl_desc, -+ }, -+#endif - #ifdef CONFIG_PINCTRL_SUN50I_A64 - { - .compatible = "allwinner,sun50i-a64-pinctrl", diff --git a/lede/package/boot/uboot-d1/patches/0021-serial-ns16550-Enable-clocks-during-probe.patch b/lede/package/boot/uboot-d1/patches/0021-serial-ns16550-Enable-clocks-during-probe.patch deleted file mode 100644 index 0e28782287..0000000000 --- a/lede/package/boot/uboot-d1/patches/0021-serial-ns16550-Enable-clocks-during-probe.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 8fde85b609273f8389178d4c0d066390a0e0773d Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sun, 30 Oct 2022 14:56:10 -0500 -Subject: [PATCH 21/90] serial: ns16550: Enable clocks during probe - -If the UART bus or baud clock has a gate, it must be enabled before the -UART can be used. - -Signed-off-by: Samuel Holland ---- - drivers/serial/ns16550.c | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/drivers/serial/ns16550.c -+++ b/drivers/serial/ns16550.c -@@ -506,6 +506,7 @@ int ns16550_serial_probe(struct udevice - struct ns16550_plat *plat = dev_get_plat(dev); - struct ns16550 *const com_port = dev_get_priv(dev); - struct reset_ctl_bulk reset_bulk; -+ struct clk_bulk clk_bulk; - fdt_addr_t addr; - int ret; - -@@ -524,6 +525,10 @@ int ns16550_serial_probe(struct udevice - if (!ret) - reset_deassert_bulk(&reset_bulk); - -+ ret = clk_get_bulk(dev, &clk_bulk); -+ if (!ret) -+ clk_enable_bulk(&clk_bulk); -+ - com_port->plat = dev_get_plat(dev); - ns16550_init(com_port, -1); - diff --git a/lede/package/boot/uboot-d1/patches/0022-fdt-Fix-bounds-check-in-devfdt_get_addr_index.patch b/lede/package/boot/uboot-d1/patches/0022-fdt-Fix-bounds-check-in-devfdt_get_addr_index.patch deleted file mode 100644 index 88d4d670fa..0000000000 --- a/lede/package/boot/uboot-d1/patches/0022-fdt-Fix-bounds-check-in-devfdt_get_addr_index.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 0e4edc3a01f179337bb0bd0d31855dbce338a23e Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sun, 30 Oct 2022 14:53:45 -0500 -Subject: [PATCH 22/90] fdt: Fix bounds check in devfdt_get_addr_index - -reg must contain enough cells for the entire next address/size pair -after skipping `index` pairs. The previous code allows an out-of-bounds -read when na + ns > 1. - -Series-to: Simon Glass - -Fixes: 69b41388ba45 ("dm: core: Add a new api to get indexed device address") -Signed-off-by: Samuel Holland ---- - drivers/core/fdtaddr.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/core/fdtaddr.c -+++ b/drivers/core/fdtaddr.c -@@ -43,7 +43,7 @@ fdt_addr_t devfdt_get_addr_index(const s - } - - reg = fdt_getprop(gd->fdt_blob, offset, "reg", &len); -- if (!reg || (len <= (index * sizeof(fdt32_t) * (na + ns)))) { -+ if (!reg || (len < ((index + 1) * sizeof(fdt32_t) * (na + ns)))) { - debug("Req index out of range\n"); - return FDT_ADDR_T_NONE; - } diff --git a/lede/package/boot/uboot-d1/patches/0023-Kconfig-Remove-an-impossible-condition.patch b/lede/package/boot/uboot-d1/patches/0023-Kconfig-Remove-an-impossible-condition.patch deleted file mode 100644 index 285fd1e040..0000000000 --- a/lede/package/boot/uboot-d1/patches/0023-Kconfig-Remove-an-impossible-condition.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 2d85df851c590b454749ac989a778bb226637bfc Mon Sep 17 00:00:00 2001 -From: Zoltan HERPAI -Date: Tue, 6 Jun 2023 15:08:39 +0000 -Subject: [PATCH 23/90] Kconfig: Remove an impossible condition - -ARCH_SUNXI selects BINMAN, so the condition "!BINMAN && ARCH_SUNXI" -is impossible to satisfy. - -Signed-off-by: Samuel Holland -Signed-off-by: Zoltan HERPAI ---- - Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/Kconfig -+++ b/Kconfig -@@ -459,7 +459,7 @@ config BUILD_TARGET - default "u-boot-with-spl.kwb" if ARCH_MVEBU && SPL - default "u-boot-elf.srec" if RCAR_GEN3 - default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \ -- ARCH_SUNXI || RISCV || ARCH_ZYNQMP) -+ RISCV || ARCH_ZYNQMP) - default "u-boot.kwb" if ARCH_KIRKWOOD - default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT - default "u-boot-with-spl.imx" if ARCH_MX6 && SPL diff --git a/lede/package/boot/uboot-d1/patches/0024-binman-Prevent-entries-in-a-section-from-overlapping.patch b/lede/package/boot/uboot-d1/patches/0024-binman-Prevent-entries-in-a-section-from-overlapping.patch deleted file mode 100644 index 2a7e544a7f..0000000000 --- a/lede/package/boot/uboot-d1/patches/0024-binman-Prevent-entries-in-a-section-from-overlapping.patch +++ /dev/null @@ -1,33 +0,0 @@ -From b7150f7dd885012868c94b29ac4fe6152c065a95 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 9 Oct 2021 10:43:56 -0500 -Subject: [PATCH 24/90] binman: Prevent entries in a section from overlapping - -Currently, if the "offset" property is given for an entry, the section's -running offset is completely ignored. This causes entries to overlap if -the provided offset is less than the size of the entries earlier in the -section. Avoid the overlap by only using the provided offset when it is -greater than the running offset. - -The motivation for this change is the rule used by SPL to find U-Boot on -sunxi boards: U-Boot starts 32 KiB after the start of SPL, unless SPL is -larger than 32 KiB, in which case U-Boot immediately follows SPL. - -Signed-off-by: Samuel Holland ---- - tools/binman/entry.py | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/tools/binman/entry.py -+++ b/tools/binman/entry.py -@@ -483,7 +483,9 @@ class Entry(object): - if self.offset_unset: - self.Raise('No offset set with offset-unset: should another ' - 'entry provide this correct offset?') -- self.offset = tools.align(offset, self.align) -+ elif self.offset > offset: -+ offset = self.offset -+ self.offset = tools.align(offset, self.align) - needed = self.pad_before + self.contents_size + self.pad_after - needed = tools.align(needed, self.align_size) - size = self.size diff --git a/lede/package/boot/uboot-d1/patches/0025-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch b/lede/package/boot/uboot-d1/patches/0025-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch deleted file mode 100644 index 7deee7a469..0000000000 --- a/lede/package/boot/uboot-d1/patches/0025-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch +++ /dev/null @@ -1,192 +0,0 @@ -From b641ca5f4d272b83ef77ebcf5c75678cf139c69a Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 17 Apr 2021 13:33:54 -0500 -Subject: [PATCH 25/90] sunxi: binman: Enable SPL FIT loading for 32-bit SoCs - -Now that Crust (SCP firmware) has support for H3, we need a FIT image to -load it. H3 also needs to load a SoC-specific eGon blob to support CPU 0 -hotplug. Let's first enable FIT support before adding extra firmware. - -Update the binman description to work on either 32-bit or 64-bit SoCs: - - Make BL31 optional, since it is not used on 32-bit SoCs (though BL32 - may be used in the future). - - Explicitly set the minimum offset of the FIT to 32 KiB, since SPL on - some boards is still only 24 KiB large even with FIT support enabled. - CONFIG_SPL_PAD_TO cannot be used because it is not defined for H616. - -FIT unlocks more features (signatures, multiple DTBs, etc.), so enable -it by default. A10 (sun4i) only has 24 KiB of SRAM A1, so it needs -SPL_FIT_IMAGE_TINY. For simplicity, enable that option everywhere. - -Cover-letter: -sunxi: SPL FIT support for 32-bit sunxi SoCs -This series makes the necessary changes so 32-bit sunxi SoCs can load -additional device trees or firmware from SPL along with U-Boot proper. - -There was no existing binman entry property that put the FIT at the -right offset. The minimum offset is 32k, but this matches neither the -SPL size (which is no more than 24k on some SoCs) nor the FIT alignment -(which is 512 bytes in practice due to SPL size constraints). So instead -of adding a new property, I fixed what is arguably a bug in the offset -property -- though this strategy will not work if someone is -intentionally creating overlapping entries. -END -Series-to: sunxi -Series-to: sjg -Signed-off-by: Samuel Holland ---- - arch/arm/Kconfig | 1 + - arch/arm/dts/sunxi-u-boot.dtsi | 46 ++++++++++++++++++++++------------ - common/spl/Kconfig | 9 +++---- - 3 files changed, 35 insertions(+), 21 deletions(-) - ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1135,6 +1135,7 @@ config ARCH_SUNXI - imply SPL_GPIO - imply SPL_LIBCOMMON_SUPPORT - imply SPL_LIBGENERIC_SUPPORT -+ imply SPL_LOAD_FIT - imply SPL_MMC if MMC - imply SPL_POWER - imply SPL_SERIAL ---- a/arch/arm/dts/sunxi-u-boot.dtsi -+++ b/arch/arm/dts/sunxi-u-boot.dtsi -@@ -1,13 +1,19 @@ - #include - --#ifdef CONFIG_MACH_SUN50I_H6 --#define BL31_ADDR 0x104000 --#define SCP_ADDR 0x114000 --#elif defined(CONFIG_MACH_SUN50I_H616) --#define BL31_ADDR 0x40000000 -+#ifdef CONFIG_ARM64 -+#define ARCH "arm64" - #else --#define BL31_ADDR 0x44000 --#define SCP_ADDR 0x50000 -+#define ARCH "arm" -+#endif -+ -+#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5) -+#define BL31_ADDR 0x00044000 -+#define SCP_ADDR 0x00050000 -+#elif defined(CONFIG_MACH_SUN50I_H6) -+#define BL31_ADDR 0x00104000 -+#define SCP_ADDR 0x00114000 -+#elif defined(CONFIG_MACH_SUN50I_H616) -+#define BL31_ADDR 0x40000000 - #endif - - / { -@@ -34,30 +40,33 @@ - filename = "spl/sunxi-spl.bin"; - }; - --#ifdef CONFIG_ARM64 -+#ifdef CONFIG_SPL_LOAD_FIT - fit { -- description = "Configuration to load ATF before U-Boot"; -+ description = "Configuration to load U-Boot and firmware"; -+ offset = <32768>; - #address-cells = <1>; - fit,fdt-list = "of-list"; - - images { - uboot { -- description = "U-Boot (64-bit)"; -+ description = "U-Boot"; - type = "standalone"; - os = "u-boot"; -- arch = "arm64"; -+ arch = ARCH; - compression = "none"; - load = ; -+ entry = ; - - u-boot-nodtb { - }; - }; - -+#ifdef BL31_ADDR - atf { - description = "ARM Trusted Firmware"; - type = "firmware"; - os = "arm-trusted-firmware"; -- arch = "arm64"; -+ arch = ARCH; - compression = "none"; - load = ; - entry = ; -@@ -67,6 +76,7 @@ - missing-msg = "atf-bl31-sunxi"; - }; - }; -+#endif - - #ifdef SCP_ADDR - scp { -@@ -95,19 +105,23 @@ - - @config-SEQ { - description = "NAME"; -+#ifdef BL31_ADDR - firmware = "atf"; --#ifndef SCP_ADDR -- loadables = "uboot"; - #else -- loadables = "scp", "uboot"; -+ firmware = "uboot"; -+#endif -+ loadables = -+#ifdef SCP_ADDR -+ "scp", - #endif -+ "uboot"; - fdt = "fdt-SEQ"; - }; - }; - }; - #else - u-boot-img { -- offset = ; -+ offset = <32768>; - }; - #endif - }; ---- a/common/spl/Kconfig -+++ b/common/spl/Kconfig -@@ -76,12 +76,12 @@ config SPL_SIZE_LIMIT_PROVIDE_STACK - - config SPL_MAX_SIZE - hex "Maximum size of the SPL image, excluding BSS" -+ default 0x37fa0 if MACH_SUN50I_H616 - default 0x30000 if ARCH_MX6 && MX6_OCRAM_256KB -+ default 0x25fa0 if MACH_SUN50I_H6 - default 0x1b000 if AM33XX && !TI_SECURE_DEVICE - default 0x10000 if ARCH_MX6 && !MX6_OCRAM_256KB - default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x10000 -- default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x20000 && !MACH_SUN50I_H616 -- default 0xbfa0 if MACH_SUN50I_H616 - default 0x7000 if RCAR_GEN3 - default 0x5fa0 if SUNXI_SRAM_ADDRESS = 0x0 - default 0x10000 if ASPEED_AST2600 -@@ -97,7 +97,7 @@ config SPL_PAD_TO - default 0x31000 if ARCH_MX6 && MX6_OCRAM_256KB - default 0x11000 if ARCH_MX7 || (ARCH_MX6 && !MX6_OCRAM_256KB) - default 0x10000 if ARCH_KEYSTONE -- default 0x8000 if ARCH_SUNXI && !MACH_SUN50I_H616 -+ default 0x0 if ARCH_SUNXI - default 0x0 if ARCH_MTMIPS - default TPL_MAX_SIZE if TPL_MAX_SIZE > SPL_MAX_SIZE - default SPL_MAX_SIZE -@@ -575,8 +575,7 @@ config SPL_MD5 - config SPL_FIT_IMAGE_TINY - bool "Remove functionality from SPL FIT loading to reduce size" - depends on SPL_FIT -- default y if MACH_SUN50I || MACH_SUN50I_H5 || SUN50I_GEN_H6 -- default y if ARCH_IMX8M || ARCH_IMX9 -+ default y if ARCH_IMX8M || ARCH_IMX9 || ARCH_SUNXI - help - Enable this to reduce the size of the FIT image loading code - in SPL, if space for the SPL binary is very tight. diff --git a/lede/package/boot/uboot-d1/patches/0026-sunxi-psci-Avoid-hanging-when-CPU-0-is-hot-unplugged.patch b/lede/package/boot/uboot-d1/patches/0026-sunxi-psci-Avoid-hanging-when-CPU-0-is-hot-unplugged.patch deleted file mode 100644 index e440351b0a..0000000000 --- a/lede/package/boot/uboot-d1/patches/0026-sunxi-psci-Avoid-hanging-when-CPU-0-is-hot-unplugged.patch +++ /dev/null @@ -1,51 +0,0 @@ -From ca1e6f4491981432c3e88441131c8e25067da95e Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 9 Oct 2021 22:00:22 -0500 -Subject: [PATCH 26/90] sunxi: psci: Avoid hanging when CPU 0 is hot-unplugged - -Do not try to send an SGI from CPU 0 to itself. Since FIQs are masked -when entering monitor mode, this will hang. Plus, CPU 0 cannot fully -power itself off anyway. Instead, have it turn FIQs back on and continue -servicing SGIs from other cores. - -Signed-off-by: Samuel Holland ---- - arch/arm/cpu/armv7/sunxi/psci.c | 20 +++++++++++++++++--- - 1 file changed, 17 insertions(+), 3 deletions(-) - ---- a/arch/arm/cpu/armv7/sunxi/psci.c -+++ b/arch/arm/cpu/armv7/sunxi/psci.c -@@ -38,6 +38,15 @@ - #define SUN8I_R40_PWR_CLAMP(cpu) (0x120 + (cpu) * 0x4) - #define SUN8I_R40_SRAMC_SOFT_ENTRY_REG0 (0xbc) - -+static inline u32 __secure cp15_read_mpidr(void) -+{ -+ u32 val; -+ -+ asm volatile ("mrc p15, 0, %0, c0, c0, 5" : "=r" (val)); -+ -+ return val; -+} -+ - static void __secure cp15_write_cntp_tval(u32 tval) - { - asm volatile ("mcr p15, 0, %0, c14, c2, 0" : : "r" (tval)); -@@ -281,9 +290,14 @@ s32 __secure psci_cpu_off(void) - { - psci_cpu_off_common(); - -- /* Ask CPU0 via SGI15 to pull the rug... */ -- writel(BIT(16) | 15, GICD_BASE + GICD_SGIR); -- dsb(); -+ if (cp15_read_mpidr() & 3) { -+ /* Ask CPU0 via SGI15 to pull the rug... */ -+ writel(BIT(16) | 15, GICD_BASE + GICD_SGIR); -+ dsb(); -+ } else { -+ /* Unmask FIQs to service SGI15. */ -+ asm volatile ("cpsie f"); -+ } - - /* Wait to be turned off */ - while (1) diff --git a/lede/package/boot/uboot-d1/patches/0027-clk-sunxi-Add-NAND-clocks-and-resets.patch b/lede/package/boot/uboot-d1/patches/0027-clk-sunxi-Add-NAND-clocks-and-resets.patch deleted file mode 100644 index 157c3cd4a2..0000000000 --- a/lede/package/boot/uboot-d1/patches/0027-clk-sunxi-Add-NAND-clocks-and-resets.patch +++ /dev/null @@ -1,295 +0,0 @@ -From 2f48dfc23d612f6f1798ff761854fd3141d0671f Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sun, 15 May 2022 21:29:22 -0500 -Subject: [PATCH 27/90] clk: sunxi: Add NAND clocks and resets - -Currently NAND clock setup is done in board code, both in SPL and in -U-Boot proper. Add the NAND clocks/resets here so they can be used by -the "full" NAND driver once it is converted to the driver model. - -The bit locations are copied from the Linux CCU drivers. - -Signed-off-by: Samuel Holland ---- - drivers/clk/sunxi/clk_a10.c | 2 ++ - drivers/clk/sunxi/clk_a10s.c | 2 ++ - drivers/clk/sunxi/clk_a23.c | 3 +++ - drivers/clk/sunxi/clk_a31.c | 6 ++++++ - drivers/clk/sunxi/clk_a64.c | 3 +++ - drivers/clk/sunxi/clk_a80.c | 8 ++++++++ - drivers/clk/sunxi/clk_a83t.c | 3 +++ - drivers/clk/sunxi/clk_h3.c | 3 +++ - drivers/clk/sunxi/clk_h6.c | 6 ++++++ - drivers/clk/sunxi/clk_h616.c | 6 ++++++ - drivers/clk/sunxi/clk_r40.c | 3 +++ - 11 files changed, 45 insertions(+) - ---- a/drivers/clk/sunxi/clk_a10.c -+++ b/drivers/clk/sunxi/clk_a10.c -@@ -23,6 +23,7 @@ static struct ccu_clk_gate a10_gates[] = - [CLK_AHB_MMC1] = GATE(0x060, BIT(9)), - [CLK_AHB_MMC2] = GATE(0x060, BIT(10)), - [CLK_AHB_MMC3] = GATE(0x060, BIT(11)), -+ [CLK_AHB_NAND] = GATE(0x060, BIT(13)), - [CLK_AHB_EMAC] = GATE(0x060, BIT(17)), - [CLK_AHB_SPI0] = GATE(0x060, BIT(20)), - [CLK_AHB_SPI1] = GATE(0x060, BIT(21)), -@@ -47,6 +48,7 @@ static struct ccu_clk_gate a10_gates[] = - [CLK_APB1_UART6] = GATE(0x06c, BIT(22)), - [CLK_APB1_UART7] = GATE(0x06c, BIT(23)), - -+ [CLK_NAND] = GATE(0x080, BIT(31)), - [CLK_SPI0] = GATE(0x0a0, BIT(31)), - [CLK_SPI1] = GATE(0x0a4, BIT(31)), - [CLK_SPI2] = GATE(0x0a8, BIT(31)), ---- a/drivers/clk/sunxi/clk_a10s.c -+++ b/drivers/clk/sunxi/clk_a10s.c -@@ -20,6 +20,7 @@ static struct ccu_clk_gate a10s_gates[] - [CLK_AHB_MMC0] = GATE(0x060, BIT(8)), - [CLK_AHB_MMC1] = GATE(0x060, BIT(9)), - [CLK_AHB_MMC2] = GATE(0x060, BIT(10)), -+ [CLK_AHB_NAND] = GATE(0x060, BIT(13)), - [CLK_AHB_EMAC] = GATE(0x060, BIT(17)), - [CLK_AHB_SPI0] = GATE(0x060, BIT(20)), - [CLK_AHB_SPI1] = GATE(0x060, BIT(21)), -@@ -35,6 +36,7 @@ static struct ccu_clk_gate a10s_gates[] - [CLK_APB1_UART2] = GATE(0x06c, BIT(18)), - [CLK_APB1_UART3] = GATE(0x06c, BIT(19)), - -+ [CLK_NAND] = GATE(0x080, BIT(31)), - [CLK_SPI0] = GATE(0x0a0, BIT(31)), - [CLK_SPI1] = GATE(0x0a4, BIT(31)), - [CLK_SPI2] = GATE(0x0a8, BIT(31)), ---- a/drivers/clk/sunxi/clk_a23.c -+++ b/drivers/clk/sunxi/clk_a23.c -@@ -17,6 +17,7 @@ static struct ccu_clk_gate a23_gates[] = - [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), - [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), - [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), -+ [CLK_BUS_NAND] = GATE(0x060, BIT(13)), - [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), - [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), - [CLK_BUS_OTG] = GATE(0x060, BIT(24)), -@@ -34,6 +35,7 @@ static struct ccu_clk_gate a23_gates[] = - [CLK_BUS_UART3] = GATE(0x06c, BIT(19)), - [CLK_BUS_UART4] = GATE(0x06c, BIT(20)), - -+ [CLK_NAND] = GATE(0x080, BIT(31)), - [CLK_SPI0] = GATE(0x0a0, BIT(31)), - [CLK_SPI1] = GATE(0x0a4, BIT(31)), - -@@ -52,6 +54,7 @@ static struct ccu_reset a23_resets[] = { - [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), - [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), - [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), -+ [RST_BUS_NAND] = RESET(0x2c0, BIT(13)), - [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), - [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), - [RST_BUS_OTG] = RESET(0x2c0, BIT(24)), ---- a/drivers/clk/sunxi/clk_a31.c -+++ b/drivers/clk/sunxi/clk_a31.c -@@ -18,6 +18,8 @@ static struct ccu_clk_gate a31_gates[] = - [CLK_AHB1_MMC1] = GATE(0x060, BIT(9)), - [CLK_AHB1_MMC2] = GATE(0x060, BIT(10)), - [CLK_AHB1_MMC3] = GATE(0x060, BIT(11)), -+ [CLK_AHB1_NAND1] = GATE(0x060, BIT(12)), -+ [CLK_AHB1_NAND0] = GATE(0x060, BIT(13)), - [CLK_AHB1_EMAC] = GATE(0x060, BIT(17)), - [CLK_AHB1_SPI0] = GATE(0x060, BIT(20)), - [CLK_AHB1_SPI1] = GATE(0x060, BIT(21)), -@@ -43,6 +45,8 @@ static struct ccu_clk_gate a31_gates[] = - [CLK_APB2_UART4] = GATE(0x06c, BIT(20)), - [CLK_APB2_UART5] = GATE(0x06c, BIT(21)), - -+ [CLK_NAND0] = GATE(0x080, BIT(31)), -+ [CLK_NAND1] = GATE(0x084, BIT(31)), - [CLK_SPI0] = GATE(0x0a0, BIT(31)), - [CLK_SPI1] = GATE(0x0a4, BIT(31)), - [CLK_SPI2] = GATE(0x0a8, BIT(31)), -@@ -65,6 +69,8 @@ static struct ccu_reset a31_resets[] = { - [RST_AHB1_MMC1] = RESET(0x2c0, BIT(9)), - [RST_AHB1_MMC2] = RESET(0x2c0, BIT(10)), - [RST_AHB1_MMC3] = RESET(0x2c0, BIT(11)), -+ [RST_AHB1_NAND1] = RESET(0x2c0, BIT(12)), -+ [RST_AHB1_NAND0] = RESET(0x2c0, BIT(13)), - [RST_AHB1_EMAC] = RESET(0x2c0, BIT(17)), - [RST_AHB1_SPI0] = RESET(0x2c0, BIT(20)), - [RST_AHB1_SPI1] = RESET(0x2c0, BIT(21)), ---- a/drivers/clk/sunxi/clk_a64.c -+++ b/drivers/clk/sunxi/clk_a64.c -@@ -19,6 +19,7 @@ static const struct ccu_clk_gate a64_gat - [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), - [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), - [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), -+ [CLK_BUS_NAND] = GATE(0x060, BIT(13)), - [CLK_BUS_EMAC] = GATE(0x060, BIT(17)), - [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), - [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), -@@ -39,6 +40,7 @@ static const struct ccu_clk_gate a64_gat - [CLK_BUS_UART3] = GATE(0x06c, BIT(19)), - [CLK_BUS_UART4] = GATE(0x06c, BIT(20)), - -+ [CLK_NAND] = GATE(0x080, BIT(31)), - [CLK_SPI0] = GATE(0x0a0, BIT(31)), - [CLK_SPI1] = GATE(0x0a4, BIT(31)), - -@@ -58,6 +60,7 @@ static const struct ccu_reset a64_resets - [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), - [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), - [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), -+ [RST_BUS_NAND] = RESET(0x2c0, BIT(13)), - [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)), - [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), - [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), ---- a/drivers/clk/sunxi/clk_a80.c -+++ b/drivers/clk/sunxi/clk_a80.c -@@ -14,12 +14,18 @@ - #include - - static const struct ccu_clk_gate a80_gates[] = { -+ [CLK_NAND0_0] = GATE(0x400, BIT(31)), -+ [CLK_NAND0_1] = GATE(0x404, BIT(31)), -+ [CLK_NAND1_0] = GATE(0x408, BIT(31)), -+ [CLK_NAND1_1] = GATE(0x40c, BIT(31)), - [CLK_SPI0] = GATE(0x430, BIT(31)), - [CLK_SPI1] = GATE(0x434, BIT(31)), - [CLK_SPI2] = GATE(0x438, BIT(31)), - [CLK_SPI3] = GATE(0x43c, BIT(31)), - - [CLK_BUS_MMC] = GATE(0x580, BIT(8)), -+ [CLK_BUS_NAND0] = GATE(0x580, BIT(12)), -+ [CLK_BUS_NAND1] = GATE(0x580, BIT(13)), - [CLK_BUS_SPI0] = GATE(0x580, BIT(20)), - [CLK_BUS_SPI1] = GATE(0x580, BIT(21)), - [CLK_BUS_SPI2] = GATE(0x580, BIT(22)), -@@ -42,6 +48,8 @@ static const struct ccu_clk_gate a80_gat - - static const struct ccu_reset a80_resets[] = { - [RST_BUS_MMC] = RESET(0x5a0, BIT(8)), -+ [RST_BUS_NAND0] = RESET(0x5a0, BIT(12)), -+ [RST_BUS_NAND1] = RESET(0x5a0, BIT(13)), - [RST_BUS_SPI0] = RESET(0x5a0, BIT(20)), - [RST_BUS_SPI1] = RESET(0x5a0, BIT(21)), - [RST_BUS_SPI2] = RESET(0x5a0, BIT(22)), ---- a/drivers/clk/sunxi/clk_a83t.c -+++ b/drivers/clk/sunxi/clk_a83t.c -@@ -17,6 +17,7 @@ static struct ccu_clk_gate a83t_gates[] - [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), - [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), - [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), -+ [CLK_BUS_NAND] = GATE(0x060, BIT(13)), - [CLK_BUS_EMAC] = GATE(0x060, BIT(17)), - [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), - [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), -@@ -36,6 +37,7 @@ static struct ccu_clk_gate a83t_gates[] - [CLK_BUS_UART3] = GATE(0x06c, BIT(19)), - [CLK_BUS_UART4] = GATE(0x06c, BIT(20)), - -+ [CLK_NAND] = GATE(0x080, BIT(31)), - [CLK_SPI0] = GATE(0x0a0, BIT(31)), - [CLK_SPI1] = GATE(0x0a4, BIT(31)), - -@@ -54,6 +56,7 @@ static struct ccu_reset a83t_resets[] = - [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), - [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), - [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), -+ [RST_BUS_NAND] = RESET(0x2c0, BIT(13)), - [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)), - [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), - [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), ---- a/drivers/clk/sunxi/clk_h3.c -+++ b/drivers/clk/sunxi/clk_h3.c -@@ -19,6 +19,7 @@ static struct ccu_clk_gate h3_gates[] = - [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), - [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), - [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), -+ [CLK_BUS_NAND] = GATE(0x060, BIT(13)), - [CLK_BUS_EMAC] = GATE(0x060, BIT(17)), - [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), - [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), -@@ -44,6 +45,7 @@ static struct ccu_clk_gate h3_gates[] = - - [CLK_BUS_EPHY] = GATE(0x070, BIT(0)), - -+ [CLK_NAND] = GATE(0x080, BIT(31)), - [CLK_SPI0] = GATE(0x0a0, BIT(31)), - [CLK_SPI1] = GATE(0x0a4, BIT(31)), - -@@ -66,6 +68,7 @@ static struct ccu_reset h3_resets[] = { - [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), - [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), - [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), -+ [RST_BUS_NAND] = RESET(0x2c0, BIT(13)), - [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)), - [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), - [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), ---- a/drivers/clk/sunxi/clk_h6.c -+++ b/drivers/clk/sunxi/clk_h6.c -@@ -18,6 +18,10 @@ static struct ccu_clk_gate h6_gates[] = - - [CLK_APB1] = GATE_DUMMY, - -+ [CLK_NAND0] = GATE(0x810, BIT(31)), -+ [CLK_NAND1] = GATE(0x814, BIT(31)), -+ [CLK_BUS_NAND] = GATE(0x82c, BIT(0)), -+ - [CLK_BUS_MMC0] = GATE(0x84c, BIT(0)), - [CLK_BUS_MMC1] = GATE(0x84c, BIT(1)), - [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)), -@@ -58,6 +62,8 @@ static struct ccu_clk_gate h6_gates[] = - }; - - static struct ccu_reset h6_resets[] = { -+ [RST_BUS_NAND] = RESET(0x82c, BIT(16)), -+ - [RST_BUS_MMC0] = RESET(0x84c, BIT(16)), - [RST_BUS_MMC1] = RESET(0x84c, BIT(17)), - [RST_BUS_MMC2] = RESET(0x84c, BIT(18)), ---- a/drivers/clk/sunxi/clk_h616.c -+++ b/drivers/clk/sunxi/clk_h616.c -@@ -17,6 +17,10 @@ static struct ccu_clk_gate h616_gates[] - - [CLK_APB1] = GATE_DUMMY, - -+ [CLK_NAND0] = GATE(0x810, BIT(31)), -+ [CLK_NAND1] = GATE(0x814, BIT(31)), -+ [CLK_BUS_NAND] = GATE(0x82c, BIT(0)), -+ - [CLK_BUS_MMC0] = GATE(0x84c, BIT(0)), - [CLK_BUS_MMC1] = GATE(0x84c, BIT(1)), - [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)), -@@ -67,6 +71,8 @@ static struct ccu_clk_gate h616_gates[] - }; - - static struct ccu_reset h616_resets[] = { -+ [RST_BUS_NAND] = RESET(0x82c, BIT(16)), -+ - [RST_BUS_MMC0] = RESET(0x84c, BIT(16)), - [RST_BUS_MMC1] = RESET(0x84c, BIT(17)), - [RST_BUS_MMC2] = RESET(0x84c, BIT(18)), ---- a/drivers/clk/sunxi/clk_r40.c -+++ b/drivers/clk/sunxi/clk_r40.c -@@ -18,6 +18,7 @@ static struct ccu_clk_gate r40_gates[] = - [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), - [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), - [CLK_BUS_MMC3] = GATE(0x060, BIT(11)), -+ [CLK_BUS_NAND] = GATE(0x060, BIT(13)), - [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), - [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), - [CLK_BUS_SPI2] = GATE(0x060, BIT(22)), -@@ -48,6 +49,7 @@ static struct ccu_clk_gate r40_gates[] = - [CLK_BUS_UART6] = GATE(0x06c, BIT(22)), - [CLK_BUS_UART7] = GATE(0x06c, BIT(23)), - -+ [CLK_NAND] = GATE(0x080, BIT(31)), - [CLK_SPI0] = GATE(0x0a0, BIT(31)), - [CLK_SPI1] = GATE(0x0a4, BIT(31)), - [CLK_SPI2] = GATE(0x0a8, BIT(31)), -@@ -70,6 +72,7 @@ static struct ccu_reset r40_resets[] = { - [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), - [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), - [RST_BUS_MMC3] = RESET(0x2c0, BIT(11)), -+ [RST_BUS_NAND] = RESET(0x2c0, BIT(13)), - [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), - [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), - [RST_BUS_SPI2] = RESET(0x2c0, BIT(22)), diff --git a/lede/package/boot/uboot-d1/patches/0028-pinctrl-sunxi-Add-NAND-pinmuxes.patch b/lede/package/boot/uboot-d1/patches/0028-pinctrl-sunxi-Add-NAND-pinmuxes.patch deleted file mode 100644 index 6ecba35890..0000000000 --- a/lede/package/boot/uboot-d1/patches/0028-pinctrl-sunxi-Add-NAND-pinmuxes.patch +++ /dev/null @@ -1,120 +0,0 @@ -From 7be2405244565973cff0a40196bbed08df90f6a3 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Mon, 16 May 2022 00:31:36 -0500 -Subject: [PATCH 28/90] pinctrl: sunxi: Add NAND pinmuxes - -NAND is always at function 2 on port C. - -Pin lists and mux values were taken from the Linux drivers. - -Signed-off-by: Samuel Holland ---- - drivers/pinctrl/sunxi/pinctrl-sunxi.c | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - ---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c -+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c -@@ -269,6 +269,7 @@ static const struct sunxi_pinctrl_functi - #endif - { "mmc2", 3 }, /* PC6-PC15 */ - { "mmc3", 2 }, /* PI4-PI9 */ -+ { "nand0", 2 }, /* PC0-PC24 */ - { "spi0", 3 }, /* PC0-PC2, PC23 */ - #if IS_ENABLED(CONFIG_UART0_PORT_F) - { "uart0", 4 }, /* PF2-PF4 */ -@@ -293,6 +294,7 @@ static const struct sunxi_pinctrl_functi - { "mmc0", 2 }, /* PF0-PF5 */ - { "mmc1", 2 }, /* PG3-PG8 */ - { "mmc2", 3 }, /* PC6-PC15 */ -+ { "nand0", 2 }, /* PC0-PC19 */ - { "spi0", 3 }, /* PC0-PC3 */ - #if IS_ENABLED(CONFIG_UART0_PORT_F) - { "uart0", 4 }, /* PF2-PF4 */ -@@ -319,6 +321,7 @@ static const struct sunxi_pinctrl_functi - { "mmc1", 2 }, /* PG0-PG5 */ - { "mmc2", 3 }, /* PC6-PC15, PC24 */ - { "mmc3", 4 }, /* PC6-PC15, PC24 */ -+ { "nand0", 2 }, /* PC0-PC26 */ - { "spi0", 3 }, /* PC0-PC2, PC27 */ - #if IS_ENABLED(CONFIG_UART0_PORT_F) - { "uart0", 3 }, /* PF2-PF4 */ -@@ -363,6 +366,7 @@ static const struct sunxi_pinctrl_functi - { "mmc1", 4 }, /* PG0-PG5 */ - #endif - { "mmc2", 3 }, /* PC5-PC15, PC24 */ -+ { "nand0", 2 }, /* PC0-PC24 */ - { "spi0", 3 }, /* PC0-PC2, PC23 */ - #if IS_ENABLED(CONFIG_UART0_PORT_F) - { "uart0", 4 }, /* PF2-PF4 */ -@@ -386,6 +390,7 @@ static const struct sunxi_pinctrl_functi - { "mmc0", 2 }, /* PF0-PF5 */ - { "mmc1", 2 }, /* PG0-PG5 */ - { "mmc2", 3 }, /* PC5-PC16 */ -+ { "nand0", 2 }, /* PC0-PC16 */ - { "spi0", 3 }, /* PC0-PC3 */ - #if IS_ENABLED(CONFIG_UART0_PORT_F) - { "uart0", 3 }, /* PF2-PF4 */ -@@ -424,6 +429,7 @@ static const struct sunxi_pinctrl_functi - { "mmc0", 2 }, /* PF0-PF5 */ - { "mmc1", 2 }, /* PG0-PG5 */ - { "mmc2", 3 }, /* PC5-PC16 */ -+ { "nand0", 2 }, /* PC0-PC16 */ - { "spi0", 3 }, /* PC0-PC3 */ - #if IS_ENABLED(CONFIG_UART0_PORT_F) - { "uart0", 3 }, /* PF2-PF4 */ -@@ -450,6 +456,7 @@ static const struct sunxi_pinctrl_functi - { "mmc0", 2 }, /* PF0-PF5 */ - { "mmc1", 2 }, /* PG0-PG5 */ - { "mmc2", 3 }, /* PC5-PC16 */ -+ { "nand0", 2 }, /* PC0-PC18 */ - { "spi0", 3 }, /* PC0-PC3 */ - #if IS_ENABLED(CONFIG_UART0_PORT_F) - { "uart0", 3 }, /* PF2-PF4 */ -@@ -491,6 +498,7 @@ static const struct sunxi_pinctrl_functi - { "mmc0", 2 }, /* PF0-PF5 */ - { "mmc1", 2 }, /* PG0-PG5 */ - { "mmc2", 3 }, /* PC5-PC16 */ -+ { "nand0", 2 }, /* PC0-PC16 */ - { "spi0", 3 }, /* PC0-PC3 */ - #if IS_ENABLED(CONFIG_UART0_PORT_F) - { "uart0", 3 }, /* PF2-PF4 */ -@@ -557,6 +565,7 @@ static const struct sunxi_pinctrl_functi - { "mmc0", 2 }, /* PF0-PF5 */ - { "mmc1", 2 }, /* PG0-PG5 */ - { "mmc2", 3 }, /* PC6-PC16 */ -+ { "nand0", 2 }, /* PC0-PC18 */ - { "spi0", 3 }, /* PC0-PC2, PC19 */ - #if IS_ENABLED(CONFIG_UART0_PORT_F) - { "uart0", 4 }, /* PF2-PF4 */ -@@ -622,6 +631,7 @@ static const struct sunxi_pinctrl_functi - { "mmc0", 2 }, /* PF0-PF5 */ - { "mmc1", 2 }, /* PG0-PG5 */ - { "mmc2", 3 }, /* PC1-PC16 */ -+ { "nand0", 2 }, /* PC0-PC16 */ - { "pwm", 2 }, /* PD22 */ - { "spi0", 4 }, /* PC0-PC3 */ - #if IS_ENABLED(CONFIG_UART0_PORT_F) -@@ -664,6 +674,7 @@ static const struct sunxi_pinctrl_functi - { "mmc0", 2 }, /* PF0-PF5 */ - { "mmc1", 2 }, /* PG0-PG5 */ - { "mmc2", 3 }, /* PC1-PC16 */ -+ { "nand0", 2 }, /* PC0-PC16 */ - { "spi0", 3 }, /* PC0-PC3 */ - #if IS_ENABLED(CONFIG_UART0_PORT_F) - { "uart0", 3 }, /* PF2-PF4 */ -@@ -690,6 +701,7 @@ static const struct sunxi_pinctrl_functi - { "mmc0", 2 }, /* PF0-PF5 */ - { "mmc1", 2 }, /* PG0-PG5 */ - { "mmc2", 3 }, /* PC1-PC14 */ -+ { "nand0", 2 }, /* PC0-PC16 */ - { "spi0", 4 }, /* PC0-PC7 */ - #if IS_ENABLED(CONFIG_UART0_PORT_F) - { "uart0", 3 }, /* PF2-PF4 */ -@@ -728,6 +740,7 @@ static const struct sunxi_pinctrl_functi - { "mmc0", 2 }, /* PF0-PF5 */ - { "mmc1", 2 }, /* PG0-PG5 */ - { "mmc2", 3 }, /* PC0-PC16 */ -+ { "nand0", 2 }, /* PC0-PC16 */ - { "spi0", 4 }, /* PC0-PC7, PC15-PC16 */ - #if IS_ENABLED(CONFIG_UART0_PORT_F) - { "uart0", 3 }, /* PF2-PF4 */ diff --git a/lede/package/boot/uboot-d1/patches/0029-mtd-nand-sunxi-Remove-an-unnecessary-check.patch b/lede/package/boot/uboot-d1/patches/0029-mtd-nand-sunxi-Remove-an-unnecessary-check.patch deleted file mode 100644 index 807c31d922..0000000000 --- a/lede/package/boot/uboot-d1/patches/0029-mtd-nand-sunxi-Remove-an-unnecessary-check.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 8e793af8598a8429c9dc0f096c72a92adb360a57 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sun, 15 May 2022 21:51:47 -0500 -Subject: [PATCH 29/90] mtd: nand: sunxi: Remove an unnecessary check - -Each chip is required to have a unique CS number ("reg" property) in the -range 0-7, so there is no need to separately count the number of chips. - -Signed-off-by: Samuel Holland ---- - drivers/mtd/nand/raw/sunxi_nand.c | 10 ---------- - 1 file changed, 10 deletions(-) - ---- a/drivers/mtd/nand/raw/sunxi_nand.c -+++ b/drivers/mtd/nand/raw/sunxi_nand.c -@@ -1767,16 +1767,6 @@ static int sunxi_nand_chips_init(int nod - int ret, i = 0; - - for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0; -- nand_node = fdt_next_subnode(blob, nand_node)) -- i++; -- -- if (i > 8) { -- dev_err(nfc->dev, "too many NAND chips: %d (max = 8)\n", i); -- return -EINVAL; -- } -- -- i = 0; -- for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0; - nand_node = fdt_next_subnode(blob, nand_node)) { - ret = sunxi_nand_chip_init(nand_node, nfc, i++); - if (ret) diff --git a/lede/package/boot/uboot-d1/patches/0030-mtd-nand-sunxi-Convert-from-fdtdec-to-ofnode.patch b/lede/package/boot/uboot-d1/patches/0030-mtd-nand-sunxi-Convert-from-fdtdec-to-ofnode.patch deleted file mode 100644 index c88fef4f96..0000000000 --- a/lede/package/boot/uboot-d1/patches/0030-mtd-nand-sunxi-Convert-from-fdtdec-to-ofnode.patch +++ /dev/null @@ -1,203 +0,0 @@ -From 61b63cbb3526e19a0e299f95a3435a237c7c4b4b Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sun, 15 May 2022 21:54:25 -0500 -Subject: [PATCH 30/90] mtd: nand: sunxi: Convert from fdtdec to ofnode - -As a first step toward converting this driver to the driver model, use -the ofnode abstraction to replace direct references to the FDT blob. - -Using ofnode_read_u32_index removes an extra pair of loops and makes the -allwinner,rb property optional, matching the devicetree binding. - -Signed-off-by: Samuel Holland ---- - drivers/mtd/nand/raw/sunxi_nand.c | 73 +++++++++++-------------------- - include/fdtdec.h | 1 - - lib/fdtdec.c | 1 - - 3 files changed, 26 insertions(+), 49 deletions(-) - ---- a/drivers/mtd/nand/raw/sunxi_nand.c -+++ b/drivers/mtd/nand/raw/sunxi_nand.c -@@ -25,11 +25,10 @@ - */ - - #include --#include -+#include - #include - #include - #include --#include - #include - #include - #include -@@ -45,8 +44,6 @@ - #include - #include - --DECLARE_GLOBAL_DATA_PTR; -- - #define NFC_REG_CTL 0x0000 - #define NFC_REG_ST 0x0004 - #define NFC_REG_INT 0x0008 -@@ -1605,19 +1602,18 @@ static int sunxi_nand_ecc_init(struct mt - return 0; - } - --static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum) -+static int sunxi_nand_chip_init(ofnode np, struct sunxi_nfc *nfc, int devnum) - { - const struct nand_sdr_timings *timings; -- const void *blob = gd->fdt_blob; - struct sunxi_nand_chip *chip; - struct mtd_info *mtd; - struct nand_chip *nand; - int nsels; - int ret; - int i; -- u32 cs[8], rb[8]; -+ u32 tmp; - -- if (!fdt_getprop(blob, node, "reg", &nsels)) -+ if (!ofnode_get_property(np, "reg", &nsels)) - return -EINVAL; - - nsels /= sizeof(u32); -@@ -1638,25 +1634,12 @@ static int sunxi_nand_chip_init(int node - chip->selected = -1; - - for (i = 0; i < nsels; i++) { -- cs[i] = -1; -- rb[i] = -1; -- } -- -- ret = fdtdec_get_int_array(gd->fdt_blob, node, "reg", cs, nsels); -- if (ret) { -- dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret); -- return ret; -- } -- -- ret = fdtdec_get_int_array(gd->fdt_blob, node, "allwinner,rb", rb, -- nsels); -- if (ret) { -- dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret); -- return ret; -- } -- -- for (i = 0; i < nsels; i++) { -- int tmp = cs[i]; -+ ret = ofnode_read_u32_index(np, "reg", i, &tmp); -+ if (ret) { -+ dev_err(nfc->dev, "could not retrieve reg property: %d\n", -+ ret); -+ return ret; -+ } - - if (tmp > NFC_MAX_CS) { - dev_err(nfc->dev, -@@ -1671,15 +1654,14 @@ static int sunxi_nand_chip_init(int node - - chip->sels[i].cs = tmp; - -- tmp = rb[i]; -- if (tmp >= 0 && tmp < 2) { -+ if (!ofnode_read_u32_index(np, "allwinner,rb", i, &tmp) && -+ tmp < 2) { - chip->sels[i].rb.type = RB_NATIVE; - chip->sels[i].rb.info.nativeid = tmp; - } else { -- ret = gpio_request_by_name_nodev(offset_to_ofnode(node), -- "rb-gpios", i, -- &chip->sels[i].rb.info.gpio, -- GPIOD_IS_IN); -+ ret = gpio_request_by_name_nodev(np, "rb-gpios", i, -+ &chip->sels[i].rb.info.gpio, -+ GPIOD_IS_IN); - if (ret) - chip->sels[i].rb.type = RB_GPIO; - else -@@ -1711,7 +1693,7 @@ static int sunxi_nand_chip_init(int node - * in the DT. - */ - nand->ecc.mode = NAND_ECC_HW; -- nand->flash_node = offset_to_ofnode(node); -+ nand->flash_node = np; - nand->select_chip = sunxi_nfc_select_chip; - nand->cmd_ctrl = sunxi_nfc_cmd_ctrl; - nand->read_buf = sunxi_nfc_read_buf; -@@ -1760,15 +1742,13 @@ static int sunxi_nand_chip_init(int node - return 0; - } - --static int sunxi_nand_chips_init(int node, struct sunxi_nfc *nfc) -+static int sunxi_nand_chips_init(ofnode node, struct sunxi_nfc *nfc) - { -- const void *blob = gd->fdt_blob; -- int nand_node; -+ ofnode nand_np; - int ret, i = 0; - -- for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0; -- nand_node = fdt_next_subnode(blob, nand_node)) { -- ret = sunxi_nand_chip_init(nand_node, nfc, i++); -+ ofnode_for_each_subnode(nand_np, node) { -+ ret = sunxi_nand_chip_init(nand_np, nfc, i++); - if (ret) - return ret; - } -@@ -1794,10 +1774,9 @@ static void sunxi_nand_chips_cleanup(str - - void sunxi_nand_init(void) - { -- const void *blob = gd->fdt_blob; - struct sunxi_nfc *nfc; -- fdt_addr_t regs; -- int node; -+ phys_addr_t regs; -+ ofnode node; - int ret; - - nfc = kzalloc(sizeof(*nfc), GFP_KERNEL); -@@ -1808,18 +1787,18 @@ void sunxi_nand_init(void) - init_waitqueue_head(&nfc->controller.wq); - INIT_LIST_HEAD(&nfc->chips); - -- node = fdtdec_next_compatible(blob, 0, COMPAT_SUNXI_NAND); -- if (node < 0) { -+ node = ofnode_by_compatible(ofnode_null(), "allwinner,sun4i-a10-nand"); -+ if (!ofnode_valid(node)) { - pr_err("unable to find nfc node in device tree\n"); - goto err; - } - -- if (!fdtdec_get_is_enabled(blob, node)) { -+ if (!ofnode_is_enabled(node)) { - pr_err("nfc disabled in device tree\n"); - goto err; - } - -- regs = fdtdec_get_addr(blob, node, "reg"); -+ regs = ofnode_get_addr(node); - if (regs == FDT_ADDR_T_NONE) { - pr_err("unable to find nfc address in device tree\n"); - goto err; ---- a/include/fdtdec.h -+++ b/include/fdtdec.h -@@ -187,7 +187,6 @@ enum fdt_compat_id { - COMPAT_INTEL_BAYTRAIL_FSP, /* Intel Bay Trail FSP */ - COMPAT_INTEL_BAYTRAIL_FSP_MDP, /* Intel FSP memory-down params */ - COMPAT_INTEL_IVYBRIDGE_FSP, /* Intel Ivy Bridge FSP */ -- COMPAT_SUNXI_NAND, /* SUNXI NAND controller */ - COMPAT_ALTERA_SOCFPGA_CLK, /* SoCFPGA Clock initialization */ - COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE, /* SoCFPGA pinctrl-single */ - COMPAT_ALTERA_SOCFPGA_H2F_BRG, /* SoCFPGA hps2fpga bridge */ ---- a/lib/fdtdec.c -+++ b/lib/fdtdec.c -@@ -64,7 +64,6 @@ static const char * const compat_names[C - COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"), - COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"), - COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"), -- COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"), - COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"), - COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"), - COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"), diff --git a/lede/package/boot/uboot-d1/patches/0031-mtd-nand-sunxi-Convert-to-the-driver-model.patch b/lede/package/boot/uboot-d1/patches/0031-mtd-nand-sunxi-Convert-to-the-driver-model.patch deleted file mode 100644 index d1bec458af..0000000000 --- a/lede/package/boot/uboot-d1/patches/0031-mtd-nand-sunxi-Convert-to-the-driver-model.patch +++ /dev/null @@ -1,172 +0,0 @@ -From 3411a9a1be9a8d8fef236a81edbce2a1a8218a32 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Mon, 16 May 2022 00:16:48 -0500 -Subject: [PATCH 31/90] mtd: nand: sunxi: Convert to the driver model - -Clocks, resets, and pinmuxes are now handled by the driver model, so the -only thing the "board" code needs to do is load the driver. This matches -the pattern used by other DM raw NAND drivers (there is no NAND uclass). - -The actual board code is now only needed in SPL. - -Signed-off-by: Samuel Holland ---- - board/sunxi/board.c | 5 +- - drivers/mtd/nand/raw/sunxi_nand.c | 81 ++++++++++++++++++------------- - 2 files changed, 49 insertions(+), 37 deletions(-) - ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -311,7 +311,7 @@ int dram_init(void) - return 0; - } - --#if defined(CONFIG_NAND_SUNXI) -+#if defined(CONFIG_NAND_SUNXI) && defined(CONFIG_SPL_BUILD) - static void nand_pinmux_setup(void) - { - unsigned int pin; -@@ -347,9 +347,6 @@ void board_nand_init(void) - { - nand_pinmux_setup(); - nand_clock_setup(); --#ifndef CONFIG_SPL_BUILD -- sunxi_nand_init(); --#endif - } - #endif /* CONFIG_NAND_SUNXI */ - ---- a/drivers/mtd/nand/raw/sunxi_nand.c -+++ b/drivers/mtd/nand/raw/sunxi_nand.c -@@ -24,11 +24,13 @@ - * GNU General Public License for more details. - */ - -+#include - #include - #include - #include - #include - #include -+#include - #include - #include - #include -@@ -260,7 +262,7 @@ static inline struct sunxi_nand_chip *to - * NAND Controller structure: stores sunxi NAND controller information - * - * @controller: base controller structure -- * @dev: parent device (used to print error messages) -+ * @dev: DM device (used to print error messages) - * @regs: NAND controller registers - * @ahb_clk: NAND Controller AHB clock - * @mod_clk: NAND Controller mod clock -@@ -273,7 +275,7 @@ static inline struct sunxi_nand_chip *to - */ - struct sunxi_nfc { - struct nand_hw_control controller; -- struct device *dev; -+ struct udevice *dev; - void __iomem *regs; - struct clk *ahb_clk; - struct clk *mod_clk; -@@ -1772,54 +1774,67 @@ static void sunxi_nand_chips_cleanup(str - } - #endif /* __UBOOT__ */ - --void sunxi_nand_init(void) -+static int sunxi_nand_probe(struct udevice *dev) - { -- struct sunxi_nfc *nfc; -- phys_addr_t regs; -- ofnode node; -+ struct sunxi_nfc *nfc = dev_get_priv(dev); -+ struct reset_ctl_bulk rst_bulk; -+ struct clk_bulk clk_bulk; - int ret; - -- nfc = kzalloc(sizeof(*nfc), GFP_KERNEL); -- if (!nfc) -- return; -- -+ nfc->dev = dev; - spin_lock_init(&nfc->controller.lock); - init_waitqueue_head(&nfc->controller.wq); - INIT_LIST_HEAD(&nfc->chips); - -- node = ofnode_by_compatible(ofnode_null(), "allwinner,sun4i-a10-nand"); -- if (!ofnode_valid(node)) { -- pr_err("unable to find nfc node in device tree\n"); -- goto err; -- } -- -- if (!ofnode_is_enabled(node)) { -- pr_err("nfc disabled in device tree\n"); -- goto err; -- } -- -- regs = ofnode_get_addr(node); -- if (regs == FDT_ADDR_T_NONE) { -- pr_err("unable to find nfc address in device tree\n"); -- goto err; -- } -+ nfc->regs = dev_read_addr_ptr(dev); -+ if (!nfc->regs) -+ return -EINVAL; - -- nfc->regs = (void *)regs; -+ ret = reset_get_bulk(dev, &rst_bulk); -+ if (!ret) -+ reset_deassert_bulk(&rst_bulk); -+ -+ ret = clk_get_bulk(dev, &clk_bulk); -+ if (!ret) -+ clk_enable_bulk(&clk_bulk); - - ret = sunxi_nfc_rst(nfc); - if (ret) -- goto err; -+ return ret; - -- ret = sunxi_nand_chips_init(node, nfc); -+ ret = sunxi_nand_chips_init(dev_ofnode(dev), nfc); - if (ret) { -- dev_err(nfc->dev, "failed to init nand chips\n"); -- goto err; -+ dev_err(dev, "failed to init nand chips\n"); -+ return ret; - } - -- return; -+ return 0; -+} - --err: -- kfree(nfc); -+static const struct udevice_id sunxi_nand_ids[] = { -+ { -+ .compatible = "allwinner,sun4i-a10-nand", -+ }, -+ { } -+}; -+ -+U_BOOT_DRIVER(sunxi_nand) = { -+ .name = "sunxi_nand", -+ .id = UCLASS_MTD, -+ .of_match = sunxi_nand_ids, -+ .probe = sunxi_nand_probe, -+ .priv_auto = sizeof(struct sunxi_nfc), -+}; -+ -+void board_nand_init(void) -+{ -+ struct udevice *dev; -+ int ret; -+ -+ ret = uclass_get_device_by_driver(UCLASS_MTD, -+ DM_DRIVER_GET(sunxi_nand), &dev); -+ if (ret && ret != -ENODEV) -+ pr_err("Failed to initialize sunxi NAND controller: %d\n", ret); - } - - MODULE_LICENSE("GPL v2"); diff --git a/lede/package/boot/uboot-d1/patches/0032-sunxi-DT-H6-Add-USB3-to-Pine-H64-DTS.patch b/lede/package/boot/uboot-d1/patches/0032-sunxi-DT-H6-Add-USB3-to-Pine-H64-DTS.patch deleted file mode 100644 index 87c9da924c..0000000000 --- a/lede/package/boot/uboot-d1/patches/0032-sunxi-DT-H6-Add-USB3-to-Pine-H64-DTS.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 6fdd7e8d2758f69f5c8e3cb2a0f06da47c1f2cb4 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 17 Apr 2021 14:21:45 -0500 -Subject: [PATCH 32/90] sunxi: DT: H6: Add USB3 to Pine H64 DTS - -Signed-off-by: Samuel Holland ---- - arch/arm/dts/sun50i-h6-pine-h64.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm/dts/sun50i-h6-pine-h64.dts -+++ b/arch/arm/dts/sun50i-h6-pine-h64.dts -@@ -89,6 +89,10 @@ - status = "okay"; - }; - -+&dwc3 { -+ status = "okay"; -+}; -+ - &ehci0 { - status = "okay"; - }; -@@ -332,3 +336,7 @@ - usb3_vbus-supply = <®_usb_vbus>; - status = "okay"; - }; -+ -+&usb3phy { -+ status = "okay"; -+}; diff --git a/lede/package/boot/uboot-d1/patches/0033-tools-mkimage-Add-Allwinner-TOC1-support.patch b/lede/package/boot/uboot-d1/patches/0033-tools-mkimage-Add-Allwinner-TOC1-support.patch deleted file mode 100644 index d443cdf369..0000000000 --- a/lede/package/boot/uboot-d1/patches/0033-tools-mkimage-Add-Allwinner-TOC1-support.patch +++ /dev/null @@ -1,441 +0,0 @@ -From ff0e952a3a380ba191375d5f68609cdbe026d535 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 7 Aug 2021 19:55:20 -0500 -Subject: [PATCH 33/90] tools: mkimage: Add Allwinner TOC1 support - -TOC1 is an container format used by Allwinner's boot0 that can hold -multiple images. It supports encryption and signatures, but that -functionality is not implemented, only the basic "non-secure" subset. - -A config file is used to provide the list of data files to include. Its -path is passed as the argument to "-d". It contains sections of the -following form: - - [name] - file = /path/to/file - addr = 0x12345678 - -Specific well-known names, such as "dtb", "opensbi", and "u-boot", are -used by the bootloader to distinguish the items inside the image. - -Cover-letter: -tools: mkimage: Add Allwinner TOC1 support - -The SPL port for the Allwinner D1 RISC-V SoC will probably take a while -longer than porting U-Boot proper, as none of the relevant drivers are -set up for DM in SPL. In the meantime, we are using[1][2] a fork[3] of -Allwinner's boot0 loader, which they also call "spl" in their BSP. boot0 -uses this TOC1 image format. - -The vendor tools for generating TOC1 images require a binary config file -generated by their FEX compiler. Instead of trying to support that, I -made up a simple human-readable config file format. I didn't see any -existing platform-agnostic parser for multi-image containers in mkimage. - -I am sending this as RFC because it is only of temporary/limited use. -It only works with one specific fork of boot0 which was modified to -"behave" (the the original vendor version monkey-patches a custom header -inside the U-Boot image during boot). So it will be obsolete once U-Boot -SPL is ported. And it is Yet Another Image Format. On the other hand, it -does work, and it is currently being used. - -[1]: https://linux-sunxi.org/Allwinner_Nezha#U-Boot -[2]: https://fedoraproject.org/wiki/Architectures/RISC-V/Allwinner -[3]: https://github.com/smaeul/sun20i_d1_spl -END -Series-prefix: RFC -Series-to: sunxi -Signed-off-by: Samuel Holland ---- - boot/image.c | 1 + - include/image.h | 1 + - include/sunxi_image.h | 26 ++++ - tools/Makefile | 1 + - tools/sunxi_toc1.c | 318 ++++++++++++++++++++++++++++++++++++++++++ - 5 files changed, 347 insertions(+) - create mode 100644 tools/sunxi_toc1.c - ---- a/boot/image.c -+++ b/boot/image.c -@@ -180,6 +180,7 @@ static const table_entry_t uimage_type[] - { IH_TYPE_COPRO, "copro", "Coprocessor Image"}, - { IH_TYPE_SUNXI_EGON, "sunxi_egon", "Allwinner eGON Boot Image" }, - { IH_TYPE_SUNXI_TOC0, "sunxi_toc0", "Allwinner TOC0 Boot Image" }, -+ { IH_TYPE_SUNXI_TOC1, "sunxi_toc1", "Allwinner TOC1 Boot Image" }, - { -1, "", "", }, - }; - ---- a/include/image.h -+++ b/include/image.h -@@ -229,6 +229,7 @@ enum image_type_t { - IH_TYPE_COPRO, /* Coprocessor Image for remoteproc*/ - IH_TYPE_SUNXI_EGON, /* Allwinner eGON Boot Image */ - IH_TYPE_SUNXI_TOC0, /* Allwinner TOC0 Boot Image */ -+ IH_TYPE_SUNXI_TOC1, /* Allwinner TOC1 Boot Image */ - - IH_TYPE_COUNT, /* Number of image types */ - }; ---- a/include/sunxi_image.h -+++ b/include/sunxi_image.h -@@ -116,4 +116,30 @@ struct __packed toc0_item_info { - #define TOC0_ITEM_INFO_NAME_KEY 0x00010303 - #define TOC0_ITEM_INFO_END "IIE;" - -+struct __packed toc1_main_info { -+ uint8_t name[16]; -+ __le32 magic; -+ __le32 checksum; -+ __le32 serial; -+ __le32 status; -+ __le32 num_items; -+ __le32 length; -+ __le32 major_version; -+ __le32 minor_version; -+ __le32 reserved[3]; -+ uint8_t end[4]; -+}; -+ -+struct __packed toc1_item_info { -+ uint8_t name[64]; -+ __le32 offset; -+ __le32 length; -+ __le32 encryption; -+ __le32 type; -+ __le32 load_addr; -+ __le32 index; -+ __le32 reserved[69]; -+ uint8_t end[4]; -+}; -+ - #endif ---- a/tools/Makefile -+++ b/tools/Makefile -@@ -132,6 +132,7 @@ dumpimage-mkimage-objs := aisimage.o \ - $(ROCKCHIP_OBS) \ - socfpgaimage.o \ - sunxi_egon.o \ -+ sunxi_toc1.o \ - lib/crc16-ccitt.o \ - lib/hash-checksum.o \ - lib/sha1.o \ ---- /dev/null -+++ b/tools/sunxi_toc1.c -@@ -0,0 +1,318 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2018 Arm Ltd. -+ * (C) Copyright 2020-2021 Samuel Holland -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "imagetool.h" -+#include "mkimage.h" -+ -+#define SECTOR_SIZE 512 -+ -+struct item_desc { -+ const char *name; -+ const char *file; -+ unsigned long addr; -+ long length; -+}; -+ -+static uint32_t toc1_header_length(uint32_t num_items) -+{ -+ return ALIGN(sizeof(struct toc1_main_info) + -+ sizeof(struct toc1_item_info) * num_items, SECTOR_SIZE); -+} -+ -+static int toc1_parse_cfg(const char *file, struct item_desc **desc, -+ uint32_t *main_length, uint32_t *num_items) -+{ -+ struct item_desc *descs = NULL; -+ int ret = EXIT_FAILURE; -+ FILE *cfg, *fp = NULL; -+ uint32_t ndescs = 0; -+ char *line = NULL; -+ size_t len = 0; -+ -+ *desc = NULL; -+ *main_length = 0; -+ *num_items = 0; -+ -+ cfg = fopen(file, "r"); -+ if (!cfg) -+ return ret; -+ -+ while (getline(&line, &len, cfg) > 0) { -+ char *end, *s; -+ -+ if (line[0] == '[') { -+ s = line + 1; -+ end = strchr(s, ']'); -+ if (!end || end[1] != '\n') -+ goto err; -+ end[0] = '\0'; -+ -+ ndescs++; -+ descs = reallocarray(descs, ndescs, sizeof(*descs)); -+ if (!descs) -+ goto err; -+ -+ descs[ndescs - 1].name = strdup(s); -+ } else if (line[0] != '#' && line[0] != '\n') { -+ s = strchr(line, '='); -+ if (!s) -+ goto err; -+ while ((++s)[0] == ' ') -+ ; -+ end = strchr(s, '\n'); -+ if (!end) -+ goto err; -+ end[0] = '\0'; -+ -+ if (!strncmp(line, "file", strlen("file"))) { -+ fp = fopen(s, "rb"); -+ if (!fp) -+ goto err; -+ if (fseek(fp, 0, SEEK_END) < 0) -+ goto err; -+ descs[ndescs - 1].file = strdup(s); -+ descs[ndescs - 1].length = ftell(fp); -+ *main_length += ALIGN(descs[ndescs - 1].length, -+ SECTOR_SIZE); -+ fclose(fp); -+ fp = NULL; -+ } else if (!strncmp(line, "addr", strlen("addr"))) { -+ descs[ndescs - 1].addr = strtoul(s, NULL, 0); -+ } else { -+ goto err; -+ } -+ } -+ } -+ -+ *desc = descs; -+ *main_length += toc1_header_length(ndescs); -+ *num_items = ndescs; -+ -+ ret = EXIT_SUCCESS; -+ -+err: -+ if (fp) -+ fclose(fp); -+ if (ret) -+ free(descs); -+ free(line); -+ fclose(cfg); -+ -+ return ret; -+} -+ -+static int toc1_create(uint8_t *buf, uint32_t len, -+ const struct item_desc *desc, uint32_t num_items) -+{ -+ struct toc1_main_info *main = (void *)buf; -+ struct toc1_item_info *item = (void *)(main + 1); -+ uint32_t item_offset, item_length; -+ uint32_t *buf32 = (void *)buf; -+ int ret = EXIT_FAILURE; -+ uint32_t checksum = 0; -+ FILE *fp = NULL; -+ int i; -+ -+ /* Create the main TOC1 header. */ -+ main->magic = cpu_to_le32(TOC0_MAIN_INFO_MAGIC); -+ main->checksum = cpu_to_le32(BROM_STAMP_VALUE); -+ main->num_items = cpu_to_le32(num_items); -+ memcpy(main->end, TOC0_MAIN_INFO_END, sizeof(main->end)); -+ -+ item_offset = 0; -+ item_length = toc1_header_length(num_items); -+ -+ for (i = 0; i < num_items; ++i, ++item, ++desc) { -+ item_offset = item_offset + item_length; -+ item_length = desc->length; -+ -+ /* Create the item header. */ -+ memcpy(item->name, desc->name, -+ strnlen(desc->name, sizeof(item->name))); -+ item->offset = cpu_to_le32(item_offset); -+ item->length = cpu_to_le32(item_length); -+ item->load_addr = cpu_to_le32(desc->addr); -+ memcpy(item->end, TOC0_ITEM_INFO_END, sizeof(item->end)); -+ -+ /* Read in the data. */ -+ fp = fopen(desc->file, "rb"); -+ if (!fp) -+ goto err; -+ if (!fread(buf + item_offset, item_length, 1, fp)) -+ goto err; -+ fclose(fp); -+ fp = NULL; -+ -+ /* Pad the sectors with 0xff to be flash-friendly. */ -+ item_offset = item_offset + item_length; -+ item_length = ALIGN(item_offset, SECTOR_SIZE) - item_offset; -+ memset(buf + item_offset, 0xff, item_length); -+ } -+ -+ /* Fill in the total padded file length. */ -+ item_offset = item_offset + item_length; -+ main->length = cpu_to_le32(item_offset); -+ -+ /* Verify enough space was provided when creating the image. */ -+ assert(len >= item_offset); -+ -+ /* Calculate the checksum. Yes, it's that simple. */ -+ for (i = 0; i < item_offset / 4; ++i) -+ checksum += le32_to_cpu(buf32[i]); -+ main->checksum = cpu_to_le32(checksum); -+ -+ ret = EXIT_SUCCESS; -+ -+err: -+ if (fp) -+ fclose(fp); -+ -+ return ret; -+} -+ -+static int toc1_verify(const uint8_t *buf, uint32_t len) -+{ -+ const struct toc1_main_info *main = (void *)buf; -+ const struct toc1_item_info *item = (void *)(main + 1); -+ uint32_t checksum = BROM_STAMP_VALUE; -+ uint32_t main_length, num_items; -+ uint32_t *buf32 = (void *)buf; -+ int ret = EXIT_FAILURE; -+ int i; -+ -+ num_items = le32_to_cpu(main->num_items); -+ main_length = le32_to_cpu(main->length); -+ -+ if (len < main_length || main_length < toc1_header_length(num_items)) -+ goto err; -+ -+ /* Verify the main header. */ -+ if (le32_to_cpu(main->magic) != TOC0_MAIN_INFO_MAGIC) -+ goto err; -+ /* Verify the checksum without modifying the buffer. */ -+ for (i = 0; i < main_length / 4; ++i) -+ checksum += le32_to_cpu(buf32[i]); -+ if (checksum != 2 * le32_to_cpu(main->checksum)) -+ goto err; -+ /* The length must be at least 512 byte aligned. */ -+ if (main_length % SECTOR_SIZE) -+ goto err; -+ if (memcmp(main->end, TOC0_MAIN_INFO_END, sizeof(main->end))) -+ goto err; -+ -+ /* Verify each item header. */ -+ for (i = 0; i < num_items; ++i, ++item) -+ if (memcmp(item->end, TOC0_ITEM_INFO_END, sizeof(item->end))) -+ goto err; -+ -+ ret = EXIT_SUCCESS; -+ -+err: -+ return ret; -+} -+ -+static int toc1_check_params(struct image_tool_params *params) -+{ -+ if (!params->dflag) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static int toc1_verify_header(unsigned char *buf, int image_size, -+ struct image_tool_params *params) -+{ -+ return toc1_verify(buf, image_size); -+} -+ -+static void toc1_print_header(const void *buf) -+{ -+ const struct toc1_main_info *main = buf; -+ const struct toc1_item_info *item = (void *)(main + 1); -+ uint32_t head_length, main_length, num_items; -+ uint32_t item_offset, item_length, item_addr; -+ int i; -+ -+ num_items = le32_to_cpu(main->num_items); -+ head_length = sizeof(*main) + num_items * sizeof(*item); -+ main_length = le32_to_cpu(main->length); -+ -+ printf("Allwinner TOC1 Image\n" -+ "Size: %d bytes\n" -+ "Contents: %d items\n" -+ " 00000000:%08x Headers\n", -+ main_length, num_items, head_length); -+ -+ for (i = 0; i < num_items; ++i, ++item) { -+ item_offset = le32_to_cpu(item->offset); -+ item_length = le32_to_cpu(item->length); -+ item_addr = le32_to_cpu(item->load_addr); -+ -+ printf(" %08x:%08x => %08x %s\n", -+ item_offset, item_length, item_addr, item->name); -+ } -+} -+ -+static void toc1_set_header(void *buf, struct stat *sbuf, int ifd, -+ struct image_tool_params *params) -+{ -+ /* Image is already written below. */ -+} -+ -+static int toc1_check_image_type(uint8_t type) -+{ -+ return type == IH_TYPE_SUNXI_TOC1 ? 0 : 1; -+} -+ -+static int toc1_vrec_header(struct image_tool_params *params, -+ struct image_type_params *tparams) -+{ -+ uint32_t main_length, num_items; -+ struct item_desc *desc; -+ int ret; -+ -+ /* This "header" contains the entire image. */ -+ params->skipcpy = 1; -+ -+ ret = toc1_parse_cfg(params->datafile, &desc, &main_length, &num_items); -+ if (ret) -+ exit(ret); -+ -+ tparams->header_size = main_length; -+ tparams->hdr = calloc(tparams->header_size, 1); -+ if (!tparams->hdr) -+ exit(ret); -+ -+ ret = toc1_create(tparams->hdr, tparams->header_size, desc, num_items); -+ if (ret) -+ exit(ret); -+ -+ return 0; -+} -+ -+U_BOOT_IMAGE_TYPE( -+ sunxi_toc1, -+ "Allwinner TOC1 Boot Image support", -+ 0, -+ NULL, -+ toc1_check_params, -+ toc1_verify_header, -+ toc1_print_header, -+ toc1_set_header, -+ NULL, -+ toc1_check_image_type, -+ NULL, -+ toc1_vrec_header -+); diff --git a/lede/package/boot/uboot-d1/patches/0034-phy-sun4i-usb-Do-not-drive-VBUS-with-external-VBUS-p.patch b/lede/package/boot/uboot-d1/patches/0034-phy-sun4i-usb-Do-not-drive-VBUS-with-external-VBUS-p.patch deleted file mode 100644 index 5a2efb16dc..0000000000 --- a/lede/package/boot/uboot-d1/patches/0034-phy-sun4i-usb-Do-not-drive-VBUS-with-external-VBUS-p.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 79f7d883d980beea9989d06f9fba4fcc0430176a Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 14 Jul 2022 22:14:38 -0500 -Subject: [PATCH 34/90] phy: sun4i-usb: Do not drive VBUS with external VBUS - present - -It is possible to use host-side USB with externally-provided VBUS. For -example, some USB OTG cables have an extra power input which powers -both the board and the USB peripheral. - -To support this setup, skip enabling the VBUS switch/regulator if VBUS -voltage is already present. This behavior matches the Linux PHY driver. - -Signed-off-by: Samuel Holland ---- - drivers/phy/allwinner/phy-sun4i-usb.c | 6 ++++++ - 1 file changed, 6 insertions(+) - ---- a/drivers/phy/allwinner/phy-sun4i-usb.c -+++ b/drivers/phy/allwinner/phy-sun4i-usb.c -@@ -220,6 +220,12 @@ static int sun4i_usb_phy_power_on(struct - initial_usb_scan_delay = 0; - } - -+ /* For phy0 only turn on Vbus if we don't have an ext. Vbus */ -+ if (phy->id == 0 && sun4i_usb_phy_vbus_detect(phy)) { -+ dev_warn(phy->dev, "External vbus detected, not enabling our own vbus\n"); -+ return 0; -+ } -+ - if (usb_phy->vbus) { - ret = regulator_set_enable(usb_phy->vbus, true); - if (ret && ret != -ENOSYS) diff --git a/lede/package/boot/uboot-d1/patches/0035-mtd-nand-sunxi-Pass-the-device-to-the-init-function.patch b/lede/package/boot/uboot-d1/patches/0035-mtd-nand-sunxi-Pass-the-device-to-the-init-function.patch deleted file mode 100644 index 4963fbfd71..0000000000 --- a/lede/package/boot/uboot-d1/patches/0035-mtd-nand-sunxi-Pass-the-device-to-the-init-function.patch +++ /dev/null @@ -1,163 +0,0 @@ -From 4bc5cec5361dd6a2ae3bd044c79a4b5227bb9627 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Mon, 16 May 2022 00:47:32 -0500 -Subject: [PATCH 35/90] mtd: nand: sunxi: Pass the device to the init function - -This more closely matches the U-Boot driver to the Linux version. - -Series-to: sunxi - -Cover-letter: -mtd: nand: sunxi: Convert to devicetree and the driver model -This series converts the sunxi NAND driver to get its resources (clocks, -resets, pins) from the devicetree, and probe using the driver model. - -In addition to the immediate cleanup, this allows backporting more -patches (bugfixes, newer SoC support) from the Linux driver. -END - -Signed-off-by: Samuel Holland ---- - drivers/mtd/nand/raw/sunxi_nand.c | 39 ++++++++++++++++--------------- - 1 file changed, 20 insertions(+), 19 deletions(-) - ---- a/drivers/mtd/nand/raw/sunxi_nand.c -+++ b/drivers/mtd/nand/raw/sunxi_nand.c -@@ -1604,7 +1604,8 @@ static int sunxi_nand_ecc_init(struct mt - return 0; - } - --static int sunxi_nand_chip_init(ofnode np, struct sunxi_nfc *nfc, int devnum) -+static int sunxi_nand_chip_init(struct udevice *dev, struct sunxi_nfc *nfc, -+ ofnode np, int devnum) - { - const struct nand_sdr_timings *timings; - struct sunxi_nand_chip *chip; -@@ -1620,7 +1621,7 @@ static int sunxi_nand_chip_init(ofnode n - - nsels /= sizeof(u32); - if (!nsels || nsels > 8) { -- dev_err(nfc->dev, "invalid reg property size\n"); -+ dev_err(dev, "invalid reg property size\n"); - return -EINVAL; - } - -@@ -1628,7 +1629,7 @@ static int sunxi_nand_chip_init(ofnode n - (nsels * sizeof(struct sunxi_nand_chip_sel)), - GFP_KERNEL); - if (!chip) { -- dev_err(nfc->dev, "could not allocate chip\n"); -+ dev_err(dev, "could not allocate chip\n"); - return -ENOMEM; - } - -@@ -1638,19 +1639,19 @@ static int sunxi_nand_chip_init(ofnode n - for (i = 0; i < nsels; i++) { - ret = ofnode_read_u32_index(np, "reg", i, &tmp); - if (ret) { -- dev_err(nfc->dev, "could not retrieve reg property: %d\n", -+ dev_err(dev, "could not retrieve reg property: %d\n", - ret); - return ret; - } - - if (tmp > NFC_MAX_CS) { -- dev_err(nfc->dev, -+ dev_err(dev, - "invalid reg value: %u (max CS = 7)\n", tmp); - return -EINVAL; - } - - if (test_and_set_bit(tmp, &nfc->assigned_cs)) { -- dev_err(nfc->dev, "CS %d already assigned\n", tmp); -+ dev_err(dev, "CS %d already assigned\n", tmp); - return -EINVAL; - } - -@@ -1661,9 +1662,9 @@ static int sunxi_nand_chip_init(ofnode n - chip->sels[i].rb.type = RB_NATIVE; - chip->sels[i].rb.info.nativeid = tmp; - } else { -- ret = gpio_request_by_name_nodev(np, "rb-gpios", i, -- &chip->sels[i].rb.info.gpio, -- GPIOD_IS_IN); -+ ret = gpio_request_by_name(dev, "rb-gpios", i, -+ &chip->sels[i].rb.info.gpio, -+ GPIOD_IS_IN); - if (ret) - chip->sels[i].rb.type = RB_GPIO; - else -@@ -1674,7 +1675,7 @@ static int sunxi_nand_chip_init(ofnode n - timings = onfi_async_timing_mode_to_sdr_timings(0); - if (IS_ERR(timings)) { - ret = PTR_ERR(timings); -- dev_err(nfc->dev, -+ dev_err(dev, - "could not retrieve timings for ONFI mode 0: %d\n", - ret); - return ret; -@@ -1682,7 +1683,7 @@ static int sunxi_nand_chip_init(ofnode n - - ret = sunxi_nand_chip_set_timings(nfc, chip, timings); - if (ret) { -- dev_err(nfc->dev, "could not configure chip timings: %d\n", ret); -+ dev_err(dev, "could not configure chip timings: %d\n", ret); - return ret; - } - -@@ -1717,25 +1718,25 @@ static int sunxi_nand_chip_init(ofnode n - - ret = sunxi_nand_chip_init_timings(nfc, chip); - if (ret) { -- dev_err(nfc->dev, "could not configure chip timings: %d\n", ret); -+ dev_err(dev, "could not configure chip timings: %d\n", ret); - return ret; - } - - ret = sunxi_nand_ecc_init(mtd, &nand->ecc); - if (ret) { -- dev_err(nfc->dev, "ECC init failed: %d\n", ret); -+ dev_err(dev, "ECC init failed: %d\n", ret); - return ret; - } - - ret = nand_scan_tail(mtd); - if (ret) { -- dev_err(nfc->dev, "nand_scan_tail failed: %d\n", ret); -+ dev_err(dev, "nand_scan_tail failed: %d\n", ret); - return ret; - } - - ret = nand_register(devnum, mtd); - if (ret) { -- dev_err(nfc->dev, "failed to register mtd device: %d\n", ret); -+ dev_err(dev, "failed to register mtd device: %d\n", ret); - return ret; - } - -@@ -1744,13 +1745,13 @@ static int sunxi_nand_chip_init(ofnode n - return 0; - } - --static int sunxi_nand_chips_init(ofnode node, struct sunxi_nfc *nfc) -+static int sunxi_nand_chips_init(struct udevice *dev, struct sunxi_nfc *nfc) - { - ofnode nand_np; - int ret, i = 0; - -- ofnode_for_each_subnode(nand_np, node) { -- ret = sunxi_nand_chip_init(nand_np, nfc, i++); -+ dev_for_each_subnode(nand_np, dev) { -+ ret = sunxi_nand_chip_init(dev, nfc, nand_np, i++); - if (ret) - return ret; - } -@@ -1802,7 +1803,7 @@ static int sunxi_nand_probe(struct udevi - if (ret) - return ret; - -- ret = sunxi_nand_chips_init(dev_ofnode(dev), nfc); -+ ret = sunxi_nand_chips_init(dev, nfc); - if (ret) { - dev_err(dev, "failed to init nand chips\n"); - return ret; diff --git a/lede/package/boot/uboot-d1/patches/0036-sunxi-Enable-PHY_SUN4I_USB-by-default-for-new-SoCs.patch b/lede/package/boot/uboot-d1/patches/0036-sunxi-Enable-PHY_SUN4I_USB-by-default-for-new-SoCs.patch deleted file mode 100644 index 0d0bfc0fb4..0000000000 --- a/lede/package/boot/uboot-d1/patches/0036-sunxi-Enable-PHY_SUN4I_USB-by-default-for-new-SoCs.patch +++ /dev/null @@ -1,120 +0,0 @@ -From b13140a914199dcdd80331fef6f33d47f008f1b4 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Fri, 5 Aug 2022 23:40:22 -0500 -Subject: [PATCH 36/90] sunxi: Enable PHY_SUN4I_USB by default for new SoCs - -With one exception (sun9i), all sunxi SoCs released to date use variants -of the same USB PHY. Instead of requiring each new SoC to duplicate the -PHY driver selection, enable it by default. - -Series-to: Andre Przywara -Series-to: Jagan Teki - -Signed-off-by: Samuel Holland ---- - arch/arm/mach-sunxi/Kconfig | 11 ----------- - drivers/phy/allwinner/Kconfig | 3 ++- - 2 files changed, 2 insertions(+), 12 deletions(-) - ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -162,7 +162,6 @@ endif - - config MACH_SUNXI_H3_H5 - bool -- select PHY_SUN4I_USB - select SUNXI_DE2 - select SUNXI_DRAM_DW - select SUNXI_DRAM_DW_32BIT -@@ -191,7 +190,6 @@ config MACH_SUNIV - config MACH_SUN4I - bool "sun4i (Allwinner A10)" - select CPU_V7A -- select PHY_SUN4I_USB - select DRAM_SUN4I - select SUNXI_GEN_SUN4I - select SUPPORT_SPL -@@ -202,7 +200,6 @@ config MACH_SUN5I - bool "sun5i (Allwinner A13)" - select CPU_V7A - select DRAM_SUN4I -- select PHY_SUN4I_USB - select SUNXI_GEN_SUN4I - select SUPPORT_SPL - imply SPL_SYS_I2C_LEGACY -@@ -216,7 +213,6 @@ config MACH_SUN6I - select ARCH_SUPPORT_PSCI - select SPL_ARMV7_SET_CORTEX_SMPEN - select DRAM_SUN6I -- select PHY_SUN4I_USB - select SPL_I2C - select SUN6I_PRCM - select SUNXI_GEN_SUN6I -@@ -232,7 +228,6 @@ config MACH_SUN7I - select ARCH_SUPPORT_PSCI - select SPL_ARMV7_SET_CORTEX_SMPEN - select DRAM_SUN4I -- select PHY_SUN4I_USB - select SUNXI_GEN_SUN4I - select SUPPORT_SPL - select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT -@@ -246,7 +241,6 @@ config MACH_SUN8I_A23 - select CPU_V7_HAS_VIRT - select ARCH_SUPPORT_PSCI - select DRAM_SUN8I_A23 -- select PHY_SUN4I_USB - select SPL_I2C - select SUNXI_GEN_SUN6I - select SUPPORT_SPL -@@ -260,7 +254,6 @@ config MACH_SUN8I_A33 - select CPU_V7_HAS_VIRT - select ARCH_SUPPORT_PSCI - select DRAM_SUN8I_A33 -- select PHY_SUN4I_USB - select SPL_I2C - select SUNXI_GEN_SUN6I - select SUPPORT_SPL -@@ -271,7 +264,6 @@ config MACH_SUN8I_A83T - bool "sun8i (Allwinner A83T)" - select CPU_V7A - select DRAM_SUN8I_A83T -- select PHY_SUN4I_USB - select SPL_I2C - select SUNXI_GEN_SUN6I - select MMC_SUNXI_HAS_NEW_MODE -@@ -299,7 +291,6 @@ config MACH_SUN8I_R40 - select SUPPORT_SPL - select SUNXI_DRAM_DW - select SUNXI_DRAM_DW_32BIT -- select PHY_SUN4I_USB - imply SPL_SYS_I2C_LEGACY - - config MACH_SUN8I_V3S -@@ -327,7 +318,6 @@ config MACH_SUN9I - config MACH_SUN50I - bool "sun50i (Allwinner A64)" - select ARM64 -- select PHY_SUN4I_USB - select SUN6I_PRCM - select SUNXI_DE2 - select SUNXI_GEN_SUN6I -@@ -350,7 +340,6 @@ config MACH_SUN50I_H5 - config MACH_SUN50I_H6 - bool "sun50i (Allwinner H6)" - select ARM64 -- select PHY_SUN4I_USB - select DRAM_SUN50I_H6 - select SUN50I_GEN_H6 - ---- a/drivers/phy/allwinner/Kconfig -+++ b/drivers/phy/allwinner/Kconfig -@@ -3,7 +3,8 @@ - # - config PHY_SUN4I_USB - bool "Allwinner Sun4I USB PHY driver" -- depends on ARCH_SUNXI -+ depends on ARCH_SUNXI && !MACH_SUN9I -+ default y - select DM_REGULATOR - select PHY - help diff --git a/lede/package/boot/uboot-d1/patches/0037-sunxi-psci-Add-support-for-H3-CPU-0-hotplug.patch b/lede/package/boot/uboot-d1/patches/0037-sunxi-psci-Add-support-for-H3-CPU-0-hotplug.patch deleted file mode 100644 index 040bce409d..0000000000 --- a/lede/package/boot/uboot-d1/patches/0037-sunxi-psci-Add-support-for-H3-CPU-0-hotplug.patch +++ /dev/null @@ -1,183 +0,0 @@ -From d11c5971f60d482c05f807c24f3ccd37cf7d0f70 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 9 Oct 2021 17:12:57 -0500 -Subject: [PATCH 37/90] sunxi: psci: Add support for H3 CPU 0 hotplug - -Due to a bug in the H3 SoC, where the CPU 0 hotplug flag cannot be -written, resuming CPU 0 requires using the "Super Standby" code path in -the BROM instead of the hotplug path. This path requires jumping to an -eGON image in SRAM. - -Add support to the build system to generate this eGON image and include -it in the FIT, and add code to direct the BROM to its location in SRAM. - -Since the Super Standby code path in the BROM initializes the CPU and -AHB1 clocks to 24 MHz, those registers need to be restored after control -passes back to U-Boot. Furthermore, because the BROM lowers the AHB1 -clock divider to /1 before switching to the lower-frequency parent, -PLL_PERIPH0 must be bypassed to prevent AHB1 from temporarily running at -600 MHz. Otherwise, this locks up the SoC. - -Signed-off-by: Samuel Holland ---- - Makefile | 17 +++++++++++++++++ - arch/arm/cpu/armv7/sunxi/psci.c | 31 +++++++++++++++++++++++++++++++ - arch/arm/dts/sunxi-u-boot.dtsi | 23 ++++++++++++++++++++++- - include/configs/sun8i.h | 4 ++++ - 4 files changed, 74 insertions(+), 1 deletion(-) - ---- a/Makefile -+++ b/Makefile -@@ -1013,6 +1013,23 @@ INPUTS-y += u-boot.img - endif - endif - -+ifeq ($(CONFIG_MACH_SUN8I_H3)$(CONFIG_ARMV7_PSCI),yy) -+INPUTS-$(CONFIG_ARMV7_PSCI) += u-boot-resume.img -+ -+MKIMAGEFLAGS_u-boot-resume.img := -B 0x400 -T sunxi_egon -+ -+u-boot-resume.img: u-boot-resume.bin -+ $(call if_changed,mkimage) -+ -+OBJCOPYFLAGS_u-boot-resume.bin := -O binary -+ -+u-boot-resume.bin: u-boot-resume.o -+ $(call if_changed,objcopy) -+ -+u-boot-resume.S: u-boot -+ @sed -En 's/(0x[[:xdigit:]]+) +psci_cpu_entry/ldr pc, =\1/p' $<.map > $@ -+endif -+ - INPUTS-$(CONFIG_X86) += u-boot-x86-start16.bin u-boot-x86-reset16.bin \ - $(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \ - $(if $(CONFIG_TPL_X86_16BIT_INIT),tpl/u-boot-tpl.bin) ---- a/arch/arm/cpu/armv7/sunxi/psci.c -+++ b/arch/arm/cpu/armv7/sunxi/psci.c -@@ -10,6 +10,7 @@ - #include - #include - -+#include - #include - #include - #include -@@ -141,6 +142,13 @@ static void __secure sunxi_set_entry_add - (struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE; - - writel((u32)entry, &cpucfg->priv0); -+ -+#ifdef CONFIG_MACH_SUN8I_H3 -+ /* Redirect CPU 0 to the secure monitor via the resume shim. */ -+ writel(0x16aaefe8, &cpucfg->super_standy_flag); -+ writel(0xaa16efe8, &cpucfg->super_standy_flag); -+ writel(SUNXI_RESUME_BASE, &cpucfg->priv1); -+#endif - } - #endif - -@@ -255,9 +263,12 @@ out: - int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc, - u32 context_id) - { -+ struct sunxi_ccm_reg *ccu = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - struct sunxi_cpucfg_reg *cpucfg = - (struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE; - u32 cpu = (mpidr & 0x3); -+ u32 cpu_clk; -+ u32 bus_clk; - - /* store target PC and context id */ - psci_save(cpu, pc, context_id); -@@ -274,12 +285,32 @@ int __secure psci_cpu_on(u32 __always_un - /* Lock CPU (Disable external debug access) */ - clrbits_le32(&cpucfg->dbg_ctrl1, BIT(cpu)); - -+ if (IS_ENABLED(CONFIG_MACH_SUN8I_H3) && cpu == 0) { -+ /* Save registers that will be clobbered by the BROM. */ -+ cpu_clk = readl(&ccu->cpu_axi_cfg); -+ bus_clk = readl(&ccu->ahb1_apb1_div); -+ -+ /* Bypass PLL_PERIPH0 so AHB1 frequency does not spike. */ -+ setbits_le32(&ccu->pll6_cfg, BIT(25)); -+ } -+ - /* Power up target CPU */ - sunxi_cpu_set_power(cpu, true); - - /* De-assert reset on target CPU */ - writel(BIT(1) | BIT(0), &cpucfg->cpu[cpu].rst); - -+ if (IS_ENABLED(CONFIG_MACH_SUN8I_H3) && cpu == 0) { -+ /* Spin until the BROM has clobbered the clock registers. */ -+ while (readl(&ccu->ahb1_apb1_div) != 0x00001100); -+ -+ /* Restore the registers and turn off PLL_PERIPH0 bypass. */ -+ writel(cpu_clk, &ccu->cpu_axi_cfg); -+ writel(bus_clk, &ccu->ahb1_apb1_div); -+ -+ clrbits_le32(&ccu->pll6_cfg, BIT(25)); -+ } -+ - /* Unlock CPU (Disable external debug access) */ - setbits_le32(&cpucfg->dbg_ctrl1, BIT(cpu)); - ---- a/arch/arm/dts/sunxi-u-boot.dtsi -+++ b/arch/arm/dts/sunxi-u-boot.dtsi -@@ -6,7 +6,11 @@ - #define ARCH "arm" - #endif - --#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5) -+#if defined(CONFIG_MACH_SUN8I_H3) -+#ifdef CONFIG_ARMV7_PSCI -+#define RESUME_ADDR SUNXI_RESUME_BASE -+#endif -+#elif defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5) - #define BL31_ADDR 0x00044000 - #define SCP_ADDR 0x00050000 - #elif defined(CONFIG_MACH_SUN50I_H6) -@@ -78,6 +82,20 @@ - }; - #endif - -+#ifdef RESUME_ADDR -+ resume { -+ description = "Super Standby resume image"; -+ type = "standalone"; -+ arch = ARCH; -+ compression = "none"; -+ load = ; -+ -+ blob-ext { -+ filename = "u-boot-resume.img"; -+ }; -+ }; -+#endif -+ - #ifdef SCP_ADDR - scp { - description = "SCP firmware"; -@@ -111,6 +129,9 @@ - firmware = "uboot"; - #endif - loadables = -+#ifdef RESUME_ADDR -+ "resume", -+#endif - #ifdef SCP_ADDR - "scp", - #endif ---- a/include/configs/sun8i.h -+++ b/include/configs/sun8i.h -@@ -8,6 +8,10 @@ - #ifndef __CONFIG_H - #define __CONFIG_H - -+#define SUNXI_RESUME_BASE (CONFIG_ARMV7_SECURE_BASE + \ -+ CONFIG_ARMV7_SECURE_MAX_SIZE) -+#define SUNXI_RESUME_SIZE 1024 -+ - #include - - #endif /* __CONFIG_H */ diff --git a/lede/package/boot/uboot-d1/patches/0038-remoteproc-Add-a-driver-for-the-Allwinner-AR100.patch b/lede/package/boot/uboot-d1/patches/0038-remoteproc-Add-a-driver-for-the-Allwinner-AR100.patch deleted file mode 100644 index 1b0e002ee9..0000000000 --- a/lede/package/boot/uboot-d1/patches/0038-remoteproc-Add-a-driver-for-the-Allwinner-AR100.patch +++ /dev/null @@ -1,155 +0,0 @@ -From 7585a12ffec6e42c62222d8ee4085413b3a197f7 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 9 Oct 2021 14:58:27 -0500 -Subject: [PATCH 38/90] remoteproc: Add a driver for the Allwinner AR100 - -Signed-off-by: Samuel Holland ---- - drivers/remoteproc/Kconfig | 9 ++ - drivers/remoteproc/Makefile | 1 + - drivers/remoteproc/sun6i_ar100_rproc.c | 111 +++++++++++++++++++++++++ - 3 files changed, 121 insertions(+) - create mode 100644 drivers/remoteproc/sun6i_ar100_rproc.c - ---- a/drivers/remoteproc/Kconfig -+++ b/drivers/remoteproc/Kconfig -@@ -41,6 +41,15 @@ config REMOTEPROC_STM32_COPRO - Say 'y' here to add support for STM32 Cortex-M4 coprocessors via the - remoteproc framework. - -+config REMOTEPROC_SUN6I_AR100 -+ bool "Support for Allwinner AR100 SCP" -+ select REMOTEPROC -+ depends on ARCH_SUNXI -+ help -+ Say 'y' here to support Allwinner's AR100 System Control Processor -+ (SCP), found in various sun6i/sun8i/sun50i family SoCs, through the -+ remoteproc framework. -+ - config REMOTEPROC_TI_K3_ARM64 - bool "Support for TI's K3 based ARM64 remoteproc driver" - select REMOTEPROC ---- a/drivers/remoteproc/Makefile -+++ b/drivers/remoteproc/Makefile -@@ -10,6 +10,7 @@ obj-$(CONFIG_$(SPL_)REMOTEPROC) += rproc - obj-$(CONFIG_K3_SYSTEM_CONTROLLER) += k3_system_controller.o - obj-$(CONFIG_REMOTEPROC_SANDBOX) += sandbox_testproc.o - obj-$(CONFIG_REMOTEPROC_STM32_COPRO) += stm32_copro.o -+obj-$(CONFIG_REMOTEPROC_SUN6I_AR100) += sun6i_ar100_rproc.o - obj-$(CONFIG_REMOTEPROC_TI_K3_ARM64) += ti_k3_arm64_rproc.o - obj-$(CONFIG_REMOTEPROC_TI_K3_DSP) += ti_k3_dsp_rproc.o - obj-$(CONFIG_REMOTEPROC_TI_K3_R5F) += ti_k3_r5f_rproc.o ---- /dev/null -+++ b/drivers/remoteproc/sun6i_ar100_rproc.c -@@ -0,0 +1,111 @@ -+// SPDX-License-Identifier: GPL-2.0 -+ -+#include -+#include -+#include -+#include -+ -+#define SUNXI_SCP_MAGIC 0xb4400012 -+ -+#define OR1K_VEC_FIRST 0x01 -+#define OR1K_VEC_LAST 0x0e -+#define OR1K_VEC_ADDR(n) (0x100 * (n)) -+ -+struct sun6i_ar100_rproc_priv { -+ void *cfg_base; -+ ulong sram_base; -+}; -+ -+static int sun6i_ar100_rproc_load(struct udevice *dev, ulong addr, ulong size) -+{ -+ struct sun6i_ar100_rproc_priv *priv = dev_get_priv(dev); -+ -+ /* Check for a valid SCP firmware. */ -+ if (readl_relaxed(addr) != SUNXI_SCP_MAGIC) -+ return -ENOENT; -+ -+ /* Program exception vectors to the firmware entry point. */ -+ for (u32 i = OR1K_VEC_FIRST; i <= OR1K_VEC_LAST; ++i) { -+ ulong vector = priv->sram_base + OR1K_VEC_ADDR(i); -+ ulong offset = addr - vector; -+ -+ writel_relaxed(offset >> 2, vector); -+ } -+ -+ return 0; -+} -+ -+static int sun6i_ar100_rproc_start(struct udevice *dev) -+{ -+ struct sun6i_ar100_rproc_priv *priv = dev_get_priv(dev); -+ -+ setbits_le32(priv->cfg_base, BIT(0)); -+ -+ return 0; -+} -+ -+static int sun6i_ar100_rproc_stop(struct udevice *dev) -+{ -+ struct sun6i_ar100_rproc_priv *priv = dev_get_priv(dev); -+ -+ clrbits_le32(priv->cfg_base, BIT(0)); -+ -+ return 0; -+} -+ -+static int sun6i_ar100_rproc_reset(struct udevice *dev) -+{ -+ int ret; -+ -+ ret = sun6i_ar100_rproc_stop(dev); -+ if (ret) -+ return ret; -+ -+ return sun6i_ar100_rproc_start(dev); -+} -+ -+static int sun6i_ar100_rproc_is_running(struct udevice *dev) -+{ -+ struct sun6i_ar100_rproc_priv *priv = dev_get_priv(dev); -+ -+ return !(readl_relaxed(priv->cfg_base) & BIT(0)); -+} -+ -+static const struct dm_rproc_ops sun6i_ar100_rproc_ops = { -+ .load = sun6i_ar100_rproc_load, -+ .start = sun6i_ar100_rproc_start, -+ .stop = sun6i_ar100_rproc_stop, -+ .reset = sun6i_ar100_rproc_reset, -+ .is_running = sun6i_ar100_rproc_is_running, -+}; -+ -+static int sun6i_ar100_rproc_probe(struct udevice *dev) -+{ -+ struct sun6i_ar100_rproc_priv *priv = dev_get_priv(dev); -+ struct ofnode_phandle_args sram_handle; -+ int ret; -+ -+ priv->cfg_base = dev_read_addr_ptr(dev); -+ -+ ret = dev_read_phandle_with_args(dev, "sram", NULL, 0, 0, &sram_handle); -+ if (ret) -+ return ret; -+ -+ priv->sram_base = ofnode_get_addr(sram_handle.node); -+ -+ return 0; -+} -+ -+static const struct udevice_id sun6i_ar100_rproc_ids[] = { -+ { .compatible = "allwinner,sun6i-a31-ar100" }, -+ { } -+}; -+ -+U_BOOT_DRIVER(sun6i_ar100_rproc) = { -+ .name = "sun6i_ar100_rproc", -+ .id = UCLASS_REMOTEPROC, -+ .of_match = sun6i_ar100_rproc_ids, -+ .probe = sun6i_ar100_rproc_probe, -+ .priv_auto = sizeof(struct sun6i_ar100_rproc_priv), -+ .ops = &sun6i_ar100_rproc_ops, -+}; diff --git a/lede/package/boot/uboot-d1/patches/0039-arm-dts-sunxi-h3-Add-nodes-for-AR100-remoteproc.patch b/lede/package/boot/uboot-d1/patches/0039-arm-dts-sunxi-h3-Add-nodes-for-AR100-remoteproc.patch deleted file mode 100644 index 8efaee955c..0000000000 --- a/lede/package/boot/uboot-d1/patches/0039-arm-dts-sunxi-h3-Add-nodes-for-AR100-remoteproc.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 2fdd94449c2668b4ff69326ff8d5daabdf2c9f00 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 9 Oct 2021 15:04:16 -0500 -Subject: [PATCH 39/90] arm: dts: sunxi: h3: Add nodes for AR100 remoteproc - -Signed-off-by: Samuel Holland ---- - arch/arm/dts/sun8i-h3.dtsi | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - ---- a/arch/arm/dts/sun8i-h3.dtsi -+++ b/arch/arm/dts/sun8i-h3.dtsi -@@ -170,6 +170,14 @@ - #size-cells = <1>; - ranges; - -+ sram_a2: sram@40000 { -+ compatible = "mmio-sram"; -+ reg = <0x00040000 0xc000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x00040000 0xc000>; -+ }; -+ - sram_c: sram@1d00000 { - compatible = "mmio-sram"; - reg = <0x01d00000 0x80000>; -@@ -239,6 +247,12 @@ - nvmem-cell-names = "calibration"; - #thermal-sensor-cells = <0>; - }; -+ -+ remoteproc@1f01c00 { -+ compatible = "allwinner,sun6i-a31-ar100"; -+ reg = <0x01f01c00 0x400>; -+ sram = <&sram_a2>; -+ }; - }; - - thermal-zones { diff --git a/lede/package/boot/uboot-d1/patches/0040-sunxi-Enable-support-for-SCP-firmware-on-H3.patch b/lede/package/boot/uboot-d1/patches/0040-sunxi-Enable-support-for-SCP-firmware-on-H3.patch deleted file mode 100644 index 12773fc6a8..0000000000 --- a/lede/package/boot/uboot-d1/patches/0040-sunxi-Enable-support-for-SCP-firmware-on-H3.patch +++ /dev/null @@ -1,63 +0,0 @@ -From aefe751d6f23c9d526bca447c6c28da97e45e528 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 17 Apr 2021 13:33:54 -0500 -Subject: [PATCH 40/90] sunxi: Enable support for SCP firmware on H3 - -Now that issues with the BROM have been sorted out, we can implement -PSCI system suspend on H3 by delegating to SCP firmware. Let's start by -including the firmware in the FIT image and starting the coprocessor if -valid firmware is loaded. - -Signed-off-by: Samuel Holland ---- - arch/arm/dts/sunxi-u-boot.dtsi | 1 + - board/sunxi/board.c | 8 ++++++++ - include/configs/sun8i.h | 3 +++ - 3 files changed, 12 insertions(+) - ---- a/arch/arm/dts/sunxi-u-boot.dtsi -+++ b/arch/arm/dts/sunxi-u-boot.dtsi -@@ -9,6 +9,7 @@ - #if defined(CONFIG_MACH_SUN8I_H3) - #ifdef CONFIG_ARMV7_PSCI - #define RESUME_ADDR SUNXI_RESUME_BASE -+#define SCP_ADDR SUNXI_SCP_BASE - #endif - #elif defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5) - #define BL31_ADDR 0x00044000 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -867,6 +868,13 @@ int board_late_init(void) - usb_ether_init(); - #endif - -+#ifdef CONFIG_REMOTEPROC_SUN6I_AR100 -+ if (!rproc_load(0, SUNXI_SCP_BASE, SUNXI_SCP_MAX_SIZE)) { -+ puts("Starting SCP...\n"); -+ rproc_start(0); -+ } -+#endif -+ - return 0; - } - ---- a/include/configs/sun8i.h -+++ b/include/configs/sun8i.h -@@ -12,6 +12,9 @@ - CONFIG_ARMV7_SECURE_MAX_SIZE) - #define SUNXI_RESUME_SIZE 1024 - -+#define SUNXI_SCP_BASE (SUNXI_RESUME_BASE + SUNXI_RESUME_SIZE) -+#define SUNXI_SCP_MAX_SIZE (16 * 1024) -+ - #include - - #endif /* __CONFIG_H */ diff --git a/lede/package/boot/uboot-d1/patches/0041-arm-psci-Add-definitions-for-PSCI-v1.1.patch b/lede/package/boot/uboot-d1/patches/0041-arm-psci-Add-definitions-for-PSCI-v1.1.patch deleted file mode 100644 index 535c156199..0000000000 --- a/lede/package/boot/uboot-d1/patches/0041-arm-psci-Add-definitions-for-PSCI-v1.1.patch +++ /dev/null @@ -1,115 +0,0 @@ -From f73116f62647c74eb0f06f0d8c29e5993d961d82 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 9 Oct 2021 22:43:26 -0500 -Subject: [PATCH 41/90] arm: psci: Add definitions for PSCI v1.1 - -Add the new option, function IDs, and prototypes for PSCI v1.1 -implementations. In the process, fix some issues with the existing -definitions: - - Fix the incorrectly-named ARM_PSCI_0_2_FN64_SYSTEM_RESET2. - - Replace the deprecated "affinity_level" naming with "power_level". - -Signed-off-by: Samuel Holland ---- - arch/arm/cpu/armv7/Kconfig | 3 +++ - arch/arm/cpu/armv8/fwcall.c | 2 +- - arch/arm/include/asm/psci.h | 9 +++++++-- - arch/arm/include/asm/system.h | 14 +++++++++----- - arch/arm/lib/psci-dt.c | 2 ++ - 5 files changed, 22 insertions(+), 8 deletions(-) - ---- a/arch/arm/cpu/armv7/Kconfig -+++ b/arch/arm/cpu/armv7/Kconfig -@@ -80,6 +80,9 @@ choice - help - Select the supported PSCI version. - -+config ARMV7_PSCI_1_1 -+ bool "PSCI V1.1" -+ - config ARMV7_PSCI_1_0 - bool "PSCI V1.0" - ---- a/arch/arm/cpu/armv8/fwcall.c -+++ b/arch/arm/cpu/armv8/fwcall.c -@@ -103,7 +103,7 @@ void __noreturn psci_system_reset2(u32 r - { - struct pt_regs regs; - -- regs.regs[0] = ARM_PSCI_0_2_FN64_SYSTEM_RESET2; -+ regs.regs[0] = ARM_PSCI_1_1_FN64_SYSTEM_RESET2; - regs.regs[1] = PSCI_RESET2_TYPE_VENDOR | reset_level; - regs.regs[2] = cookie; - if (use_smc_for_psci) ---- a/arch/arm/include/asm/psci.h -+++ b/arch/arm/include/asm/psci.h -@@ -22,8 +22,9 @@ - #include - #endif - --#define ARM_PSCI_VER_1_0 (0x00010000) - #define ARM_PSCI_VER_0_2 (0x00000002) -+#define ARM_PSCI_VER_1_0 (0x00010000) -+#define ARM_PSCI_VER_1_1 (0x00010001) - - /* PSCI 0.1 interface */ - #define ARM_PSCI_FN_BASE 0x95c1ba5e -@@ -68,7 +69,6 @@ - #define ARM_PSCI_0_2_FN64_AFFINITY_INFO ARM_PSCI_0_2_FN64(4) - #define ARM_PSCI_0_2_FN64_MIGRATE ARM_PSCI_0_2_FN64(5) - #define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN64(7) --#define ARM_PSCI_0_2_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18) - - /* PSCI 1.0 interface */ - #define ARM_PSCI_1_0_FN_PSCI_FEATURES ARM_PSCI_0_2_FN(10) -@@ -86,6 +86,11 @@ - #define ARM_PSCI_1_0_FN64_STAT_RESIDENCY ARM_PSCI_0_2_FN64(16) - #define ARM_PSCI_1_0_FN64_STAT_COUNT ARM_PSCI_0_2_FN64(17) - -+/* PSCI 1.1 interface */ -+#define ARM_PSCI_1_1_FN_SYSTEM_RESET2 ARM_PSCI_0_2_FN(18) -+ -+#define ARM_PSCI_1_1_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18) -+ - /* 1KB stack per core */ - #define ARM_PSCI_STACK_SHIFT 10 - #define ARM_PSCI_STACK_SIZE (1 << ARM_PSCI_STACK_SHIFT) ---- a/arch/arm/include/asm/system.h -+++ b/arch/arm/include/asm/system.h -@@ -557,16 +557,20 @@ void mmu_page_table_flush(unsigned long - #ifdef CONFIG_ARMV7_PSCI - void psci_arch_cpu_entry(void); - void psci_arch_init(void); -+ - u32 psci_version(void); --s32 psci_features(u32 function_id, u32 psci_fid); -+s32 psci_cpu_suspend(u32 function_id, u32 power_state, u32 pc, u32 context_id); - s32 psci_cpu_off(void); --s32 psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc, -- u32 context_id); --s32 psci_affinity_info(u32 function_id, u32 target_affinity, -- u32 lowest_affinity_level); -+s32 psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc, u32 context_id); -+s32 psci_affinity_info(u32 function_id, u32 target_affinity, u32 power_level); - u32 psci_migrate_info_type(void); - void psci_system_off(void); - void psci_system_reset(void); -+s32 psci_features(u32 function_id, u32 psci_fid); -+s32 psci_cpu_default_suspend(u32 function_id, u32 pc, u32 context_id); -+s32 psci_node_hw_state(u32 function_id, u32 target_cpu, u32 power_level); -+s32 psci_system_suspend(u32 function_id, u32 pc, u32 context_id); -+s32 psci_system_reset2(u32 function_id, u32 reset_type, u32 cookie); - #endif - - #endif /* __ASSEMBLY__ */ ---- a/arch/arm/lib/psci-dt.c -+++ b/arch/arm/lib/psci-dt.c -@@ -66,6 +66,8 @@ int fdt_psci(void *fdt) - init_psci_node: - #if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT) - psci_ver = sec_firmware_support_psci_version(); -+#elif defined(CONFIG_ARMV7_PSCI_1_1) -+ psci_ver = ARM_PSCI_VER_1_1; - #elif defined(CONFIG_ARMV7_PSCI_1_0) || defined(CONFIG_ARMV8_PSCI) - psci_ver = ARM_PSCI_VER_1_0; - #elif defined(CONFIG_ARMV7_PSCI_0_2) diff --git a/lede/package/boot/uboot-d1/patches/0042-sunxi-Enable-remoteproc-on-some-H3-boards.patch b/lede/package/boot/uboot-d1/patches/0042-sunxi-Enable-remoteproc-on-some-H3-boards.patch deleted file mode 100644 index 9aaee317a2..0000000000 --- a/lede/package/boot/uboot-d1/patches/0042-sunxi-Enable-remoteproc-on-some-H3-boards.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 6dc0da83dba9570740365d0f1b32f91ae8ba0998 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Mon, 11 Oct 2021 03:20:28 -0500 -Subject: [PATCH 42/90] sunxi: Enable remoteproc on some H3 boards - -Signed-off-by: Samuel Holland ---- - configs/orangepi_one_defconfig | 1 + - configs/orangepi_plus2e_defconfig | 1 + - 2 files changed, 2 insertions(+) - ---- a/configs/orangepi_one_defconfig -+++ b/configs/orangepi_one_defconfig -@@ -6,5 +6,6 @@ CONFIG_MACH_SUN8I_H3=y - CONFIG_DRAM_CLK=672 - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set - CONFIG_SUN8I_EMAC=y -+CONFIG_REMOTEPROC_SUN6I_AR100=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_OHCI_HCD=y ---- a/configs/orangepi_plus2e_defconfig -+++ b/configs/orangepi_plus2e_defconfig -@@ -12,5 +12,6 @@ CONFIG_SPL_SYS_I2C_LEGACY=y - CONFIG_SYS_I2C_MVTWSI=y - CONFIG_SUN8I_EMAC=y - CONFIG_SY8106A_POWER=y -+CONFIG_REMOTEPROC_SUN6I_AR100=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_OHCI_HCD=y diff --git a/lede/package/boot/uboot-d1/patches/0043-sunxi-psci-Delegate-PSCI-to-SCPI.patch b/lede/package/boot/uboot-d1/patches/0043-sunxi-psci-Delegate-PSCI-to-SCPI.patch deleted file mode 100644 index 6d0c2b49d1..0000000000 --- a/lede/package/boot/uboot-d1/patches/0043-sunxi-psci-Delegate-PSCI-to-SCPI.patch +++ /dev/null @@ -1,497 +0,0 @@ -From 650fab5c589a883b139b4164527101f9c849f1a5 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 9 Oct 2021 23:01:05 -0500 -Subject: [PATCH 43/90] sunxi: psci: Delegate PSCI to SCPI - -This adds a new PSCI implementation which communicates with SCP firmware -running on the AR100 using the SCPI protocol. This allows it to support -the full set of PSCI v1.1 features, including CPU idle states, system -suspend, and multiple reset methods. - -Signed-off-by: Samuel Holland ---- - arch/arm/cpu/armv7/Kconfig | 1 + - arch/arm/cpu/armv7/sunxi/Makefile | 4 + - arch/arm/cpu/armv7/sunxi/psci-scpi.c | 451 +++++++++++++++++++++++++++ - 3 files changed, 456 insertions(+) - create mode 100644 arch/arm/cpu/armv7/sunxi/psci-scpi.c - ---- a/arch/arm/cpu/armv7/Kconfig -+++ b/arch/arm/cpu/armv7/Kconfig -@@ -75,6 +75,7 @@ config ARMV7_PSCI - choice - prompt "Supported PSCI version" - depends on ARMV7_PSCI -+ default ARMV7_PSCI_1_1 if MACH_SUN8I_H3 - default ARMV7_PSCI_0_1 if ARCH_SUNXI - default ARMV7_PSCI_1_0 - help ---- a/arch/arm/cpu/armv7/sunxi/Makefile -+++ b/arch/arm/cpu/armv7/sunxi/Makefile -@@ -13,8 +13,12 @@ obj-$(CONFIG_MACH_SUN6I) += sram.o - obj-$(CONFIG_MACH_SUN8I) += sram.o - - ifndef CONFIG_SPL_BUILD -+ifdef CONFIG_MACH_SUN8I_H3 -+obj-$(CONFIG_ARMV7_PSCI) += psci-scpi.o -+else - obj-$(CONFIG_ARMV7_PSCI) += psci.o - endif -+endif - - ifdef CONFIG_SPL_BUILD - obj-y += fel_utils.o ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/psci-scpi.c -@@ -0,0 +1,451 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2016 Chen-Yu Tsai -+ * Copyright (C) 2018-2021 Samuel Holland -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define GICD_BASE (SUNXI_GIC400_BASE + GIC_DIST_OFFSET) -+#define GICC_BASE (SUNXI_GIC400_BASE + GIC_CPU_OFFSET_A15) -+ -+#define HW_ON 0 -+#define HW_OFF 1 -+#define HW_STANDBY 2 -+ -+#define MPIDR_AFFLVL0(mpidr) (mpidr & 0xf) -+#define MPIDR_AFFLVL1(mpidr) (mpidr >> 8 & 0xf) -+ -+#define SCPI_SHMEM_BASE 0x0004be00 -+#define SCPI_SHMEM ((struct scpi_shmem *)SCPI_SHMEM_BASE) -+ -+#define SCPI_RX_CHANNEL 1 -+#define SCPI_TX_CHANNEL 0 -+#define SCPI_VIRTUAL_CHANNEL BIT(0) -+ -+#define SCPI_MESSAGE_SIZE 0x100 -+#define SCPI_PAYLOAD_SIZE (SCPI_MESSAGE_SIZE - sizeof(struct scpi_header)) -+ -+#define SUNXI_MSGBOX_BASE 0x01c17000 -+#define REMOTE_IRQ_STAT_REG (SUNXI_MSGBOX_BASE + 0x0050) -+#define LOCAL_IRQ_STAT_REG (SUNXI_MSGBOX_BASE + 0x0070) -+#define MSG_STAT_REG(n) (SUNXI_MSGBOX_BASE + 0x0140 + 0x4 * (n)) -+#define MSG_DATA_REG(n) (SUNXI_MSGBOX_BASE + 0x0180 + 0x4 * (n)) -+ -+#define RX_IRQ(n) BIT(0 + 2 * (n)) -+#define TX_IRQ(n) BIT(1 + 2 * (n)) -+ -+enum { -+ CORE_POWER_LEVEL = 0, -+ CLUSTER_POWER_LEVEL = 1, -+ CSS_POWER_LEVEL = 2, -+}; -+ -+enum { -+ SCPI_CMD_SCP_READY = 0x01, -+ SCPI_CMD_SET_CSS_POWER_STATE = 0x03, -+ SCPI_CMD_GET_CSS_POWER_STATE = 0x04, -+ SCPI_CMD_SET_SYS_POWER_STATE = 0x05, -+}; -+ -+enum { -+ SCPI_E_OK = 0, -+ SCPI_E_PARAM = 1, -+ SCPI_E_ALIGN = 2, -+ SCPI_E_SIZE = 3, -+ SCPI_E_HANDLER = 4, -+ SCPI_E_ACCESS = 5, -+ SCPI_E_RANGE = 6, -+ SCPI_E_TIMEOUT = 7, -+ SCPI_E_NOMEM = 8, -+ SCPI_E_PWRSTATE = 9, -+ SCPI_E_SUPPORT = 10, -+ SCPI_E_DEVICE = 11, -+ SCPI_E_BUSY = 12, -+ SCPI_E_OS = 13, -+ SCPI_E_DATA = 14, -+ SCPI_E_STATE = 15, -+}; -+ -+enum { -+ SCPI_POWER_ON = 0x00, -+ SCPI_POWER_RETENTION = 0x01, -+ SCPI_POWER_OFF = 0x03, -+}; -+ -+enum { -+ SCPI_SYSTEM_SHUTDOWN = 0x00, -+ SCPI_SYSTEM_REBOOT = 0x01, -+ SCPI_SYSTEM_RESET = 0x02, -+}; -+ -+struct scpi_header { -+ u8 command; -+ u8 sender; -+ u16 size; -+ u32 status; -+}; -+ -+struct scpi_message { -+ struct scpi_header header; -+ u8 payload[SCPI_PAYLOAD_SIZE]; -+}; -+ -+struct scpi_shmem { -+ struct scpi_message rx; -+ struct scpi_message tx; -+}; -+ -+static bool __secure_data gic_dist_init; -+ -+static u32 __secure_data lock; -+ -+static inline u32 __secure read_mpidr(void) -+{ -+ u32 val; -+ -+ asm volatile ("mrc p15, 0, %0, c0, c0, 5" : "=r" (val)); -+ -+ return val; -+} -+ -+static void __secure scpi_begin_command(void) -+{ -+ u32 mpidr = read_mpidr(); -+ -+ do { -+ while (readl(&lock)); -+ writel(mpidr, &lock); -+ dsb(); -+ } while (readl(&lock) != mpidr); -+ while (readl(REMOTE_IRQ_STAT_REG) & RX_IRQ(SCPI_TX_CHANNEL)); -+} -+ -+static void __secure scpi_send_command(void) -+{ -+ writel(SCPI_VIRTUAL_CHANNEL, MSG_DATA_REG(SCPI_TX_CHANNEL)); -+} -+ -+static void __secure scpi_wait_response(void) -+{ -+ while (!readl(MSG_STAT_REG(SCPI_RX_CHANNEL))); -+} -+ -+static void __secure scpi_end_command(void) -+{ -+ while (readl(MSG_STAT_REG(SCPI_RX_CHANNEL))) -+ readl(MSG_DATA_REG(SCPI_RX_CHANNEL)); -+ writel(RX_IRQ(SCPI_RX_CHANNEL), LOCAL_IRQ_STAT_REG); -+ writel(0, &lock); -+} -+ -+static void __secure scpi_set_css_power_state(u32 target_cpu, u32 core_state, -+ u32 cluster_state, u32 css_state) -+{ -+ struct scpi_shmem *shmem = SCPI_SHMEM; -+ -+ scpi_begin_command(); -+ -+ shmem->tx.header.command = SCPI_CMD_SET_CSS_POWER_STATE; -+ shmem->tx.header.size = 4; -+ -+ shmem->tx.payload[0] = target_cpu >> 4 | target_cpu; -+ shmem->tx.payload[1] = cluster_state << 4 | core_state; -+ shmem->tx.payload[2] = css_state; -+ shmem->tx.payload[3] = 0; -+ -+ scpi_send_command(); -+ scpi_end_command(); -+} -+ -+static s32 __secure scpi_get_css_power_state(u32 target_cpu, u8 *core_states, -+ u8 *cluster_state) -+{ -+ struct scpi_shmem *shmem = SCPI_SHMEM; -+ u32 cluster = MPIDR_AFFLVL1(target_cpu); -+ u32 offset; -+ s32 ret; -+ -+ scpi_begin_command(); -+ -+ shmem->tx.header.command = SCPI_CMD_GET_CSS_POWER_STATE; -+ shmem->tx.header.size = 0; -+ -+ scpi_send_command(); -+ scpi_wait_response(); -+ -+ for (offset = 0; offset < shmem->rx.header.size; offset += 2) { -+ if ((shmem->rx.payload[offset] & 0xf) == cluster) { -+ *cluster_state = shmem->rx.payload[offset+0] >> 4; -+ *core_states = shmem->rx.payload[offset+1]; -+ -+ break; -+ } -+ } -+ -+ ret = shmem->rx.header.status; -+ -+ scpi_end_command(); -+ -+ return ret; -+} -+ -+static s32 __secure scpi_set_sys_power_state(u32 sys_state) -+{ -+ struct scpi_shmem *shmem = SCPI_SHMEM; -+ s32 ret; -+ -+ scpi_begin_command(); -+ -+ shmem->tx.header.command = SCPI_CMD_SET_SYS_POWER_STATE; -+ shmem->tx.header.size = 1; -+ -+ shmem->tx.payload[0] = sys_state; -+ -+ scpi_send_command(); -+ scpi_wait_response(); -+ -+ ret = shmem->rx.header.status; -+ -+ scpi_end_command(); -+ -+ return ret; -+} -+ -+void psci_enable_smp(void); -+ -+static s32 __secure psci_suspend_common(u32 pc, u32 context_id, u32 core_state, -+ u32 cluster_state, u32 css_state) -+ -+{ -+ u32 target_cpu = read_mpidr(); -+ -+ if (core_state == SCPI_POWER_OFF) -+ psci_save(MPIDR_AFFLVL0(target_cpu), pc, context_id); -+ if (css_state == SCPI_POWER_OFF) -+ gic_dist_init = true; -+ -+ scpi_set_css_power_state(target_cpu, core_state, -+ cluster_state, css_state); -+ -+ psci_cpu_off_common(); -+ -+ wfi(); -+ -+ psci_enable_smp(); -+ -+ return ARM_PSCI_RET_SUCCESS; -+} -+ -+u32 __secure psci_version(void) -+{ -+ return ARM_PSCI_VER_1_1; -+} -+ -+s32 __secure psci_cpu_suspend(u32 __always_unused function_id, -+ u32 power_state, u32 pc, u32 context_id) -+{ -+ return psci_suspend_common(pc, context_id, -+ power_state >> 0 & 0xf, -+ power_state >> 4 & 0xf, -+ power_state >> 8 & 0xf); -+} -+ -+s32 __secure psci_cpu_off(void) -+{ -+ u32 pc = 0, context_id = 0; -+ -+ return psci_suspend_common(pc, context_id, SCPI_POWER_OFF, -+ SCPI_POWER_OFF, SCPI_POWER_ON); -+} -+ -+s32 __secure psci_cpu_on(u32 __always_unused function_id, -+ u32 target_cpu, u32 pc, u32 context_id) -+{ -+ psci_save(MPIDR_AFFLVL0(target_cpu), pc, context_id); -+ -+ scpi_set_css_power_state(target_cpu, SCPI_POWER_ON, -+ SCPI_POWER_ON, SCPI_POWER_ON); -+ -+ return ARM_PSCI_RET_SUCCESS; -+} -+ -+s32 __secure psci_affinity_info(u32 function_id, -+ u32 target_cpu, u32 power_level) -+{ -+ if (power_level != CORE_POWER_LEVEL) -+ return ARM_PSCI_RET_INVAL; -+ -+ /* This happens to have the same HW_ON/HW_OFF encoding. */ -+ return psci_node_hw_state(function_id, target_cpu, power_level); -+} -+ -+void __secure psci_system_off(void) -+{ -+ scpi_set_sys_power_state(SCPI_SYSTEM_SHUTDOWN); -+ -+ /* Wait to be turned off. */ -+ for (;;) wfi(); -+} -+ -+void __secure psci_system_reset(void) -+{ -+ scpi_set_sys_power_state(SCPI_SYSTEM_REBOOT); -+ -+ /* Wait to be turned off. */ -+ for (;;) wfi(); -+} -+ -+s32 __secure psci_features(u32 __always_unused function_id, -+ u32 psci_fid) -+{ -+ switch (psci_fid) { -+ case ARM_PSCI_0_2_FN_PSCI_VERSION: -+ case ARM_PSCI_0_2_FN_CPU_SUSPEND: -+ case ARM_PSCI_0_2_FN_CPU_OFF: -+ case ARM_PSCI_0_2_FN_CPU_ON: -+ case ARM_PSCI_0_2_FN_AFFINITY_INFO: -+ case ARM_PSCI_0_2_FN_SYSTEM_OFF: -+ case ARM_PSCI_0_2_FN_SYSTEM_RESET: -+ case ARM_PSCI_1_0_FN_PSCI_FEATURES: -+ case ARM_PSCI_1_0_FN_CPU_DEFAULT_SUSPEND: -+ case ARM_PSCI_1_0_FN_NODE_HW_STATE: -+ case ARM_PSCI_1_0_FN_SYSTEM_SUSPEND: -+ case ARM_PSCI_1_1_FN_SYSTEM_RESET2: -+ return ARM_PSCI_RET_SUCCESS; -+ default: -+ return ARM_PSCI_RET_NI; -+ } -+} -+ -+s32 __secure psci_cpu_default_suspend(u32 __always_unused function_id, -+ u32 pc, u32 context_id) -+{ -+ return psci_suspend_common(pc, context_id, SCPI_POWER_OFF, -+ SCPI_POWER_OFF, SCPI_POWER_RETENTION); -+} -+ -+s32 __secure psci_node_hw_state(u32 __always_unused function_id, -+ u32 target_cpu, u32 power_level) -+{ -+ u32 core = MPIDR_AFFLVL0(target_cpu); -+ u8 core_states, cluster_state; -+ -+ if (power_level >= CSS_POWER_LEVEL) -+ return HW_ON; -+ if (scpi_get_css_power_state(target_cpu, &core_states, &cluster_state)) -+ return ARM_PSCI_RET_NI; -+ if (power_level == CLUSTER_POWER_LEVEL) { -+ if (cluster_state == SCPI_POWER_ON) -+ return HW_ON; -+ if (cluster_state < SCPI_POWER_OFF) -+ return HW_STANDBY; -+ return HW_OFF; -+ } -+ -+ return (core_states & BIT(core)) ? HW_ON : HW_OFF; -+} -+ -+s32 __secure psci_system_suspend(u32 __always_unused function_id, -+ u32 pc, u32 context_id) -+{ -+ return psci_suspend_common(pc, context_id, SCPI_POWER_OFF, -+ SCPI_POWER_OFF, SCPI_POWER_OFF); -+} -+ -+s32 __secure psci_system_reset2(u32 __always_unused function_id, -+ u32 reset_type, u32 cookie) -+{ -+ s32 ret; -+ -+ if (reset_type) -+ return ARM_PSCI_RET_INVAL; -+ -+ ret = scpi_set_sys_power_state(SCPI_SYSTEM_RESET); -+ if (ret) -+ return ARM_PSCI_RET_INVAL; -+ -+ /* Wait to be turned off. */ -+ for (;;) wfi(); -+} -+ -+/* -+ * R40 is different from other single cluster SoCs. The secondary core -+ * entry address register is in the SRAM controller address range. -+ */ -+#define SUN8I_R40_SRAMC_SOFT_ENTRY_REG0 (0xbc) -+ -+#ifdef CONFIG_MACH_SUN8I_R40 -+/* secondary core entry address is programmed differently on R40 */ -+static void __secure sunxi_set_entry_address(void *entry) -+{ -+ writel((u32)entry, -+ SUNXI_SRAMC_BASE + SUN8I_R40_SRAMC_SOFT_ENTRY_REG0); -+} -+#else -+static void __secure sunxi_set_entry_address(void *entry) -+{ -+ struct sunxi_cpucfg_reg *cpucfg = -+ (struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE; -+ -+ writel((u32)entry, &cpucfg->priv0); -+ -+#ifdef CONFIG_MACH_SUN8I_H3 -+ /* Redirect CPU 0 to the secure monitor via the resume shim. */ -+ writel(0x16aaefe8, &cpucfg->super_standy_flag); -+ writel(0xaa16efe8, &cpucfg->super_standy_flag); -+ writel(SUNXI_RESUME_BASE, &cpucfg->priv1); -+#endif -+} -+#endif -+ -+void __secure psci_arch_init(void) -+{ -+ static bool __secure_data one_time_init = true; -+ -+ if (one_time_init) { -+ /* Set secondary core power-on PC. */ -+ sunxi_set_entry_address(psci_cpu_entry); -+ -+ /* Wait for the SCP firmware to boot. */ -+ scpi_begin_command(); -+ scpi_wait_response(); -+ scpi_end_command(); -+ -+ one_time_init = false; -+ } -+ -+ /* -+ * Copied from arch/arm/cpu/armv7/virt-v7.c -+ * See also gic_resume() in arch/arm/mach-imx/mx7/psci-mx7.c -+ */ -+ if (gic_dist_init) { -+ u32 i, itlinesnr; -+ -+ /* enable the GIC distributor */ -+ writel(readl(GICD_BASE + GICD_CTLR) | 0x03, GICD_BASE + GICD_CTLR); -+ -+ /* TYPER[4:0] contains an encoded number of available interrupts */ -+ itlinesnr = readl(GICD_BASE + GICD_TYPER) & 0x1f; -+ -+ /* set all bits in the GIC group registers to one to allow access -+ * from non-secure state. The first 32 interrupts are private per -+ * CPU and will be set later when enabling the GIC for each core -+ */ -+ for (i = 1; i <= itlinesnr; i++) -+ writel((unsigned)-1, GICD_BASE + GICD_IGROUPRn + 4 * i); -+ -+ gic_dist_init = false; -+ } -+ -+ /* Be cool with non-secure. */ -+ writel(0xff, GICC_BASE + GICC_PMR); -+} diff --git a/lede/package/boot/uboot-d1/patches/0044-sunxi-Enable-SCP-SCPI-on-A33-as-well.patch b/lede/package/boot/uboot-d1/patches/0044-sunxi-Enable-SCP-SCPI-on-A33-as-well.patch deleted file mode 100644 index 1c677a449f..0000000000 --- a/lede/package/boot/uboot-d1/patches/0044-sunxi-Enable-SCP-SCPI-on-A33-as-well.patch +++ /dev/null @@ -1,95 +0,0 @@ -From 5a7a91bf9a78a3a73e26d6de975261e62f9fb127 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Wed, 8 Jun 2022 07:55:54 -0500 -Subject: [PATCH 44/90] sunxi: Enable SCP/SCPI on A33 as well - -Signed-off-by: Samuel Holland ---- - arch/arm/cpu/armv7/Kconfig | 2 +- - arch/arm/cpu/armv7/sunxi/Makefile | 2 +- - arch/arm/cpu/armv7/sunxi/psci-scpi.c | 4 ++++ - arch/arm/dts/sun8i-a23-a33.dtsi | 14 ++++++++++++++ - arch/arm/dts/sunxi-u-boot.dtsi | 4 ++-- - 5 files changed, 22 insertions(+), 4 deletions(-) - ---- a/arch/arm/cpu/armv7/Kconfig -+++ b/arch/arm/cpu/armv7/Kconfig -@@ -75,7 +75,7 @@ config ARMV7_PSCI - choice - prompt "Supported PSCI version" - depends on ARMV7_PSCI -- default ARMV7_PSCI_1_1 if MACH_SUN8I_H3 -+ default ARMV7_PSCI_1_1 if MACH_SUN8I_A33 || MACH_SUN8I_H3 - default ARMV7_PSCI_0_1 if ARCH_SUNXI - default ARMV7_PSCI_1_0 - help ---- a/arch/arm/cpu/armv7/sunxi/Makefile -+++ b/arch/arm/cpu/armv7/sunxi/Makefile -@@ -13,7 +13,7 @@ obj-$(CONFIG_MACH_SUN6I) += sram.o - obj-$(CONFIG_MACH_SUN8I) += sram.o - - ifndef CONFIG_SPL_BUILD --ifdef CONFIG_MACH_SUN8I_H3 -+ifneq ($(CONFIG_MACH_SUN8I_A33)$(CONFIG_MACH_SUN8I_H3),) - obj-$(CONFIG_ARMV7_PSCI) += psci-scpi.o - else - obj-$(CONFIG_ARMV7_PSCI) += psci.o ---- a/arch/arm/cpu/armv7/sunxi/psci-scpi.c -+++ b/arch/arm/cpu/armv7/sunxi/psci-scpi.c -@@ -24,7 +24,11 @@ - #define MPIDR_AFFLVL0(mpidr) (mpidr & 0xf) - #define MPIDR_AFFLVL1(mpidr) (mpidr >> 8 & 0xf) - -+#if defined(CONFIG_MACH_SUN8I_H3) - #define SCPI_SHMEM_BASE 0x0004be00 -+#else -+#define SCPI_SHMEM_BASE 0x00053e00 -+#endif - #define SCPI_SHMEM ((struct scpi_shmem *)SCPI_SHMEM_BASE) - - #define SCPI_RX_CHANNEL 1 ---- a/arch/arm/dts/sun8i-a23-a33.dtsi -+++ b/arch/arm/dts/sun8i-a23-a33.dtsi -@@ -138,6 +138,14 @@ - #size-cells = <1>; - ranges; - -+ sram_a2: sram@40000 { -+ compatible = "mmio-sram"; -+ reg = <0x00040000 0x14000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x00040000 0x14000>; -+ }; -+ - sram_c: sram@1d00000 { - compatible = "mmio-sram"; - reg = <0x01d00000 0x80000>; -@@ -847,5 +855,11 @@ - #address-cells = <1>; - #size-cells = <0>; - }; -+ -+ remoteproc@1f01c00 { -+ compatible = "allwinner,sun6i-a31-ar100"; -+ reg = <0x01f01c00 0x400>; -+ sram = <&sram_a2>; -+ }; - }; - }; ---- a/arch/arm/dts/sunxi-u-boot.dtsi -+++ b/arch/arm/dts/sunxi-u-boot.dtsi -@@ -6,11 +6,11 @@ - #define ARCH "arm" - #endif - -+#if defined(CONFIG_ARMV7_PSCI) && (defined(CONFIG_MACH_SUN8I_A33) || defined(CONFIG_MACH_SUN8I_H3)) - #if defined(CONFIG_MACH_SUN8I_H3) --#ifdef CONFIG_ARMV7_PSCI - #define RESUME_ADDR SUNXI_RESUME_BASE --#define SCP_ADDR SUNXI_SCP_BASE - #endif -+#define SCP_ADDR SUNXI_SCP_BASE - #elif defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5) - #define BL31_ADDR 0x00044000 - #define SCP_ADDR 0x00050000 diff --git a/lede/package/boot/uboot-d1/patches/0045-phy-sun4i-usb-Use-DM_GPIO-for-id-vbus_det-GPIOs.patch b/lede/package/boot/uboot-d1/patches/0045-phy-sun4i-usb-Use-DM_GPIO-for-id-vbus_det-GPIOs.patch deleted file mode 100644 index 8da5fdb3e1..0000000000 --- a/lede/package/boot/uboot-d1/patches/0045-phy-sun4i-usb-Use-DM_GPIO-for-id-vbus_det-GPIOs.patch +++ /dev/null @@ -1,216 +0,0 @@ -From afa281decfbb174f57341897e0ad50ee9ad3564f Mon Sep 17 00:00:00 2001 -From: Zoltan HERPAI -Date: Tue, 6 Jun 2023 17:59:24 +0000 -Subject: [PATCH 45/90] phy: sun4i-usb: Use DM_GPIO for id/vbus_det GPIOs - -Now that the sunxi_gpio driver handles pull-up/down via the driver -model, we can switch to DM_GPIO for these pins with no loss in -functionality. Since the driver now gets its pin configuration from -the device tree, we can remove the Kconfig symbols. - -Signed-off-by: Samuel Holland - -Signed-off-by: Zoltan HERPAI ---- - arch/arm/dts/sun5i-a13-ampe-a76.dts | 6 ++ - .../sun6i-a31s-yones-toptech-bs1078-v2.dts | 1 + - arch/arm/dts/sun8i-a33-sinlinx-sina33.dts | 1 + - arch/arm/mach-sunxi/Kconfig | 14 ---- - drivers/phy/allwinner/phy-sun4i-usb.c | 71 ++++--------------- - 5 files changed, 22 insertions(+), 71 deletions(-) - ---- a/arch/arm/dts/sun5i-a13-ampe-a76.dts -+++ b/arch/arm/dts/sun5i-a13-ampe-a76.dts -@@ -8,6 +8,8 @@ - /dts-v1/; - #include "sun5i-a13.dtsi" - -+#include -+ - / { - model = "Ampe A76"; - compatible = "ampe,a76", "allwinner,sun5i-a13"; -@@ -26,3 +28,7 @@ - pinctrl-0 = <&uart1_pg_pins>; - status = "okay"; - }; -+ -+&usbphy { -+ usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ -+}; ---- a/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts -+++ b/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts -@@ -176,6 +176,7 @@ - }; - - &usbphy { -+ usb0_id_det-gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */ - usb1_vbus-supply = <®_dldo1>; - usb2_vbus-supply = <®_dc1sw>; - status = "okay"; ---- a/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts -+++ b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts -@@ -271,5 +271,6 @@ - - &usbphy { - status = "okay"; -+ usb0_id_det-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ - usb1_vbus-supply = <®_vcc5v0>; /* USB1 VBUS is always on */ - }; ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -655,20 +655,6 @@ config MMC_SUNXI_SLOT_EXTRA - slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable - support for this. - --config USB0_VBUS_DET -- string "Vbus detect pin for usb0 (otg)" -- default "" -- ---help--- -- Set the Vbus detect pin for usb0 (otg). This takes a string in the -- format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. -- --config USB0_ID_DET -- string "ID detect pin for usb0 (otg)" -- default "" -- ---help--- -- Set the ID detect pin for usb0 (otg). This takes a string in the -- format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. -- - config I2C0_ENABLE - bool "Enable I2C/TWI controller 0" - default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_R40 ---- a/drivers/phy/allwinner/phy-sun4i-usb.c -+++ b/drivers/phy/allwinner/phy-sun4i-usb.c -@@ -96,32 +96,8 @@ struct sun4i_usb_phy_cfg { - int missing_phys; - }; - --struct sun4i_usb_phy_info { -- const char *gpio_vbus_det; -- const char *gpio_id_det; --} phy_info[] = { -- { -- .gpio_vbus_det = CONFIG_USB0_VBUS_DET, -- .gpio_id_det = CONFIG_USB0_ID_DET, -- }, -- { -- .gpio_vbus_det = NULL, -- .gpio_id_det = NULL, -- }, -- { -- .gpio_vbus_det = NULL, -- .gpio_id_det = NULL, -- }, -- { -- .gpio_vbus_det = NULL, -- .gpio_id_det = NULL, -- }, --}; -- - struct sun4i_usb_phy_plat { - void __iomem *pmu; -- struct gpio_desc gpio_vbus_det; -- struct gpio_desc gpio_id_det; - struct clk clocks; - struct reset_ctl resets; - struct udevice *vbus; -@@ -132,6 +108,8 @@ struct sun4i_usb_phy_data { - void __iomem *base; - const struct sun4i_usb_phy_cfg *cfg; - struct sun4i_usb_phy_plat *usb_phy; -+ struct gpio_desc id_det_gpio; -+ struct gpio_desc vbus_det_gpio; - struct udevice *vbus_power_supply; - }; - -@@ -393,11 +371,10 @@ static int sun4i_usb_phy_xlate(struct ph - int sun4i_usb_phy_vbus_detect(struct phy *phy) - { - struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); -- struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; - int err = 1, retries = 3; - -- if (dm_gpio_is_valid(&usb_phy->gpio_vbus_det)) { -- err = dm_gpio_get_value(&usb_phy->gpio_vbus_det); -+ if (dm_gpio_is_valid(&data->vbus_det_gpio)) { -+ err = dm_gpio_get_value(&data->vbus_det_gpio); - /* - * Vbus may have been provided by the board and just turned off - * some milliseconds ago on reset. What we're measuring then is -@@ -405,7 +382,7 @@ int sun4i_usb_phy_vbus_detect(struct phy - */ - while (err > 0 && retries--) { - mdelay(100); -- err = dm_gpio_get_value(&usb_phy->gpio_vbus_det); -+ err = dm_gpio_get_value(&data->vbus_det_gpio); - } - } else if (data->vbus_power_supply) { - err = regulator_get_enable(data->vbus_power_supply); -@@ -417,12 +394,11 @@ int sun4i_usb_phy_vbus_detect(struct phy - int sun4i_usb_phy_id_detect(struct phy *phy) - { - struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); -- struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; - -- if (!dm_gpio_is_valid(&usb_phy->gpio_id_det)) -- return -1; -+ if (!dm_gpio_is_valid(&data->id_det_gpio)) -+ return -EOPNOTSUPP; - -- return dm_gpio_get_value(&usb_phy->gpio_id_det); -+ return dm_gpio_get_value(&data->id_det_gpio); - } - - void sun4i_usb_phy_set_squelch_detect(struct phy *phy, bool enabled) -@@ -452,13 +428,18 @@ static int sun4i_usb_phy_probe(struct ud - if (IS_ERR(data->base)) - return PTR_ERR(data->base); - -+ gpio_request_by_name(dev, "usb0_id_det-gpios", 0, &data->id_det_gpio, -+ GPIOD_IS_IN | GPIOD_PULL_UP); -+ -+ gpio_request_by_name(dev, "usb0_vbus_det-gpios", 0, &data->vbus_det_gpio, -+ GPIOD_IS_IN); -+ - device_get_supply_regulator(dev, "usb0_vbus_power-supply", - &data->vbus_power_supply); - - data->usb_phy = plat; - for (i = 0; i < data->cfg->num_phys; i++) { - struct sun4i_usb_phy_plat *phy = &plat[i]; -- struct sun4i_usb_phy_info *info = &phy_info[i]; - char name[20]; - - if (data->cfg->missing_phys & BIT(i)) -@@ -472,30 +453,6 @@ static int sun4i_usb_phy_probe(struct ud - return ret; - } - -- ret = dm_gpio_lookup_name(info->gpio_vbus_det, -- &phy->gpio_vbus_det); -- if (ret == 0) { -- ret = dm_gpio_request(&phy->gpio_vbus_det, -- "usb_vbus_det"); -- if (ret) -- return ret; -- ret = dm_gpio_set_dir_flags(&phy->gpio_vbus_det, -- GPIOD_IS_IN); -- if (ret) -- return ret; -- } -- -- ret = dm_gpio_lookup_name(info->gpio_id_det, &phy->gpio_id_det); -- if (ret == 0) { -- ret = dm_gpio_request(&phy->gpio_id_det, "usb_id_det"); -- if (ret) -- return ret; -- ret = dm_gpio_set_dir_flags(&phy->gpio_id_det, -- GPIOD_IS_IN | GPIOD_PULL_UP); -- if (ret) -- return ret; -- } -- - if (data->cfg->dedicated_clocks) - snprintf(name, sizeof(name), "usb%d_phy", i); - else diff --git a/lede/package/boot/uboot-d1/patches/0046-ARM-dts-sunxi-Add-AXP221-and-AXP809-GPIO-nodes.patch b/lede/package/boot/uboot-d1/patches/0046-ARM-dts-sunxi-Add-AXP221-and-AXP809-GPIO-nodes.patch deleted file mode 100644 index 97b421eb9d..0000000000 --- a/lede/package/boot/uboot-d1/patches/0046-ARM-dts-sunxi-Add-AXP221-and-AXP809-GPIO-nodes.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 9e34036e651528df9575c2ffb38d78ae1f613481 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 21 Aug 2021 17:11:54 -0500 -Subject: [PATCH 46/90] ARM: dts: sunxi: Add AXP221 and AXP809 GPIO nodes - -These PMICs each have two GPIO pins, and are supported by the axp_gpio -driver. In order to convert the axp_gpio driver to probe using the -device tree, the corresponding device tree nodes must be present. Add -them, following the same binding as the AXP209 and AXP813. - -Signed-off-by: Samuel Holland ---- - arch/arm/dts/axp22x.dtsi | 6 ++++++ - arch/arm/dts/axp809.dtsi | 7 +++++++ - 2 files changed, 13 insertions(+) - ---- a/arch/arm/dts/axp22x.dtsi -+++ b/arch/arm/dts/axp22x.dtsi -@@ -67,6 +67,12 @@ - status = "disabled"; - }; - -+ axp_gpio: gpio { -+ compatible = "x-powers,axp221-gpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ - regulators { - /* Default work frequency for buck regulators */ - x-powers,dcdc-freq = <3000>; ---- a/arch/arm/dts/axp809.dtsi -+++ b/arch/arm/dts/axp809.dtsi -@@ -50,4 +50,11 @@ - compatible = "x-powers,axp809"; - interrupt-controller; - #interrupt-cells = <1>; -+ -+ axp_gpio: gpio { -+ compatible = "x-powers,axp809-gpio", -+ "x-powers,axp221-gpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; - }; diff --git a/lede/package/boot/uboot-d1/patches/0047-gpio-axp-Consistently-use-the-axp_gpio-order.patch b/lede/package/boot/uboot-d1/patches/0047-gpio-axp-Consistently-use-the-axp_gpio-order.patch deleted file mode 100644 index 2deaadd584..0000000000 --- a/lede/package/boot/uboot-d1/patches/0047-gpio-axp-Consistently-use-the-axp_gpio-order.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 7e85c2d6516e47b537b27132d1946d1eab3b8923 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Fri, 27 Aug 2021 17:39:36 -0500 -Subject: [PATCH 47/90] gpio: axp: Consistently use the "axp_gpio" order - -This is less confusing than half of the driver using "axp_gpio" and the -other half using "gpio_axp". - -Signed-off-by: Samuel Holland ---- - drivers/gpio/axp_gpio.c | 16 ++++++++-------- - 1 file changed, 8 insertions(+), 8 deletions(-) - ---- a/drivers/gpio/axp_gpio.c -+++ b/drivers/gpio/axp_gpio.c -@@ -89,14 +89,14 @@ static int axp_gpio_set_value(struct ude - AXP_GPIO_CTRL_OUTPUT_LOW); - } - --static const struct dm_gpio_ops gpio_axp_ops = { -+static const struct dm_gpio_ops axp_gpio_ops = { - .direction_input = axp_gpio_direction_input, - .direction_output = axp_gpio_direction_output, - .get_value = axp_gpio_get_value, - .set_value = axp_gpio_set_value, - }; - --static int gpio_axp_probe(struct udevice *dev) -+static int axp_gpio_probe(struct udevice *dev) - { - struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); - -@@ -107,11 +107,11 @@ static int gpio_axp_probe(struct udevice - return 0; - } - --U_BOOT_DRIVER(gpio_axp) = { -- .name = "gpio_axp", -- .id = UCLASS_GPIO, -- .ops = &gpio_axp_ops, -- .probe = gpio_axp_probe, -+U_BOOT_DRIVER(axp_gpio) = { -+ .name = "axp_gpio", -+ .id = UCLASS_GPIO, -+ .probe = axp_gpio_probe, -+ .ops = &axp_gpio_ops, - }; - - int axp_gpio_init(void) -@@ -124,7 +124,7 @@ int axp_gpio_init(void) - return ret; - - /* There is no devicetree support for the axp yet, so bind directly */ -- ret = device_bind_driver(dm_root(), "gpio_axp", "AXP-gpio", &dev); -+ ret = device_bind_driver(dm_root(), "axp_gpio", "AXP-gpio", &dev); - if (ret) - return ret; - diff --git a/lede/package/boot/uboot-d1/patches/0048-gpio-axp-Bind-via-device-tree.patch b/lede/package/boot/uboot-d1/patches/0048-gpio-axp-Bind-via-device-tree.patch deleted file mode 100644 index dbc61875d2..0000000000 --- a/lede/package/boot/uboot-d1/patches/0048-gpio-axp-Bind-via-device-tree.patch +++ /dev/null @@ -1,139 +0,0 @@ -From a39b1bd1ad0babb355a5cb6f6a3bd8e378433b54 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Fri, 27 Aug 2021 21:43:19 -0500 -Subject: [PATCH 48/90] gpio: axp: Bind via device tree - -Now that the PMIC has a DM driver and binds device tree subnodes, the -GPIO device can be bound that way, instead of from inside board code. - -Since the driver still uses the single set of register definitions from -axpXXX.h (as selected by AXPxxx_POWER), it does not differentiate among -the supported compatibles. - -Signed-off-by: Samuel Holland ---- - arch/arm/include/asm/arch-sunxi/gpio.h | 6 ----- - arch/arm/mach-sunxi/Kconfig | 6 ----- - board/sunxi/board.c | 4 --- - drivers/gpio/Kconfig | 8 ++++++ - drivers/gpio/axp_gpio.c | 34 +++++++++++--------------- - 5 files changed, 22 insertions(+), 36 deletions(-) - ---- a/arch/arm/include/asm/arch-sunxi/gpio.h -+++ b/arch/arm/include/asm/arch-sunxi/gpio.h -@@ -219,10 +219,4 @@ void sunxi_gpio_set_pull(u32 pin, u32 va - void sunxi_gpio_set_pull_bank(struct sunxi_gpio *pio, int bank_offset, u32 val); - int sunxi_name_to_gpio(const char *name); - --#if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO --int axp_gpio_init(void); --#else --static inline int axp_gpio_init(void) { return 0; } --#endif -- - #endif /* _SUNXI_GPIO_H */ ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -682,12 +682,6 @@ config R_I2C_ENABLE - Set this to y to enable the I2C controller which is part of the PRCM. - endif - --config AXP_GPIO -- bool "Enable support for gpio-s on axp PMICs" -- depends on AXP_PMIC_BUS -- ---help--- -- Say Y here to enable support for the gpio pins of the axp PMIC ICs. -- - config AXP_DISABLE_BOOT_ON_POWERON - bool "Disable device boot on power plug-in" - depends on AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -221,10 +221,6 @@ int board_init(void) - } - #endif /* !CONFIG_ARM64 && !CONFIG_MACH_SUNIV */ - -- ret = axp_gpio_init(); -- if (ret) -- return ret; -- - /* strcmp() would look better, but doesn't get optimised away. */ - if (CONFIG_SATAPWR[0]) { - satapwr_pin = sunxi_name_to_gpio(CONFIG_SATAPWR); ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -104,6 +104,14 @@ config ALTERA_PIO - Select this to enable PIO for Altera devices. Please find - details on the "Embedded Peripherals IP User Guide" of Altera. - -+config AXP_GPIO -+ bool "X-Powers AXP PMICs GPIO driver" -+ depends on DM_GPIO && PMIC_AXP -+ depends on AXP_PMIC_BUS -+ help -+ This driver supports the GPIO pins on -+ X-Powers AXP152, AXP2xx, and AXP8xx PMICs. -+ - config BCM2835_GPIO - bool "BCM2835 GPIO driver" - depends on DM_GPIO ---- a/drivers/gpio/axp_gpio.c -+++ b/drivers/gpio/axp_gpio.c -@@ -10,9 +10,6 @@ - #include - #include - #include --#include --#include --#include - #include - - #define AXP_GPIO_PREFIX "AXP0-" -@@ -99,6 +96,11 @@ static const struct dm_gpio_ops axp_gpio - static int axp_gpio_probe(struct udevice *dev) - { - struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); -+ int ret; -+ -+ ret = pmic_bus_init(); -+ if (ret) -+ return ret; - - /* Tell the uclass how many GPIOs we have */ - uc_priv->bank_name = AXP_GPIO_PREFIX; -@@ -107,26 +109,18 @@ static int axp_gpio_probe(struct udevice - return 0; - } - -+static const struct udevice_id axp_gpio_ids[] = { -+ { .compatible = "x-powers,axp152-gpio" }, -+ { .compatible = "x-powers,axp209-gpio" }, -+ { .compatible = "x-powers,axp221-gpio" }, -+ { .compatible = "x-powers,axp813-gpio" }, -+ { } -+}; -+ - U_BOOT_DRIVER(axp_gpio) = { - .name = "axp_gpio", - .id = UCLASS_GPIO, -+ .of_match = axp_gpio_ids, - .probe = axp_gpio_probe, - .ops = &axp_gpio_ops, - }; -- --int axp_gpio_init(void) --{ -- struct udevice *dev; -- int ret; -- -- ret = pmic_bus_init(); -- if (ret) -- return ret; -- -- /* There is no devicetree support for the axp yet, so bind directly */ -- ret = device_bind_driver(dm_root(), "axp_gpio", "AXP-gpio", &dev); -- if (ret) -- return ret; -- -- return 0; --} diff --git a/lede/package/boot/uboot-d1/patches/0049-gpio-axp-Use-DM_PMIC-functions-for-register-access.patch b/lede/package/boot/uboot-d1/patches/0049-gpio-axp-Use-DM_PMIC-functions-for-register-access.patch deleted file mode 100644 index c95e81ac46..0000000000 --- a/lede/package/boot/uboot-d1/patches/0049-gpio-axp-Use-DM_PMIC-functions-for-register-access.patch +++ /dev/null @@ -1,99 +0,0 @@ -From 532b81ac600b6a70a1421f86503cb6d8543edf1b Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Tue, 17 Aug 2021 20:01:55 -0500 -Subject: [PATCH 49/90] gpio: axp: Use DM_PMIC functions for register access - -Now that the PMIC driver implements the DM_PMIC uclass, those functions -can be used instead of the platform-specific "pmic_bus" functions. - -Since the driver still uses the single set of register definitions from -axpXXX.h (as selected by AXPxxx_POWER), it still depends on one of those -choices, and therefore also AXP_PMIC_BUS. - -Signed-off-by: Samuel Holland ---- - drivers/gpio/axp_gpio.c | 27 ++++++++++++--------------- - 1 file changed, 12 insertions(+), 15 deletions(-) - ---- a/drivers/gpio/axp_gpio.c -+++ b/drivers/gpio/axp_gpio.c -@@ -6,11 +6,11 @@ - */ - - #include --#include - #include - #include - #include - #include -+#include - - #define AXP_GPIO_PREFIX "AXP0-" - #define AXP_GPIO_COUNT 4 -@@ -40,7 +40,7 @@ static int axp_gpio_direction_input(stru - if (reg == 0) - return -EINVAL; - -- return pmic_bus_write(reg, AXP_GPIO_CTRL_INPUT); -+ return pmic_reg_write(dev->parent, reg, AXP_GPIO_CTRL_INPUT); - } - - static int axp_gpio_direction_output(struct udevice *dev, unsigned pin, -@@ -52,26 +52,27 @@ static int axp_gpio_direction_output(str - if (reg == 0) - return -EINVAL; - -- return pmic_bus_write(reg, val ? AXP_GPIO_CTRL_OUTPUT_HIGH : -- AXP_GPIO_CTRL_OUTPUT_LOW); -+ return pmic_reg_write(dev->parent, reg, -+ val ? AXP_GPIO_CTRL_OUTPUT_HIGH : -+ AXP_GPIO_CTRL_OUTPUT_LOW); - } - - static int axp_gpio_get_value(struct udevice *dev, unsigned pin) - { -- u8 reg, val, mask; -+ u8 reg, mask; - int ret; - - reg = axp_get_gpio_ctrl_reg(pin); - if (reg == 0) - return -EINVAL; - -- ret = pmic_bus_read(AXP_GPIO_STATE, &val); -- if (ret) -+ ret = pmic_reg_read(dev->parent, AXP_GPIO_STATE); -+ if (ret < 0) - return ret; - - mask = 1 << (pin + AXP_GPIO_STATE_OFFSET); - -- return (val & mask) ? 1 : 0; -+ return (ret & mask) ? 1 : 0; - } - - static int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val) -@@ -82,8 +83,9 @@ static int axp_gpio_set_value(struct ude - if (reg == 0) - return -EINVAL; - -- return pmic_bus_write(reg, val ? AXP_GPIO_CTRL_OUTPUT_HIGH : -- AXP_GPIO_CTRL_OUTPUT_LOW); -+ return pmic_reg_write(dev->parent, reg, -+ val ? AXP_GPIO_CTRL_OUTPUT_HIGH : -+ AXP_GPIO_CTRL_OUTPUT_LOW); - } - - static const struct dm_gpio_ops axp_gpio_ops = { -@@ -96,11 +98,6 @@ static const struct dm_gpio_ops axp_gpio - static int axp_gpio_probe(struct udevice *dev) - { - struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); -- int ret; -- -- ret = pmic_bus_init(); -- if (ret) -- return ret; - - /* Tell the uclass how many GPIOs we have */ - uc_priv->bank_name = AXP_GPIO_PREFIX; diff --git a/lede/package/boot/uboot-d1/patches/0050-gpio-axp-Select-variant-from-compatible-at-runtime.patch b/lede/package/boot/uboot-d1/patches/0050-gpio-axp-Select-variant-from-compatible-at-runtime.patch deleted file mode 100644 index c4dfcc94a6..0000000000 --- a/lede/package/boot/uboot-d1/patches/0050-gpio-axp-Select-variant-from-compatible-at-runtime.patch +++ /dev/null @@ -1,375 +0,0 @@ -From 697eb56ed8c9b3814ddbd87ae0c6e749ccafc9e3 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 28 Aug 2021 00:27:19 -0500 -Subject: [PATCH 50/90] gpio: axp: Select variant from compatible at runtime - -There are three major variants of the AXP PMIC GPIO functionality (plus -PMICs with no GPIOs at all). Except for GPIO3 on the AXP209, which uses -a different register layout, it is straightforward to support all three -variants with a single driver. Do this, and in the process remove the -GPIO-related definitions from the PMIC-specific headers, and therefore -the dependency on AXP_PMIC_BUS. - -Signed-off-by: Samuel Holland ---- - drivers/gpio/Kconfig | 1 - - drivers/gpio/axp_gpio.c | 137 +++++++++++++++++++++------------------- - drivers/power/axp209.c | 6 +- - drivers/power/axp221.c | 4 +- - include/axp152.h | 10 --- - include/axp209.h | 16 ++--- - include/axp221.h | 13 ++-- - include/axp809.h | 8 --- - include/axp818.h | 8 --- - 9 files changed, 89 insertions(+), 114 deletions(-) - ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -107,7 +107,6 @@ config ALTERA_PIO - config AXP_GPIO - bool "X-Powers AXP PMICs GPIO driver" - depends on DM_GPIO && PMIC_AXP -- depends on AXP_PMIC_BUS - help - This driver supports the GPIO pins on - X-Powers AXP152, AXP2xx, and AXP8xx PMICs. ---- a/drivers/gpio/axp_gpio.c -+++ b/drivers/gpio/axp_gpio.c -@@ -7,110 +7,117 @@ - - #include - #include --#include - #include -+#include - #include - #include - - #define AXP_GPIO_PREFIX "AXP0-" - #define AXP_GPIO_COUNT 4 - --static int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val); -- --static u8 axp_get_gpio_ctrl_reg(unsigned pin) --{ -- switch (pin) { -- case 0: return AXP_GPIO0_CTRL; -- case 1: return AXP_GPIO1_CTRL; --#ifdef AXP_GPIO2_CTRL -- case 2: return AXP_GPIO2_CTRL; --#endif --#ifdef AXP_GPIO3_CTRL -- case 3: return AXP_GPIO3_CTRL; --#endif -- } -- return 0; --} -- --static int axp_gpio_direction_input(struct udevice *dev, unsigned pin) --{ -- u8 reg; -- -- reg = axp_get_gpio_ctrl_reg(pin); -- if (reg == 0) -- return -EINVAL; -- -- return pmic_reg_write(dev->parent, reg, AXP_GPIO_CTRL_INPUT); --} -- --static int axp_gpio_direction_output(struct udevice *dev, unsigned pin, -- int val) --{ -- u8 reg; -- -- reg = axp_get_gpio_ctrl_reg(pin); -- if (reg == 0) -- return -EINVAL; -- -- return pmic_reg_write(dev->parent, reg, -- val ? AXP_GPIO_CTRL_OUTPUT_HIGH : -- AXP_GPIO_CTRL_OUTPUT_LOW); --} -+#define AXP_GPIO_CTRL_MASK 0x7 -+#define AXP_GPIO_CTRL_OUTPUT_LOW 0 -+#define AXP_GPIO_CTRL_OUTPUT_HIGH 1 -+ -+struct axp_gpio_desc { -+ const u8 *pins; -+ u8 npins; -+ u8 status_reg; -+ u8 status_offset; -+ u8 input_mux; -+}; - - static int axp_gpio_get_value(struct udevice *dev, unsigned pin) - { -- u8 reg, mask; -+ const struct axp_gpio_desc *desc = dev_get_priv(dev); - int ret; - -- reg = axp_get_gpio_ctrl_reg(pin); -- if (reg == 0) -- return -EINVAL; -- -- ret = pmic_reg_read(dev->parent, AXP_GPIO_STATE); -+ ret = pmic_reg_read(dev->parent, desc->status_reg); - if (ret < 0) - return ret; - -- mask = 1 << (pin + AXP_GPIO_STATE_OFFSET); -- -- return (ret & mask) ? 1 : 0; -+ return !!(ret & BIT(desc->status_offset + pin)); - } - --static int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val) -+static int axp_gpio_set_flags(struct udevice *dev, unsigned pin, ulong flags) - { -- u8 reg; -+ const struct axp_gpio_desc *desc = dev_get_priv(dev); -+ u8 mux; - -- reg = axp_get_gpio_ctrl_reg(pin); -- if (reg == 0) -+ if (flags & (GPIOD_MASK_DSTYPE | GPIOD_MASK_PULL)) - return -EINVAL; - -- return pmic_reg_write(dev->parent, reg, -- val ? AXP_GPIO_CTRL_OUTPUT_HIGH : -- AXP_GPIO_CTRL_OUTPUT_LOW); -+ if (flags & GPIOD_IS_IN) -+ mux = desc->input_mux; -+ else if (flags & GPIOD_IS_OUT_ACTIVE) -+ mux = AXP_GPIO_CTRL_OUTPUT_HIGH; -+ else -+ mux = AXP_GPIO_CTRL_OUTPUT_LOW; -+ -+ return pmic_clrsetbits(dev->parent, desc->pins[pin], -+ AXP_GPIO_CTRL_MASK, mux); - } - - static const struct dm_gpio_ops axp_gpio_ops = { -- .direction_input = axp_gpio_direction_input, -- .direction_output = axp_gpio_direction_output, - .get_value = axp_gpio_get_value, -- .set_value = axp_gpio_set_value, -+ .xlate = gpio_xlate_offs_flags, -+ .set_flags = axp_gpio_set_flags, - }; - - static int axp_gpio_probe(struct udevice *dev) - { -+ struct axp_gpio_desc *desc = (void *)dev_get_driver_data(dev); - struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); - -+ dev_set_priv(dev, desc); -+ - /* Tell the uclass how many GPIOs we have */ - uc_priv->bank_name = AXP_GPIO_PREFIX; -- uc_priv->gpio_count = AXP_GPIO_COUNT; -+ uc_priv->gpio_count = desc->npins; - - return 0; - } - -+static const u8 axp152_gpio_pins[] = { -+ 0x90, 0x91, 0x92, 0x93, -+}; -+ -+static const struct axp_gpio_desc axp152_gpio_desc = { -+ .pins = axp152_gpio_pins, -+ .npins = ARRAY_SIZE(axp152_gpio_pins), -+ .status_reg = 0x97, -+ .status_offset = 4, -+ .input_mux = 3, -+}; -+ -+static const u8 axp209_gpio_pins[] = { -+ 0x90, 0x92, 0x93, -+}; -+ -+static const struct axp_gpio_desc axp209_gpio_desc = { -+ .pins = axp209_gpio_pins, -+ .npins = ARRAY_SIZE(axp209_gpio_pins), -+ .status_reg = 0x94, -+ .status_offset = 4, -+ .input_mux = 2, -+}; -+ -+static const u8 axp221_gpio_pins[] = { -+ 0x90, 0x92, -+}; -+ -+static const struct axp_gpio_desc axp221_gpio_desc = { -+ .pins = axp221_gpio_pins, -+ .npins = ARRAY_SIZE(axp221_gpio_pins), -+ .status_reg = 0x94, -+ .input_mux = 2, -+}; -+ - static const struct udevice_id axp_gpio_ids[] = { -- { .compatible = "x-powers,axp152-gpio" }, -- { .compatible = "x-powers,axp209-gpio" }, -- { .compatible = "x-powers,axp221-gpio" }, -- { .compatible = "x-powers,axp813-gpio" }, -+ { .compatible = "x-powers,axp152-gpio", .data = (ulong)&axp152_gpio_desc }, -+ { .compatible = "x-powers,axp209-gpio", .data = (ulong)&axp209_gpio_desc }, -+ { .compatible = "x-powers,axp221-gpio", .data = (ulong)&axp221_gpio_desc }, -+ { .compatible = "x-powers,axp813-gpio", .data = (ulong)&axp221_gpio_desc }, - { } - }; - ---- a/drivers/power/axp209.c -+++ b/drivers/power/axp209.c -@@ -215,15 +215,15 @@ int axp_init(void) - * Turn off LDOIO regulators / tri-state GPIO pins, when rebooting - * from android these are sometimes on. - */ -- rc = pmic_bus_write(AXP_GPIO0_CTRL, AXP_GPIO_CTRL_INPUT); -+ rc = pmic_bus_write(AXP209_GPIO0_CTRL, AXP209_GPIO_CTRL_INPUT); - if (rc) - return rc; - -- rc = pmic_bus_write(AXP_GPIO1_CTRL, AXP_GPIO_CTRL_INPUT); -+ rc = pmic_bus_write(AXP209_GPIO1_CTRL, AXP209_GPIO_CTRL_INPUT); - if (rc) - return rc; - -- rc = pmic_bus_write(AXP_GPIO2_CTRL, AXP_GPIO_CTRL_INPUT); -+ rc = pmic_bus_write(AXP209_GPIO2_CTRL, AXP209_GPIO_CTRL_INPUT); - if (rc) - return rc; - ---- a/drivers/power/axp221.c -+++ b/drivers/power/axp221.c -@@ -226,11 +226,11 @@ int axp_init(void) - * Turn off LDOIO regulators / tri-state GPIO pins, when rebooting - * from android these are sometimes on. - */ -- ret = pmic_bus_write(AXP_GPIO0_CTRL, AXP_GPIO_CTRL_INPUT); -+ ret = pmic_bus_write(AXP221_GPIO0_CTRL, AXP221_GPIO_CTRL_INPUT); - if (ret) - return ret; - -- ret = pmic_bus_write(AXP_GPIO1_CTRL, AXP_GPIO_CTRL_INPUT); -+ ret = pmic_bus_write(AXP221_GPIO1_CTRL, AXP221_GPIO_CTRL_INPUT); - if (ret) - return ret; - ---- a/include/axp152.h -+++ b/include/axp152.h -@@ -14,17 +14,7 @@ enum axp152_reg { - - #define AXP152_POWEROFF (1 << 7) - --/* For axp_gpio.c */ - #ifdef CONFIG_AXP152_POWER - #define AXP_POWER_STATUS 0x00 - #define AXP_POWER_STATUS_ALDO_IN BIT(0) --#define AXP_GPIO0_CTRL 0x90 --#define AXP_GPIO1_CTRL 0x91 --#define AXP_GPIO2_CTRL 0x92 --#define AXP_GPIO3_CTRL 0x93 --#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ --#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ --#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ --#define AXP_GPIO_STATE 0x97 --#define AXP_GPIO_STATE_OFFSET 0 - #endif ---- a/include/axp209.h -+++ b/include/axp209.h -@@ -21,6 +21,9 @@ enum axp209_reg { - AXP209_IRQ_ENABLE5 = 0x44, - AXP209_IRQ_STATUS5 = 0x4c, - AXP209_SHUTDOWN = 0x32, -+ AXP209_GPIO0_CTRL = 0x90, -+ AXP209_GPIO1_CTRL = 0x92, -+ AXP209_GPIO2_CTRL = 0x93, - }; - - #define AXP209_POWER_STATUS_ON_BY_DC BIT(0) -@@ -73,16 +76,11 @@ enum axp209_reg { - - #define AXP209_POWEROFF BIT(7) - --/* For axp_gpio.c */ -+#define AXP209_GPIO_CTRL_OUTPUT_LOW 0x00 -+#define AXP209_GPIO_CTRL_OUTPUT_HIGH 0x01 -+#define AXP209_GPIO_CTRL_INPUT 0x02 -+ - #ifdef CONFIG_AXP209_POWER - #define AXP_POWER_STATUS 0x00 - #define AXP_POWER_STATUS_ALDO_IN BIT(0) --#define AXP_GPIO0_CTRL 0x90 --#define AXP_GPIO1_CTRL 0x92 --#define AXP_GPIO2_CTRL 0x93 --#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ --#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ --#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ --#define AXP_GPIO_STATE 0x94 --#define AXP_GPIO_STATE_OFFSET 4 - #endif ---- a/include/axp221.h -+++ b/include/axp221.h -@@ -44,20 +44,17 @@ - #define AXP221_ALDO3_CTRL 0x2a - #define AXP221_SHUTDOWN 0x32 - #define AXP221_SHUTDOWN_POWEROFF (1 << 7) -+#define AXP221_GPIO0_CTRL 0x90 -+#define AXP221_GPIO1_CTRL 0x92 -+#define AXP221_GPIO_CTRL_OUTPUT_LOW 0x00 -+#define AXP221_GPIO_CTRL_OUTPUT_HIGH 0x01 -+#define AXP221_GPIO_CTRL_INPUT 0x02 - #define AXP221_PAGE 0xff - - /* Page 1 addresses */ - #define AXP221_SID 0x20 - --/* For axp_gpio.c */ - #ifdef CONFIG_AXP221_POWER - #define AXP_POWER_STATUS 0x00 - #define AXP_POWER_STATUS_ALDO_IN BIT(0) --#define AXP_GPIO0_CTRL 0x90 --#define AXP_GPIO1_CTRL 0x92 --#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ --#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ --#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ --#define AXP_GPIO_STATE 0x94 --#define AXP_GPIO_STATE_OFFSET 0 - #endif ---- a/include/axp809.h -+++ b/include/axp809.h -@@ -43,15 +43,7 @@ - #define AXP809_SHUTDOWN 0x32 - #define AXP809_SHUTDOWN_POWEROFF (1 << 7) - --/* For axp_gpio.c */ - #ifdef CONFIG_AXP809_POWER - #define AXP_POWER_STATUS 0x00 - #define AXP_POWER_STATUS_ALDO_IN BIT(0) --#define AXP_GPIO0_CTRL 0x90 --#define AXP_GPIO1_CTRL 0x92 --#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ --#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ --#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ --#define AXP_GPIO_STATE 0x94 --#define AXP_GPIO_STATE_OFFSET 0 - #endif ---- a/include/axp818.h -+++ b/include/axp818.h -@@ -57,15 +57,7 @@ - #define AXP818_SHUTDOWN 0x32 - #define AXP818_SHUTDOWN_POWEROFF (1 << 7) - --/* For axp_gpio.c */ - #ifdef CONFIG_AXP818_POWER - #define AXP_POWER_STATUS 0x00 - #define AXP_POWER_STATUS_ALDO_IN BIT(0) --#define AXP_GPIO0_CTRL 0x90 --#define AXP_GPIO1_CTRL 0x92 --#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ --#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ --#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ --#define AXP_GPIO_STATE 0x94 --#define AXP_GPIO_STATE_OFFSET 0 - #endif diff --git a/lede/package/boot/uboot-d1/patches/0051-gpio-axp-Add-support-for-getting-the-pin-function.patch b/lede/package/boot/uboot-d1/patches/0051-gpio-axp-Add-support-for-getting-the-pin-function.patch deleted file mode 100644 index b8ede75c2a..0000000000 --- a/lede/package/boot/uboot-d1/patches/0051-gpio-axp-Add-support-for-getting-the-pin-function.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 37e19d9b8a23c88413dd845dbb3dd58dd3636a6d Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 28 Aug 2021 00:36:33 -0500 -Subject: [PATCH 51/90] gpio: axp: Add support for getting the pin function - -Implement the .get_function operation, so the gpio command can report -the current function. Since the GPIOF_FUNC (versus GPIOF_UNUSED) mux -values vary among the PMICs, report all non-GPIO mux values as UNKNOWN. - -Signed-off-by: Samuel Holland ---- - drivers/gpio/axp_gpio.c | 19 +++++++++++++++++++ - 1 file changed, 19 insertions(+) - ---- a/drivers/gpio/axp_gpio.c -+++ b/drivers/gpio/axp_gpio.c -@@ -39,6 +39,24 @@ static int axp_gpio_get_value(struct ude - return !!(ret & BIT(desc->status_offset + pin)); - } - -+static int axp_gpio_get_function(struct udevice *dev, unsigned pin) -+{ -+ const struct axp_gpio_desc *desc = dev_get_priv(dev); -+ int ret; -+ -+ ret = pmic_reg_read(dev->parent, desc->pins[pin]); -+ if (ret < 0) -+ return ret; -+ -+ ret &= AXP_GPIO_CTRL_MASK; -+ if (ret == desc->input_mux) -+ return GPIOF_INPUT; -+ if (ret == AXP_GPIO_CTRL_OUTPUT_HIGH || ret == AXP_GPIO_CTRL_OUTPUT_LOW) -+ return GPIOF_OUTPUT; -+ -+ return GPIOF_UNKNOWN; -+} -+ - static int axp_gpio_set_flags(struct udevice *dev, unsigned pin, ulong flags) - { - const struct axp_gpio_desc *desc = dev_get_priv(dev); -@@ -60,6 +78,7 @@ static int axp_gpio_set_flags(struct ude - - static const struct dm_gpio_ops axp_gpio_ops = { - .get_value = axp_gpio_get_value, -+ .get_function = axp_gpio_get_function, - .xlate = gpio_xlate_offs_flags, - .set_flags = axp_gpio_set_flags, - }; diff --git a/lede/package/boot/uboot-d1/patches/0052-gpio-axp-Add-pull-down-support-for-AXP22x-AXP8xx-var.patch b/lede/package/boot/uboot-d1/patches/0052-gpio-axp-Add-pull-down-support-for-AXP22x-AXP8xx-var.patch deleted file mode 100644 index 771e5c3866..0000000000 --- a/lede/package/boot/uboot-d1/patches/0052-gpio-axp-Add-pull-down-support-for-AXP22x-AXP8xx-var.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 4be9f9082b0a2ac2626ae20b7e07006139827442 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 28 Aug 2021 00:34:54 -0500 -Subject: [PATCH 52/90] gpio: axp: Add pull-down support for AXP22x/AXP8xx - variant - -The AXP221 and newer PMICs support a pull-down function on their GPIOs. -Add support for it. - -Signed-off-by: Samuel Holland ---- - drivers/gpio/axp_gpio.c | 15 ++++++++++++++- - 1 file changed, 14 insertions(+), 1 deletion(-) - ---- a/drivers/gpio/axp_gpio.c -+++ b/drivers/gpio/axp_gpio.c -@@ -24,6 +24,7 @@ struct axp_gpio_desc { - u8 npins; - u8 status_reg; - u8 status_offset; -+ u8 pull_reg; - u8 input_mux; - }; - -@@ -60,11 +61,22 @@ static int axp_gpio_get_function(struct - static int axp_gpio_set_flags(struct udevice *dev, unsigned pin, ulong flags) - { - const struct axp_gpio_desc *desc = dev_get_priv(dev); -+ bool pull_down = flags & GPIOD_PULL_DOWN; -+ int ret; - u8 mux; - -- if (flags & (GPIOD_MASK_DSTYPE | GPIOD_MASK_PULL)) -+ if (flags & (GPIOD_MASK_DSTYPE | GPIOD_PULL_UP)) -+ return -EINVAL; -+ if (pull_down && !desc->pull_reg) - return -EINVAL; - -+ if (desc->pull_reg) { -+ ret = pmic_clrsetbits(dev->parent, desc->pull_reg, -+ BIT(pin), pull_down ? BIT(pin) : 0); -+ if (ret) -+ return ret; -+ } -+ - if (flags & GPIOD_IS_IN) - mux = desc->input_mux; - else if (flags & GPIOD_IS_OUT_ACTIVE) -@@ -129,6 +141,7 @@ static const struct axp_gpio_desc axp221 - .pins = axp221_gpio_pins, - .npins = ARRAY_SIZE(axp221_gpio_pins), - .status_reg = 0x94, -+ .pull_reg = 0x97, - .input_mux = 2, - }; - diff --git a/lede/package/boot/uboot-d1/patches/0053-gpio-axp-Report-the-correct-value-for-outputs.patch b/lede/package/boot/uboot-d1/patches/0053-gpio-axp-Report-the-correct-value-for-outputs.patch deleted file mode 100644 index a6d0eb4526..0000000000 --- a/lede/package/boot/uboot-d1/patches/0053-gpio-axp-Report-the-correct-value-for-outputs.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 52c172782d659750b447572281cd11835d1edf58 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sun, 31 Jul 2022 18:19:39 -0500 -Subject: [PATCH 53/90] gpio: axp: Report the correct value for outputs - -Signed-off-by: Samuel Holland ---- - drivers/gpio/axp_gpio.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/drivers/gpio/axp_gpio.c -+++ b/drivers/gpio/axp_gpio.c -@@ -33,6 +33,15 @@ static int axp_gpio_get_value(struct ude - const struct axp_gpio_desc *desc = dev_get_priv(dev); - int ret; - -+ ret = pmic_reg_read(dev->parent, desc->pins[pin]); -+ if (ret < 0) -+ return ret; -+ -+ if (ret == AXP_GPIO_CTRL_OUTPUT_LOW) -+ return 0; -+ if (ret == AXP_GPIO_CTRL_OUTPUT_HIGH) -+ return 1; -+ - ret = pmic_reg_read(dev->parent, desc->status_reg); - if (ret < 0) - return ret; diff --git a/lede/package/boot/uboot-d1/patches/0054-sunxi-Fix-default-enablement-of-USB-host-drivers.patch b/lede/package/boot/uboot-d1/patches/0054-sunxi-Fix-default-enablement-of-USB-host-drivers.patch deleted file mode 100644 index 52825dce21..0000000000 --- a/lede/package/boot/uboot-d1/patches/0054-sunxi-Fix-default-enablement-of-USB-host-drivers.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 64de4fd71d35c6154a0f7b4c7c02cb24e978a4ce Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Fri, 5 Aug 2022 23:45:19 -0500 -Subject: [PATCH 54/90] sunxi: Fix default-enablement of USB host drivers - -We tried to enable USB_EHCI_GENERIC and USB_OHCI_GENERIC by default. -This did not work because those symbols depend on USB_EHCI_HCD and -USB_OHCI_HCD, which were not enabled. Fix this by implying all four. - -Signed-off-by: Samuel Holland ---- - arch/arm/Kconfig | 4 ++++ - drivers/usb/host/Kconfig | 2 -- - 2 files changed, 4 insertions(+), 2 deletions(-) - ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1142,7 +1142,11 @@ config ARCH_SUNXI - imply SYSRESET - imply SYSRESET_WATCHDOG - imply SYSRESET_WATCHDOG_AUTO -+ imply USB_EHCI_GENERIC -+ imply USB_EHCI_HCD - imply USB_GADGET -+ imply USB_OHCI_GENERIC -+ imply USB_OHCI_HCD - imply WDT - - config ARCH_U8500 ---- a/drivers/usb/host/Kconfig -+++ b/drivers/usb/host/Kconfig -@@ -281,7 +281,6 @@ config USB_EHCI_ZYNQ - config USB_EHCI_GENERIC - bool "Support for generic EHCI USB controller" - depends on DM_USB -- default ARCH_SUNXI - ---help--- - Enables support for generic EHCI controller. - -@@ -343,7 +342,6 @@ config USB_OHCI_PCI - - config USB_OHCI_GENERIC - bool "Support for generic OHCI USB controller" -- default ARCH_SUNXI - ---help--- - Enables support for generic OHCI controller. - diff --git a/lede/package/boot/uboot-d1/patches/0055-sunxi-Remove-unnecessary-Kconfig-selections.patch b/lede/package/boot/uboot-d1/patches/0055-sunxi-Remove-unnecessary-Kconfig-selections.patch deleted file mode 100644 index 6fd4ffdae3..0000000000 --- a/lede/package/boot/uboot-d1/patches/0055-sunxi-Remove-unnecessary-Kconfig-selections.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 891fef47500dbf4aecb16e08c1d8ade3fbc8caec Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 4 Aug 2022 23:22:05 -0500 -Subject: [PATCH 55/90] sunxi: Remove unnecessary Kconfig selections - -Two of these selections are redundant and have no effect: - - DM_KEYBOARD is selected by USB_KEYBOARD - - DM_MMC is selected by MMC - -This selection has no effect by default and is unnecessarily strong: - - USB_STORAGE is implied by DISTRO_DEFAULTS - -Signed-off-by: Samuel Holland ---- - arch/arm/Kconfig | 3 --- - 1 file changed, 3 deletions(-) - ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1100,8 +1100,6 @@ config ARCH_SUNXI - select DM_I2C if I2C - select DM_SPI if SPI - select DM_SPI_FLASH if SPI -- select DM_KEYBOARD -- select DM_MMC if MMC - select DM_SCSI if SCSI - select DM_SERIAL - select GPIO_EXTRA_HEADER -@@ -1119,7 +1117,6 @@ config ARCH_SUNXI - select SYS_THUMB_BUILD if !ARM64 - select USB if DISTRO_DEFAULTS - select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST -- select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST - select SPL_USE_TINY_PRINTF - select USE_PREBOOT - select SYS_RELOC_GD_ENV_ADDR diff --git a/lede/package/boot/uboot-d1/patches/0056-sunxi-Add-missing-dependencies-to-Kconfig-selections.patch b/lede/package/boot/uboot-d1/patches/0056-sunxi-Add-missing-dependencies-to-Kconfig-selections.patch deleted file mode 100644 index 6adeeaef2b..0000000000 --- a/lede/package/boot/uboot-d1/patches/0056-sunxi-Add-missing-dependencies-to-Kconfig-selections.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 9e12a7fd80276092da3a43b7dbaf572bad294419 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 4 Aug 2022 23:29:13 -0500 -Subject: [PATCH 56/90] sunxi: Add missing dependencies to Kconfig selections - -Some of the selected symbols have a user-visible dependency. Make the -selections conditional on that dependency to avoid creating invalid -configurations. - -Signed-off-by: Samuel Holland ---- - arch/arm/Kconfig | 16 ++++++++-------- - 1 file changed, 8 insertions(+), 8 deletions(-) - ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1090,30 +1090,30 @@ config ARCH_SOCFPGA - config ARCH_SUNXI - bool "Support sunxi (Allwinner) SoCs" - select BINMAN -- select CMD_GPIO -+ select CMD_GPIO if GPIO - select CMD_MMC if MMC - select CMD_USB if DISTRO_DEFAULTS && USB_HOST - select CLK - select DM -- select DM_ETH -- select DM_GPIO -+ select DM_ETH if NET -+ select DM_GPIO if GPIO - select DM_I2C if I2C -+ select DM_SCSI if BLK && SCSI -+ select DM_SERIAL if SERIAL - select DM_SPI if SPI - select DM_SPI_FLASH if SPI -- select DM_SCSI if SCSI -- select DM_SERIAL - select GPIO_EXTRA_HEADER - select OF_BOARD_SETUP - select OF_CONTROL - select OF_SEPARATE - select PINCTRL -- select SPECIFY_CONSOLE_INDEX -+ select SPECIFY_CONSOLE_INDEX if SERIAL - select SPL_SEPARATE_BSS if SPL - select SPL_STACK_R if SPL - select SPL_SYS_MALLOC_SIMPLE if SPL - select SPL_SYS_THUMB_BUILD if !ARM64 -- select SUNXI_GPIO -- select SYS_NS16550 -+ select SUNXI_GPIO if GPIO -+ select SYS_NS16550 if SERIAL - select SYS_THUMB_BUILD if !ARM64 - select USB if DISTRO_DEFAULTS - select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST diff --git a/lede/package/boot/uboot-d1/patches/0057-sunxi-Hide-image-type-selection-if-SPL-is-disabled.patch b/lede/package/boot/uboot-d1/patches/0057-sunxi-Hide-image-type-selection-if-SPL-is-disabled.patch deleted file mode 100644 index 314720197e..0000000000 --- a/lede/package/boot/uboot-d1/patches/0057-sunxi-Hide-image-type-selection-if-SPL-is-disabled.patch +++ /dev/null @@ -1,22 +0,0 @@ -From 2ba626d36e622f29528ce953618dde9a01bdacd6 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Fri, 5 Aug 2022 21:56:43 -0500 -Subject: [PATCH 57/90] sunxi: Hide image type selection if SPL is disabled - -This choice is meaningless when SPL is disabled. Hide it to avoid any -possible confusion. - -Signed-off-by: Samuel Holland ---- - board/sunxi/Kconfig | 1 + - 1 file changed, 1 insertion(+) - ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -1,5 +1,6 @@ - choice - prompt "SPL Image Type" -+ depends on SPL - default SPL_IMAGE_TYPE_SUNXI_EGON - - config SPL_IMAGE_TYPE_SUNXI_EGON diff --git a/lede/package/boot/uboot-d1/patches/0058-sunxi-Share-the-board-Kconfig-across-architectures.patch b/lede/package/boot/uboot-d1/patches/0058-sunxi-Share-the-board-Kconfig-across-architectures.patch deleted file mode 100644 index dfae082cf5..0000000000 --- a/lede/package/boot/uboot-d1/patches/0058-sunxi-Share-the-board-Kconfig-across-architectures.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 5d197433cd54085306e369ac260e09fe6077bfbb Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 4 Aug 2022 21:30:57 -0500 -Subject: [PATCH 58/90] sunxi: Share the board Kconfig across architectures - -With the introduction of the Allwinner D1, the sunxi board family now -spans multiple architectures (ARM and RISC-V). Since ARCH_SUNXI depends -on ARM, it cannot be used to gate architecture-independent options. -Specifically, this means the board Kconfig file cannot be sourced from -inside the "if ARCH_SUNXI" block. - -Introduce a new BOARD_SUNXI symbol that can be selected by both -ARCH_SUNXI now and the new RISC-V SoC symbols when they are added, and -use it to gate the architecture-independent board options. - -Signed-off-by: Samuel Holland ---- - arch/Kconfig | 1 + - arch/arm/Kconfig | 1 + - arch/arm/mach-sunxi/Kconfig | 2 -- - board/sunxi/Kconfig | 11 +++++++++++ - 4 files changed, 13 insertions(+), 2 deletions(-) - ---- a/arch/Kconfig -+++ b/arch/Kconfig -@@ -482,6 +482,7 @@ source "arch/Kconfig.nxp" - endif - - source "board/keymile/Kconfig" -+source "board/sunxi/Kconfig" - - if MIPS || MICROBLAZE - ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1090,6 +1090,7 @@ config ARCH_SOCFPGA - config ARCH_SUNXI - bool "Support sunxi (Allwinner) SoCs" - select BINMAN -+ select BOARD_SUNXI - select CMD_GPIO if GPIO - select CMD_MMC if MMC - select CMD_USB if DISTRO_DEFAULTS && USB_HOST ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -959,8 +959,6 @@ config BLUETOOTH_DT_DEVICE_FIXUP - The used address is "bdaddr" if set, and "ethaddr" with the LSB - flipped elsewise. - --source "board/sunxi/Kconfig" -- - endif - - config CHIP_DIP_SCAN ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -1,3 +1,10 @@ -+config BOARD_SUNXI -+ bool -+ -+if BOARD_SUNXI -+ -+menu "sunxi board options" -+ - choice - prompt "SPL Image Type" - depends on SPL -@@ -23,3 +30,7 @@ config SPL_IMAGE_TYPE - string - default "sunxi_egon" if SPL_IMAGE_TYPE_SUNXI_EGON - default "sunxi_toc0" if SPL_IMAGE_TYPE_SUNXI_TOC0 -+ -+endmenu -+ -+endif diff --git a/lede/package/boot/uboot-d1/patches/0059-sunxi-Move-most-Kconfig-selections-to-the-board-Kcon.patch b/lede/package/boot/uboot-d1/patches/0059-sunxi-Move-most-Kconfig-selections-to-the-board-Kcon.patch deleted file mode 100644 index e576d137e8..0000000000 --- a/lede/package/boot/uboot-d1/patches/0059-sunxi-Move-most-Kconfig-selections-to-the-board-Kcon.patch +++ /dev/null @@ -1,140 +0,0 @@ -From 963331be1cc924ad7c928f88b3ee46bc20a41bcd Mon Sep 17 00:00:00 2001 -From: Zoltan HERPAI -Date: Tue, 6 Jun 2023 18:06:20 +0000 -Subject: [PATCH 59/90] sunxi: Move most Kconfig selections to the board - Kconfig - -To maintain consistent behavior across architectures, most of the -options selected by ARCH_SUNXI should be selected for the D1 SoC as -well. To accomplish this, select them from BOARD_SUNXI instead. - -No functional change here. Lines are only moved and alphabetized. - -Signed-off-by: Samuel Holland - -Signed-off-by: Zoltan HERPAI ---- - arch/arm/Kconfig | 47 --------------------------------------------- - board/sunxi/Kconfig | 46 ++++++++++++++++++++++++++++++++++++++++++++ - 2 files changed, 46 insertions(+), 47 deletions(-) - ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1089,63 +1089,16 @@ config ARCH_SOCFPGA - - config ARCH_SUNXI - bool "Support sunxi (Allwinner) SoCs" -- select BINMAN - select BOARD_SUNXI -- select CMD_GPIO if GPIO -- select CMD_MMC if MMC -- select CMD_USB if DISTRO_DEFAULTS && USB_HOST -- select CLK -- select DM -- select DM_ETH if NET -- select DM_GPIO if GPIO -- select DM_I2C if I2C -- select DM_SCSI if BLK && SCSI -- select DM_SERIAL if SERIAL -- select DM_SPI if SPI -- select DM_SPI_FLASH if SPI - select GPIO_EXTRA_HEADER -- select OF_BOARD_SETUP - select OF_CONTROL - select OF_SEPARATE -- select PINCTRL - select SPECIFY_CONSOLE_INDEX if SERIAL -- select SPL_SEPARATE_BSS if SPL - select SPL_STACK_R if SPL - select SPL_SYS_MALLOC_SIMPLE if SPL - select SPL_SYS_THUMB_BUILD if !ARM64 -- select SUNXI_GPIO if GPIO -- select SYS_NS16550 if SERIAL - select SYS_THUMB_BUILD if !ARM64 -- select USB if DISTRO_DEFAULTS -- select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST - select SPL_USE_TINY_PRINTF -- select USE_PREBOOT -- select SYS_RELOC_GD_ENV_ADDR -- imply BOARD_LATE_INIT -- imply CMD_DM -- imply CMD_GPT -- imply CMD_UBI if MTD_RAW_NAND -- imply DISTRO_DEFAULTS -- imply FAT_WRITE -- imply FIT -- imply OF_LIBFDT_OVERLAY -- imply PRE_CONSOLE_BUFFER -- imply SPL_GPIO -- imply SPL_LIBCOMMON_SUPPORT -- imply SPL_LIBGENERIC_SUPPORT -- imply SPL_LOAD_FIT -- imply SPL_MMC if MMC -- imply SPL_POWER -- imply SPL_SERIAL -- imply SYSRESET -- imply SYSRESET_WATCHDOG -- imply SYSRESET_WATCHDOG_AUTO -- imply USB_EHCI_GENERIC -- imply USB_EHCI_HCD -- imply USB_GADGET -- imply USB_OHCI_GENERIC -- imply USB_OHCI_HCD -- imply WDT - - config ARCH_U8500 - bool "ST-Ericsson U8500 Series" ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -1,5 +1,51 @@ - config BOARD_SUNXI - bool -+ select BINMAN -+ select CLK -+ select CMD_GPIO if GPIO -+ select CMD_MMC if MMC -+ select CMD_USB if DISTRO_DEFAULTS && USB_HOST -+ select DM -+ select DM_ETH if NET -+ select DM_GPIO if GPIO -+ select DM_I2C if I2C -+ select DM_SCSI if BLK && SCSI -+ select DM_SERIAL if SERIAL -+ select DM_SPI if SPI -+ select DM_SPI_FLASH if SPI -+ select OF_BOARD_SETUP -+ select PINCTRL -+ select SPL_SEPARATE_BSS if SPL -+ select SUNXI_GPIO if GPIO -+ select SYS_NS16550 if SERIAL -+ select SYS_RELOC_GD_ENV_ADDR -+ select USB if DISTRO_DEFAULTS -+ select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST -+ select USE_PREBOOT -+ imply BOARD_LATE_INIT -+ imply CMD_DM -+ imply CMD_GPT -+ imply CMD_UBI if MTD_RAW_NAND -+ imply DISTRO_DEFAULTS -+ imply FAT_WRITE -+ imply FIT -+ imply OF_LIBFDT_OVERLAY -+ imply PRE_CONSOLE_BUFFER -+ imply SPL_GPIO -+ imply SPL_LIBCOMMON_SUPPORT -+ imply SPL_LIBGENERIC_SUPPORT -+ imply SPL_MMC if MMC -+ imply SPL_POWER -+ imply SPL_SERIAL -+ imply SYSRESET -+ imply SYSRESET_WATCHDOG -+ imply SYSRESET_WATCHDOG_AUTO -+ imply USB_EHCI_GENERIC -+ imply USB_EHCI_HCD -+ imply USB_GADGET -+ imply USB_OHCI_GENERIC -+ imply USB_OHCI_HCD -+ imply WDT - - if BOARD_SUNXI - diff --git a/lede/package/boot/uboot-d1/patches/0060-sunxi-Globally-enable-SUPPORT_SPL.patch b/lede/package/boot/uboot-d1/patches/0060-sunxi-Globally-enable-SUPPORT_SPL.patch deleted file mode 100644 index 0b59906f44..0000000000 --- a/lede/package/boot/uboot-d1/patches/0060-sunxi-Globally-enable-SUPPORT_SPL.patch +++ /dev/null @@ -1,147 +0,0 @@ -From 5838fd3a53e613312d46ab4cb6015a502c4c45d0 Mon Sep 17 00:00:00 2001 -From: Zoltan HERPAI -Date: Tue, 6 Jun 2023 18:07:24 +0000 -Subject: [PATCH 60/90] sunxi: Globally enable SUPPORT_SPL - -This was already supported by every machine type. It is unlikely that -any new SoC support will be added without SPL support. - -Signed-off-by: Samuel Holland -Signed-off-by: Zoltan HERPAI ---- - arch/arm/mach-sunxi/Kconfig | 14 -------------- - board/sunxi/Kconfig | 2 ++ - 2 files changed, 2 insertions(+), 14 deletions(-) - ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -133,7 +133,6 @@ config SUN50I_GEN_H6 - select FIT - select SPL_LOAD_FIT - select MMC_SUNXI_HAS_NEW_MODE -- select SUPPORT_SPL - ---help--- - Select this for sunxi SoCs which have H6 like peripherals, clocks - and memory map. -@@ -166,7 +165,6 @@ config MACH_SUNXI_H3_H5 - select SUNXI_DRAM_DW - select SUNXI_DRAM_DW_32BIT - select SUNXI_GEN_SUN6I -- select SUPPORT_SPL - - # TODO: try out A80's 8GiB DRAM space - config SUNXI_DRAM_MAX_SIZE -@@ -183,7 +181,6 @@ config MACH_SUNIV - bool "suniv (Allwinner F1C100s/F1C200s/F1C600/R6)" - select CPU_ARM926EJS - select SUNXI_GEN_SUN6I -- select SUPPORT_SPL - select SKIP_LOWLEVEL_INIT_ONLY - select SPL_SKIP_LOWLEVEL_INIT_ONLY - -@@ -192,7 +189,6 @@ config MACH_SUN4I - select CPU_V7A - select DRAM_SUN4I - select SUNXI_GEN_SUN4I -- select SUPPORT_SPL - imply SPL_SYS_I2C_LEGACY - imply SYS_I2C_LEGACY - -@@ -201,7 +197,6 @@ config MACH_SUN5I - select CPU_V7A - select DRAM_SUN4I - select SUNXI_GEN_SUN4I -- select SUPPORT_SPL - imply SPL_SYS_I2C_LEGACY - imply SYS_I2C_LEGACY - -@@ -216,7 +211,6 @@ config MACH_SUN6I - select SPL_I2C - select SUN6I_PRCM - select SUNXI_GEN_SUN6I -- select SUPPORT_SPL - select SYS_I2C_SUN6I_P2WI - select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT - -@@ -229,7 +223,6 @@ config MACH_SUN7I - select SPL_ARMV7_SET_CORTEX_SMPEN - select DRAM_SUN4I - select SUNXI_GEN_SUN4I -- select SUPPORT_SPL - select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT - imply SPL_SYS_I2C_LEGACY - imply SYS_I2C_LEGACY -@@ -243,7 +236,6 @@ config MACH_SUN8I_A23 - select DRAM_SUN8I_A23 - select SPL_I2C - select SUNXI_GEN_SUN6I -- select SUPPORT_SPL - select SYS_I2C_SUN8I_RSB - select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT - -@@ -256,7 +248,6 @@ config MACH_SUN8I_A33 - select DRAM_SUN8I_A33 - select SPL_I2C - select SUNXI_GEN_SUN6I -- select SUPPORT_SPL - select SYS_I2C_SUN8I_RSB - select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT - -@@ -268,7 +259,6 @@ config MACH_SUN8I_A83T - select SUNXI_GEN_SUN6I - select MMC_SUNXI_HAS_NEW_MODE - select MMC_SUNXI_HAS_MODE_SWITCH -- select SUPPORT_SPL - select SYS_I2C_SUN8I_RSB - - config MACH_SUN8I_H3 -@@ -288,7 +278,6 @@ config MACH_SUN8I_R40 - select ARCH_SUPPORT_PSCI - select SUNXI_GEN_SUN6I - select MMC_SUNXI_HAS_NEW_MODE -- select SUPPORT_SPL - select SUNXI_DRAM_DW - select SUNXI_DRAM_DW_32BIT - imply SPL_SYS_I2C_LEGACY -@@ -302,7 +291,6 @@ config MACH_SUN8I_V3S - select SUNXI_GEN_SUN6I - select SUNXI_DRAM_DW - select SUNXI_DRAM_DW_16BIT -- select SUPPORT_SPL - select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT - - config MACH_SUN9I -@@ -313,7 +301,6 @@ config MACH_SUN9I - select SPL_I2C - select SUN6I_PRCM - select SUNXI_GEN_SUN6I -- select SUPPORT_SPL - - config MACH_SUN50I - bool "sun50i (Allwinner A64)" -@@ -322,7 +309,6 @@ config MACH_SUN50I - select SUNXI_DE2 - select SUNXI_GEN_SUN6I - select MMC_SUNXI_HAS_NEW_MODE -- select SUPPORT_SPL - select SUNXI_DRAM_DW - select SUNXI_DRAM_DW_32BIT - select FIT ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -18,6 +18,7 @@ config BOARD_SUNXI - select SPL_SEPARATE_BSS if SPL - select SUNXI_GPIO if GPIO - select SYS_NS16550 if SERIAL -+ select SUPPORT_SPL - select SYS_RELOC_GD_ENV_ADDR - select USB if DISTRO_DEFAULTS - select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST -@@ -31,6 +32,7 @@ config BOARD_SUNXI - imply FIT - imply OF_LIBFDT_OVERLAY - imply PRE_CONSOLE_BUFFER -+ imply SPL - imply SPL_GPIO - imply SPL_LIBCOMMON_SUPPORT - imply SPL_LIBGENERIC_SUPPORT diff --git a/lede/package/boot/uboot-d1/patches/0061-sunxi-Downgrade-driver-selections-to-implications.patch b/lede/package/boot/uboot-d1/patches/0061-sunxi-Downgrade-driver-selections-to-implications.patch deleted file mode 100644 index e77c5cb080..0000000000 --- a/lede/package/boot/uboot-d1/patches/0061-sunxi-Downgrade-driver-selections-to-implications.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 6c8707fcd3372015829a1e8b8d5e8030c5806382 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 6 Aug 2022 00:10:46 -0500 -Subject: [PATCH 61/90] sunxi: Downgrade driver selections to implications - -While not especially likely, it is plausible that someone wants to build -U-Boot without GPIO or UART support. Don't force building these drivers. - -Signed-off-by: Samuel Holland ---- - board/sunxi/Kconfig | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -16,8 +16,6 @@ config BOARD_SUNXI - select OF_BOARD_SETUP - select PINCTRL - select SPL_SEPARATE_BSS if SPL -- select SUNXI_GPIO if GPIO -- select SYS_NS16550 if SERIAL - select SUPPORT_SPL - select SYS_RELOC_GD_ENV_ADDR - select USB if DISTRO_DEFAULTS -@@ -39,6 +37,8 @@ config BOARD_SUNXI - imply SPL_MMC if MMC - imply SPL_POWER - imply SPL_SERIAL -+ imply SUNXI_GPIO -+ imply SYS_NS16550 - imply SYSRESET - imply SYSRESET_WATCHDOG - imply SYSRESET_WATCHDOG_AUTO diff --git a/lede/package/boot/uboot-d1/patches/0062-sunxi-Enable-the-I2C-driver-by-default.patch b/lede/package/boot/uboot-d1/patches/0062-sunxi-Enable-the-I2C-driver-by-default.patch deleted file mode 100644 index e6d963e812..0000000000 --- a/lede/package/boot/uboot-d1/patches/0062-sunxi-Enable-the-I2C-driver-by-default.patch +++ /dev/null @@ -1,23 +0,0 @@ -From ad619478827b825d7b88dce22eb9b5e1c6ea7eb0 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 6 Aug 2022 00:11:54 -0500 -Subject: [PATCH 62/90] sunxi: Enable the I2C driver by default - -This is used by quite a large number of boards, for PMIC/regulator or -LCD panel control. - -Signed-off-by: Samuel Holland ---- - board/sunxi/Kconfig | 1 + - 1 file changed, 1 insertion(+) - ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -38,6 +38,7 @@ config BOARD_SUNXI - imply SPL_POWER - imply SPL_SERIAL - imply SUNXI_GPIO -+ imply SYS_I2C_MVTWSI - imply SYS_NS16550 - imply SYSRESET - imply SYSRESET_WATCHDOG diff --git a/lede/package/boot/uboot-d1/patches/0063-sunxi-Move-default-values-to-the-board-Kconfig.patch b/lede/package/boot/uboot-d1/patches/0063-sunxi-Move-default-values-to-the-board-Kconfig.patch deleted file mode 100644 index 17bf8cb3ac..0000000000 --- a/lede/package/boot/uboot-d1/patches/0063-sunxi-Move-default-values-to-the-board-Kconfig.patch +++ /dev/null @@ -1,190 +0,0 @@ -From fde804c2ece090eb7802a218781e38c7c6d6f00d Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Fri, 5 Aug 2022 23:10:11 -0500 -Subject: [PATCH 63/90] sunxi: Move default values to the board Kconfig - -This keeps all of the defaults for sunxi platforms in one place. Most of -these only depend on architecture-independent features of the SoC (clock -tree or SRAM layout) anyway. - -No functional change; just some minor help text cleanup. - -Signed-off-by: Samuel Holland ---- - arch/arm/mach-sunxi/Kconfig | 67 ------------------------------------ - board/sunxi/Kconfig | 68 +++++++++++++++++++++++++++++++++++++ - 2 files changed, 68 insertions(+), 67 deletions(-) - ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -1,8 +1,5 @@ - if ARCH_SUNXI - --config IDENT_STRING -- default " Allwinner Technology" -- - config DRAM_SUN4I - bool - help -@@ -99,17 +96,6 @@ config AXP_PMIC_BUS - Select this PMIC bus access helpers for Sunxi platform PRCM or other - AXP family PMIC devices. - --config SUNXI_SRAM_ADDRESS -- hex -- default 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5 -- default 0x20000 if SUN50I_GEN_H6 -- default 0x0 -- ---help--- -- Older Allwinner SoCs have their mask boot ROM mapped just below 4GB, -- with the first SRAM region being located at address 0. -- Some newer SoCs map the boot ROM at address 0 instead and move the -- SRAM to a different address. -- - config SUNXI_A64_TIMER_ERRATUM - bool - -@@ -562,48 +548,6 @@ config DRAM_ODT_CORRECTION - then the correction is negative. Usually the value for this is 0. - endif - --config SYS_CLK_FREQ -- default 408000000 if MACH_SUNIV -- default 1008000000 if MACH_SUN4I -- default 1008000000 if MACH_SUN5I -- default 1008000000 if MACH_SUN6I -- default 912000000 if MACH_SUN7I -- default 816000000 if MACH_SUN50I || MACH_SUN50I_H5 -- default 1008000000 if MACH_SUN8I -- default 1008000000 if MACH_SUN9I -- default 888000000 if MACH_SUN50I_H6 -- default 1008000000 if MACH_SUN50I_H616 -- --config SYS_CONFIG_NAME -- default "suniv" if MACH_SUNIV -- default "sun4i" if MACH_SUN4I -- default "sun5i" if MACH_SUN5I -- default "sun6i" if MACH_SUN6I -- default "sun7i" if MACH_SUN7I -- default "sun8i" if MACH_SUN8I -- default "sun9i" if MACH_SUN9I -- default "sun50i" if MACH_SUN50I -- default "sun50i" if MACH_SUN50I_H6 -- default "sun50i" if MACH_SUN50I_H616 -- --config SYS_BOARD -- default "sunxi" -- --config SYS_SOC -- default "sunxi" -- --config SUNXI_MINIMUM_DRAM_MB -- int "minimum DRAM size" -- default 32 if MACH_SUNIV -- default 64 if MACH_SUN8I_V3S -- default 256 -- ---help--- -- Minimum DRAM size expected on the board. Traditionally we assumed -- 256 MB, so that U-Boot would load at 160MB. With co-packaged DRAM -- we have smaller sizes, though, so that U-Boot's own load address and -- the default payload addresses must be shifted down. -- This is expected to be fixed by the SoC selection. -- - config UART0_PORT_F - bool "UART0 on MicroSD breakout board" - ---help--- -@@ -898,17 +842,6 @@ config GMAC_TX_DELAY - ---help--- - Set the GMAC Transmit Clock Delay Chain value. - --config SPL_STACK_R_ADDR -- default 0x81e00000 if MACH_SUNIV -- default 0x4fe00000 if MACH_SUN4I -- default 0x4fe00000 if MACH_SUN5I -- default 0x4fe00000 if MACH_SUN6I -- default 0x4fe00000 if MACH_SUN7I -- default 0x4fe00000 if MACH_SUN8I -- default 0x2fe00000 if MACH_SUN9I -- default 0x4fe00000 if MACH_SUN50I -- default 0x4fe00000 if SUN50I_GEN_H6 -- - config SPL_SPI_SUNXI - bool "Support for SPI Flash on Allwinner SoCs in SPL" - depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || SUN50I_GEN_H6 || MACH_SUNIV ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -52,6 +52,74 @@ config BOARD_SUNXI - - if BOARD_SUNXI - -+config IDENT_STRING -+ default " Allwinner Technology" -+ -+config SPL_STACK_R_ADDR -+ default 0x81e00000 if MACH_SUNIV -+ default 0x4fe00000 if MACH_SUN4I -+ default 0x4fe00000 if MACH_SUN5I -+ default 0x4fe00000 if MACH_SUN6I -+ default 0x4fe00000 if MACH_SUN7I -+ default 0x4fe00000 if MACH_SUN8I -+ default 0x2fe00000 if MACH_SUN9I -+ default 0x4fe00000 if MACH_SUN50I -+ default 0x4fe00000 if SUN50I_GEN_H6 -+ -+config SUNXI_MINIMUM_DRAM_MB -+ int "minimum DRAM size" -+ default 32 if MACH_SUNIV -+ default 64 if MACH_SUN8I_V3S -+ default 256 -+ help -+ Minimum DRAM size expected on the board. Traditionally we -+ assumed 256 MB, so that U-Boot would load at 160MB. With -+ co-packaged DRAM we have smaller sizes, though, so U-Boot's -+ own load address and the default payload addresses must be -+ shifted down. This is expected to be fixed by the SoC -+ selection. -+ -+config SUNXI_SRAM_ADDRESS -+ hex -+ default 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5 -+ default 0x20000 if SUN50I_GEN_H6 -+ default 0x0 -+ help -+ Older Allwinner SoCs have their boot mask ROM mapped just -+ below 4GB, with the first SRAM region located at address 0. -+ Newer SoCs map the boot ROM at address 0 instead and move the -+ SRAM to a different address. -+ -+config SYS_BOARD -+ default "sunxi" -+ -+config SYS_CLK_FREQ -+ default 408000000 if MACH_SUNIV -+ default 1008000000 if MACH_SUN4I -+ default 1008000000 if MACH_SUN5I -+ default 1008000000 if MACH_SUN6I -+ default 912000000 if MACH_SUN7I -+ default 1008000000 if MACH_SUN8I -+ default 1008000000 if MACH_SUN9I -+ default 816000000 if MACH_SUN50I || MACH_SUN50I_H5 -+ default 888000000 if MACH_SUN50I_H6 -+ default 1008000000 if MACH_SUN50I_H616 -+ -+config SYS_CONFIG_NAME -+ default "suniv" if MACH_SUNIV -+ default "sun4i" if MACH_SUN4I -+ default "sun5i" if MACH_SUN5I -+ default "sun6i" if MACH_SUN6I -+ default "sun7i" if MACH_SUN7I -+ default "sun8i" if MACH_SUN8I -+ default "sun9i" if MACH_SUN9I -+ default "sun50i" if MACH_SUN50I -+ default "sun50i" if MACH_SUN50I_H6 -+ default "sun50i" if MACH_SUN50I_H616 -+ -+config SYS_SOC -+ default "sunxi" -+ - menu "sunxi board options" - - choice diff --git a/lede/package/boot/uboot-d1/patches/0064-sunxi-Hide-the-SUNXI_MINIMUM_DRAM_MB-symbol.patch b/lede/package/boot/uboot-d1/patches/0064-sunxi-Hide-the-SUNXI_MINIMUM_DRAM_MB-symbol.patch deleted file mode 100644 index 7648648597..0000000000 --- a/lede/package/boot/uboot-d1/patches/0064-sunxi-Hide-the-SUNXI_MINIMUM_DRAM_MB-symbol.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 8377aa2162d0a7fda76597eae59725a298dda5e6 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Mon, 31 Oct 2022 22:14:36 -0500 -Subject: [PATCH 64/90] sunxi: Hide the SUNXI_MINIMUM_DRAM_MB symbol - -This option affects the ABI between SPL/U-Boot and U-Boot/scripts, so it -should not normally be changed by the user. - -Signed-off-by: Samuel Holland ---- - board/sunxi/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -67,7 +67,7 @@ config SPL_STACK_R_ADDR - default 0x4fe00000 if SUN50I_GEN_H6 - - config SUNXI_MINIMUM_DRAM_MB -- int "minimum DRAM size" -+ int - default 32 if MACH_SUNIV - default 64 if MACH_SUN8I_V3S - default 256 diff --git a/lede/package/boot/uboot-d1/patches/0065-sunxi-Clean-up-the-SPL_STACK_R_ADDR-defaults.patch b/lede/package/boot/uboot-d1/patches/0065-sunxi-Clean-up-the-SPL_STACK_R_ADDR-defaults.patch deleted file mode 100644 index 1a662bea2c..0000000000 --- a/lede/package/boot/uboot-d1/patches/0065-sunxi-Clean-up-the-SPL_STACK_R_ADDR-defaults.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 41e5a94533e9744b8eac718dd2c359eca57573f8 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Fri, 5 Aug 2022 23:25:26 -0500 -Subject: [PATCH 65/90] sunxi: Clean up the SPL_STACK_R_ADDR defaults - -Update this option to be based on SUNXI_MINIMUM_DRAM_MB. This corrects -the value used on V3s, which previously was the MACH_SUN8I default, and -so relied on addresses wrapping modulo the DRAM size. - -Signed-off-by: Samuel Holland ---- - board/sunxi/Kconfig | 9 ++------- - 1 file changed, 2 insertions(+), 7 deletions(-) - ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -57,14 +57,9 @@ config IDENT_STRING - - config SPL_STACK_R_ADDR - default 0x81e00000 if MACH_SUNIV -- default 0x4fe00000 if MACH_SUN4I -- default 0x4fe00000 if MACH_SUN5I -- default 0x4fe00000 if MACH_SUN6I -- default 0x4fe00000 if MACH_SUN7I -- default 0x4fe00000 if MACH_SUN8I - default 0x2fe00000 if MACH_SUN9I -- default 0x4fe00000 if MACH_SUN50I -- default 0x4fe00000 if SUN50I_GEN_H6 -+ default 0x4fe00000 if SUNXI_MINIMUM_DRAM_MB >= 256 -+ default 0x43e00000 if SUNXI_MINIMUM_DRAM_MB >= 64 - - config SUNXI_MINIMUM_DRAM_MB - int diff --git a/lede/package/boot/uboot-d1/patches/0066-sunxi-Move-PRE_CON_BUF_ADDR-to-the-board-Kconfig.patch b/lede/package/boot/uboot-d1/patches/0066-sunxi-Move-PRE_CON_BUF_ADDR-to-the-board-Kconfig.patch deleted file mode 100644 index daaf0b5fc6..0000000000 --- a/lede/package/boot/uboot-d1/patches/0066-sunxi-Move-PRE_CON_BUF_ADDR-to-the-board-Kconfig.patch +++ /dev/null @@ -1,42 +0,0 @@ -From e947c7377b90897e4c638dad6e64201361dc8a9e Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 6 Aug 2022 00:45:10 -0500 -Subject: [PATCH 66/90] sunxi: Move PRE_CON_BUF_ADDR to the board Kconfig - -This provides a default value for RISC-V when that is added, and it -makes sense to put this option next to the other DRAM layout options. - -While at it, provide sensible values for platforms with less DRAM. - -Signed-off-by: Samuel Holland ---- - board/sunxi/Kconfig | 6 ++++++ - common/Kconfig | 2 -- - 2 files changed, 6 insertions(+), 2 deletions(-) - ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -55,6 +55,12 @@ if BOARD_SUNXI - config IDENT_STRING - default " Allwinner Technology" - -+config PRE_CON_BUF_ADDR -+ default 0x81000000 if MACH_SUNIV -+ default 0x2f000000 if MACH_SUN9I -+ default 0x4f000000 if SUNXI_MINIMUM_DRAM_MB >= 256 -+ default 0x43000000 if SUNXI_MINIMUM_DRAM_MB >= 64 -+ - config SPL_STACK_R_ADDR - default 0x81e00000 if MACH_SUNIV - default 0x2fe00000 if MACH_SUN9I ---- a/common/Kconfig -+++ b/common/Kconfig -@@ -195,8 +195,6 @@ config PRE_CON_BUF_SZ - config PRE_CON_BUF_ADDR - hex "Address of the pre-console buffer" - depends on PRE_CONSOLE_BUFFER -- default 0x2f000000 if ARCH_SUNXI && MACH_SUN9I -- default 0x4f000000 if ARCH_SUNXI && !MACH_SUN9I - default 0x0f000000 if ROCKCHIP_RK3288 - default 0x0f200000 if ROCKCHIP_RK3399 - help diff --git a/lede/package/boot/uboot-d1/patches/0067-sunxi-Move-SPL_BSS_START_ADDR-to-the-board-Kconfig.patch b/lede/package/boot/uboot-d1/patches/0067-sunxi-Move-SPL_BSS_START_ADDR-to-the-board-Kconfig.patch deleted file mode 100644 index 286b2b976b..0000000000 --- a/lede/package/boot/uboot-d1/patches/0067-sunxi-Move-SPL_BSS_START_ADDR-to-the-board-Kconfig.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 71796f9d47a6b7e0dd6bb276436950463039c1b8 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Mon, 31 Oct 2022 00:08:26 -0500 -Subject: [PATCH 67/90] sunxi: Move SPL_BSS_START_ADDR to the board Kconfig - -This provides a default value for RISC-V when that is added, and it -makes sense to put this option next to the other DRAM layout options. - -While at it, provide sensible values for platforms with less DRAM. - -Signed-off-by: Samuel Holland ---- - board/sunxi/Kconfig | 6 ++++++ - common/spl/Kconfig | 3 --- - 2 files changed, 6 insertions(+), 3 deletions(-) - ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -61,6 +61,12 @@ config PRE_CON_BUF_ADDR - default 0x4f000000 if SUNXI_MINIMUM_DRAM_MB >= 256 - default 0x43000000 if SUNXI_MINIMUM_DRAM_MB >= 64 - -+config SPL_BSS_START_ADDR -+ default 0x81f80000 if MACH_SUNIV -+ default 0x2ff80000 if MACH_SUN9I -+ default 0x4ff80000 if SUNXI_MINIMUM_DRAM_MB >= 256 -+ default 0x43f80000 if SUNXI_MINIMUM_DRAM_MB >= 64 -+ - config SPL_STACK_R_ADDR - default 0x81e00000 if MACH_SUNIV - default 0x2fe00000 if MACH_SUN9I ---- a/common/spl/Kconfig -+++ b/common/spl/Kconfig -@@ -119,9 +119,6 @@ config SPL_BSS_START_ADDR - default 0x88200000 if (ARCH_MX6 && (MX6SX || MX6SL || MX6UL || MX6ULL)) || ARCH_MX7 - default 0x18200000 if ARCH_MX6 && !(MX6SX || MX6SL || MX6UL || MX6ULL) - default 0x80a00000 if ARCH_OMAP2PLUS -- default 0x81f80000 if ARCH_SUNXI && MACH_SUNIV -- default 0x4ff80000 if ARCH_SUNXI && !(MACH_SUN9I || MACH_SUNIV) -- default 0x2ff80000 if ARCH_SUNXI && MACH_SUN9I - default 0x1000 if ARCH_ZYNQMP - - choice diff --git a/lede/package/boot/uboot-d1/patches/0068-sunxi-Move-SPL_TEXT_BASE-to-the-board-Kconfig.patch b/lede/package/boot/uboot-d1/patches/0068-sunxi-Move-SPL_TEXT_BASE-to-the-board-Kconfig.patch deleted file mode 100644 index 77aa592943..0000000000 --- a/lede/package/boot/uboot-d1/patches/0068-sunxi-Move-SPL_TEXT_BASE-to-the-board-Kconfig.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 5d60490d0f0ca0a5d414ba9a4e41ceea8a98b4d2 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 6 Aug 2022 00:07:47 -0500 -Subject: [PATCH 68/90] sunxi: Move SPL_TEXT_BASE to the board Kconfig - -It makes sense to put this near the definition of SUNXI_SRAM_ADDRESS. - -Signed-off-by: Samuel Holland ---- - board/sunxi/Kconfig | 5 +++++ - common/spl/Kconfig | 3 --- - 2 files changed, 5 insertions(+), 3 deletions(-) - ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -73,6 +73,11 @@ config SPL_STACK_R_ADDR - default 0x4fe00000 if SUNXI_MINIMUM_DRAM_MB >= 256 - default 0x43e00000 if SUNXI_MINIMUM_DRAM_MB >= 64 - -+config SPL_TEXT_BASE -+ default 0x10060 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5 -+ default 0x20060 if SUN50I_GEN_H6 -+ default 0x00060 -+ - config SUNXI_MINIMUM_DRAM_MB - int - default 32 if MACH_SUNIV ---- a/common/spl/Kconfig -+++ b/common/spl/Kconfig -@@ -261,9 +261,6 @@ config SPL_TEXT_BASE - default 0x402F4000 if AM43XX - default 0x402F0400 if AM33XX - default 0x40301350 if OMAP54XX -- default 0x10060 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN9I -- default 0x20060 if SUN50I_GEN_H6 -- default 0x00060 if ARCH_SUNXI - default 0xfffc0000 if ARCH_ZYNQMP - default 0x0 - help diff --git a/lede/package/boot/uboot-d1/patches/0069-sunxi-Move-SYS_LOAD_ADDR-to-the-board-Kconfig.patch b/lede/package/boot/uboot-d1/patches/0069-sunxi-Move-SYS_LOAD_ADDR-to-the-board-Kconfig.patch deleted file mode 100644 index 3d6e3018da..0000000000 --- a/lede/package/boot/uboot-d1/patches/0069-sunxi-Move-SYS_LOAD_ADDR-to-the-board-Kconfig.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 03f3ba82e9dfb67f1ae0812f72aea6559aa61bb4 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Fri, 5 Aug 2022 23:23:34 -0500 -Subject: [PATCH 69/90] sunxi: Move SYS_LOAD_ADDR to the board Kconfig - -This will provide a default value for RISC-V when that is added, and it -makes sense to put this option next to the other DRAM layout options. - -Signed-off-by: Samuel Holland ---- - Kconfig | 3 --- - board/sunxi/Kconfig | 5 +++++ - 2 files changed, 5 insertions(+), 3 deletions(-) - ---- a/Kconfig -+++ b/Kconfig -@@ -508,9 +508,6 @@ config SYS_LOAD_ADDR - hex "Address in memory to use by default" - default 0x01000000 if ARCH_SOCFPGA - default 0x02000000 if PPC || X86 -- default 0x81000000 if MACH_SUNIV -- default 0x22000000 if MACH_SUN9I -- default 0x42000000 if ARCH_SUNXI - default 0x82000000 if ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3 - default 0x82000000 if ARCH_MX6 && (MX6SL || MX6SLL || MX6SX || MX6UL || MX6ULL) - default 0x12000000 if ARCH_MX6 && !(MX6SL || MX6SLL || MX6SX || MX6UL || MX6ULL) ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -129,6 +129,11 @@ config SYS_CONFIG_NAME - default "sun50i" if MACH_SUN50I_H6 - default "sun50i" if MACH_SUN50I_H616 - -+config SYS_LOAD_ADDR -+ default 0x81000000 if MACH_SUNIV -+ default 0x22000000 if MACH_SUN9I -+ default 0x42000000 -+ - config SYS_SOC - default "sunxi" - diff --git a/lede/package/boot/uboot-d1/patches/0070-sunxi-Move-TEXT_BASE-to-the-board-Kconfig.patch b/lede/package/boot/uboot-d1/patches/0070-sunxi-Move-TEXT_BASE-to-the-board-Kconfig.patch deleted file mode 100644 index 910e02c0d2..0000000000 --- a/lede/package/boot/uboot-d1/patches/0070-sunxi-Move-TEXT_BASE-to-the-board-Kconfig.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 08b45a89c7b25eb7828589360cf4ca2d9910cc59 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Fri, 5 Aug 2022 21:48:53 -0500 -Subject: [PATCH 70/90] sunxi: Move TEXT_BASE to the board Kconfig - -This is how the vast majority of platforms provided TEXT_BASE. -sunxi was the exception here. - -Signed-off-by: Samuel Holland ---- - board/sunxi/Kconfig | 6 ++++++ - boot/Kconfig | 4 ---- - 2 files changed, 6 insertions(+), 4 deletions(-) - ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -137,6 +137,12 @@ config SYS_LOAD_ADDR - config SYS_SOC - default "sunxi" - -+config TEXT_BASE -+ default 0x81700000 if MACH_SUNIV -+ default 0x2a000000 if MACH_SUN9I -+ default 0x4a000000 if SUNXI_MINIMUM_DRAM_MB >= 256 -+ default 0x42e00000 if SUNXI_MINIMUM_DRAM_MB >= 64 -+ - menu "sunxi board options" - - choice ---- a/boot/Kconfig -+++ b/boot/Kconfig -@@ -633,10 +633,6 @@ config TEXT_BASE - depends on HAVE_TEXT_BASE - default 0x0 if POSITION_INDEPENDENT - default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3 -- default 0x81700000 if MACH_SUNIV -- default 0x2a000000 if MACH_SUN9I -- default 0x4a000000 if SUNXI_MINIMUM_DRAM_MB >= 256 -- default 0x42e00000 if SUNXI_MINIMUM_DRAM_MB >= 64 - hex "Text Base" - help - The address in memory that U-Boot will be running from, initially. diff --git a/lede/package/boot/uboot-d1/patches/0071-sunxi-Move-most-board-options-to-the-board-Kconfig.patch b/lede/package/boot/uboot-d1/patches/0071-sunxi-Move-most-board-options-to-the-board-Kconfig.patch deleted file mode 100644 index fdcd725687..0000000000 --- a/lede/package/boot/uboot-d1/patches/0071-sunxi-Move-most-board-options-to-the-board-Kconfig.patch +++ /dev/null @@ -1,197 +0,0 @@ -From 6a1b660a83b262237b6bebed26e44db923a86a6b Mon Sep 17 00:00:00 2001 -From: Zoltan HERPAI -Date: Tue, 6 Jun 2023 18:09:19 +0000 -Subject: [PATCH 71/90] sunxi: Move most board options to the board Kconfig - -This excludes options that are inherently ARM-specific or are specific -to legacy non-DM drivers. - -Some help text is cleaned up along the way. - -Signed-off-by: Samuel Holland -Signed-off-by: Zoltan HERPAI ---- - arch/arm/mach-sunxi/Kconfig | 71 ------------------------------------ - board/sunxi/Kconfig | 72 +++++++++++++++++++++++++++++++++++++ - 2 files changed, 72 insertions(+), 71 deletions(-) - ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -548,16 +548,6 @@ config DRAM_ODT_CORRECTION - then the correction is negative. Usually the value for this is 0. - endif - --config UART0_PORT_F -- bool "UART0 on MicroSD breakout board" -- ---help--- -- Repurpose the SD card slot for getting access to the UART0 serial -- console. Primarily useful only for low level u-boot debugging on -- tablets, where normal UART0 is difficult to access and requires -- device disassembly and/or soldering. As the SD card can't be used -- at the same time, the system can be only booted in the FEL mode. -- Only enable this if you really know what you are doing. -- - config OLD_SUNXI_KERNEL_COMPAT - bool "Enable workarounds for booting old kernels" - ---help--- -@@ -571,20 +561,6 @@ config MACPWR - Set the pin used to power the MAC. This takes a string in the format - understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. - --config MMC1_PINS_PH -- bool "Pins for mmc1 are on Port H" -- depends on MACH_SUN4I || MACH_SUN7I || MACH_SUN8I_R40 -- ---help--- -- Select this option for boards where mmc1 uses the Port H pinmux. -- --config MMC_SUNXI_SLOT_EXTRA -- int "mmc extra slot number" -- default -1 -- ---help--- -- sunxi builds always enable mmc0, some boards also have a second sdcard -- slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable -- support for this. -- - config I2C0_ENABLE - bool "Enable I2C/TWI controller 0" - default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_R40 -@@ -612,16 +588,6 @@ config R_I2C_ENABLE - Set this to y to enable the I2C controller which is part of the PRCM. - endif - --config AXP_DISABLE_BOOT_ON_POWERON -- bool "Disable device boot on power plug-in" -- depends on AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER -- default n -- ---help--- -- Say Y here to prevent the device from booting up because of a plug-in -- event. When set, the device will boot into the SPL briefly to -- determine why it was powered on, and if it was determined because of -- a plug-in event instead of a button press event it will shut back off. -- - config VIDEO_SUNXI - bool "Enable graphical uboot console on HDMI, LCD or VGA" - depends on !MACH_SUN8I_A83T -@@ -850,41 +816,4 @@ config SPL_SPI_SUNXI - sunxi SPI Flash. It uses the same method as the boot ROM, so does - not need any extra configuration. - --config PINE64_DT_SELECTION -- bool "Enable Pine64 device tree selection code" -- depends on MACH_SUN50I -- help -- The original Pine A64 and Pine A64+ are similar but different -- boards and can be differed by the DRAM size. Pine A64 has -- 512MiB DRAM, and Pine A64+ has 1GiB or 2GiB. By selecting this -- option, the device tree selection code specific to Pine64 which -- utilizes the DRAM size will be enabled. -- --config PINEPHONE_DT_SELECTION -- bool "Enable PinePhone device tree selection code" -- depends on MACH_SUN50I -- help -- Enable this option to automatically select the device tree for the -- correct PinePhone hardware revision during boot. -- --config BLUETOOTH_DT_DEVICE_FIXUP -- string "Fixup the Bluetooth controller address" -- default "" -- help -- This option specifies the DT compatible name of the Bluetooth -- controller for which to set the "local-bd-address" property. -- Set this option if your device ships with the Bluetooth controller -- default address. -- The used address is "bdaddr" if set, and "ethaddr" with the LSB -- flipped elsewise. -- - endif -- --config CHIP_DIP_SCAN -- bool "Enable DIPs detection for CHIP board" -- select SUPPORT_EXTENSION_SCAN -- select W1 -- select W1_GPIO -- select W1_EEPROM -- select W1_EEPROM_DS24XXX -- select CMD_EXTENSION ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -171,6 +171,78 @@ config SPL_IMAGE_TYPE - default "sunxi_egon" if SPL_IMAGE_TYPE_SUNXI_EGON - default "sunxi_toc0" if SPL_IMAGE_TYPE_SUNXI_TOC0 - -+config MMC_SUNXI_SLOT_EXTRA -+ int "MMC extra slot number" -+ default -1 -+ help -+ sunxi builds always enable mmc0. Some boards also have a -+ second SD card slot or eMMC on mmc1 - mmc3. Setting this to 1, -+ 2 or 3 will enable support for this. -+ -+config MMC1_PINS_PH -+ bool "MMC1 pins are on Port H" -+ depends on MACH_SUN4I || MACH_SUN7I || MACH_SUN8I_R40 -+ help -+ Select this option on boards where mmc1 uses the Port H pinmux. -+ -+config UART0_PORT_F -+ bool "UART0 pins are on Port F (MicroSD breakout board)" -+ help -+ Repurpose the SD card slot for getting access to the UART0 -+ serial console. Primarily useful only for low level u-boot -+ debugging on tablets, where normal UART0 is difficult to -+ access and requires device disassembly and/or soldering. As -+ the SD card can't be used at the same time, the system can be -+ only booted in FEL mode. Only enable this if you really know -+ what you are doing. -+ -+config AXP_DISABLE_BOOT_ON_POWERON -+ bool "Disable device boot on power plug-in" -+ depends on AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER -+ help -+ Say Y here to prevent the device from booting up because of a -+ plug-in event. When set, the device will boot into the SPL -+ briefly to determine why it was powered on, and if the board -+ was powered on because of a plug-in event instead of a button -+ press event, it will shut back off. -+ -+config CHIP_DIP_SCAN -+ bool "Enable DIPs detection for CHIP board" -+ select SUPPORT_EXTENSION_SCAN -+ select W1 -+ select W1_GPIO -+ select W1_EEPROM -+ select W1_EEPROM_DS24XXX -+ select CMD_EXTENSION -+ -+config PINE64_DT_SELECTION -+ bool "Enable Pine64 device tree selection code" -+ depends on MACH_SUN50I -+ help -+ The original Pine A64 and Pine A64+ are similar but different -+ boards and can be differed by the DRAM size. Pine A64 has -+ 512MiB DRAM, and Pine A64+ has 1GiB or 2GiB. By selecting this -+ option, the device tree selection code specific to Pine64 which -+ utilizes the DRAM size will be enabled. -+ -+config PINEPHONE_DT_SELECTION -+ bool "Enable PinePhone device tree selection code" -+ depends on MACH_SUN50I -+ help -+ Enable this option to automatically select the device tree for the -+ correct PinePhone hardware revision during boot. -+ -+config BLUETOOTH_DT_DEVICE_FIXUP -+ string "Fixup the Bluetooth controller address" -+ default "" -+ help -+ This option specifies the DT compatible name of the Bluetooth -+ controller for which to set the "local-bd-address" property. -+ Set this option if your device ships with the Bluetooth controller -+ default address. -+ The used address is "bdaddr" if set, and "ethaddr" with the LSB -+ flipped elsewise. -+ - endmenu - - endif diff --git a/lede/package/boot/uboot-d1/patches/0072-env-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch b/lede/package/boot/uboot-d1/patches/0072-env-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch deleted file mode 100644 index 3fcfc20595..0000000000 --- a/lede/package/boot/uboot-d1/patches/0072-env-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 27834df51087a005b0330f094492b984cc225f6a Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Fri, 5 Aug 2022 23:28:54 -0500 -Subject: [PATCH 72/90] env: sunxi: Replace ARCH_SUNXI with BOARD_SUNXI - -This ensures the same environment layout will be used across all sunxi -boards, regardless of CPU architecture. - -Signed-off-by: Samuel Holland ---- - env/Kconfig | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - ---- a/env/Kconfig -+++ b/env/Kconfig -@@ -92,7 +92,7 @@ config ENV_IS_IN_FAT - bool "Environment is in a FAT filesystem" - depends on !CHAIN_OF_TRUST - default y if ARCH_BCM283X -- default y if ARCH_SUNXI && MMC -+ default y if BOARD_SUNXI && MMC - default y if MMC_OMAP_HS && TI_COMMON_CMD_OPTIONS - select FS_FAT - select FAT_WRITE -@@ -338,7 +338,7 @@ config ENV_IS_IN_SPI_FLASH - default y if NORTHBRIDGE_INTEL_IVYBRIDGE - default y if INTEL_QUARK - default y if INTEL_QUEENSBAY -- default y if ARCH_SUNXI -+ default y if BOARD_SUNXI - help - Define this if you have a SPI Flash memory device which you - want to use for the environment. -@@ -461,7 +461,7 @@ config ENV_FAT_DEVICE_AND_PART - depends on ENV_IS_IN_FAT - default "0:1" if TI_COMMON_CMD_OPTIONS - default "0:auto" if ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL -- default ":auto" if ARCH_SUNXI -+ default ":auto" if BOARD_SUNXI - default "0" if ARCH_AT91 - help - Define this to a string to specify the partition of the device. It can -@@ -555,7 +555,7 @@ config ENV_OFFSET - ENV_IS_IN_SPI_FLASH - default 0x3f8000 if ARCH_ROCKCHIP && ENV_IS_IN_MMC - default 0x140000 if ARCH_ROCKCHIP && ENV_IS_IN_SPI_FLASH -- default 0xF0000 if ARCH_SUNXI -+ default 0xF0000 if BOARD_SUNXI - default 0xE0000 if ARCH_ZYNQ - default 0x1E00000 if ARCH_ZYNQMP - default 0x7F40000 if ARCH_VERSAL || ARCH_VERSAL_NET -@@ -580,7 +580,7 @@ config ENV_SIZE - hex "Environment Size" - default 0x40000 if ENV_IS_IN_SPI_FLASH && ARCH_ZYNQMP - default 0x20000 if ARCH_ZYNQ || ARCH_OMAP2PLUS || ARCH_AT91 -- default 0x10000 if ARCH_SUNXI -+ default 0x10000 if BOARD_SUNXI - default 0x8000 if ARCH_ROCKCHIP && ENV_IS_IN_MMC - default 0x2000 if ARCH_ROCKCHIP && ENV_IS_IN_SPI_FLASH - default 0x8000 if ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET -@@ -596,7 +596,7 @@ config ENV_SECT_SIZE - default 0x40000 if ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET - default 0x20000 if ARCH_ZYNQ || ARCH_OMAP2PLUS || ARCH_AT91 - default 0x20000 if MICROBLAZE && ENV_IS_IN_SPI_FLASH -- default 0x10000 if ARCH_SUNXI && ENV_IS_IN_SPI_FLASH -+ default 0x10000 if BOARD_SUNXI && ENV_IS_IN_SPI_FLASH - help - Size of the sector containing the environment. - diff --git a/lede/package/boot/uboot-d1/patches/0073-drivers-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch b/lede/package/boot/uboot-d1/patches/0073-drivers-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch deleted file mode 100644 index 4e23863040..0000000000 --- a/lede/package/boot/uboot-d1/patches/0073-drivers-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch +++ /dev/null @@ -1,264 +0,0 @@ -From 666d3c2bc058268a976397ec3e258f532edcfeb2 Mon Sep 17 00:00:00 2001 -From: Zoltan HERPAI -Date: Tue, 6 Jun 2023 18:12:11 +0000 -Subject: [PATCH 73/90] drivers: sunxi: Replace ARCH_SUNXI with BOARD_SUNXI - -This provides a unified configuration across all sunxi boards, -regardless of CPU architecture. - -Signed-off-by: Samuel Holland -Signed-off-by: Zoltan HERPAI ---- - drivers/clk/sunxi/Kconfig | 2 +- - drivers/fastboot/Kconfig | 13 ++++++------- - drivers/gpio/Kconfig | 2 +- - drivers/mmc/Kconfig | 2 +- - drivers/net/phy/Kconfig | 4 ++-- - drivers/phy/allwinner/Kconfig | 2 +- - drivers/pinctrl/sunxi/Kconfig | 2 +- - drivers/reset/Kconfig | 2 +- - drivers/spi/Kconfig | 2 +- - drivers/usb/Kconfig | 2 +- - drivers/usb/gadget/Kconfig | 8 ++++---- - drivers/usb/musb-new/Kconfig | 2 +- - drivers/video/Kconfig | 2 +- - drivers/watchdog/Kconfig | 4 ++-- - 14 files changed, 24 insertions(+), 25 deletions(-) - ---- a/drivers/clk/sunxi/Kconfig -+++ b/drivers/clk/sunxi/Kconfig -@@ -1,6 +1,6 @@ - config CLK_SUNXI - bool "Clock support for Allwinner SoCs" -- depends on CLK && ARCH_SUNXI -+ depends on CLK && BOARD_SUNXI - select DM_RESET - select SPL_DM_RESET if SPL_CLK - default y ---- a/drivers/fastboot/Kconfig -+++ b/drivers/fastboot/Kconfig -@@ -8,7 +8,7 @@ config FASTBOOT - config USB_FUNCTION_FASTBOOT - bool "Enable USB fastboot gadget" - depends on USB_GADGET -- default y if ARCH_SUNXI && USB_MUSB_GADGET -+ default y if BOARD_SUNXI && USB_MUSB_GADGET - select FASTBOOT - select USB_GADGET_DOWNLOAD - help -@@ -32,10 +32,9 @@ if FASTBOOT - - config FASTBOOT_BUF_ADDR - hex "Define FASTBOOT buffer address" -+ default SYS_LOAD_ADDR if BOARD_SUNXI - default 0x82000000 if MX6SX || MX6SL || MX6UL || MX6SLL - default 0x81000000 if ARCH_OMAP2PLUS -- default 0x42000000 if ARCH_SUNXI && !MACH_SUN9I -- default 0x22000000 if ARCH_SUNXI && MACH_SUN9I - default 0x60800800 if ROCKCHIP_RK3036 || ROCKCHIP_RK3188 || \ - ROCKCHIP_RK322X - default 0x800800 if ROCKCHIP_RK3288 || ROCKCHIP_RK3329 || \ -@@ -52,7 +51,7 @@ config FASTBOOT_BUF_SIZE - hex "Define FASTBOOT buffer size" - default 0x8000000 if ARCH_ROCKCHIP - default 0x6000000 if ARCH_ZYNQMP -- default 0x2000000 if ARCH_SUNXI -+ default 0x2000000 if BOARD_SUNXI - default 0x8192 if SANDBOX - default 0x7000000 - help -@@ -71,7 +70,7 @@ config FASTBOOT_USB_DEV - - config FASTBOOT_FLASH - bool "Enable FASTBOOT FLASH command" -- default y if ARCH_SUNXI || ARCH_ROCKCHIP -+ default y if BOARD_SUNXI || ARCH_ROCKCHIP - depends on MMC || (MTD_RAW_NAND && CMD_MTDPARTS) - select IMAGE_SPARSE - help -@@ -105,8 +104,8 @@ config FASTBOOT_FLASH_MMC_DEV - int "Define FASTBOOT MMC FLASH default device" - depends on FASTBOOT_FLASH_MMC - default 0 if ARCH_ROCKCHIP -- default 0 if ARCH_SUNXI && MMC_SUNXI_SLOT_EXTRA = -1 -- default 1 if ARCH_SUNXI && MMC_SUNXI_SLOT_EXTRA != -1 -+ default 0 if BOARD_SUNXI && MMC_SUNXI_SLOT_EXTRA = -1 -+ default 1 if BOARD_SUNXI && MMC_SUNXI_SLOT_EXTRA != -1 - help - The fastboot "flash" command requires additional information - regarding the non-volatile storage device. Define this to ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -370,7 +370,7 @@ config SANDBOX_GPIO_COUNT - - config SUNXI_GPIO - bool "Allwinner GPIO driver" -- depends on ARCH_SUNXI -+ depends on BOARD_SUNXI - select SPL_STRTO if SPL - help - Support the GPIO device in Allwinner SoCs. ---- a/drivers/mmc/Kconfig -+++ b/drivers/mmc/Kconfig -@@ -756,7 +756,7 @@ config ZYNQ_HISPD_BROKEN - - config MMC_SUNXI - bool "Allwinner sunxi SD/MMC Host Controller support" -- depends on ARCH_SUNXI -+ depends on BOARD_SUNXI - default y - help - This selects support for the SD/MMC Host Controller on ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -19,14 +19,14 @@ if PHYLIB - - config PHY_ADDR_ENABLE - bool "Limit phy address" -- default y if ARCH_SUNXI -+ default y if BOARD_SUNXI - help - Select this if you want to control which phy address is used - - if PHY_ADDR_ENABLE - config PHY_ADDR - int "PHY address" -- default 1 if ARCH_SUNXI -+ default 1 if BOARD_SUNXI - default 0 - help - The address of PHY on MII bus. Usually in range of 0 to 31. ---- a/drivers/phy/allwinner/Kconfig -+++ b/drivers/phy/allwinner/Kconfig -@@ -3,7 +3,7 @@ - # - config PHY_SUN4I_USB - bool "Allwinner Sun4I USB PHY driver" -- depends on ARCH_SUNXI && !MACH_SUN9I -+ depends on depends on BOARD_SUNXI - default y - select DM_REGULATOR - select PHY ---- a/drivers/pinctrl/sunxi/Kconfig -+++ b/drivers/pinctrl/sunxi/Kconfig -@@ -1,6 +1,6 @@ - # SPDX-License-Identifier: GPL-2.0 - --if ARCH_SUNXI -+if BOARD_SUNXI - - config PINCTRL_SUNXI - select PINCTRL_FULL ---- a/drivers/reset/Kconfig -+++ b/drivers/reset/Kconfig -@@ -137,7 +137,7 @@ config RESET_MTMIPS - - config RESET_SUNXI - bool "RESET support for Allwinner SoCs" -- depends on DM_RESET && ARCH_SUNXI -+ depends on DM_RESET && BOARD_SUNXI - default y - help - This enables support for common reset driver for ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -453,7 +453,7 @@ config SOFT_SPI - - config SPI_SUNXI - bool "Allwinner SoC SPI controllers" -- default ARCH_SUNXI -+ default BOARD_SUNXI - help - Enable the Allwinner SoC SPi controller driver. - ---- a/drivers/usb/Kconfig -+++ b/drivers/usb/Kconfig -@@ -116,7 +116,7 @@ config USB_KEYBOARD_FN_KEYS - - choice - prompt "USB keyboard polling" -- default SYS_USB_EVENT_POLL_VIA_INT_QUEUE if ARCH_SUNXI -+ default SYS_USB_EVENT_POLL_VIA_INT_QUEUE if BOARD_SUNXI - default SYS_USB_EVENT_POLL - ---help--- - Enable a polling mechanism for USB keyboard. ---- a/drivers/usb/gadget/Kconfig -+++ b/drivers/usb/gadget/Kconfig -@@ -40,7 +40,7 @@ if USB_GADGET - - config USB_GADGET_MANUFACTURER - string "Vendor name of the USB device" -- default "Allwinner Technology" if ARCH_SUNXI -+ default "Allwinner Technology" if BOARD_SUNXI - default "Rockchip" if ARCH_ROCKCHIP - default "U-Boot" - help -@@ -49,7 +49,7 @@ config USB_GADGET_MANUFACTURER - - config USB_GADGET_VENDOR_NUM - hex "Vendor ID of the USB device" -- default 0x1f3a if ARCH_SUNXI -+ default 0x1f3a if BOARD_SUNXI - default 0x2207 if ARCH_ROCKCHIP - default 0x0 - help -@@ -59,7 +59,7 @@ config USB_GADGET_VENDOR_NUM - - config USB_GADGET_PRODUCT_NUM - hex "Product ID of the USB device" -- default 0x1010 if ARCH_SUNXI -+ default 0x1010 if BOARD_SUNXI - default 0x310a if ROCKCHIP_RK3036 - default 0x300a if ROCKCHIP_RK3066 - default 0x310c if ROCKCHIP_RK3128 -@@ -202,7 +202,7 @@ endif # USB_GADGET_DOWNLOAD - config USB_ETHER - bool "USB Ethernet Gadget" - depends on NET -- default y if ARCH_SUNXI && USB_MUSB_GADGET -+ default y if BOARD_SUNXI && USB_MUSB_GADGET - help - Creates an Ethernet network device through a USB peripheral - controller. This will create a network interface on both the device ---- a/drivers/usb/musb-new/Kconfig -+++ b/drivers/usb/musb-new/Kconfig -@@ -67,7 +67,7 @@ config USB_MUSB_PIC32 - - config USB_MUSB_SUNXI - bool "Enable sunxi OTG / DRC USB controller" -- depends on ARCH_SUNXI -+ depends on BOARD_SUNXI - select USB_MUSB_PIO_ONLY - default y - ---help--- ---- a/drivers/video/Kconfig -+++ b/drivers/video/Kconfig -@@ -183,7 +183,7 @@ config CONSOLE_TRUETYPE_MAX_METRICS - - config SYS_WHITE_ON_BLACK - bool "Display console as white on a black background" -- default y if ARCH_AT91 || ARCH_EXYNOS || ARCH_ROCKCHIP || ARCH_TEGRA || X86 || ARCH_SUNXI -+ default y if ARCH_AT91 || ARCH_EXYNOS || ARCH_ROCKCHIP || ARCH_TEGRA || X86 || BOARD_SUNXI - help - Normally the display is black on a white background, Enable this - option to invert this, i.e. white on a black background. This can be ---- a/drivers/watchdog/Kconfig -+++ b/drivers/watchdog/Kconfig -@@ -29,7 +29,7 @@ config WATCHDOG_TIMEOUT_MSECS - default 128000 if ARCH_MX31 || ARCH_MX5 || ARCH_MX6 - default 128000 if ARCH_MX7 || ARCH_VF610 - default 30000 if ARCH_SOCFPGA -- default 16000 if ARCH_SUNXI -+ default 16000 if BOARD_SUNXI - default 60000 - help - Watchdog timeout in msec -@@ -321,7 +321,7 @@ config WDT_STM32MP - - config WDT_SUNXI - bool "Allwinner sunxi watchdog timer support" -- depends on WDT && ARCH_SUNXI -+ depends on WDT && BOARD_SUNXI - default y - help - Enable support for the watchdog timer in Allwinner sunxi SoCs. diff --git a/lede/package/boot/uboot-d1/patches/0074-disk-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch b/lede/package/boot/uboot-d1/patches/0074-disk-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch deleted file mode 100644 index 68a3a684e0..0000000000 --- a/lede/package/boot/uboot-d1/patches/0074-disk-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 98fb93ceb936b375d7f8f2908f0703a93e27fbc4 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 6 Aug 2022 00:05:52 -0500 -Subject: [PATCH 74/90] disk: sunxi: Replace ARCH_SUNXI with BOARD_SUNXI - -This provides a unified configuration across all sunxi boards, -regardless of CPU architecture. - -Signed-off-by: Samuel Holland ---- - disk/Kconfig | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/disk/Kconfig -+++ b/disk/Kconfig -@@ -61,7 +61,7 @@ config SPL_DOS_PARTITION - bool "Enable MS Dos partition table for SPL" - depends on SPL - default n if ARCH_MVEBU -- default n if ARCH_SUNXI -+ default n if BOARD_SUNXI - default y if DOS_PARTITION - select SPL_PARTITIONS - -@@ -104,7 +104,7 @@ config EFI_PARTITION - config EFI_PARTITION_ENTRIES_NUMBERS - int "Number of the EFI partition entries" - depends on EFI_PARTITION -- default 56 if ARCH_SUNXI -+ default 56 if BOARD_SUNXI - default 128 - help - Specify the number of partition entries in the GPT. This is -@@ -132,7 +132,7 @@ config SPL_EFI_PARTITION - bool "Enable EFI GPT partition table for SPL" - depends on SPL - default n if ARCH_MVEBU -- default n if ARCH_SUNXI -+ default n if BOARD_SUNXI - default y if EFI_PARTITION - select SPL_PARTITIONS - diff --git a/lede/package/boot/uboot-d1/patches/0075-spl-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch b/lede/package/boot/uboot-d1/patches/0075-spl-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch deleted file mode 100644 index 81b6b45c73..0000000000 --- a/lede/package/boot/uboot-d1/patches/0075-spl-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch +++ /dev/null @@ -1,81 +0,0 @@ -From 7f06dca4df9302a22a8d27af887da50a67b7dd1d Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 6 Aug 2022 00:09:38 -0500 -Subject: [PATCH 75/90] spl: sunxi: Replace ARCH_SUNXI with BOARD_SUNXI - -This provides a unified configuration across all sunxi boards, -regardless of CPU architecture. - -Signed-off-by: Samuel Holland ---- - common/spl/Kconfig | 12 ++++++------ - scripts/Makefile.spl | 2 +- - 2 files changed, 7 insertions(+), 7 deletions(-) - ---- a/common/spl/Kconfig -+++ b/common/spl/Kconfig -@@ -111,7 +111,7 @@ config SPL_PAD_TO - config SPL_HAS_BSS_LINKER_SECTION - depends on SPL_FRAMEWORK - bool "Use a specific address for the BSS via the linker script" -- default y if ARCH_SUNXI || ARCH_MX6 || ARCH_OMAP2PLUS || MIPS || RISCV || ARCH_ZYNQMP -+ default y if ARCH_MX6 || ARCH_OMAP2PLUS || ARCH_ZYNQMP || BOARD_SUNXI || MIPS || RISCV - - config SPL_BSS_START_ADDR - hex "Link address for the BSS within the SPL binary" -@@ -335,7 +335,7 @@ config SPL_SYS_MALLOC_SIMPLE - config SPL_SHARES_INIT_SP_ADDR - bool "SPL and U-Boot use the same initial stack pointer location" - depends on (ARM || ARCH_JZ47XX || MICROBLAZE || RISCV) && SPL_FRAMEWORK -- default n if ARCH_SUNXI || ARCH_MX6 || ARCH_MX7 -+ default n if BOARD_SUNXI || ARCH_MX6 || ARCH_MX7 - default y - help - In many cases, we can use the same initial stack pointer address for -@@ -453,7 +453,7 @@ config SPL_DISPLAY_PRINT - - config SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR - bool "MMC raw mode: by sector" -- default y if ARCH_SUNXI || ARCH_DAVINCI || ARCH_UNIPHIER || \ -+ default y if BOARD_SUNXI || ARCH_DAVINCI || ARCH_UNIPHIER || \ - ARCH_MX6 || ARCH_MX7 || \ - ARCH_ROCKCHIP || ARCH_MVEBU || ARCH_SOCFPGA || \ - ARCH_AT91 || ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || \ -@@ -466,7 +466,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_USE_SEC - config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - hex "Address on the MMC to load U-Boot from" - depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -- default 0x40 if ARCH_SUNXI -+ default 0x40 if BOARD_SUNXI - default 0x75 if ARCH_DAVINCI - default 0x8a if ARCH_MX6 || ARCH_MX7 - default 0x100 if ARCH_UNIPHIER -@@ -483,7 +483,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - config SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET - hex "U-Boot main hardware partition image offset" - depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -- default 0x10 if ARCH_SUNXI -+ default 0x10 if BOARD_SUNXI - default 0x0 - help - On some platforms SPL location depends on hardware partition. The ROM -@@ -1308,7 +1308,7 @@ endif # SPL_SPI_FLASH_SUPPORT - - config SYS_SPI_U_BOOT_OFFS - hex "address of u-boot payload in SPI flash" -- default 0x8000 if ARCH_SUNXI -+ default 0x8000 if BOARD_SUNXI - default 0x0 - depends on SPL_SPI_LOAD || SPL_SPI_SUNXI - help ---- a/scripts/Makefile.spl -+++ b/scripts/Makefile.spl -@@ -264,7 +264,7 @@ endif - - INPUTS-$(CONFIG_TARGET_SOCFPGA_SOC64) += $(obj)/u-boot-spl-dtb.hex - --ifdef CONFIG_ARCH_SUNXI -+ifdef CONFIG_BOARD_SUNXI - INPUTS-y += $(obj)/sunxi-spl.bin - - ifdef CONFIG_NAND_SUNXI diff --git a/lede/package/boot/uboot-d1/patches/0076-riscv-cpu-Add-cache-operations-for-T-HEAD-CPUs.patch b/lede/package/boot/uboot-d1/patches/0076-riscv-cpu-Add-cache-operations-for-T-HEAD-CPUs.patch deleted file mode 100644 index 0555b6d9b4..0000000000 --- a/lede/package/boot/uboot-d1/patches/0076-riscv-cpu-Add-cache-operations-for-T-HEAD-CPUs.patch +++ /dev/null @@ -1,153 +0,0 @@ -From b6da98cd39612bb5660afbcad06e3a6bac43563e Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 11 Sep 2021 23:27:42 -0500 -Subject: [PATCH 76/90] riscv: cpu: Add cache operations for T-HEAD CPUs - -Signed-off-by: Samuel Holland ---- - arch/riscv/cpu/Makefile | 1 + - arch/riscv/cpu/thead/cache.c | 119 +++++++++++++++++++++++++++++++++++ - arch/riscv/lib/cache.c | 2 +- - 3 files changed, 121 insertions(+), 1 deletion(-) - create mode 100644 arch/riscv/cpu/thead/cache.c - ---- a/arch/riscv/cpu/Makefile -+++ b/arch/riscv/cpu/Makefile -@@ -5,3 +5,4 @@ - extra-y = start.o - - obj-y += cpu.o mtrap.o -+obj-y += thead/cache.o ---- /dev/null -+++ b/arch/riscv/cpu/thead/cache.c -@@ -0,0 +1,119 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+ -+#include -+#include -+ -+#define CSR_MHCR 0x7c1 -+#define CSR_MCOR 0x7c2 -+#define CSR_MHINT 0x7c5 -+ -+#define MHCR_IE BIT(0) /* icache enable */ -+#define MHCR_DE BIT(1) /* dcache enable */ -+#define MHCR_WA BIT(2) /* dcache write allocate */ -+#define MHCR_WB BIT(3) /* dcache write back */ -+#define MHCR_RS BIT(4) /* return stack enable */ -+#define MHCR_BPE BIT(5) /* branch prediction enable */ -+#define MHCR_BTB BIT(6) /* branch target prediction enable */ -+#define MHCR_WBR BIT(8) /* write burst enable */ -+#define MHCR_L0BTB BIT(12) -+ -+#define MCOR_CACHE_SEL_ICACHE (0x1 << 0) -+#define MCOR_CACHE_SEL_DCACHE (0x2 << 0) -+#define MCOR_CACHE_SEL_BOTH (0x3 << 0) -+#define MCOR_INV BIT(4) -+#define MCOR_CLR BIT(5) -+#define MCOR_BHT_INV BIT(16) -+#define MCOR_BTB_INV BIT(17) -+ -+#define MHINT_DPLD BIT(2) /* dcache prefetch enable */ -+#define MHINT_AMR_PAGE (0x0 << 3) -+#define MHINT_AMR_LIMIT_3 (0x1 << 3) -+#define MHINT_AMR_LIMIT_64 (0x2 << 3) -+#define MHINT_AMR_LIMIT_128 (0x3 << 3) -+#define MHINT_IPLD BIT(8) /* icache prefetch enable */ -+#define MHINT_IWPE BIT(9) /* icache prediction enable */ -+#define MHINT_DIS_PREFETCH_2 (0x0 << 13) -+#define MHINT_DIS_PREFETCH_4 (0x1 << 13) -+#define MHINT_DIS_PREFETCH_8 (0x2 << 13) -+#define MHINT_DIS_PREFETCH_16 (0x3 << 13) -+ -+#define sync_i() asm volatile (".long 0x01a0000b" ::: "memory") -+ -+void flush_dcache_all(void) -+{ -+ asm volatile (".long 0x0030000b" ::: "memory"); /* dcache.ciall */ -+ sync_i(); -+} -+ -+void flush_dcache_range(unsigned long start, unsigned long end) -+{ -+ register unsigned long i asm("a0") = start & -CONFIG_SYS_CACHELINE_SIZE; -+ -+ for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE) -+ asm volatile (".long 0x02b5000b" ::: "memory"); /* dcache.cipa a0 */ -+ sync_i(); -+} -+ -+void invalidate_icache_range(unsigned long start, unsigned long end) -+{ -+ register unsigned long i asm("a0") = start & -CONFIG_SYS_CACHELINE_SIZE; -+ -+ for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE) -+ asm volatile (".long 0x0385000b" ::: "memory"); /* icache.ipa a0 */ -+ sync_i(); -+} -+ -+void invalidate_dcache_range(unsigned long start, unsigned long end) -+{ -+ register unsigned long i asm("a0") = start & -CONFIG_SYS_CACHELINE_SIZE; -+ -+ for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE) -+ asm volatile (".long 0x02a5000b" ::: "memory"); /* dcache.ipa a0 */ -+ sync_i(); -+} -+ -+#if 0 -+void icache_enable(void) -+{ -+ asm volatile (".long 0x0100000b" ::: "memory"); /* icache.iall */ -+ sync_i(); -+ csr_set(CSR_MHCR, MHCR_IE | MHCR_RS | MHCR_BPE | MHCR_BTB | MHCR_L0BTB); -+ csr_set(CSR_MHINT, MHINT_IPLD | MHINT_IWPE); -+} -+ -+void icache_disable(void) -+{ -+ csr_clear(CSR_MHCR, MHCR_IE); -+} -+ -+int icache_status(void) -+{ -+ return csr_read(CSR_MHCR) & MHCR_IE; -+} -+ -+void dcache_enable(void) -+{ -+ asm volatile (".long 0x0020000b" ::: "memory"); /* dcache.iall */ -+ sync_i(); -+ csr_set(CSR_MHCR, MHCR_DE | MHCR_WA | MHCR_WB | MHCR_WBR); -+ csr_set(CSR_MHINT, MHINT_DPLD | MHINT_AMR_LIMIT_3); -+} -+ -+void dcache_disable(void) -+{ -+ asm volatile (".long 0x0010000b" ::: "memory"); /* dcache.call */ -+ sync_i(); -+ csr_clear(CSR_MHCR, MHCR_DE); -+} -+ -+int dcache_status(void) -+{ -+ return csr_read(CSR_MHCR) & MHCR_DE; -+} -+ -+void enable_caches(void) -+{ -+ icache_enable(); -+ dcache_enable(); -+} -+#endif ---- a/arch/riscv/lib/cache.c -+++ b/arch/riscv/lib/cache.c -@@ -20,7 +20,7 @@ __weak void flush_dcache_range(unsigned - { - } - --void invalidate_icache_range(unsigned long start, unsigned long end) -+__weak void invalidate_icache_range(unsigned long start, unsigned long end) - { - /* - * RISC-V does not have an instruction for invalidating parts of the diff --git a/lede/package/boot/uboot-d1/patches/0077-riscv-Sort-target-configs-alphabetically.patch b/lede/package/boot/uboot-d1/patches/0077-riscv-Sort-target-configs-alphabetically.patch deleted file mode 100644 index 64577d8bd6..0000000000 --- a/lede/package/boot/uboot-d1/patches/0077-riscv-Sort-target-configs-alphabetically.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 35da34adec7b5b06ad81455a21c67a9c1152e2c9 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 7 Aug 2021 12:09:35 -0500 -Subject: [PATCH 77/90] riscv: Sort target configs alphabetically - -Signed-off-by: Samuel Holland ---- - arch/riscv/Kconfig | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - ---- a/arch/riscv/Kconfig -+++ b/arch/riscv/Kconfig -@@ -14,6 +14,9 @@ config TARGET_AX25_AE350 - config TARGET_MICROCHIP_ICICLE - bool "Support Microchip PolarFire-SoC Icicle Board" - -+config TARGET_OPENPITON_RISCV64 -+ bool "Support RISC-V cores on OpenPiton SoC" -+ - config TARGET_QEMU_VIRT - bool "Support QEMU Virt Board" - -@@ -28,9 +31,6 @@ config TARGET_SIPEED_MAIX - bool "Support Sipeed Maix Board" - select SYS_CACHE_SHIFT_6 - --config TARGET_OPENPITON_RISCV64 -- bool "Support RISC-V cores on OpenPiton SoC" -- - endchoice - - config SYS_ICACHE_OFF -@@ -61,9 +61,9 @@ config SPL_SYS_DCACHE_OFF - source "board/AndesTech/ax25-ae350/Kconfig" - source "board/emulation/qemu-riscv/Kconfig" - source "board/microchip/mpfs_icicle/Kconfig" -+source "board/openpiton/riscv64/Kconfig" - source "board/sifive/unleashed/Kconfig" - source "board/sifive/unmatched/Kconfig" --source "board/openpiton/riscv64/Kconfig" - source "board/sipeed/maix/Kconfig" - - # platform-specific options below diff --git a/lede/package/boot/uboot-d1/patches/0078-riscv-Add-Allwinner-D1-devicetrees.patch b/lede/package/boot/uboot-d1/patches/0078-riscv-Add-Allwinner-D1-devicetrees.patch deleted file mode 100644 index 09054d7455..0000000000 --- a/lede/package/boot/uboot-d1/patches/0078-riscv-Add-Allwinner-D1-devicetrees.patch +++ /dev/null @@ -1,2138 +0,0 @@ -From ce792f7abd4294ebba76f76d9d7aa90c7970de8e Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 4 Aug 2022 23:35:09 -0500 -Subject: [PATCH 78/90] riscv: Add Allwinner D1 devicetrees - -Signed-off-by: Samuel Holland ---- - arch/riscv/dts/Makefile | 9 + - .../riscv/dts/sun20i-d1-clockworkpi-v3.14.dts | 242 +++++ - .../dts/sun20i-d1-common-regulators.dtsi | 51 + - arch/riscv/dts/sun20i-d1-devterm-v3.14.dts | 37 + - .../dts/sun20i-d1-dongshan-nezha-stu.dts | 114 +++ - .../dts/sun20i-d1-lichee-rv-86-panel-480p.dts | 29 + - .../dts/sun20i-d1-lichee-rv-86-panel-720p.dts | 10 + - .../dts/sun20i-d1-lichee-rv-86-panel.dtsi | 92 ++ - arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts | 74 ++ - arch/riscv/dts/sun20i-d1-lichee-rv.dts | 84 ++ - arch/riscv/dts/sun20i-d1-mangopi-mq-pro.dts | 128 +++ - arch/riscv/dts/sun20i-d1-nezha.dts | 171 ++++ - arch/riscv/dts/sun20i-d1.dtsi | 900 ++++++++++++++++++ - arch/riscv/dts/sunxi-u-boot.dtsi | 68 ++ - include/dt-bindings/clock/sun20i-d1-r-ccu.h | 19 + - include/dt-bindings/reset/sun20i-d1-r-ccu.h | 16 + - 16 files changed, 2044 insertions(+) - create mode 100644 arch/riscv/dts/sun20i-d1-clockworkpi-v3.14.dts - create mode 100644 arch/riscv/dts/sun20i-d1-common-regulators.dtsi - create mode 100644 arch/riscv/dts/sun20i-d1-devterm-v3.14.dts - create mode 100644 arch/riscv/dts/sun20i-d1-dongshan-nezha-stu.dts - create mode 100644 arch/riscv/dts/sun20i-d1-lichee-rv-86-panel-480p.dts - create mode 100644 arch/riscv/dts/sun20i-d1-lichee-rv-86-panel-720p.dts - create mode 100644 arch/riscv/dts/sun20i-d1-lichee-rv-86-panel.dtsi - create mode 100644 arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts - create mode 100644 arch/riscv/dts/sun20i-d1-lichee-rv.dts - create mode 100644 arch/riscv/dts/sun20i-d1-mangopi-mq-pro.dts - create mode 100644 arch/riscv/dts/sun20i-d1-nezha.dts - create mode 100644 arch/riscv/dts/sun20i-d1.dtsi - create mode 100644 arch/riscv/dts/sunxi-u-boot.dtsi - create mode 100644 include/dt-bindings/clock/sun20i-d1-r-ccu.h - create mode 100644 include/dt-bindings/reset/sun20i-d1-r-ccu.h - ---- a/arch/riscv/dts/Makefile -+++ b/arch/riscv/dts/Makefile -@@ -7,6 +7,15 @@ dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) + - dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb - dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb - dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb -+dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-clockworkpi-v3.14.dtb -+dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-devterm-v3.14.dtb -+dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-dongshan-nezha-stu.dtb -+dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-lichee-rv-86-panel-480p.dtb -+dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-lichee-rv-86-panel-720p.dtb -+dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-lichee-rv-dock.dtb -+dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-lichee-rv.dtb -+dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-mangopi-mq-pro.dtb -+dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-nezha.dtb - - include $(srctree)/scripts/Makefile.dts - ---- /dev/null -+++ b/arch/riscv/dts/sun20i-d1-clockworkpi-v3.14.dts -@@ -0,0 +1,242 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+// Copyright (C) 2022 Samuel Holland -+ -+/dts-v1/; -+ -+#include -+ -+#include "sun20i-d1.dtsi" -+#include "sun20i-d1-common-regulators.dtsi" -+ -+/ { -+ model = "ClockworkPi v3.14 (R-01)"; -+ compatible = "clockwork,r-01-clockworkpi-v3.14", "allwinner,sun20i-d1"; -+ -+ aliases { -+ ethernet0 = &ap6256; -+ mmc0 = &mmc0; -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ /* -+ * This regulator is PWM-controlled, but the PWM controller is not -+ * yet supported, so fix the regulator to its default voltage. -+ */ -+ reg_vdd_cpu: vdd-cpu { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd-cpu"; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; -+ vin-supply = <®_vcc>; -+ }; -+ -+ wifi_pwrseq: wifi-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&pio 6 11 GPIO_ACTIVE_LOW>; /* PG11/GPIO3 */ -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_vdd_cpu>; -+}; -+ -+&ehci1 { -+ status = "okay"; -+}; -+ -+&i2c0 { -+ pinctrl-0 = <&i2c0_pb10_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ axp221: pmic@34 { -+ compatible = "x-powers,axp228", "x-powers,axp221"; -+ reg = <0x34>; -+ interrupt-parent = <&pio>; -+ interrupts = <4 9 IRQ_TYPE_LEVEL_LOW>; /* PE9/GPIO2 */ -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ -+ ac_power_supply: ac-power { -+ compatible = "x-powers,axp221-ac-power-supply"; -+ }; -+ -+ axp_adc: adc { -+ compatible = "x-powers,axp221-adc"; -+ #io-channel-cells = <1>; -+ }; -+ -+ battery_power_supply: battery-power { -+ compatible = "x-powers,axp221-battery-power-supply"; -+ }; -+ -+ regulators { -+ x-powers,dcdc-freq = <3000>; -+ -+ reg_dcdc1: dcdc1 { -+ regulator-name = "sys-3v3"; -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ reg_dcdc3: dcdc3 { -+ regulator-name = "sys-1v8"; -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ }; -+ -+ reg_aldo1: aldo1 { -+ regulator-name = "aud-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ reg_aldo2: aldo2 { -+ regulator-name = "disp-3v3"; -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ reg_aldo3: aldo3 { -+ regulator-name = "vdd-wifi"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ }; -+ -+ /* DLDO1 and ELDO1-3 are connected in parallel. */ -+ reg_dldo1: dldo1 { -+ regulator-name = "vbat-wifi-a"; -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ /* DLDO2-DLDO4 are connected in parallel. */ -+ reg_dldo2: dldo2 { -+ regulator-name = "vcc-3v3-ext-a"; -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ reg_dldo3: dldo3 { -+ regulator-name = "vcc-3v3-ext-b"; -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ reg_dldo4: dldo4 { -+ regulator-name = "vcc-3v3-ext-c"; -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ reg_eldo1: eldo1 { -+ regulator-name = "vbat-wifi-b"; -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ reg_eldo2: eldo2 { -+ regulator-name = "vbat-wifi-c"; -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ reg_eldo3: eldo3 { -+ regulator-name = "vbat-wifi-d"; -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ }; -+ -+ usb_power_supply: usb-power { -+ compatible = "x-powers,axp221-usb-power-supply"; -+ status = "disabled"; -+ }; -+ }; -+}; -+ -+&mmc0 { -+ broken-cd; -+ bus-width = <4>; -+ disable-wp; -+ vmmc-supply = <®_dcdc1>; -+ vqmmc-supply = <®_vcc_3v3>; -+ pinctrl-0 = <&mmc0_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&mmc1 { -+ bus-width = <4>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ non-removable; -+ vmmc-supply = <®_dldo1>; -+ vqmmc-supply = <®_aldo3>; -+ pinctrl-0 = <&mmc1_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ ap6256: wifi@1 { -+ compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac"; -+ reg = <1>; -+ interrupt-parent = <&pio>; -+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10/GPIO4 */ -+ interrupt-names = "host-wake"; -+ }; -+}; -+ -+&ohci1 { -+ status = "okay"; -+}; -+ -+&pio { -+ vcc-pg-supply = <®_ldoa>; -+}; -+ -+&uart0 { -+ pinctrl-0 = <&uart0_pb8_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&uart1 { -+ uart-has-rtscts; -+ pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm4345c5"; -+ interrupt-parent = <&pio>; -+ interrupts = <6 17 IRQ_TYPE_LEVEL_HIGH>; /* PG17/GPIO6 */ -+ device-wakeup-gpios = <&pio 6 16 GPIO_ACTIVE_HIGH>; /* PG16/GPIO7 */ -+ shutdown-gpios = <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18/GPIO5 */ -+ max-speed = <1500000>; -+ vbat-supply = <®_dldo1>; -+ vddio-supply = <®_aldo3>; -+ }; -+}; -+ -+&usb_otg { -+ dr_mode = "peripheral"; -+ status = "okay"; -+}; -+ -+&usbphy { -+ usb0_vbus_power-supply = <&ac_power_supply>; -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/riscv/dts/sun20i-d1-common-regulators.dtsi -@@ -0,0 +1,51 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+// Copyright (C) 2021-2022 Samuel Holland -+ -+/ { -+ reg_vcc: vcc { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+ -+ reg_vcc_3v3: vcc-3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <®_vcc>; -+ }; -+}; -+ -+&lradc { -+ vref-supply = <®_aldo>; -+}; -+ -+&pio { -+ vcc-pb-supply = <®_vcc_3v3>; -+ vcc-pc-supply = <®_vcc_3v3>; -+ vcc-pd-supply = <®_vcc_3v3>; -+ vcc-pe-supply = <®_vcc_3v3>; -+ vcc-pf-supply = <®_vcc_3v3>; -+ vcc-pg-supply = <®_vcc_3v3>; -+}; -+ -+®_aldo { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vdd33-supply = <®_vcc_3v3>; -+}; -+ -+®_hpldo { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ hpldoin-supply = <®_vcc_3v3>; -+}; -+ -+®_ldoa { -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ ldo-in-supply = <®_vcc_3v3>; -+}; ---- /dev/null -+++ b/arch/riscv/dts/sun20i-d1-devterm-v3.14.dts -@@ -0,0 +1,37 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+// Copyright (C) 2022 Samuel Holland -+ -+/dts-v1/; -+ -+#include "sun20i-d1-clockworkpi-v3.14.dts" -+ -+/ { -+ model = "Clockwork DevTerm (R-01)"; -+ compatible = "clockwork,r-01-devterm-v3.14", -+ "clockwork,r-01-clockworkpi-v3.14", -+ "allwinner,sun20i-d1"; -+ -+ fan { -+ compatible = "gpio-fan"; -+ gpios = <&pio 3 10 GPIO_ACTIVE_HIGH>; /* PD10/GPIO41 */ -+ gpio-fan,speed-map = <0 0>, -+ <6000 1>; -+ #cooling-cells = <2>; -+ }; -+ -+ i2c-gpio-0 { -+ compatible = "i2c-gpio"; -+ sda-gpios = <&pio 3 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PD14/GPIO44 */ -+ scl-gpios = <&pio 3 15 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PD15/GPIO45 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ adc@54 { -+ compatible = "ti,adc101c"; -+ reg = <0x54>; -+ interrupt-parent = <&pio>; -+ interrupts = <4 12 IRQ_TYPE_LEVEL_LOW>; /* PE12/GPIO35 */ -+ vref-supply = <®_dldo2>; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/riscv/dts/sun20i-d1-dongshan-nezha-stu.dts -@@ -0,0 +1,114 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+// Copyright (C) 2022 Samuel Holland -+ -+/dts-v1/; -+ -+#include -+#include -+ -+#include "sun20i-d1.dtsi" -+#include "sun20i-d1-common-regulators.dtsi" -+ -+/ { -+ model = "Dongshan Nezha STU"; -+ compatible = "100ask,dongshan-nezha-stu", "allwinner,sun20i-d1"; -+ -+ aliases { -+ ethernet0 = &emac; -+ mmc0 = &mmc0; -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led-0 { -+ color = ; -+ function = LED_FUNCTION_STATUS; -+ gpios = <&pio 2 1 GPIO_ACTIVE_HIGH>; /* PC1 */ -+ }; -+ }; -+ -+ reg_usbvbus: usbvbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usbvbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */ -+ enable-active-high; -+ vin-supply = <®_vcc>; -+ }; -+ -+ /* -+ * This regulator is PWM-controlled, but the PWM controller is not -+ * yet supported, so fix the regulator to its default voltage. -+ */ -+ reg_vdd_cpu: vdd-cpu { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd-cpu"; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; -+ vin-supply = <®_vcc>; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_vdd_cpu>; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&emac { -+ pinctrl-0 = <&rgmii_pe_pins>; -+ pinctrl-names = "default"; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii-id"; -+ phy-supply = <®_vcc_3v3>; -+ status = "okay"; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; -+}; -+ -+&mmc0 { -+ broken-cd; -+ bus-width = <4>; -+ disable-wp; -+ vmmc-supply = <®_vcc_3v3>; -+ vqmmc-supply = <®_vcc_3v3>; -+ pinctrl-0 = <&mmc0_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&ohci0 { -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-0 = <&uart0_pb8_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&usb_otg { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&usbphy { -+ usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */ -+ usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */ -+ usb0_vbus-supply = <®_usbvbus>; -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel-480p.dts -@@ -0,0 +1,29 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+// Copyright (C) 2022 Samuel Holland -+ -+#include "sun20i-d1-lichee-rv-86-panel.dtsi" -+ -+/ { -+ model = "Sipeed Lichee RV 86 Panel (480p)"; -+ compatible = "sipeed,lichee-rv-86-panel-480p", "sipeed,lichee-rv", -+ "allwinner,sun20i-d1"; -+}; -+ -+&i2c2 { -+ pinctrl-0 = <&i2c2_pb0_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ touchscreen@48 { -+ compatible = "focaltech,ft6236"; -+ reg = <0x48>; -+ interrupt-parent = <&pio>; -+ interrupts = <6 14 IRQ_TYPE_LEVEL_LOW>; /* PG14 */ -+ iovcc-supply = <®_vcc_3v3>; -+ reset-gpios = <&pio 6 15 GPIO_ACTIVE_LOW>; /* PG15 */ -+ touchscreen-size-x = <480>; -+ touchscreen-size-y = <480>; -+ vcc-supply = <®_vcc_3v3>; -+ wakeup-source; -+ }; -+}; ---- /dev/null -+++ b/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel-720p.dts -@@ -0,0 +1,10 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+// Copyright (C) 2022 Samuel Holland -+ -+#include "sun20i-d1-lichee-rv-86-panel.dtsi" -+ -+/ { -+ model = "Sipeed Lichee RV 86 Panel (720p)"; -+ compatible = "sipeed,lichee-rv-86-panel-720p", "sipeed,lichee-rv", -+ "allwinner,sun20i-d1"; -+}; ---- /dev/null -+++ b/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel.dtsi -@@ -0,0 +1,92 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+// Copyright (C) 2022 Samuel Holland -+ -+#include "sun20i-d1-lichee-rv.dts" -+ -+/ { -+ aliases { -+ ethernet0 = &emac; -+ ethernet1 = &xr829; -+ }; -+ -+ /* PC1 is repurposed as BT_WAKE_AP */ -+ /delete-node/ leds; -+ -+ wifi_pwrseq: wifi-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ clocks = <&ccu CLK_FANOUT1>; -+ clock-names = "ext_clock"; -+ reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */ -+ assigned-clocks = <&ccu CLK_FANOUT1>; -+ assigned-clock-rates = <32768>; -+ pinctrl-0 = <&clk_pg11_pin>; -+ pinctrl-names = "default"; -+ }; -+}; -+ -+&ehci1 { -+ status = "okay"; -+}; -+ -+&emac { -+ pinctrl-0 = <&rmii_pe_pins>; -+ pinctrl-names = "default"; -+ phy-handle = <&ext_rmii_phy>; -+ phy-mode = "rmii"; -+ phy-supply = <®_vcc_3v3>; -+ status = "okay"; -+}; -+ -+&mdio { -+ ext_rmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ -+ }; -+}; -+ -+&mmc1 { -+ bus-width = <4>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ non-removable; -+ vmmc-supply = <®_vcc_3v3>; -+ vqmmc-supply = <®_vcc_3v3>; -+ pinctrl-0 = <&mmc1_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ xr829: wifi@1 { -+ reg = <1>; -+ }; -+}; -+ -+&ohci1 { -+ status = "okay"; -+}; -+ -+&pio { -+ clk_pg11_pin: clk-pg11-pin { -+ pins = "PG11"; -+ function = "clk"; -+ }; -+}; -+ -+&uart1 { -+ uart-has-rtscts; -+ pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ /* XR829 bluetooth is connected here */ -+}; -+ -+&usb_otg { -+ status = "disabled"; -+}; -+ -+&usbphy { -+ /* PD20 and PD21 are repurposed for the LCD panel */ -+ /delete-property/ usb0_id_det-gpios; -+ /delete-property/ usb0_vbus_det-gpios; -+ usb1_vbus-supply = <®_vcc>; -+}; ---- /dev/null -+++ b/arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts -@@ -0,0 +1,74 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+// Copyright (C) 2022 Jisheng Zhang -+// Copyright (C) 2022 Samuel Holland -+ -+#include -+ -+#include "sun20i-d1-lichee-rv.dts" -+ -+/ { -+ model = "Sipeed Lichee RV Dock"; -+ compatible = "sipeed,lichee-rv-dock", "sipeed,lichee-rv", -+ "allwinner,sun20i-d1"; -+ -+ aliases { -+ ethernet1 = &rtl8723ds; -+ }; -+ -+ wifi_pwrseq: wifi-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */ -+ }; -+}; -+ -+&ehci1 { -+ status = "okay"; -+}; -+ -+&lradc { -+ status = "okay"; -+ -+ button-220 { -+ label = "OK"; -+ linux,code = ; -+ channel = <0>; -+ voltage = <220000>; -+ }; -+}; -+ -+&mmc1 { -+ bus-width = <4>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ non-removable; -+ vmmc-supply = <®_vcc_3v3>; -+ vqmmc-supply = <®_vcc_3v3>; -+ pinctrl-0 = <&mmc1_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ rtl8723ds: wifi@1 { -+ reg = <1>; -+ }; -+}; -+ -+&ohci1 { -+ status = "okay"; -+}; -+ -+&uart1 { -+ uart-has-rtscts; -+ pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "realtek,rtl8723ds-bt"; -+ device-wake-gpios = <&pio 6 15 GPIO_ACTIVE_HIGH>; /* PG16 */ -+ enable-gpios = <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18 */ -+ host-wake-gpios = <&pio 6 17 GPIO_ACTIVE_HIGH>; /* PG17 */ -+ }; -+}; -+ -+&usbphy { -+ usb1_vbus-supply = <®_vcc>; -+}; ---- /dev/null -+++ b/arch/riscv/dts/sun20i-d1-lichee-rv.dts -@@ -0,0 +1,84 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+// Copyright (C) 2022 Jisheng Zhang -+// Copyright (C) 2022 Samuel Holland -+ -+/dts-v1/; -+ -+#include -+#include -+ -+#include "sun20i-d1.dtsi" -+#include "sun20i-d1-common-regulators.dtsi" -+ -+/ { -+ model = "Sipeed Lichee RV"; -+ compatible = "sipeed,lichee-rv", "allwinner,sun20i-d1"; -+ -+ aliases { -+ mmc0 = &mmc0; -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led-0 { -+ color = ; -+ function = LED_FUNCTION_STATUS; -+ gpios = <&pio 2 1 GPIO_ACTIVE_HIGH>; /* PC1 */ -+ }; -+ }; -+ -+ reg_vdd_cpu: vdd-cpu { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd-cpu"; -+ regulator-min-microvolt = <900000>; -+ regulator-max-microvolt = <900000>; -+ vin-supply = <®_vcc>; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_vdd_cpu>; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&mmc0 { -+ broken-cd; -+ bus-width = <4>; -+ disable-wp; -+ vmmc-supply = <®_vcc_3v3>; -+ vqmmc-supply = <®_vcc_3v3>; -+ pinctrl-0 = <&mmc0_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&ohci0 { -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-0 = <&uart0_pb8_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&usb_otg { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&usbphy { -+ usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */ -+ usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */ -+ usb0_vbus-supply = <®_vcc>; -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/riscv/dts/sun20i-d1-mangopi-mq-pro.dts -@@ -0,0 +1,128 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+// Copyright (C) 2022 Samuel Holland -+ -+/dts-v1/; -+ -+#include -+ -+#include "sun20i-d1.dtsi" -+#include "sun20i-d1-common-regulators.dtsi" -+ -+/ { -+ model = "MangoPi MQ Pro"; -+ compatible = "widora,mangopi-mq-pro", "allwinner,sun20i-d1"; -+ -+ aliases { -+ ethernet0 = &rtl8723ds; -+ mmc0 = &mmc0; -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ reg_avdd2v8: avdd2v8 { -+ compatible = "regulator-fixed"; -+ regulator-name = "avdd2v8"; -+ regulator-min-microvolt = <2800000>; -+ regulator-max-microvolt = <2800000>; -+ vin-supply = <®_vcc_3v3>; -+ }; -+ -+ reg_dvdd: dvdd { -+ compatible = "regulator-fixed"; -+ regulator-name = "dvdd"; -+ regulator-min-microvolt = <1200000>; -+ regulator-max-microvolt = <1200000>; -+ vin-supply = <®_vcc_3v3>; -+ }; -+ -+ reg_vdd_cpu: vdd-cpu { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd-cpu"; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; -+ vin-supply = <®_vcc>; -+ }; -+ -+ wifi_pwrseq: wifi-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&pio 6 17 GPIO_ACTIVE_LOW>; /* PG17 */ -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_vdd_cpu>; -+}; -+ -+&ehci1 { -+ status = "okay"; -+}; -+ -+&mmc0 { -+ bus-width = <4>; -+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ -+ disable-wp; -+ vmmc-supply = <®_vcc_3v3>; -+ vqmmc-supply = <®_vcc_3v3>; -+ pinctrl-0 = <&mmc0_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&mmc1 { -+ bus-width = <4>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ non-removable; -+ vmmc-supply = <®_vcc_3v3>; -+ vqmmc-supply = <®_vcc_3v3>; -+ pinctrl-0 = <&mmc1_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ rtl8723ds: wifi@1 { -+ reg = <1>; -+ interrupt-parent = <&pio>; -+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 */ -+ interrupt-names = "host-wake"; -+ }; -+}; -+ -+&ohci1 { -+ status = "okay"; -+}; -+ -+&pio { -+ vcc-pe-supply = <®_avdd2v8>; -+}; -+ -+&uart0 { -+ pinctrl-0 = <&uart0_pb8_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&uart1 { -+ uart-has-rtscts; -+ pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "realtek,rtl8723ds-bt"; -+ device-wake-gpios = <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18 */ -+ enable-gpios = <&pio 6 15 GPIO_ACTIVE_HIGH>; /* PG15 */ -+ host-wake-gpios = <&pio 6 14 GPIO_ACTIVE_HIGH>; /* PG14 */ -+ }; -+}; -+ -+&usb_otg { -+ dr_mode = "peripheral"; -+ status = "okay"; -+}; -+ -+&usbphy { -+ usb0_vbus-supply = <®_vcc>; -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/riscv/dts/sun20i-d1-nezha.dts -@@ -0,0 +1,171 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+// Copyright (C) 2021-2022 Samuel Holland -+ -+/dts-v1/; -+ -+#include -+#include -+ -+#include "sun20i-d1.dtsi" -+#include "sun20i-d1-common-regulators.dtsi" -+ -+/ { -+ model = "Allwinner D1 Nezha"; -+ compatible = "allwinner,d1-nezha", "allwinner,sun20i-d1"; -+ -+ aliases { -+ ethernet0 = &emac; -+ ethernet1 = &xr829; -+ mmc0 = &mmc0; -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ reg_usbvbus: usbvbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usbvbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */ -+ enable-active-high; -+ vin-supply = <®_vcc>; -+ }; -+ -+ /* -+ * This regulator is PWM-controlled, but the PWM controller is not -+ * yet supported, so fix the regulator to its default voltage. -+ */ -+ reg_vdd_cpu: vdd-cpu { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd-cpu"; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; -+ vin-supply = <®_vcc>; -+ }; -+ -+ wifi_pwrseq: wifi-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */ -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_vdd_cpu>; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&ehci1 { -+ status = "okay"; -+}; -+ -+&emac { -+ pinctrl-0 = <&rgmii_pe_pins>; -+ pinctrl-names = "default"; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii-id"; -+ phy-supply = <®_vcc_3v3>; -+ status = "okay"; -+}; -+ -+&i2c2 { -+ pinctrl-0 = <&i2c2_pb0_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ pcf8574a: gpio@38 { -+ compatible = "nxp,pcf8574a"; -+ reg = <0x38>; -+ interrupt-parent = <&pio>; -+ interrupts = <1 2 IRQ_TYPE_LEVEL_LOW>; /* PB2 */ -+ interrupt-controller; -+ gpio-controller; -+ #gpio-cells = <2>; -+ #interrupt-cells = <2>; -+ }; -+}; -+ -+&lradc { -+ status = "okay"; -+ -+ button-160 { -+ label = "OK"; -+ linux,code = ; -+ channel = <0>; -+ voltage = <160000>; -+ }; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; -+}; -+ -+&mmc0 { -+ bus-width = <4>; -+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ -+ disable-wp; -+ vmmc-supply = <®_vcc_3v3>; -+ vqmmc-supply = <®_vcc_3v3>; -+ pinctrl-0 = <&mmc0_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&mmc1 { -+ bus-width = <4>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ non-removable; -+ vmmc-supply = <®_vcc_3v3>; -+ vqmmc-supply = <®_vcc_3v3>; -+ pinctrl-0 = <&mmc1_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ xr829: wifi@1 { -+ reg = <1>; -+ }; -+}; -+ -+&ohci0 { -+ status = "okay"; -+}; -+ -+&ohci1 { -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-0 = <&uart0_pb8_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&uart1 { -+ uart-has-rtscts; -+ pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ /* XR829 bluetooth is connected here */ -+}; -+ -+&usb_otg { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&usbphy { -+ usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */ -+ usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */ -+ usb0_vbus-supply = <®_usbvbus>; -+ usb1_vbus-supply = <®_vcc>; -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/riscv/dts/sun20i-d1.dtsi -@@ -0,0 +1,900 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+// Copyright (C) 2021-2022 Samuel Holland -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/ { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ cpus { -+ timebase-frequency = <24000000>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ cpu0: cpu@0 { -+ compatible = "thead,c906", "riscv"; -+ device_type = "cpu"; -+ reg = <0>; -+ clocks = <&ccu CLK_RISCV>; -+ clock-frequency = <24000000>; -+ d-cache-block-size = <64>; -+ d-cache-sets = <256>; -+ d-cache-size = <32768>; -+ i-cache-block-size = <64>; -+ i-cache-sets = <128>; -+ i-cache-size = <32768>; -+ mmu-type = "riscv,sv39"; -+ riscv,isa = "rv64imafdc"; -+ #cooling-cells = <2>; -+ -+ cpu0_intc: interrupt-controller { -+ compatible = "riscv,cpu-intc"; -+ interrupt-controller; -+ #address-cells = <0>; -+ #interrupt-cells = <1>; -+ }; -+ }; -+ }; -+ -+ de: display-engine { -+ compatible = "allwinner,sun20i-d1-display-engine"; -+ allwinner,pipelines = <&mixer0>, <&mixer1>; -+ status = "disabled"; -+ }; -+ -+ osc24M: osc24M-clk { -+ compatible = "fixed-clock"; -+ clock-frequency = <24000000>; -+ clock-output-names = "osc24M"; -+ #clock-cells = <0>; -+ }; -+ -+ soc { -+ compatible = "simple-bus"; -+ ranges; -+ interrupt-parent = <&plic>; -+ dma-noncoherent; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ dsp_wdt: watchdog@1700400 { -+ compatible = "allwinner,sun20i-d1-wdt"; -+ reg = <0x1700400 0x20>; -+ interrupts = <138 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&osc24M>, <&rtc CLK_OSC32K>; -+ clock-names = "hosc", "losc"; -+ status = "reserved"; -+ }; -+ -+ pio: pinctrl@2000000 { -+ compatible = "allwinner,sun20i-d1-pinctrl"; -+ reg = <0x2000000 0x800>; -+ interrupts = <85 IRQ_TYPE_LEVEL_HIGH>, -+ <87 IRQ_TYPE_LEVEL_HIGH>, -+ <89 IRQ_TYPE_LEVEL_HIGH>, -+ <91 IRQ_TYPE_LEVEL_HIGH>, -+ <93 IRQ_TYPE_LEVEL_HIGH>, -+ <95 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_APB0>, -+ <&osc24M>, -+ <&rtc CLK_OSC32K>; -+ clock-names = "apb", "hosc", "losc"; -+ gpio-controller; -+ interrupt-controller; -+ #gpio-cells = <3>; -+ #interrupt-cells = <3>; -+ -+ /omit-if-no-ref/ -+ i2c0_pb10_pins: i2c0-pb10-pins { -+ pins = "PB10", "PB11"; -+ function = "i2c0"; -+ }; -+ -+ /omit-if-no-ref/ -+ i2c2_pb0_pins: i2c2-pb0-pins { -+ pins = "PB0", "PB1"; -+ function = "i2c2"; -+ }; -+ -+ /omit-if-no-ref/ -+ lcd_rgb666_pins: lcd-rgb666-pins { -+ pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", -+ "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", -+ "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", -+ "PD18", "PD19", "PD20", "PD21"; -+ function = "lcd0"; -+ }; -+ -+ /omit-if-no-ref/ -+ mmc0_pins: mmc0-pins { -+ pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; -+ function = "mmc0"; -+ }; -+ -+ /omit-if-no-ref/ -+ mmc1_pins: mmc1-pins { -+ pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; -+ function = "mmc1"; -+ }; -+ -+ /omit-if-no-ref/ -+ mmc2_pins: mmc2-pins { -+ pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; -+ function = "mmc2"; -+ }; -+ -+ /omit-if-no-ref/ -+ rgmii_pe_pins: rgmii-pe-pins { -+ pins = "PE0", "PE1", "PE2", "PE3", "PE4", -+ "PE5", "PE6", "PE7", "PE8", "PE9", -+ "PE11", "PE12", "PE13", "PE14", "PE15"; -+ function = "emac"; -+ }; -+ -+ /omit-if-no-ref/ -+ rmii_pe_pins: rmii-pe-pins { -+ pins = "PE0", "PE1", "PE2", "PE3", "PE4", -+ "PE5", "PE6", "PE7", "PE8", "PE9"; -+ function = "emac"; -+ }; -+ -+ /omit-if-no-ref/ -+ uart0_pb8_pins: uart0-pb8-pins { -+ pins = "PB8", "PB9"; -+ function = "uart0"; -+ }; -+ -+ /omit-if-no-ref/ -+ uart1_pg6_pins: uart1-pg6-pins { -+ pins = "PG6", "PG7"; -+ function = "uart1"; -+ }; -+ -+ /omit-if-no-ref/ -+ uart1_pg8_rts_cts_pins: uart1-pg8-rts-cts-pins { -+ pins = "PG8", "PG9"; -+ function = "uart1"; -+ }; -+ }; -+ -+ ccu: clock-controller@2001000 { -+ compatible = "allwinner,sun20i-d1-ccu"; -+ reg = <0x2001000 0x1000>; -+ clocks = <&osc24M>, -+ <&rtc CLK_OSC32K>, -+ <&rtc CLK_IOSC>; -+ clock-names = "hosc", "losc", "iosc"; -+ #clock-cells = <1>; -+ #reset-cells = <1>; -+ }; -+ -+ lradc: keys@2009800 { -+ compatible = "allwinner,sun20i-d1-lradc", -+ "allwinner,sun50i-r329-lradc"; -+ reg = <0x2009800 0x400>; -+ interrupts = <77 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_LRADC>; -+ resets = <&ccu RST_BUS_LRADC>; -+ status = "disabled"; -+ }; -+ -+ codec: audio-codec@2030000 { -+ compatible = "simple-mfd", "syscon"; -+ reg = <0x2030000 0x1000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ regulators@2030348 { -+ compatible = "allwinner,sun20i-d1-analog-ldos"; -+ reg = <0x2030348 0x4>; -+ nvmem-cells = <&bg_trim>; -+ nvmem-cell-names = "bg_trim"; -+ -+ reg_aldo: aldo { -+ }; -+ -+ reg_hpldo: hpldo { -+ }; -+ }; -+ }; -+ -+ i2s0: i2s@2032000 { -+ compatible = "allwinner,sun20i-d1-i2s", -+ "allwinner,sun50i-r329-i2s"; -+ reg = <0x2032000 0x1000>; -+ interrupts = <42 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_I2S0>, -+ <&ccu CLK_I2S0>; -+ clock-names = "apb", "mod"; -+ resets = <&ccu RST_BUS_I2S0>; -+ dmas = <&dma 3>, <&dma 3>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ #sound-dai-cells = <0>; -+ }; -+ -+ i2s1: i2s@2033000 { -+ compatible = "allwinner,sun20i-d1-i2s", -+ "allwinner,sun50i-r329-i2s"; -+ reg = <0x2033000 0x1000>; -+ interrupts = <43 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_I2S1>, -+ <&ccu CLK_I2S1>; -+ clock-names = "apb", "mod"; -+ resets = <&ccu RST_BUS_I2S1>; -+ dmas = <&dma 4>, <&dma 4>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ #sound-dai-cells = <0>; -+ }; -+ -+ i2s2: i2s@2034000 { -+ compatible = "allwinner,sun20i-d1-i2s", -+ "allwinner,sun50i-r329-i2s"; -+ reg = <0x2034000 0x1000>; -+ interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_I2S2>, -+ <&ccu CLK_I2S2>; -+ clock-names = "apb", "mod"; -+ resets = <&ccu RST_BUS_I2S2>; -+ dmas = <&dma 5>, <&dma 5>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ #sound-dai-cells = <0>; -+ }; -+ -+ timer: timer@2050000 { -+ compatible = "allwinner,sun20i-d1-timer", -+ "allwinner,sun8i-a23-timer"; -+ reg = <0x2050000 0xa0>; -+ interrupts = <75 IRQ_TYPE_LEVEL_HIGH>, -+ <76 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&osc24M>; -+ }; -+ -+ wdt: watchdog@20500a0 { -+ compatible = "allwinner,sun20i-d1-wdt-reset", -+ "allwinner,sun20i-d1-wdt"; -+ reg = <0x20500a0 0x20>; -+ interrupts = <79 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&osc24M>, <&rtc CLK_OSC32K>; -+ clock-names = "hosc", "losc"; -+ status = "reserved"; -+ }; -+ -+ uart0: serial@2500000 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x2500000 0x400>; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_UART0>; -+ resets = <&ccu RST_BUS_UART0>; -+ dmas = <&dma 14>, <&dma 14>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ }; -+ -+ uart1: serial@2500400 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x2500400 0x400>; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_UART1>; -+ resets = <&ccu RST_BUS_UART1>; -+ dmas = <&dma 15>, <&dma 15>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ }; -+ -+ uart2: serial@2500800 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x2500800 0x400>; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_UART2>; -+ resets = <&ccu RST_BUS_UART2>; -+ dmas = <&dma 16>, <&dma 16>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ }; -+ -+ uart3: serial@2500c00 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x2500c00 0x400>; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_UART3>; -+ resets = <&ccu RST_BUS_UART3>; -+ dmas = <&dma 17>, <&dma 17>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ }; -+ -+ uart4: serial@2501000 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x2501000 0x400>; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_UART4>; -+ resets = <&ccu RST_BUS_UART4>; -+ dmas = <&dma 18>, <&dma 18>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ }; -+ -+ uart5: serial@2501400 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x2501400 0x400>; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ interrupts = <23 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_UART5>; -+ resets = <&ccu RST_BUS_UART5>; -+ dmas = <&dma 19>, <&dma 19>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ }; -+ -+ i2c0: i2c@2502000 { -+ compatible = "allwinner,sun20i-d1-i2c", -+ "allwinner,sun8i-v536-i2c", -+ "allwinner,sun6i-a31-i2c"; -+ reg = <0x2502000 0x400>; -+ interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_I2C0>; -+ resets = <&ccu RST_BUS_I2C0>; -+ dmas = <&dma 43>, <&dma 43>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2c1: i2c@2502400 { -+ compatible = "allwinner,sun20i-d1-i2c", -+ "allwinner,sun8i-v536-i2c", -+ "allwinner,sun6i-a31-i2c"; -+ reg = <0x2502400 0x400>; -+ interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_I2C1>; -+ resets = <&ccu RST_BUS_I2C1>; -+ dmas = <&dma 44>, <&dma 44>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2c2: i2c@2502800 { -+ compatible = "allwinner,sun20i-d1-i2c", -+ "allwinner,sun8i-v536-i2c", -+ "allwinner,sun6i-a31-i2c"; -+ reg = <0x2502800 0x400>; -+ interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_I2C2>; -+ resets = <&ccu RST_BUS_I2C2>; -+ dmas = <&dma 45>, <&dma 45>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2c3: i2c@2502c00 { -+ compatible = "allwinner,sun20i-d1-i2c", -+ "allwinner,sun8i-v536-i2c", -+ "allwinner,sun6i-a31-i2c"; -+ reg = <0x2502c00 0x400>; -+ interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_I2C3>; -+ resets = <&ccu RST_BUS_I2C3>; -+ dmas = <&dma 46>, <&dma 46>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ syscon: syscon@3000000 { -+ compatible = "allwinner,sun20i-d1-system-control"; -+ reg = <0x3000000 0x1000>; -+ ranges; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ regulators@3000150 { -+ compatible = "allwinner,sun20i-d1-system-ldos"; -+ reg = <0x3000150 0x4>; -+ -+ reg_ldoa: ldoa { -+ }; -+ -+ reg_ldob: ldob { -+ }; -+ }; -+ }; -+ -+ dma: dma-controller@3002000 { -+ compatible = "allwinner,sun20i-d1-dma"; -+ reg = <0x3002000 0x1000>; -+ interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>; -+ clock-names = "bus", "mbus"; -+ resets = <&ccu RST_BUS_DMA>; -+ dma-channels = <16>; -+ dma-requests = <48>; -+ #dma-cells = <1>; -+ }; -+ -+ sid: efuse@3006000 { -+ compatible = "allwinner,sun20i-d1-sid"; -+ reg = <0x3006000 0x1000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ ths_calib: ths-calib@14 { -+ reg = <0x14 0x4>; -+ }; -+ -+ bg_trim: bg-trim@28 { -+ reg = <0x28 0x4>; -+ bits = <16 8>; -+ }; -+ }; -+ -+ mbus: dram-controller@3102000 { -+ compatible = "allwinner,sun20i-d1-mbus"; -+ reg = <0x3102000 0x1000>, -+ <0x3103000 0x1000>; -+ reg-names = "mbus", "dram"; -+ interrupts = <59 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_MBUS>, -+ <&ccu CLK_DRAM>, -+ <&ccu CLK_BUS_DRAM>; -+ clock-names = "mbus", "dram", "bus"; -+ dma-ranges = <0 0x40000000 0x80000000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ #interconnect-cells = <1>; -+ }; -+ -+ mmc0: mmc@4020000 { -+ compatible = "allwinner,sun20i-d1-mmc"; -+ reg = <0x4020000 0x1000>; -+ interrupts = <56 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; -+ clock-names = "ahb", "mmc"; -+ resets = <&ccu RST_BUS_MMC0>; -+ reset-names = "ahb"; -+ cap-sd-highspeed; -+ max-frequency = <150000000>; -+ no-mmc; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ mmc1: mmc@4021000 { -+ compatible = "allwinner,sun20i-d1-mmc"; -+ reg = <0x4021000 0x1000>; -+ interrupts = <57 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; -+ clock-names = "ahb", "mmc"; -+ resets = <&ccu RST_BUS_MMC1>; -+ reset-names = "ahb"; -+ cap-sd-highspeed; -+ max-frequency = <150000000>; -+ no-mmc; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ mmc2: mmc@4022000 { -+ compatible = "allwinner,sun20i-d1-emmc", -+ "allwinner,sun50i-a100-emmc"; -+ reg = <0x4022000 0x1000>; -+ interrupts = <58 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; -+ clock-names = "ahb", "mmc"; -+ resets = <&ccu RST_BUS_MMC2>; -+ reset-names = "ahb"; -+ cap-mmc-highspeed; -+ max-frequency = <150000000>; -+ mmc-ddr-1_8v; -+ mmc-ddr-3_3v; -+ no-sd; -+ no-sdio; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ usb_otg: usb@4100000 { -+ compatible = "allwinner,sun20i-d1-musb", -+ "allwinner,sun8i-a33-musb"; -+ reg = <0x4100000 0x400>; -+ interrupts = <45 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "mc"; -+ clocks = <&ccu CLK_BUS_OTG>; -+ resets = <&ccu RST_BUS_OTG>; -+ extcon = <&usbphy 0>; -+ phys = <&usbphy 0>; -+ phy-names = "usb"; -+ status = "disabled"; -+ }; -+ -+ usbphy: phy@4100400 { -+ compatible = "allwinner,sun20i-d1-usb-phy"; -+ reg = <0x4100400 0x100>, -+ <0x4101800 0x100>, -+ <0x4200800 0x100>; -+ reg-names = "phy_ctrl", -+ "pmu0", -+ "pmu1"; -+ clocks = <&osc24M>, -+ <&osc24M>; -+ clock-names = "usb0_phy", -+ "usb1_phy"; -+ resets = <&ccu RST_USB_PHY0>, -+ <&ccu RST_USB_PHY1>; -+ reset-names = "usb0_reset", -+ "usb1_reset"; -+ status = "disabled"; -+ #phy-cells = <1>; -+ }; -+ -+ ehci0: usb@4101000 { -+ compatible = "allwinner,sun20i-d1-ehci", -+ "generic-ehci"; -+ reg = <0x4101000 0x100>; -+ interrupts = <46 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_OHCI0>, -+ <&ccu CLK_BUS_EHCI0>, -+ <&ccu CLK_USB_OHCI0>; -+ resets = <&ccu RST_BUS_OHCI0>, -+ <&ccu RST_BUS_EHCI0>; -+ phys = <&usbphy 0>; -+ phy-names = "usb"; -+ status = "disabled"; -+ }; -+ -+ ohci0: usb@4101400 { -+ compatible = "allwinner,sun20i-d1-ohci", -+ "generic-ohci"; -+ reg = <0x4101400 0x100>; -+ interrupts = <47 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_OHCI0>, -+ <&ccu CLK_USB_OHCI0>; -+ resets = <&ccu RST_BUS_OHCI0>; -+ phys = <&usbphy 0>; -+ phy-names = "usb"; -+ status = "disabled"; -+ }; -+ -+ ehci1: usb@4200000 { -+ compatible = "allwinner,sun20i-d1-ehci", -+ "generic-ehci"; -+ reg = <0x4200000 0x100>; -+ interrupts = <49 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_OHCI1>, -+ <&ccu CLK_BUS_EHCI1>, -+ <&ccu CLK_USB_OHCI1>; -+ resets = <&ccu RST_BUS_OHCI1>, -+ <&ccu RST_BUS_EHCI1>; -+ phys = <&usbphy 1>; -+ phy-names = "usb"; -+ status = "disabled"; -+ }; -+ -+ ohci1: usb@4200400 { -+ compatible = "allwinner,sun20i-d1-ohci", -+ "generic-ohci"; -+ reg = <0x4200400 0x100>; -+ interrupts = <50 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_OHCI1>, -+ <&ccu CLK_USB_OHCI1>; -+ resets = <&ccu RST_BUS_OHCI1>; -+ phys = <&usbphy 1>; -+ phy-names = "usb"; -+ status = "disabled"; -+ }; -+ -+ emac: ethernet@4500000 { -+ compatible = "allwinner,sun20i-d1-emac", -+ "allwinner,sun50i-a64-emac"; -+ reg = <0x4500000 0x10000>; -+ interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "macirq"; -+ clocks = <&ccu CLK_BUS_EMAC>; -+ clock-names = "stmmaceth"; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "stmmaceth"; -+ syscon = <&syscon>; -+ status = "disabled"; -+ -+ mdio: mdio { -+ compatible = "snps,dwmac-mdio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ }; -+ -+ display_clocks: clock-controller@5000000 { -+ compatible = "allwinner,sun20i-d1-de2-clk", -+ "allwinner,sun50i-h5-de2-clk"; -+ reg = <0x5000000 0x10000>; -+ clocks = <&ccu CLK_BUS_DE>, <&ccu CLK_DE>; -+ clock-names = "bus", "mod"; -+ resets = <&ccu RST_BUS_DE>; -+ #clock-cells = <1>; -+ #reset-cells = <1>; -+ }; -+ -+ mixer0: mixer@5100000 { -+ compatible = "allwinner,sun20i-d1-de2-mixer-0"; -+ reg = <0x5100000 0x100000>; -+ clocks = <&display_clocks CLK_BUS_MIXER0>, -+ <&display_clocks CLK_MIXER0>; -+ clock-names = "bus", "mod"; -+ resets = <&display_clocks RST_MIXER0>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mixer0_out: port@1 { -+ reg = <1>; -+ -+ mixer0_out_tcon_top_mixer0: endpoint { -+ remote-endpoint = <&tcon_top_mixer0_in_mixer0>; -+ }; -+ }; -+ }; -+ }; -+ -+ mixer1: mixer@5200000 { -+ compatible = "allwinner,sun20i-d1-de2-mixer-1"; -+ reg = <0x5200000 0x100000>; -+ clocks = <&display_clocks CLK_BUS_MIXER1>, -+ <&display_clocks CLK_MIXER1>; -+ clock-names = "bus", "mod"; -+ resets = <&display_clocks RST_MIXER1>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mixer1_out: port@1 { -+ reg = <1>; -+ -+ mixer1_out_tcon_top_mixer1: endpoint { -+ remote-endpoint = <&tcon_top_mixer1_in_mixer1>; -+ }; -+ }; -+ }; -+ }; -+ -+ tcon_top: tcon-top@5460000 { -+ compatible = "allwinner,sun20i-d1-tcon-top"; -+ reg = <0x5460000 0x1000>; -+ clocks = <&ccu CLK_BUS_DPSS_TOP>, -+ <&ccu CLK_TCON_TV>, -+ <&ccu CLK_TVE>, -+ <&ccu CLK_TCON_LCD0>; -+ clock-names = "bus", "tcon-tv0", "tve0", "dsi"; -+ clock-output-names = "tcon-top-tv0", "tcon-top-dsi"; -+ resets = <&ccu RST_BUS_DPSS_TOP>; -+ #clock-cells = <1>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ tcon_top_mixer0_in: port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ tcon_top_mixer0_in_mixer0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&mixer0_out_tcon_top_mixer0>; -+ }; -+ }; -+ -+ tcon_top_mixer0_out: port@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer0>; -+ }; -+ -+ tcon_top_mixer0_out_tcon_tv0: endpoint@2 { -+ reg = <2>; -+ remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>; -+ }; -+ }; -+ -+ tcon_top_mixer1_in: port@2 { -+ reg = <2>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ tcon_top_mixer1_in_mixer1: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&mixer1_out_tcon_top_mixer1>; -+ }; -+ }; -+ -+ tcon_top_mixer1_out: port@3 { -+ reg = <3>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ tcon_top_mixer1_out_tcon_lcd0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer1>; -+ }; -+ -+ tcon_top_mixer1_out_tcon_tv0: endpoint@2 { -+ reg = <2>; -+ remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>; -+ }; -+ }; -+ -+ tcon_top_hdmi_in: port@4 { -+ reg = <4>; -+ -+ tcon_top_hdmi_in_tcon_tv0: endpoint { -+ remote-endpoint = <&tcon_tv0_out_tcon_top_hdmi>; -+ }; -+ }; -+ -+ tcon_top_hdmi_out: port@5 { -+ reg = <5>; -+ }; -+ }; -+ }; -+ -+ tcon_lcd0: lcd-controller@5461000 { -+ compatible = "allwinner,sun20i-d1-tcon-lcd"; -+ reg = <0x5461000 0x1000>; -+ interrupts = <106 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_TCON_LCD0>, -+ <&ccu CLK_TCON_LCD0>; -+ clock-names = "ahb", "tcon-ch0"; -+ clock-output-names = "tcon-pixel-clock"; -+ resets = <&ccu RST_BUS_TCON_LCD0>, -+ <&ccu RST_BUS_LVDS0>; -+ reset-names = "lcd", "lvds"; -+ #clock-cells = <0>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ tcon_lcd0_in: port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ tcon_lcd0_in_tcon_top_mixer0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&tcon_top_mixer0_out_tcon_lcd0>; -+ }; -+ -+ tcon_lcd0_in_tcon_top_mixer1: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&tcon_top_mixer1_out_tcon_lcd0>; -+ }; -+ }; -+ -+ tcon_lcd0_out: port@1 { -+ reg = <1>; -+ }; -+ }; -+ }; -+ -+ tcon_tv0: lcd-controller@5470000 { -+ compatible = "allwinner,sun20i-d1-tcon-tv"; -+ reg = <0x5470000 0x1000>; -+ interrupts = <107 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_TCON_TV>, -+ <&tcon_top CLK_TCON_TOP_TV0>; -+ clock-names = "ahb", "tcon-ch1"; -+ resets = <&ccu RST_BUS_TCON_TV>; -+ reset-names = "lcd"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ tcon_tv0_in: port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ tcon_tv0_in_tcon_top_mixer0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>; -+ }; -+ -+ tcon_tv0_in_tcon_top_mixer1: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>; -+ }; -+ }; -+ -+ tcon_tv0_out: port@1 { -+ reg = <1>; -+ -+ tcon_tv0_out_tcon_top_hdmi: endpoint { -+ remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>; -+ }; -+ }; -+ }; -+ }; -+ -+ riscv_wdt: watchdog@6011000 { -+ compatible = "allwinner,sun20i-d1-wdt"; -+ reg = <0x6011000 0x20>; -+ interrupts = <147 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&osc24M>, <&rtc CLK_OSC32K>; -+ clock-names = "hosc", "losc"; -+ }; -+ -+ r_ccu: clock-controller@7010000 { -+ compatible = "allwinner,sun20i-d1-r-ccu"; -+ reg = <0x7010000 0x400>; -+ clocks = <&osc24M>, -+ <&rtc CLK_OSC32K>, -+ <&rtc CLK_IOSC>, -+ <&ccu CLK_PLL_PERIPH0_DIV3>; -+ clock-names = "hosc", "losc", "iosc", "pll-periph"; -+ #clock-cells = <1>; -+ #reset-cells = <1>; -+ }; -+ -+ rtc: rtc@7090000 { -+ compatible = "allwinner,sun20i-d1-rtc", -+ "allwinner,sun50i-r329-rtc"; -+ reg = <0x7090000 0x400>; -+ interrupts = <160 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&r_ccu CLK_BUS_R_RTC>, -+ <&osc24M>, -+ <&r_ccu CLK_R_AHB>; -+ clock-names = "bus", "hosc", "ahb"; -+ #clock-cells = <1>; -+ }; -+ -+ plic: interrupt-controller@10000000 { -+ compatible = "allwinner,sun20i-d1-plic", -+ "thead,c900-plic"; -+ reg = <0x10000000 0x4000000>; -+ interrupts-extended = <&cpu0_intc 11>, -+ <&cpu0_intc 9>; -+ interrupt-controller; -+ riscv,ndev = <176>; -+ #address-cells = <0>; -+ #interrupt-cells = <2>; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/riscv/dts/sunxi-u-boot.dtsi -@@ -0,0 +1,68 @@ -+// SPDX-License-Identifier: (GPL-2.0 OR MIT) -+ -+#include "binman.dtsi" -+ -+/ { -+ cpus { -+ u-boot,dm-spl; -+ }; -+ -+ soc { -+ u-boot,dm-spl; -+ }; -+}; -+ -+&binman { -+ u-boot-sunxi-with-spl { -+ filename = "u-boot-sunxi-with-spl.bin"; -+ pad-byte = <0xff>; -+ -+ blob@0 { -+ filename = "spl/sunxi-spl.bin"; -+ }; -+ -+ blob@1 { -+ filename = "u-boot.itb"; -+ }; -+ }; -+}; -+ -+&ccu { -+ u-boot,dm-spl; -+}; -+ -+&cpu0 { -+ u-boot,dm-spl; -+}; -+ -+&mbus { -+ u-boot,dm-spl; -+}; -+ -+&mmc0 { -+ u-boot,dm-spl; -+}; -+ -+&mmc0_pins { -+ u-boot,dm-spl; -+}; -+ -+&osc24M { -+ u-boot,dm-spl; -+}; -+ -+&pio { -+ u-boot,dm-spl; -+}; -+ -+&rtc { -+ u-boot,dm-spl; -+}; -+ -+&uart0 { -+ u-boot,dm-spl; -+}; -+ -+&uart0_pb8_pins { -+ u-boot,dm-spl; -+}; ---- /dev/null -+++ b/include/dt-bindings/clock/sun20i-d1-r-ccu.h -@@ -0,0 +1,19 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ -+/* -+ * Copyright (C) 2021 Samuel Holland -+ */ -+ -+#ifndef _DT_BINDINGS_CLK_SUN20I_D1_R_CCU_H_ -+#define _DT_BINDINGS_CLK_SUN20I_D1_R_CCU_H_ -+ -+#define CLK_R_AHB 0 -+ -+#define CLK_BUS_R_TIMER 2 -+#define CLK_BUS_R_TWD 3 -+#define CLK_BUS_R_PPU 4 -+#define CLK_R_IR_RX 5 -+#define CLK_BUS_R_IR_RX 6 -+#define CLK_BUS_R_RTC 7 -+#define CLK_BUS_R_CPUCFG 8 -+ -+#endif /* _DT_BINDINGS_CLK_SUN20I_D1_R_CCU_H_ */ ---- /dev/null -+++ b/include/dt-bindings/reset/sun20i-d1-r-ccu.h -@@ -0,0 +1,16 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ -+/* -+ * Copyright (C) 2021 Samuel Holland -+ */ -+ -+#ifndef _DT_BINDINGS_RST_SUN20I_D1_R_CCU_H_ -+#define _DT_BINDINGS_RST_SUN20I_D1_R_CCU_H_ -+ -+#define RST_BUS_R_TIMER 0 -+#define RST_BUS_R_TWD 1 -+#define RST_BUS_R_PPU 2 -+#define RST_BUS_R_IR_RX 3 -+#define RST_BUS_R_RTC 4 -+#define RST_BUS_R_CPUCFG 5 -+ -+#endif /* _DT_BINDINGS_RST_SUN20I_D1_R_CCU_H_ */ diff --git a/lede/package/boot/uboot-d1/patches/0079-riscv-Add-CONFIG_TARGET_SUN20I_D1.patch b/lede/package/boot/uboot-d1/patches/0079-riscv-Add-CONFIG_TARGET_SUN20I_D1.patch deleted file mode 100644 index a3678243c1..0000000000 --- a/lede/package/boot/uboot-d1/patches/0079-riscv-Add-CONFIG_TARGET_SUN20I_D1.patch +++ /dev/null @@ -1,169 +0,0 @@ -From 6b0c83a5c7b9189fb1c5cf56145ec4882d9e5588 Mon Sep 17 00:00:00 2001 -From: Zoltan HERPAI -Date: Tue, 6 Jun 2023 18:13:34 +0000 -Subject: [PATCH 79/90] riscv: Add CONFIG_TARGET_SUN20I_D1 - -Signed-off-by: Samuel Holland -Signed-off-by: Zoltan HERPAI ---- - arch/riscv/Kconfig | 5 +++++ - board/sunxi/Kconfig | 30 +++++++++++++++++++++++++++--- - common/spl/Kconfig | 1 + - drivers/clk/sunxi/Kconfig | 1 + - include/configs/sun20i.h | 11 +++++++++++ - 5 files changed, 45 insertions(+), 3 deletions(-) - create mode 100644 include/configs/sun20i.h - ---- a/arch/riscv/Kconfig -+++ b/arch/riscv/Kconfig -@@ -31,6 +31,11 @@ config TARGET_SIPEED_MAIX - bool "Support Sipeed Maix Board" - select SYS_CACHE_SHIFT_6 - -+config TARGET_SUN20I_D1 -+ bool "Support Allwinner D1 Boards" -+ select BOARD_SUNXI -+ select SYS_CACHE_SHIFT_6 -+ - endchoice - - config SYS_ICACHE_OFF ---- a/board/sunxi/Kconfig -+++ b/board/sunxi/Kconfig -@@ -13,8 +13,18 @@ config BOARD_SUNXI - select DM_SERIAL if SERIAL - select DM_SPI if SPI - select DM_SPI_FLASH if SPI -+ select GENERIC_RISCV if RISCV - select OF_BOARD_SETUP - select PINCTRL -+ select RAM if SPL_DM -+ select SPL_CLK if SPL_DM -+ select SPL_DM if RISCV && SPL -+ select SPL_DM_SPI if SPL_DM && SPL_SPI -+ select SPL_DM_SPI_FLASH if SPL_DM && SPL_SPI -+ select SPL_OF_CONTROL if SPL_DM -+ select SPL_PINCTRL if SPL_DM -+ select SPL_PINCONF if SPL_DM -+ select SPL_RAM if SPL_DM - select SPL_SEPARATE_BSS if SPL - select SUPPORT_SPL - select SYS_RELOC_GD_ENV_ADDR -@@ -28,12 +38,14 @@ config BOARD_SUNXI - imply DISTRO_DEFAULTS - imply FAT_WRITE - imply FIT -+ imply MMC - imply OF_LIBFDT_OVERLAY - imply PRE_CONSOLE_BUFFER - imply SPL - imply SPL_GPIO - imply SPL_LIBCOMMON_SUPPORT - imply SPL_LIBGENERIC_SUPPORT -+ imply SPL_LOAD_FIT - imply SPL_MMC if MMC - imply SPL_POWER - imply SPL_SERIAL -@@ -41,6 +53,7 @@ config BOARD_SUNXI - imply SYS_I2C_MVTWSI - imply SYS_NS16550 - imply SYSRESET -+ imply SYSRESET_SBI - imply SYSRESET_WATCHDOG - imply SYSRESET_WATCHDOG_AUTO - imply USB_EHCI_GENERIC -@@ -67,6 +80,12 @@ config SPL_BSS_START_ADDR - default 0x4ff80000 if SUNXI_MINIMUM_DRAM_MB >= 256 - default 0x43f80000 if SUNXI_MINIMUM_DRAM_MB >= 64 - -+config SPL_OPENSBI_LOAD_ADDR -+ default 0x40000000 if RISCV -+ -+config SPL_STACK -+ default 0x48000 if TARGET_SUN20I_D1 -+ - config SPL_STACK_R_ADDR - default 0x81e00000 if MACH_SUNIV - default 0x2fe00000 if MACH_SUN9I -@@ -75,13 +94,13 @@ config SPL_STACK_R_ADDR - - config SPL_TEXT_BASE - default 0x10060 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5 -- default 0x20060 if SUN50I_GEN_H6 -+ default 0x20060 if SUN50I_GEN_H6 || TARGET_SUN20I_D1 - default 0x00060 - - config SUNXI_MINIMUM_DRAM_MB - int - default 32 if MACH_SUNIV -- default 64 if MACH_SUN8I_V3S -+ default 64 if MACH_SUN8I_V3S || TARGET_SUN20I_D1 - default 256 - help - Minimum DRAM size expected on the board. Traditionally we -@@ -94,7 +113,7 @@ config SUNXI_MINIMUM_DRAM_MB - config SUNXI_SRAM_ADDRESS - hex - default 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5 -- default 0x20000 if SUN50I_GEN_H6 -+ default 0x20000 if SUN50I_GEN_H6 || TARGET_SUN20I_D1 - default 0x0 - help - Older Allwinner SoCs have their boot mask ROM mapped just -@@ -113,6 +132,7 @@ config SYS_CLK_FREQ - default 912000000 if MACH_SUN7I - default 1008000000 if MACH_SUN8I - default 1008000000 if MACH_SUN9I -+ default 1008000000 if TARGET_SUN20I_D1 - default 816000000 if MACH_SUN50I || MACH_SUN50I_H5 - default 888000000 if MACH_SUN50I_H6 - default 1008000000 if MACH_SUN50I_H616 -@@ -125,10 +145,14 @@ config SYS_CONFIG_NAME - default "sun7i" if MACH_SUN7I - default "sun8i" if MACH_SUN8I - default "sun9i" if MACH_SUN9I -+ default "sun20i" if TARGET_SUN20I_D1 - default "sun50i" if MACH_SUN50I - default "sun50i" if MACH_SUN50I_H6 - default "sun50i" if MACH_SUN50I_H616 - -+config SYS_CPU -+ default "generic" if TARGET_SUN20I_D1 -+ - config SYS_LOAD_ADDR - default 0x81000000 if MACH_SUNIV - default 0x22000000 if MACH_SUN9I ---- a/common/spl/Kconfig -+++ b/common/spl/Kconfig -@@ -78,6 +78,7 @@ config SPL_MAX_SIZE - hex "Maximum size of the SPL image, excluding BSS" - default 0x37fa0 if MACH_SUN50I_H616 - default 0x30000 if ARCH_MX6 && MX6_OCRAM_256KB -+ default 0x27fa0 if TARGET_SUN20I_D1 - default 0x25fa0 if MACH_SUN50I_H6 - default 0x1b000 if AM33XX && !TI_SECURE_DEVICE - default 0x10000 if ARCH_MX6 && !MX6_OCRAM_256KB ---- a/drivers/clk/sunxi/Kconfig -+++ b/drivers/clk/sunxi/Kconfig -@@ -98,6 +98,7 @@ config CLK_SUN8I_H3 - - config CLK_SUN20I_D1 - bool "Clock driver for Allwinner D1" -+ default TARGET_SUN20I_D1 - help - This enables common clock driver support for platforms based - on Allwinner D1 SoC. ---- /dev/null -+++ b/include/configs/sun20i.h -@@ -0,0 +1,11 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Placeholder wrapper to allow addressing Allwinner D1 (and later) sun20i -+ * CPU based devices separately. Please do not add anything in here. -+ */ -+#ifndef __CONFIG_H -+#define __CONFIG_H -+ -+#include -+ -+#endif /* __CONFIG_H */ diff --git a/lede/package/boot/uboot-d1/patches/0080-gpio-sunxi-Hack-up-the-driver-for-the-D1.patch b/lede/package/boot/uboot-d1/patches/0080-gpio-sunxi-Hack-up-the-driver-for-the-D1.patch deleted file mode 100644 index 42a5c28584..0000000000 --- a/lede/package/boot/uboot-d1/patches/0080-gpio-sunxi-Hack-up-the-driver-for-the-D1.patch +++ /dev/null @@ -1,134 +0,0 @@ -From 28682ca027b9fa64f3de4cea99373642f36c4e6c Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sun, 8 Aug 2021 19:32:14 -0500 -Subject: [PATCH 80/90] gpio: sunxi: Hack up the driver for the D1 - -Signed-off-by: Samuel Holland ---- - arch/arm/include/asm/arch-sunxi/gpio.h | 12 ++++++++++-- - arch/arm/mach-sunxi/pinmux.c | 8 +++++++- - drivers/gpio/sunxi_gpio.c | 3 +++ - 3 files changed, 20 insertions(+), 3 deletions(-) - ---- a/arch/arm/include/asm/arch-sunxi/gpio.h -+++ b/arch/arm/include/asm/arch-sunxi/gpio.h -@@ -9,7 +9,9 @@ - #define _SUNXI_GPIO_H - - #include -+#if 0 - #include -+#endif - - /* - * sunxi has 9 banks of gpio, they are: -@@ -55,30 +57,36 @@ - struct sunxi_gpio { - u32 cfg[4]; - u32 dat; -- u32 drv[2]; -+ u32 drv[4]; - u32 pull[2]; -+ u32 reserved; - }; - - /* gpio interrupt control */ - struct sunxi_gpio_int { -- u32 cfg[3]; -+ u32 cfg[4]; - u32 ctl; - u32 sta; - u32 deb; /* interrupt debounce */ -+ u32 reserved; - }; - -+#if 0 - struct sunxi_gpio_reg { - struct sunxi_gpio gpio_bank[SUNXI_GPIO_BANKS]; - u8 res[0xbc]; - struct sunxi_gpio_int gpio_int; - }; -+#endif - - #define SUN50I_H6_GPIO_POW_MOD_SEL 0x340 - #define SUN50I_H6_GPIO_POW_MOD_VAL 0x348 - -+#if 0 - #define BANK_TO_GPIO(bank) (((bank) < SUNXI_GPIO_L) ? \ - &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank] : \ - &((struct sunxi_gpio_reg *)SUNXI_R_PIO_BASE)->gpio_bank[(bank) - SUNXI_GPIO_L]) -+#endif - - #define GPIO_BANK(pin) ((pin) >> 5) - #define GPIO_NUM(pin) ((pin) & 0x1f) ---- a/arch/arm/mach-sunxi/pinmux.c -+++ b/arch/arm/mach-sunxi/pinmux.c -@@ -7,7 +7,7 @@ - - #include - #include --#include -+//#include - - void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val) - { -@@ -17,6 +17,7 @@ void sunxi_gpio_set_cfgbank(struct sunxi - clrsetbits_le32(&pio->cfg[index], 0xf << offset, val << offset); - } - -+#if !CONFIG_IS_ENABLED(DM_GPIO) - void sunxi_gpio_set_cfgpin(u32 pin, u32 val) - { - u32 bank = GPIO_BANK(pin); -@@ -24,6 +25,7 @@ void sunxi_gpio_set_cfgpin(u32 pin, u32 - - sunxi_gpio_set_cfgbank(pio, pin, val); - } -+#endif - - int sunxi_gpio_get_cfgbank(struct sunxi_gpio *pio, int bank_offset) - { -@@ -37,6 +39,7 @@ int sunxi_gpio_get_cfgbank(struct sunxi_ - return cfg & 0xf; - } - -+#if !CONFIG_IS_ENABLED(DM_GPIO) - int sunxi_gpio_get_cfgpin(u32 pin) - { - u32 bank = GPIO_BANK(pin); -@@ -52,6 +55,7 @@ void sunxi_gpio_set_drv(u32 pin, u32 val - - sunxi_gpio_set_drv_bank(pio, pin, val); - } -+#endif - - void sunxi_gpio_set_drv_bank(struct sunxi_gpio *pio, u32 bank_offset, u32 val) - { -@@ -61,6 +65,7 @@ void sunxi_gpio_set_drv_bank(struct sunx - clrsetbits_le32(&pio->drv[index], 0x3 << offset, val << offset); - } - -+#if !CONFIG_IS_ENABLED(DM_GPIO) - void sunxi_gpio_set_pull(u32 pin, u32 val) - { - u32 bank = GPIO_BANK(pin); -@@ -68,6 +73,7 @@ void sunxi_gpio_set_pull(u32 pin, u32 va - - sunxi_gpio_set_pull_bank(pio, pin, val); - } -+#endif - - void sunxi_gpio_set_pull_bank(struct sunxi_gpio *pio, int bank_offset, u32 val) - { ---- a/drivers/gpio/sunxi_gpio.c -+++ b/drivers/gpio/sunxi_gpio.c -@@ -18,6 +18,9 @@ - #include - #include - -+#include "../../arch/arm/include/asm/arch-sunxi/gpio.h" -+#include "../../arch/arm/mach-sunxi/pinmux.c" -+ - #if !CONFIG_IS_ENABLED(DM_GPIO) - static int sunxi_gpio_output(u32 pin, u32 val) - { diff --git a/lede/package/boot/uboot-d1/patches/0081-mmc-sunxi-Hack-up-the-driver-for-the-D1.patch b/lede/package/boot/uboot-d1/patches/0081-mmc-sunxi-Hack-up-the-driver-for-the-D1.patch deleted file mode 100644 index 3d8ddf4583..0000000000 --- a/lede/package/boot/uboot-d1/patches/0081-mmc-sunxi-Hack-up-the-driver-for-the-D1.patch +++ /dev/null @@ -1,118 +0,0 @@ -From 4df80766531bc35510981ebc5ea0bb07264beac9 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sun, 8 Aug 2021 19:31:20 -0500 -Subject: [PATCH 81/90] mmc: sunxi: Hack up the driver for the D1 - -Signed-off-by: Samuel Holland ---- - arch/riscv/include/asm/io.h | 1 + - drivers/mmc/sunxi_mmc.c | 29 +++++++++++++++++++++++++---- - drivers/mmc/sunxi_mmc.h | 2 -- - 3 files changed, 26 insertions(+), 6 deletions(-) - ---- a/arch/riscv/include/asm/io.h -+++ b/arch/riscv/include/asm/io.h -@@ -85,6 +85,7 @@ static inline u16 readw(const volatile v - return val; - } - -+#define readl_relaxed readl - static inline u32 readl(const volatile void __iomem *addr) - { - u32 val; ---- a/drivers/mmc/sunxi_mmc.c -+++ b/drivers/mmc/sunxi_mmc.c -@@ -23,9 +23,9 @@ - #include - #include - #include -+#if !CONFIG_IS_ENABLED(DM_MMC) - #include - #include --#if !CONFIG_IS_ENABLED(DM_MMC) - #include - #endif - #include -@@ -36,6 +36,23 @@ - #define CCM_MMC_CTRL_MODE_SEL_NEW 0 - #endif - -+#include "../../arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h" -+ -+unsigned int clock_get_pll6(void) -+{ -+ uint32_t rval = readl((void *)0x2001020); -+ -+ int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT) + 1; -+ int m = ((rval >> 1) & 0x1) + 1; -+ int p0 = ((rval >> 16) & 0x7) + 1; -+ /* The register defines PLL6-2X, not plain PLL6 */ -+ uint32_t freq = 24000000UL * n / m / p0; -+ -+ printf("PLL reg = 0x%08x, freq = %d\n", rval, freq); -+ -+ return freq; -+} -+ - struct sunxi_mmc_plat { - struct mmc_config cfg; - struct mmc mmc; -@@ -60,7 +77,8 @@ static bool sunxi_mmc_can_calibrate(void - return IS_ENABLED(CONFIG_MACH_SUN50I) || - IS_ENABLED(CONFIG_MACH_SUN50I_H5) || - IS_ENABLED(CONFIG_SUN50I_GEN_H6) || -- IS_ENABLED(CONFIG_MACH_SUN8I_R40); -+ IS_ENABLED(CONFIG_MACH_SUN8I_R40) || -+ IS_ENABLED(CONFIG_TARGET_SUN20I_D1); - } - - static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz) -@@ -194,7 +212,7 @@ static int mmc_config_clock(struct sunxi - rval &= ~SUNXI_MMC_CLK_DIVIDER_MASK; - writel(rval, &priv->reg->clkcr); - --#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) -+#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) || defined(CONFIG_TARGET_SUN20I_D1) - /* A64 supports calibration of delays on MMC controller and we - * have to set delay of zero before starting calibration. - * Allwinner BSP driver sets a delay only in the case of -@@ -622,7 +640,8 @@ static unsigned get_mclk_offset(void) - if (IS_ENABLED(CONFIG_MACH_SUN9I_A80)) - return 0x410; - -- if (IS_ENABLED(CONFIG_SUN50I_GEN_H6)) -+ if (IS_ENABLED(CONFIG_SUN50I_GEN_H6) || -+ IS_ENABLED(CONFIG_TARGET_SUN20I_D1)) - return 0x830; - - return 0x88; -@@ -662,6 +681,7 @@ static int sunxi_mmc_probe(struct udevic - return ret; - ccu_reg = (u32 *)(uintptr_t)ofnode_get_addr(args.node); - -+#define SUNXI_MMC0_BASE 0x4020000 - priv->mmc_no = ((uintptr_t)priv->reg - SUNXI_MMC0_BASE) / 0x1000; - priv->mclkreg = (void *)ccu_reg + get_mclk_offset() + priv->mmc_no * 4; - -@@ -703,6 +723,7 @@ static const struct udevice_id sunxi_mmc - { .compatible = "allwinner,sun7i-a20-mmc" }, - { .compatible = "allwinner,sun8i-a83t-emmc" }, - { .compatible = "allwinner,sun9i-a80-mmc" }, -+ { .compatible = "allwinner,sun20i-d1-mmc" }, - { .compatible = "allwinner,sun50i-a64-mmc" }, - { .compatible = "allwinner,sun50i-a64-emmc" }, - { .compatible = "allwinner,sun50i-h6-mmc" }, ---- a/drivers/mmc/sunxi_mmc.h -+++ b/drivers/mmc/sunxi_mmc.h -@@ -45,11 +45,9 @@ struct sunxi_mmc { - u32 chda; /* 0x90 */ - u32 cbda; /* 0x94 */ - u32 res2[26]; --#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) - u32 res3[17]; - u32 samp_dl; - u32 res4[46]; --#endif - u32 fifo; /* 0x100 / 0x200 FIFO access address */ - }; - diff --git a/lede/package/boot/uboot-d1/patches/0082-pinctrl-sunxi-Hack-up-the-driver-for-the-D1.patch b/lede/package/boot/uboot-d1/patches/0082-pinctrl-sunxi-Hack-up-the-driver-for-the-D1.patch deleted file mode 100644 index 06502d3186..0000000000 --- a/lede/package/boot/uboot-d1/patches/0082-pinctrl-sunxi-Hack-up-the-driver-for-the-D1.patch +++ /dev/null @@ -1,29 +0,0 @@ -From c33ca5c6a5be74711460756bf86c45b6c6fd0a3f Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Thu, 4 Nov 2021 17:49:15 -0500 -Subject: [PATCH 82/90] pinctrl: sunxi: Hack up the driver for the D1 - -Signed-off-by: Samuel Holland ---- - drivers/pinctrl/sunxi/pinctrl-sunxi.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c -+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c -@@ -9,6 +9,7 @@ - #include - - #include -+#include "../../../arch/arm/include/asm/arch-sunxi/gpio.h" - - extern U_BOOT_DRIVER(gpio_sunxi); - -@@ -49,7 +50,7 @@ static const char *sunxi_pinctrl_get_pin - uint pin_selector) - { - const struct sunxi_pinctrl_desc *desc = dev_get_priv(dev); -- static char pin_name[sizeof("PN31")]; -+ static char pin_name[sizeof("PN31")] __section(".data"); - - snprintf(pin_name, sizeof(pin_name), "P%c%d", - pin_selector / SUNXI_GPIOS_PER_BANK + desc->first_bank + 'A', diff --git a/lede/package/boot/uboot-d1/patches/0083-ram-sunxi-Add-Allwinner-D1-DRAM-driver.patch b/lede/package/boot/uboot-d1/patches/0083-ram-sunxi-Add-Allwinner-D1-DRAM-driver.patch deleted file mode 100644 index 73e3b1060d..0000000000 --- a/lede/package/boot/uboot-d1/patches/0083-ram-sunxi-Add-Allwinner-D1-DRAM-driver.patch +++ /dev/null @@ -1,1943 +0,0 @@ -From 9f612f3a1fd3d0759abca3720d488a17d159aa17 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sun, 30 Oct 2022 14:54:08 -0500 -Subject: [PATCH 83/90] ram: sunxi: Add Allwinner D1 DRAM driver - -Signed-off-by: Samuel Holland ---- - drivers/ram/Kconfig | 1 + - drivers/ram/Makefile | 1 + - drivers/ram/sunxi/Kconfig | 6 + - drivers/ram/sunxi/Makefile | 3 + - drivers/ram/sunxi/dram_v2.h | 65 + - drivers/ram/sunxi/mctl_hal-sun20iw1p1.c | 1771 +++++++++++++++++++++++ - drivers/ram/sunxi/sdram.h | 46 + - 7 files changed, 1893 insertions(+) - create mode 100644 drivers/ram/sunxi/Kconfig - create mode 100644 drivers/ram/sunxi/Makefile - create mode 100644 drivers/ram/sunxi/dram_v2.h - create mode 100644 drivers/ram/sunxi/mctl_hal-sun20iw1p1.c - create mode 100644 drivers/ram/sunxi/sdram.h - ---- a/drivers/ram/Kconfig -+++ b/drivers/ram/Kconfig -@@ -101,3 +101,4 @@ source "drivers/ram/rockchip/Kconfig" - source "drivers/ram/sifive/Kconfig" - source "drivers/ram/stm32mp1/Kconfig" - source "drivers/ram/octeon/Kconfig" -+source "drivers/ram/sunxi/Kconfig" ---- a/drivers/ram/Makefile -+++ b/drivers/ram/Makefile -@@ -20,5 +20,6 @@ obj-$(CONFIG_K3_DDRSS) += k3-ddrss/ - obj-$(CONFIG_IMXRT_SDRAM) += imxrt_sdram.o - - obj-$(CONFIG_RAM_SIFIVE) += sifive/ -+obj-$(CONFIG_RAM_SUNXI) += sunxi/ - - obj-$(CONFIG_ARCH_OCTEON) += octeon/ ---- /dev/null -+++ b/drivers/ram/sunxi/Kconfig -@@ -0,0 +1,6 @@ -+config RAM_SUNXI -+ bool "Ram drivers support for sunxi SoCs" -+ depends on RAM && BOARD_SUNXI -+ default y -+ help -+ This enables support for ram drivers of sunxi SoCs. ---- /dev/null -+++ b/drivers/ram/sunxi/Makefile -@@ -0,0 +1,3 @@ -+# SPDX-License-Identifier: GPL-2.0+ -+ -+obj-$(CONFIG_RAM_SUNXI) += mctl_hal-sun20iw1p1.o ---- /dev/null -+++ b/drivers/ram/sunxi/dram_v2.h -@@ -0,0 +1,65 @@ -+/* -+ * (C) Copyright 2007-2013 -+* SPDX-License-Identifier: GPL-2.0+ -+ * Allwinner Technology Co., Ltd. -+ * Jerry Wang -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#ifndef __dram_head_h__ -+#define __dram_head_h__ -+ -+struct dram_para_t -+{ -+ //normal configuration -+ unsigned int dram_clk; -+ unsigned int dram_type; //dram_type DDR2: 2 DDR3: 3 LPDDR2: 6 LPDDR3: 7 DDR3L: 31 -+ //unsigned int lpddr2_type; //LPDDR2 type S4:0 S2:1 NVM:2 -+ unsigned int dram_zq; //do not need -+ unsigned int dram_odt_en; -+ -+ //control configuration -+ unsigned int dram_para1; -+ unsigned int dram_para2; -+ -+ //timing configuration -+ unsigned int dram_mr0; -+ unsigned int dram_mr1; -+ unsigned int dram_mr2; -+ unsigned int dram_mr3; -+ unsigned int dram_tpr0; //DRAMTMG0 -+ unsigned int dram_tpr1; //DRAMTMG1 -+ unsigned int dram_tpr2; //DRAMTMG2 -+ unsigned int dram_tpr3; //DRAMTMG3 -+ unsigned int dram_tpr4; //DRAMTMG4 -+ unsigned int dram_tpr5; //DRAMTMG5 -+ unsigned int dram_tpr6; //DRAMTMG8 -+ //reserved for future use -+ unsigned int dram_tpr7; -+ unsigned int dram_tpr8; -+ unsigned int dram_tpr9; -+ unsigned int dram_tpr10; -+ unsigned int dram_tpr11; -+ unsigned int dram_tpr12; -+ unsigned int dram_tpr13; -+ -+}; -+ -+#endif ---- /dev/null -+++ b/drivers/ram/sunxi/mctl_hal-sun20iw1p1.c -@@ -0,0 +1,1771 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+ -+#include -+#include -+#include -+#include -+ -+#include "dram_v2.h" -+#include "sdram.h" -+ -+#define readl rv_readl -+#define writel rv_writel -+#include -+#undef readl -+#undef writel -+ -+#define readl(x) rv_readl((const volatile void __iomem *)(u64)(x)) -+#define writel(x, v) rv_writel(v, (volatile void __iomem *)(u64)(x)) -+ -+#if defined(CONFIG_SPL_BUILD) -+ -+char* memcpy_self(char* dst, char* src, int len) -+{ -+ int i; -+ for(i=0; i!=len; i++) { -+ dst[i] = src[i]; -+ } -+ return dst; -+} -+ -+void dram_vol_set(struct dram_para_t *para) -+{ -+ int reg, vol = 0; -+ -+ switch( para->dram_type ) { -+ case 2: vol = 47; break; -+ case 3: vol = 25; break; -+ default: vol = 0; -+ } -+vol = 25; // XXX -+ reg = readl(0x3000150); -+ reg &= ~(0xff00); -+ reg |= vol << 8; -+ reg &= ~(0x200000); -+ writel(0x3000150, reg); -+ -+ udelay(1); -+} -+ -+void paraconfig(unsigned int *para, unsigned int mask, unsigned int value) -+{ -+ *para &= ~(mask); -+ *para |= value; -+} -+ -+ -+void dram_enable_all_master(void) -+{ -+ writel(0x3102020, -1); -+ writel(0x3102024, 0xff); -+ writel(0x3102028, 0xffff); -+ udelay(10); -+} -+ -+ -+void dram_disable_all_master(void) -+{ -+ writel(0x3102020, 1); -+ writel(0x3102024, 0); -+ writel(0x3102028, 0); -+ udelay(10); -+} -+ -+ -+void eye_delay_compensation(struct dram_para_t *para) // s1 -+{ -+ unsigned int val, ptr; -+ -+ // DATn0IOCR, n = 0...7 -+ for (ptr = 0x3103310; ptr != 0x3103334; ptr += 4) { -+ val = readl(ptr); -+ val |= (para->dram_tpr11 << 9) & 0x1e00; -+ val |= (para->dram_tpr12 << 1) & 0x001e; -+ writel(ptr, val); -+ } -+ -+ // DATn1IOCR, n = 0...7 -+ for (ptr = 0x3103390; ptr != 0x31033b4; ptr += 4) { -+ val = readl(ptr); -+ val |= ((para->dram_tpr11 >> 4) << 9) & 0x1e00; -+ val |= ((para->dram_tpr12 >> 4) << 1) & 0x001e; -+ writel(ptr, val); -+ } -+ -+ // PGCR0: assert AC loopback FIFO reset -+ val = readl(0x3103100); -+ val &= 0xfbffffff; -+ writel(0x3103100, val); -+ -+ // ?? -+ val = readl(0x3103334); -+ val |= ((para->dram_tpr11 >> 16) << 9) & 0x1e00; -+ val |= ((para->dram_tpr12 >> 16) << 1) & 0x001e; -+ writel(0x3103334, val); -+ -+ val = readl(0x3103338); -+ val |= ((para->dram_tpr11 >> 16) << 9) & 0x1e00; -+ val |= ((para->dram_tpr12 >> 16) << 1) & 0x001e; -+ writel(0x3103338, val); -+ -+ val = readl(0x31033b4); -+ val |= ((para->dram_tpr11 >> 20) << 9) & 0x1e00; -+ val |= ((para->dram_tpr12 >> 20) << 1) & 0x001e; -+ writel(0x31033b4, val); -+ -+ val = readl(0x31033b8); -+ val |= ((para->dram_tpr11 >> 20) << 9) & 0x1e00; -+ val |= ((para->dram_tpr12 >> 20) << 1) & 0x001e; -+ writel(0x31033b8, val); -+ -+ val = readl(0x310333c); -+ val |= ((para->dram_tpr11 >> 16) << 25) & 0x1e000000; -+ writel(0x310333c, val); -+ -+ val = readl(0x31033bc); -+ val |= ((para->dram_tpr11 >> 20) << 25) & 0x1e000000; -+ writel(0x31033bc, val); -+ -+ // PGCR0: release AC loopback FIFO reset -+ val = readl(0x3103100); -+ val |= 0x04000000; -+ writel(0x3103100, val); -+ -+ udelay(1); -+ -+ for (ptr = 0x3103240; ptr != 0x310327c; ptr += 4) { -+ val = readl(ptr); -+ val |= ((para->dram_tpr10 >> 4) << 8) & 0x0f00; -+ writel(ptr, val); -+ } -+ -+ for (ptr = 0x3103228; ptr != 0x3103240; ptr += 4) { -+ val = readl(ptr); -+ val |= ((para->dram_tpr10 >> 4) << 8) & 0x0f00; -+ writel(ptr, val); -+ } -+ -+ val = readl(0x3103218); -+ val |= (para->dram_tpr10 << 8) & 0x0f00; -+ writel(0x3103218, val); -+ -+ val = readl(0x310321c); -+ val |= (para->dram_tpr10 << 8) & 0x0f00; -+ writel(0x310321c, val); -+ -+ val = readl(0x3103280); -+ val |= ((para->dram_tpr10 >> 12) << 8) & 0x0f00; -+ writel(0x3103280, val); -+} -+ -+ -+// Not used ?? -+// -+void bit_delay_compensation(void) -+{ -+ const unsigned int data0[44] = { -+ 0, 1, 2, 3, 2, 3, 3, 3, 0, 0, 0, -+ 6, 6, 6, 5, 5, 5, 5, 5, 0, 0, 0, -+ 0, 2, 4, 2, 6, 5, 5, 5, 0, 0, 0, -+ 3, 3, 3, 2, 2, 1, 1, 1, 0, 0, 0, -+ }; -+ const unsigned int data1[44] = { -+ 0, 1, 3, 3, 3, 3, 3, 4, 3, 3, 3, -+ 3, 3, 4, 4, 3, 3, 3, 3, 3, 3, 3, -+ 0, 3, 3, 1, 6, 6, 5, 6, 3, 3, 3, -+ 5, 5, 6, 6, 4, 5, 3, 3, 3, 3, 3, -+ }; -+ -+ unsigned int *start = (unsigned int *)0x3102310; // DATX0IOCR -+ unsigned int *end = (unsigned int *)0x3102510; // DATX0IOCR x + 4 * size -+ unsigned int *datxiocr; -+ unsigned int i, j, k, rval; -+ -+ rval = readl(0x3102100) & 0x03ffffff; -+ writel(0x3102100, rval); -+ -+ // Fill DATX0IOCR - DATX3IOCR, 11 registers per block, blocks 0x20 words apart -+ for(i = 0, datxiocr = start; datxiocr != end; i += 11, datxiocr += 0x20) { -+ for(j = 0, k = i; j != 11; j++, k++) { -+ rval = readl((unsigned int)datxiocr[j]); -+ rval += data1[k] << 8; -+ rval += data0[k]; -+ writel((unsigned int)datxiocr[j], rval); -+ } -+ } -+ -+ rval = readl(0x3102100) | 0x04000000; -+ writel(0x3102100, rval); -+} -+ -+// Not used ?? -+// -+void set_master_priority_pad(struct dram_para_t *para) -+{ -+ unsigned int val; -+ -+ val = readl(0x310200c) & 0xfffff000; -+ val |= (para->dram_clk >> 1) - 1; -+ writel(0x310200c, val); -+ -+ writel(0x3102200, 0x00001000); -+ writel(0x3102210, 0x01000009); -+ writel(0x3102214, 0x00500100); -+ writel(0x3102230, 0x0200000d); -+ writel(0x3102234, 0x00600100); -+ writel(0x3102240, 0x01000009); -+ writel(0x3102244, 0x00500100); -+ writel(0x3102260, 0x00640209); -+ writel(0x3102264, 0x00200040); -+ writel(0x3102290, 0x01000009); -+ writel(0x3102294, 0x00400080); -+ writel(0x3102470, 0); -+ writel(0x3102474, 0); -+ -+ writel(0x31031c0, 0x0f802f05); -+ writel(0x31031c8, 0x0f0000ff); -+ writel(0x31031d0, 0x3f00005f); -+} -+ -+int auto_cal_timing(unsigned int time, unsigned int freq) -+{ -+ unsigned int t = time*freq; -+ return t/1000 + ( ((t%1000) != 0) ? 1 : 0); -+} -+ -+// Main purpose of the auto_set_timing routine seems to be to calculate all -+// timing settings for the specific type of sdram used. Read together with -+// an sdram datasheet for context on the various variables. -+// -+void auto_set_timing_para(struct dram_para_t *para) // s5 -+{ -+ unsigned int freq; // s4 -+ unsigned int type; // s8 -+ unsigned int tpr13; // 80(sp) -+ unsigned int reg_val; -+ -+ unsigned char tccd; // 88(sp) -+ unsigned char trrd; // s7 -+ unsigned char trcd; // s3 -+ unsigned char trc; // s9 -+ unsigned char tfaw; // s10 -+ unsigned char tras; // s11 -+ unsigned char trp; // 0(sp) -+ unsigned char twtr; // s1 -+ unsigned char twr; // s6 -+ unsigned char trtp; // 64(sp) -+ unsigned char txp; // a6 -+ unsigned short trefi; // s2 -+ unsigned short trfc; // a5 / 8(sp) -+ -+ freq = para->dram_clk; -+ type = para->dram_type; -+ tpr13 = para->dram_tpr13; -+ -+ //printf("type = %d\n", type); -+ //printf("tpr13 = %p\n", tpr13); -+ -+ if (para->dram_tpr13 & 0x2) -+ { -+ //dram_tpr0 -+ tccd = ( (para->dram_tpr0 >> 21) & 0x7 ); // [23:21] -+ tfaw = ( (para->dram_tpr0 >> 15) & 0x3f ); // [20:15] -+ trrd = ( (para->dram_tpr0 >> 11) & 0xf ); // [14:11] -+ trcd = ( (para->dram_tpr0 >> 6) & 0x1f ); // [10:6 ] -+ trc = ( (para->dram_tpr0 >> 0) & 0x3f ); // [ 5:0 ] -+ //dram_tpr1 -+ txp = ( (para->dram_tpr1 >> 23) & 0x1f ); // [27:23] -+ twtr = ( (para->dram_tpr1 >> 20) & 0x7 ); // [22:20] -+ trtp = ( (para->dram_tpr1 >> 15) & 0x1f ); // [19:15] -+ twr = ( (para->dram_tpr1 >> 11) & 0xf ); // [14:11] -+ trp = ( (para->dram_tpr1 >> 6) & 0x1f ); // [10:6 ] -+ tras = ( (para->dram_tpr1 >> 0) & 0x3f ); // [ 5:0 ] -+ //dram_tpr2 -+ trfc = ( (para->dram_tpr2 >> 12)& 0x1ff); // [20:12] -+ trefi = ( (para->dram_tpr2 >> 0) & 0xfff); // [11:0 ] -+ } -+ else { -+ unsigned int frq2 = freq >> 1; // s0 -+ -+ if (type == 3) { -+ // DDR3 -+ trfc = auto_cal_timing( 350, frq2); -+ trefi = auto_cal_timing(7800, frq2) / 32 + 1; // XXX -+ twr = auto_cal_timing( 8, frq2); -+ trcd = auto_cal_timing( 15, frq2); -+ twtr = twr + 2; // + 2 ? XXX -+ if (twr < 2) twtr = 2; -+ twr = trcd; -+ if (trcd < 2) twr = 2; -+ if (freq <= 800) { -+ tfaw = auto_cal_timing(50, frq2); -+ trrd = auto_cal_timing(10, frq2); -+ if (trrd < 2) trrd = 2; -+ trc = auto_cal_timing(53, frq2); -+ tras = auto_cal_timing(38, frq2); -+ txp = trrd; // 10 -+ trp = trcd; // 15 -+ } -+ else { -+ tfaw = auto_cal_timing(35, frq2); -+ trrd = auto_cal_timing(10, frq2); -+ if (trrd < 2) trrd = 2; -+ trcd = auto_cal_timing(14, frq2); -+ trc = auto_cal_timing(48, frq2); -+ tras = auto_cal_timing(34, frq2); -+ txp = trrd; // 10 -+ trp = trcd; // 14 -+ } -+ } -+ else if (type == 2) { -+ // DDR2 -+ tfaw = auto_cal_timing( 50, frq2); -+ trrd = auto_cal_timing( 10, frq2); -+ trcd = auto_cal_timing( 20, frq2); -+ trc = auto_cal_timing( 65, frq2); -+ twtr = auto_cal_timing( 8, frq2); -+ trp = auto_cal_timing( 15, frq2); -+ tras = auto_cal_timing( 45, frq2); -+ trefi = auto_cal_timing(7800, frq2) / 32; -+ trfc = auto_cal_timing( 328, frq2); -+ txp = 2; -+ twr = trp; // 15 -+ } -+ else if (type == 6) { -+ // LPDDR2 -+ tfaw = auto_cal_timing( 50, frq2); -+ if (tfaw < 4) tfaw = 4; -+ trrd = auto_cal_timing( 10, frq2); -+ if (trrd == 0) trrd = 1; -+ trcd = auto_cal_timing( 24, frq2); -+ if (trcd < 2) trcd = 2; -+ trc = auto_cal_timing( 70, frq2); -+ txp = auto_cal_timing( 8, frq2); -+ if (txp == 0) { -+ txp = 1; -+ twtr = 2; -+ } -+ else { -+ twtr = txp; -+ if (txp < 2) { -+ txp = 2; -+ twtr = 2; -+ } -+ } -+ twr = auto_cal_timing( 15, frq2); -+ if (twr < 2) twr = 2; -+ trp = auto_cal_timing( 17, frq2); -+ tras = auto_cal_timing( 42, frq2); -+ trefi = auto_cal_timing(3900, frq2) / 32; -+ trfc = auto_cal_timing( 210, frq2); -+ } -+ else if (type == 7) { -+ // LPDDR3 -+ tfaw = auto_cal_timing( 50, frq2); -+ if (tfaw < 4) tfaw = 4; -+ trrd = auto_cal_timing( 10, frq2); -+ if (trrd == 0) trrd = 1; -+ trcd = auto_cal_timing( 24, frq2); -+ if (trcd < 2) trcd = 2; -+ trc = auto_cal_timing( 70, frq2); -+ twtr = auto_cal_timing( 8, frq2); -+ if (twtr < 2) twtr = 2; -+ twr = auto_cal_timing( 15, frq2); -+ if (twr < 2) twr = 2; -+ trp = auto_cal_timing( 17, frq2); -+ tras = auto_cal_timing( 42, frq2); -+ trefi = auto_cal_timing(3900, frq2) / 32; -+ trfc = auto_cal_timing( 210, frq2); -+ txp = twtr; -+ } -+ else { -+ // default -+ trfc = 128; -+ trp = 6; -+ trefi = 98; -+ txp = 10; -+ twr = 8; -+ twtr = 3; -+ tras = 14; -+ tfaw = 16; -+ trc = 20; -+ trcd = 6; -+ trrd = 3; -+ } -+ //assign the value back to the DRAM structure -+ tccd = 2; -+ trtp = 4; // not in .S ? -+ para->dram_tpr0 = (trc<<0) | (trcd<<6) | (trrd<<11) | (tfaw<<15) | (tccd<<21); -+ para->dram_tpr1 = (tras<<0) | (trp<<6) | (twr<<11) | (trtp<<15) | (twtr<<20) | (txp<<23); -+ para->dram_tpr2 = (trefi<<0) | (trfc<<12); -+ } -+ -+ unsigned int tcksrx; // t1 -+ unsigned int tckesr; // t4; -+ unsigned int trd2wr; // t6 -+ unsigned int trasmax; // t3; -+ unsigned int twtp; // s6 (was twr!) -+ unsigned int tcke; // s8 -+ unsigned int tmod; // t0 -+ unsigned int tmrd; // t5 -+ unsigned int tmrw; // a1 -+ unsigned int t_rdata_en;// a4 (was tcwl!) -+ unsigned int tcl; // a0 -+ unsigned int wr_latency;// a7 -+ unsigned int tcwl; // first a4, then a5 -+ unsigned int mr3; // s0 -+ unsigned int mr2; // t2 -+ unsigned int mr1; // s1 -+ unsigned int mr0; // a3 -+ unsigned int dmr3; // 72(sp) -+ //unsigned int trtp; // 64(sp) -+ unsigned int dmr1; // 56(sp) -+ unsigned int twr2rd; // 48(sp) -+ unsigned int tdinit3; // 40(sp) -+ unsigned int tdinit2; // 32(sp) -+ unsigned int tdinit1; // 24(sp) -+ unsigned int tdinit0; // 16(sp) -+ -+ dmr1 = para->dram_mr1; -+ dmr3 = para->dram_mr3; -+ -+ switch (type) { -+ -+ case 2: // DDR2 -+ { -+ trasmax = freq / 30; -+ if (freq < 409) { -+ tcl = 3; -+ t_rdata_en = 1; -+ mr0 = 0x06a3; -+ } -+ else { -+ t_rdata_en = 2; -+ tcl = 4; -+ mr0 = 0x0e73; -+ } -+ tmrd = 2; -+ twtp = twr + 5; -+ tcksrx = 5; -+ tckesr = 4; -+ trd2wr = 4; -+ tcke = 3; -+ tmod = 12; -+ wr_latency = 1; -+ mr3 = 0; -+ mr2 = 0; -+ tdinit0 = 200*freq + 1; -+ tdinit1 = 100*freq / 1000 + 1; -+ tdinit2 = 200*freq + 1; -+ tdinit3 = 1*freq + 1; -+ tmrw = 0; -+ twr2rd = twtr + 5; -+ tcwl = 0; -+ mr1 = dmr1; -+ break; -+ } -+ -+ case 3: // DDR3 -+ { -+ trasmax = freq / 30; -+ if (freq <= 800) { -+ mr0 = 0x1c70; -+ tcl = 6; -+ wr_latency = 2; -+ tcwl = 4; -+ mr2 = 24; -+ } -+ else { -+ mr0 = 0x1e14; -+ tcl = 7; -+ wr_latency = 3; -+ tcwl = 5; -+ mr2 = 32; -+ } -+ -+ twtp = tcwl + 2 + twtr; // WL+BL/2+tWTR -+ trd2wr = tcwl + 2 + twr; // WL+BL/2+tWR -+ twr2rd = tcwl + twtr; // WL+tWTR -+ -+ tdinit0 = 500*freq + 1; // 500 us -+ tdinit1 = 360*freq / 1000 + 1; // 360 ns -+ tdinit2 = 200*freq + 1; // 200 us -+ tdinit3 = 1*freq + 1; // 1 us -+ -+ if (((tpr13>>2) & 0x03) == 0x01 || freq < 912) { -+ mr1 = dmr1; -+ t_rdata_en = tcwl; // a5 <- a4 -+ tcksrx = 5; -+ tckesr = 4; -+ trd2wr = 5; -+ } -+ else { -+ mr1 = dmr1; -+ t_rdata_en = tcwl; // a5 <- a4 -+ tcksrx = 5; -+ tckesr = 4; -+ trd2wr = 6; -+ } -+ tcke = 3; // not in .S ? -+ tmod = 12; -+ tmrd = 4; -+ tmrw = 0; -+ mr3 = 0; -+ break; -+ } -+ -+ case 6: // LPDDR2 -+ { -+ trasmax = freq / 60; -+ mr3 = dmr3; -+ twtp = twr + 5; -+ mr2 = 6; -+ mr1 = 5; -+ tcksrx = 5; -+ tckesr = 5; -+ trd2wr = 10; -+ tcke = 2; -+ tmod = 5; -+ tmrd = 5; -+ tmrw = 3; -+ tcl = 4; -+ wr_latency = 1; -+ t_rdata_en = 1; -+ tdinit0 = 200*freq + 1; -+ tdinit1 = 100*freq / 1000 + 1; -+ tdinit2 = 11*freq + 1; -+ tdinit3 = 1*freq + 1; -+ twr2rd = twtr + 5; -+ tcwl = 2; -+ mr1 = 195; -+ mr0 = 0; -+ break; -+ } -+ -+ case 7: // LPDDR3 -+ { -+ trasmax = freq / 60; -+ if (freq < 800) { -+ tcwl = 4; -+ wr_latency = 3; -+ t_rdata_en = 6; -+ mr2 = 12; -+ } -+ else { -+ tcwl = 3; -+ tcke = 6; -+ wr_latency = 2; -+ t_rdata_en = 5; -+ mr2 = 10; -+ } -+ twtp = tcwl + 5; -+ tcl = 7; -+ mr3 = dmr3; -+ tcksrx = 5; -+ tckesr = 5; -+ trd2wr = 13; -+ tcke = 3; -+ tmod = 12; -+ tdinit0 = 400*freq + 1; -+ tdinit1 = 500*freq / 1000 + 1; -+ tdinit2 = 11*freq + 1; -+ tdinit3 = 1*freq + 1; -+ tmrd = 5; -+ tmrw = 5; -+ twr2rd = tcwl + twtr + 5; -+ mr1 = 195; -+ mr0 = 0; -+ break; -+ } -+ -+ default: -+ twr2rd = 8; // 48(sp) -+ tcksrx = 4; // t1 -+ tckesr = 3; // t4 -+ trd2wr = 4; // t6 -+ trasmax = 27; // t3 -+ twtp = 12; // s6 -+ tcke = 2; // s8 -+ tmod = 6; // t0 -+ tmrd = 2; // t5 -+ tmrw = 0; // a1 -+ tcwl = 3; // a5 -+ tcl = 3; // a0 -+ wr_latency = 1; // a7 -+ t_rdata_en = 1; // a4 -+ mr3 = 0; // s0 -+ mr2 = 0; // t2 -+ mr1 = 0; // s1 -+ mr0 = 0; // a3 -+ tdinit3 = 0; // 40(sp) -+ tdinit2 = 0; // 32(sp) -+ tdinit1 = 0; // 24(sp) -+ tdinit0 = 0; // 16(sp) -+ break; -+ } -+ if (trtp < tcl - trp + 2) { -+ trtp = tcl - trp + 2; -+ } -+ trtp = 4; -+ -+ // Update mode block when permitted -+ if ((para->dram_mr0 & 0xffff0000) == 0) para->dram_mr0 = mr0; -+ if ((para->dram_mr1 & 0xffff0000) == 0) para->dram_mr1 = mr1; -+ if ((para->dram_mr2 & 0xffff0000) == 0) para->dram_mr2 = mr2; -+ if ((para->dram_mr3 & 0xffff0000) == 0) para->dram_mr3 = mr3; -+ -+ // Set mode registers -+ writel(0x3103030, para->dram_mr0); -+ writel(0x3103034, para->dram_mr1); -+ writel(0x3103038, para->dram_mr2); -+ writel(0x310303c, para->dram_mr3); -+ writel(0x310302c, (para->dram_odt_en >> 4) & 0x3); // ?? -+ -+ // Set dram timing DRAMTMG0 - DRAMTMG5 -+ reg_val= (twtp<<24) | (tfaw<<16) | (trasmax<<8) | (tras<<0); -+ writel(0x3103058, reg_val); -+ reg_val= (txp<<16) | (trtp<<8) | (trc<<0); -+ writel(0x310305c, reg_val); -+ reg_val= (tcwl<<24) | (tcl<<16) | (trd2wr<<8) | (twr2rd<<0); -+ writel(0x3103060, reg_val); -+ reg_val= (tmrw<<16) | (tmrd<<12) | (tmod<<0); -+ writel(0x3103064, reg_val); -+ reg_val= (trcd<<24) | (tccd<<16) | (trrd<<8) | (trp<<0); -+ writel(0x3103068, reg_val); -+ reg_val= (tcksrx<<24) | (tcksrx<<16) | (tckesr<<8) | (tcke<<0); -+ writel(0x310306c, reg_val); -+ -+ // Set two rank timing -+ reg_val = readl(0x3103078); -+ reg_val &= 0x0fff0000; -+ reg_val |= (para->dram_clk < 800) ? 0xf0006600 : 0xf0007600; -+ reg_val |= 0x10; -+ writel(0x3103078, reg_val); -+ -+ // Set phy interface time PITMG0, PTR3, PTR4 -+ reg_val = (0x2<<24) | (t_rdata_en<<16) | (0x1<<8) | (wr_latency<<0); -+ writel(0x3103080, reg_val); -+ writel(0x3103050, ((tdinit0<<0)|(tdinit1<<20))); -+ writel(0x3103054, ((tdinit2<<0)|(tdinit3<<20))); -+ -+ // Set refresh timing and mode -+ reg_val = (trefi<<16) | (trfc<<0); -+ writel(0x3103090, reg_val); -+ reg_val = 0x0fff0000 & (trefi<<15); -+ writel(0x3103094, reg_val); -+} -+ -+// Not used ? -+// -+void ccm_get_sscg(void) -+{ -+ // NOTE: function is present in the assembly, but was not translated. -+} -+ -+// Not used ? -+// -+void ccm_set_pll_sscg(void) -+{ -+ // NOTE: function is present in the assembly, but was not translated. -+} -+ -+// Purpose of this routine seems to be to initialize the PLL driving -+// the MBUS and sdram. -+// -+int ccm_set_pll_ddr_clk(int index, struct dram_para_t *para) -+{ -+ unsigned int val, clk, n; -+ -+ clk = (para->dram_tpr13 & (1 << 6)) ? para->dram_tpr9 -+ : para->dram_clk; -+ -+ // set VCO clock divider -+ n = (clk * 2) / 24; -+ val = readl(0x2001010); -+ val &= 0xfff800fc; // clear dividers -+ val |= (n - 1) << 8; // set PLL division -+ val |= 0xc0000000; // enable PLL and LDO -+ writel(0x2001010, val); -+ -+ // Restart PLL locking -+ val &= 0xdfffffff; // disbable lock -+ val |= 0xc0000000; // enable PLL and LDO -+ writel(0x2001010, val); -+ val |= 0xe0000000; // re-enable lock -+ writel(0x2001010, val); -+ -+ // wait for PLL to lock -+ while ((readl(0x2001010) & 0x10000000) == 0) {;} -+ -+ udelay(20); -+ -+ // enable PLL output -+ val = readl(0x2001000); -+ val |= 0x08000000; -+ writel(0x2001000, val); -+ -+ // turn clock gate on -+ val = readl(0x2001800); -+ val &= 0xfcfffcfc; // select DDR clk source, n=1, m=1 -+ val |= 0x80000000; // turn clock on -+ writel(0x2001800, val); -+ -+ return n * 24; -+} -+ -+// Main purpose of sys_init seems to be to initalise the clocks for -+// the sdram controller. -+// -+void mctl_sys_init(struct dram_para_t *para) -+{ -+ unsigned int val; -+ -+ // s1 = 0x02001000 -+ -+ // assert MBUS reset -+ val = readl(0x2001540); -+ val &= 0xbfffffff; -+ writel(0x2001540, val); -+ -+ // turn off sdram clock gate, assert sdram reset -+ val = readl(0x200180c); -+ val &= 0xfffffffe; -+ writel(0x200180c, val); -+ val &= 0xfffefffe; -+ writel(0x200180c, val); -+ -+ // turn of bit 30 [??] -+ val = readl(0x2001800); -+ writel(0x2001800, val & 0xbfffffff); -+ // and toggle dram clock gating off + trigger update -+ val &= 0x7fffffff; -+ writel(0x2001800, val); -+ val |= 0x08000000; -+ writel(0x2001800, val); -+ udelay(10); -+ -+ // set ddr pll clock -+ val = ccm_set_pll_ddr_clk(0, para); -+ para->dram_clk = val >> 1; -+ udelay(100); -+ dram_disable_all_master(); -+ -+ // release sdram reset -+ val = readl(0x200180c); -+ val |= 0x00010000; -+ writel(0x200180c, val); -+ -+ // release MBUS reset -+ val = readl(0x2001540); -+ val |= 0x40000000; -+ writel(0x2001540, val); -+ -+ // turn bit 30 back on [?] -+ val = readl(0x2001800); -+ val |= 0x40000000; -+ writel(0x2001800, val); -+ udelay(5); -+ -+ // turn on sdram clock gate -+ val = readl(0x200180c); -+ val |= 0x0000001; // (1<<0) -+ writel(0x200180c, val); -+ -+ // turn dram clock gate on, trigger sdr clock update -+ val = readl(0x2001800); -+ val |= 0x80000000; -+ writel(0x2001800, val); -+ val |= 0x88000000; -+ writel(0x2001800, val); -+ udelay(5); -+ -+ // mCTL clock enable -+ writel(0x310300c, 0x00008000); -+ udelay(10); -+} -+ -+// The main purpose of this routine seems to be to copy an address configuration -+// from the dram_para1 and dram_para2 fields to the PHY configuration registers -+// (0x3102000, 0x3102004). -+// -+void mctl_com_init(struct dram_para_t *para) -+{ -+ unsigned int val, end, ptr; -+ int i; -+ -+ // purpose ?? -+ val = readl(0x3102008) & 0xffffc0ff; -+ val |= 0x2000; -+ writel(0x3102008, val); -+ -+ // Set sdram type and word width -+ val = readl(0x3102000) & 0xff000fff; -+ val |= (para->dram_type &0x7) << 16; // DRAM type -+ val |= (~para->dram_para2 & 0x1) << 12; // DQ width -+ if((para->dram_type) != 6 && (para->dram_type) != 7) { -+ val |= ((para->dram_tpr13 >> 5) & 0x1) << 19; // 2T or 1T -+ val |= 0x400000; -+ } -+ else { -+ val |= 0x480000; // type 6 and 7 must use 1T -+ } -+ writel(0x3102000, val); -+ -+ // init rank / bank / row for single/dual or two different ranks -+ val = para->dram_para2; -+ end = ((val & 0x100) && (((val >> 12) & 0xf) != 1)) ? 32 : 16; -+ ptr = 0x3102000; -+ -+ for (i = 0 ; i != end; i += 16) { -+ -+ val = readl(ptr) & 0xfffff000; -+ -+ val |= (para->dram_para2 >> 12) & 0x3; // rank -+ val |= ((para->dram_para1 >> (i + 12)) << 2) & 0x4; // bank - 2 -+ val |= (((para->dram_para1 >> (i + 4)) - 1) << 4) & 0xff; // row - 1 -+ -+ // convert from page size to column addr width - 3 -+ switch ((para->dram_para1 >> i) & 0xf) { -+ case 8: val |= 0xa00; break; -+ case 4: val |= 0x900; break; -+ case 2: val |= 0x800; break; -+ case 1: val |= 0x700; break; -+ default: val |= 0x600; break; -+ } -+ writel(ptr, val); -+ ptr += 4; -+ } -+ -+ // set ODTMAP based on number of ranks in use -+ val = (readl(0x3102000) & 0x1) ? 0x303 : 0x201; -+ writel(0x3103120, val); -+ -+ // set mctl reg 3c4 to zero when using half DQ -+ if (para->dram_para2 & (1 << 0)) { -+ writel(0x31033c4, 0); -+ } -+ -+ // purpose ?? -+ if (para->dram_tpr4) { -+ val = readl(0x3102000); -+ val |= (para->dram_tpr4 << 25) & 0x06000000; -+ writel(0x3102000, val); -+ -+ val = readl(0x3102004); -+ val |= ((para->dram_tpr4 >> 2) << 12) & 0x001ff000; -+ writel(0x3102004, val); -+ } -+} -+ -+// This routine seems to have several remapping tables for 22 lines. -+// It is unclear which lines are being remapped. It seems to pick -+// table cfg7 for the Nezha board. -+// -+void mctl_phy_ac_remapping(struct dram_para_t *para) -+{ -+ char cfg0[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; -+ static char cfg1[] = { 1, 9, 3, 7, 8, 18, 4, 13, 5, 6, 10, -+ 2, 14, 12, 0, 0, 21, 17, 20, 19, 11, 22 }; -+ static char cfg2[] = { 4, 9, 3, 7, 8, 18, 1, 13, 2, 6, 10, -+ 5, 14, 12, 0, 0, 21, 17, 20, 19, 11, 22 }; -+ static char cfg3[] = { 1, 7, 8, 12, 10, 18, 4, 13, 5, 6, 3, -+ 2, 9, 0, 0, 0, 21, 17, 20, 19, 11, 22 }; -+ static char cfg4[] = { 4, 12, 10, 7, 8, 18, 1, 13, 2, 6, 3, -+ 5, 9, 0, 0, 0, 21, 17, 20, 19, 11, 22 }; -+ static char cfg5[] = { 13, 2, 7, 9, 12, 19, 5, 1, 6, 3, 4, -+ 8, 10, 0, 0, 0, 21, 22, 18, 17, 11, 20 }; -+ static char cfg6[] = { 3, 10, 7, 13, 9, 11, 1, 2, 4, 6, 8, -+ 5, 12, 0, 0, 0, 20, 1, 0, 21, 22, 17 }; -+ static char cfg7[] = { 3, 2, 4, 7, 9, 1, 17, 12, 18, 14, 13, -+ 8, 15, 6, 10, 5, 19, 22, 16, 21, 20, 11 }; -+ -+ unsigned int fuse, val; -+ -+ // read SID info @ 0x228 -+ fuse = (readl(0x3002228) >> 8) & 0x4; -+ printf("ddr_efuse_type: 0x%x\n", fuse); -+ -+ if ((para->dram_tpr13 >> 18) & 0x3) { -+ memcpy_self(cfg0, cfg7, 22); -+ } -+ else { -+ switch (fuse) { -+ case 8: memcpy_self(cfg0, cfg2, 22); break; -+ case 9: memcpy_self(cfg0, cfg3, 22); break; -+ case 10: memcpy_self(cfg0, cfg5, 22); break; -+ case 11: memcpy_self(cfg0, cfg4, 22); break; -+ default: -+ case 12: memcpy_self(cfg0, cfg1, 22); break; -+ case 13: -+ case 14: break; -+ } -+ } -+ if (para->dram_type == 2) { -+ if (fuse == 15) return; -+ memcpy_self(cfg0, cfg6, 22); -+ } -+ if ( para->dram_type == 2 || para->dram_type == 3) { -+ -+ val = (cfg0[ 4] << 25) | (cfg0[ 3] << 20) | (cfg0[ 2] << 15) | -+ (cfg0[ 1] << 10) | (cfg0[ 0] << 5); -+ writel(0x3102500, val); -+ -+ val = (cfg0[10] << 25) | (cfg0[ 9] << 20) | (cfg0[ 8] << 15) | -+ (cfg0[ 7] << 10) | (cfg0[ 6] << 5) | cfg0[ 5]; -+ writel(0x3102504, val); -+ -+ val = (cfg0[15] << 20) | (cfg0[14] << 15) | -+ (cfg0[13] << 10) | (cfg0[12] << 5) | cfg0[11]; -+ writel(0x3102508, val); -+ -+ val = (cfg0[21] << 25) | (cfg0[20] << 20) | (cfg0[19] << 15) | -+ (cfg0[18] << 10) | (cfg0[17] << 5) | cfg0[16]; -+ writel(0x310250c, val); -+ -+ val = (cfg0[ 4] << 25) | (cfg0 [3] << 20) | (cfg0[2] << 15) | -+ (cfg0[ 1] << 10) | (cfg0 [0] << 5) | 1; -+ writel(0x3102500, val); -+ } -+} -+ -+// Init the controller channel. The key part is placing commands in the main -+// command register (PIR, 0x3103000) and checking command status (PGSR0, 0x3103010). -+// -+unsigned int mctl_channel_init(unsigned int ch_index, struct dram_para_t *para) -+{ -+ unsigned int val, dqs_gating_mode; -+ -+ dqs_gating_mode = (para->dram_tpr13 >> 2) & 0x3; -+ -+ // set DDR clock to half of CPU clock -+ val = readl(0x310200c) & 0xfffff000; -+ val |= (para->dram_clk >> 1 ) - 1; -+ writel(0x310200c, val); -+ -+ // MRCTRL0 nibble 3 undocumented -+ val = readl(0x3103108) & 0xfffff0ff; -+ val |= 0x300; -+ writel(0x3103108, val); -+ -+ // DX0GCR0 -+ val = readl(0x3103344) & 0xffffffcf; -+ val |= ((~para->dram_odt_en) << 5) & 0x20; -+ if (para->dram_clk > 672) { -+ val &= 0xffff09f1; -+ val |= 0x00000400; -+ } -+ else { -+ val &= 0xffff0ff1; -+ } -+ writel(0x3103344, val); -+ -+ // DX1GCR0 -+ val = readl(0x31033c4) & 0xffffffcf; -+ val |= ((~para->dram_odt_en) << 5) & 0x20; -+ if (para->dram_clk > 672) { -+ val &= 0xffff09f1; -+ val |= 0x00000400; -+ } -+ else { -+ val &= 0xffff0ff1; -+ } -+ writel(0x31033c4, val); -+ -+ // 0x3103208 undocumented -+ val = readl(0x3103208); -+ val |= 0x2; -+ writel(0x3103208, val); -+ -+ eye_delay_compensation(para); -+ -+ //set PLL SSCG ? -+ // -+ val = readl(0x3103108); -+ if (dqs_gating_mode == 1) { -+ -+ val &= ~(0xc0); -+ writel(0x3103108, val); -+ -+ val = readl(0x31030bc); -+ val &= 0xfffffef8; -+ writel(0x31030bc, val); -+ } -+ else if (dqs_gating_mode == 2) { -+ -+ val &= ~(0xc0); -+ val |= 0x80; -+ writel(0x3103108, val); -+ -+ val = readl(0x31030bc); -+ val &= 0xfffffef8; -+ val |= ((para->dram_tpr13 >> 16) & 0x1f) - 2; -+ val |= 0x100; -+ writel(0x31030bc, val); -+ -+ val = readl(0x310311c) & 0x7fffffff; -+ val |= 0x08000000; -+ writel(0x310311c, val); -+ } -+ else { -+ val &= ~(0x40); -+ writel(0x3103108, val); -+ -+ udelay(10); -+ -+ val = readl(0x3103108); -+ val |= 0xc0; -+ writel(0x3103108, val); -+ } -+ -+ if (para->dram_type == 6 || para->dram_type == 7) { -+ val = readl(0x310311c); -+ if (dqs_gating_mode == 1) { -+ val &= 0xf7ffff3f; -+ val |= 0x80000000; -+ } -+ else { -+ val &= 0x88ffffff; -+ val |= 0x22000000; -+ } -+ writel(0x310311c, val); -+ } -+ -+ val = readl(0x31030c0); -+ val &= 0xf0000000; -+ val |= (para->dram_para2 & (1 << 12)) ? 0x03000001 : 0x01000007; // 0x01003087 XXX -+ writel(0x31030c0, val); -+ -+ if (readl(0x70005d4) & (1 << 16)) { -+ val = readl(0x7010250); -+ val &= 0xfffffffd; -+ writel(0x7010250, val); -+ -+ udelay(10); -+ } -+ -+ // Set ZQ config -+ val = readl(0x3103140) & 0xfc000000; -+ val |= para->dram_zq & 0x00ffffff; -+ val |= 0x02000000; -+ writel(0x3103140, val); -+ -+ // Initialise DRAM controller -+ if (dqs_gating_mode == 1) { -+ writel(0x3103000, 0x52); // prep PHY reset + PLL init + z-cal -+ writel(0x3103000, 0x53); // Go -+ -+ while ((readl(0x3103010) & 0x1) == 0) {;} // wait for IDONE -+ udelay(10); -+ -+ // 0x520 = prep DQS gating + DRAM init + d-cal -+ val = (para->dram_type == 3) ? 0x5a0 // + DRAM reset -+ : 0x520; -+ } -+ else { -+ if ((readl(0x70005d4) & (1 << 16)) == 0) { -+ // prep DRAM init + PHY reset + d-cal + PLL init + z-cal -+ val = (para->dram_type == 3) ? 0x1f2 // + DRAM reset -+ : 0x172; -+ } -+ else { -+ // prep PHY reset + d-cal + z-cal -+ val = 0x62; -+ } -+ } -+ -+ writel(0x3103000, val); // Prep -+ val |= 1; -+ writel(0x3103000, val); // Go -+ -+ udelay(10); -+ while ((readl(0x3103010) & 0x1) == 0) {;} // wait for IDONE -+ -+ if (readl(0x70005d4) & (1 << 16)) { -+ -+ val = readl(0x310310c); -+ val &= 0xf9ffffff; -+ val |= 0x04000000; -+ writel(0x310310c, val); -+ -+ udelay(10); -+ -+ val = readl(0x3103004); -+ val |= 0x1; -+ writel(0x3103004, val); -+ -+ while ((readl(0x3103018) & 0x7) != 0x3) {;} -+ -+ val = readl(0x7010250); -+ val &= 0xfffffffe; -+ writel(0x7010250, val); -+ -+ udelay(10); -+ -+ val = readl(0x3103004); -+ val &= 0xfffffffe; -+ writel(0x3103004, val); -+ -+ while ((readl(0x3103018) & 0x7) != 0x1) {;} -+ -+ udelay(15); -+ -+ if (dqs_gating_mode == 1) { -+ -+ val = readl(0x3103108); -+ val &= 0xffffff3f; -+ writel(0x3103108, val); -+ -+ val = readl(0x310310c); -+ val &= 0xf9ffffff; -+ val |= 0x02000000; -+ writel(0x310310c, val); -+ -+ udelay(1); -+ writel(0x3103000, 0x401); -+ -+ while ((readl(0x3103010) & 0x1) == 0) {;} -+ } -+ } -+ -+ // Check for training error -+ val = readl(0x3103010); -+ if (((val >> 20) & 0xff) && (val & 0x100000)) { -+ printf("ZQ calibration error, check external 240 ohm resistor.\n"); -+ return 0; -+ } -+ -+ // STATR = Zynq STAT? Wait for status 'normal'? -+ while ((readl(0x3103018) & 0x1) == 0) {;} -+ -+ val = readl(0x310308c); -+ val |= 0x80000000; -+ writel(0x310308c, val); -+ -+ udelay(10); -+ -+ val = readl(0x310308c); -+ val &= 0x7fffffff; -+ writel(0x310308c, val); -+ -+ udelay(10); -+ -+ val = readl(0x3102014); -+ val |= 0x80000000; -+ writel(0x3102014, val); -+ -+ udelay(10); -+ -+ val = readl(0x310310c); -+ val &= 0xf9ffffff; -+ writel(0x310310c, val); -+ -+ if (dqs_gating_mode == 1) { -+ val = readl(0x310311c); -+ val &= 0xffffff3f; -+ val |= 0x00000040; -+ writel(0x310311c, val); -+ } -+ return 1; -+} -+ -+// The below routine reads the dram config registers and extracts -+// the number of address bits in each rank available. It then calculates -+// total memory size in MB. -+// -+int DRAMC_get_dram_size(void) -+{ -+ unsigned int rval, temp, size0, size1; -+ -+ rval = readl(0x3102000); // MC_WORK_MODE0 -+ -+ temp = (rval>>8) & 0xf; // page size - 3 -+ temp += (rval>>4) & 0xf; // row width - 1 -+ temp += (rval>>2) & 0x3; // bank count - 2 -+ temp -= 14; // 1MB = 20 bits, minus above 6 = 14 -+ size0 = 1 << temp; -+ -+ temp = rval & 0x3; // rank count = 0? -> done -+ if (temp == 0) { -+ return size0; -+ } -+ -+ rval = readl(0x3102004); // MC_WORK_MODE1 -+ -+ temp = rval & 0x3; -+ if (temp == 0) { // two identical ranks -+ return 2 * size0; -+ } -+ -+ temp = (rval>>8) & 0xf; // page size - 3 -+ temp += (rval>>4) & 0xf; // row width - 1 -+ temp += (rval>>2) & 0x3; // bank number - 2 -+ temp -= 14; // 1MB = 20 bits, minus above 6 = 14 -+ size1 = 1 << temp; -+ -+ return size0 + size1; // add size of each rank -+} -+ -+// The below routine reads the command status register to extract -+// DQ width and rank count. This follows the DQS training command in -+// channel_init. If error bit 22 is reset, we have two ranks and full DQ. -+// If there was an error, figure out whether it was half DQ, single rank, -+// or both. Set bit 12 and 0 in dram_para2 with the results. -+// -+int dqs_gate_detect(struct dram_para_t *para) -+{ -+ unsigned int rval, dx0, dx1; -+ -+ if (readl(0x3103010) & (1 << 22)) { -+ -+ dx0 = (readl(0x3103348) >> 24) & 0x3; -+ dx1 = (readl(0x31033c8) >> 24) & 0x3; -+ -+ if (dx0 == 2) { -+ rval = para->dram_para2; -+ rval &= 0xffff0ff0; -+ if (dx0 != dx1) { -+ rval |= 0x1; -+ para->dram_para2 = rval; -+ printf("[AUTO DEBUG] single rank and half DQ!\n"); -+ return 1; -+ } -+ para->dram_para2 = rval; -+ printf("[AUTO DEBUG] single rank and full DQ!\n"); -+ return 1; -+ } -+ else if (dx0 == 0) { -+ rval = para->dram_para2; -+ rval &= 0xfffffff0; -+ rval |= 0x00001001; -+ para->dram_para2 = rval; -+ printf("[AUTO DEBUG] dual rank and half DQ!\n"); -+ return 1; -+ } -+ else { -+ if (para->dram_tpr13 & (1 << 29)) { -+ printf("DX0 state:%d\n", dx0); -+ printf("DX1 state:%d\n", dx1); -+ } -+ return 0; -+ } -+ } -+ else { -+ rval = para->dram_para2; -+ rval &= 0xfffffff0; -+ rval |= 0x00001000; -+ para->dram_para2 = rval; -+ printf("[AUTO DEBUG] two rank and full DQ!\n"); -+ return 1; -+ } -+} -+ -+ -+#define SDRAM_BASE ((unsigned int *)0x40000000) -+#define uint unsigned int -+ -+int dramc_simple_wr_test(uint mem_mb, int len) -+{ -+ unsigned int offs = (mem_mb >> 1) << 18; // half of memory size -+ unsigned int patt1 = 0x01234567; -+ unsigned int patt2 = 0xfedcba98; -+ unsigned int *addr, v1, v2, i; -+ -+ addr = SDRAM_BASE; -+ for (i = 0; i != len; i++, addr++) { -+ writel(addr, patt1 + i); -+ writel(addr + offs, patt2 + i); -+ } -+ -+ addr = SDRAM_BASE; -+ for (i = 0; i != len; i++) { -+ v1 = readl(addr+i); -+ v2 = patt1 + i; -+ if (v1 != v2) { -+ printf("DRAM simple test FAIL.\n"); -+ printf("%x != %x at address %p\n", v1, v2, addr+i); -+ return 1; -+ } -+ v1 = readl(addr+offs+i); -+ v2 = patt2 + i; -+ if (v1 != v2) { -+ printf("DRAM simple test FAIL.\n"); -+ printf("%x != %x at address %p\n", v1, v2, addr+offs+i); -+ return 1; -+ } -+ } -+ printf("DRAM simple test OK.\n"); -+ return 0; -+} -+ -+// Set the Vref mode for the controller -+// -+void mctl_vrefzq_init(struct dram_para_t *para) -+{ -+ unsigned int val; -+ -+ if ((para->dram_tpr13 & (1 << 17)) == 0) { -+ val = readl(0x3103110) & 0x80808080; // IOCVR0 -+ val |= para->dram_tpr5; -+ writel(0x3103110, val); -+ -+ if ((para->dram_tpr13 & (1 << 16)) == 0) { -+ val = readl(0x3103114) & 0xffffff80; // IOCVR1 -+ val |= para->dram_tpr6 & 0x7f; -+ writel(0x3103114, val); -+ } -+ } -+} -+ -+// Perform an init of the controller. This is actually done 3 times. The first -+// time to establish the number of ranks and DQ width. The second time to -+// establish the actual ram size. The third time is final one, with the final -+// settings. -+// -+int mctl_core_init(struct dram_para_t *para) -+{ -+ mctl_sys_init(para); -+ mctl_vrefzq_init(para); -+ mctl_com_init(para); -+ mctl_phy_ac_remapping(para); -+ auto_set_timing_para(para); -+ return mctl_channel_init(0, para); -+} -+ -+ -+#define RAM_BASE (0x40000000) -+ -+// Autoscan sizes a dram device by cycling through address lines and figuring -+// out if it is connected to a real address line, or if the address is a mirror. -+// First the column and bank bit allocations are set to low values (2 and 9 address -+// lines. Then a maximum allocation (16 lines) is set for rows and this is tested. -+// Next the BA2 line is checked. This seems to be placed above the column, BA0-1 and -+// row addresses. Finally, the column address is allocated 13 lines and these are -+// tested. The results are placed in dram_para1 and dram_para2. -+// -+int auto_scan_dram_size(struct dram_para_t *para) // s7 -+{ -+ unsigned int rval, i, j, rank, maxrank, offs, mc_work_mode; -+ unsigned int chk, ptr, shft, banks; -+ -+ if (mctl_core_init(para) == 0) { -+ printf("[ERROR DEBUG] DRAM initialisation error : 0!\n"); -+ return 0; -+ } -+ -+ maxrank = (para->dram_para2 & 0xf000) ? 2 : 1; -+ mc_work_mode = 0x3102000; -+ offs = 0; -+ -+ // write test pattern -+ for (i = 0, ptr = RAM_BASE; i < 64; i++, ptr += 4) { -+ writel(ptr, (i & 1) ? ptr : ~ptr); -+ } -+ -+ for (rank = 0; rank < maxrank; ) { -+ -+ // Set row mode -+ rval = readl(mc_work_mode); -+ rval &= 0xfffff0f3; -+ rval |= 0x000006f0; -+ writel(mc_work_mode, rval); -+ while (readl(mc_work_mode) != rval); -+ -+ // Scan per address line, until address wraps (i.e. see shadow) -+ for(i = 11; i < 17; i++) { -+ chk = RAM_BASE + (1 << (i + 11)); -+ ptr = RAM_BASE; -+ for (j = 0; j < 64; j++) { -+ if (readl(chk) != ((j & 1) ? ptr : ~ptr)) -+ goto out1; -+ ptr += 4; -+ chk += 4; -+ } -+ break; -+ out1: ; -+ } -+ if (i > 16) i = 16; -+ printf("[AUTO DEBUG] rank %d row = %d\n", rank, i); -+ -+ // Store rows in para 1 -+ shft = 4 + offs; -+ rval = para->dram_para1; -+ rval &= ~(0xff << shft); -+ rval |= i << shft; -+ para->dram_para1 = rval; -+ -+ if (rank == 1) { -+ // Set bank mode for rank0 -+ rval = readl(0x3102000); -+ rval &= 0xfffff003; -+ rval |= 0x000006a4; -+ writel(0x3102000, rval); -+ } -+ -+ // Set bank mode for current rank -+ rval = readl(mc_work_mode); -+ rval &= 0xfffff003; -+ rval |= 0x000006a4; -+ writel(mc_work_mode, rval); -+ while (readl(mc_work_mode) != rval); -+ -+ // Test if bit A23 is BA2 or mirror XXX A22? -+ chk = RAM_BASE + (1 << 22); -+ ptr = RAM_BASE; -+ for (i = 0, j = 0; i < 64; i++) { -+ if (readl(chk) != ((i & 1) ? ptr : ~ptr)) { -+ j = 1; -+ break; -+ } -+ ptr += 4; -+ chk += 4; -+ } -+ banks = (j + 1) << 2; // 4 or 8 -+ printf("[AUTO DEBUG] rank %d bank = %d\n", rank, banks); -+ -+ // Store banks in para 1 -+ shft = 12 + offs; -+ rval = para->dram_para1; -+ rval &= ~(0xf << shft); -+ rval |= j << shft; -+ para->dram_para1 = rval; -+ -+ if (rank == 1) { -+ // Set page mode for rank0 -+ rval = readl(0x3102000); -+ rval &= 0xfffff003; -+ rval |= 0x00000aa0; -+ writel(0x3102000, rval); -+ } -+ -+ // Set page mode for current rank -+ rval = readl(mc_work_mode); -+ rval &= 0xfffff003; -+ rval |= 0x00000aa0; -+ writel(mc_work_mode, rval); -+ while (readl(mc_work_mode) != rval); -+ -+ // Scan per address line, until address wraps (i.e. see shadow) -+ for(i = 9; i < 14; i++) { -+ chk = RAM_BASE + (1 << i); -+ ptr = RAM_BASE; -+ for (j = 0; j < 64; j++) { -+ if (readl(chk) != ((j & 1) ? ptr : ~ptr)) -+ goto out2; -+ ptr += 4; -+ chk += 4; -+ } -+ break; -+ out2:; -+ } -+ if (i > 13) i = 13; -+ int pgsize = (i==9) ? 0 : (1 << (i-10)); -+ printf("[AUTO DEBUG] rank %d page size = %d KB\n", rank, pgsize); -+ -+ // Store page size -+ shft = offs; -+ rval = para->dram_para1; -+ rval &= ~(0xf << shft); -+ rval |= pgsize << shft; -+ para->dram_para1 = rval; -+ -+ // Move to next rank -+ rank++; -+ if (rank != maxrank) { -+ if (rank == 1) { -+ rval = readl(0x3202000); // MC_WORK_MODE -+ rval &= 0xfffff003; -+ rval |= 0x000006f0; -+ writel(0x3202000, rval); -+ -+ rval = readl(0x3202004); // MC_WORK_MODE2 -+ rval &= 0xfffff003; -+ rval |= 0x000006f0; -+ writel(0x3202004, rval); -+ } -+ offs += 16; // store rank1 config in upper half of para1 -+ mc_work_mode += 4; // move to MC_WORK_MODE2 -+ } -+ } -+ if (maxrank == 2) { -+ para->dram_para2 &= 0xfffff0ff; -+ // note: rval is equal to para->dram_para1 here -+ if ((rval & 0xffff) == ((rval >> 16) & 0xffff)) { -+ printf("rank1 config same as rank0\n"); -+ } -+ else { -+ para->dram_para2 |= 0x00000100; -+ printf("rank1 config different from rank0\n"); -+ } -+ } -+ return 1; -+} -+ -+// This routine sets up parameters with dqs_gating_mode equal to 1 and two -+// ranks enabled. It then configures the core and tests for 1 or 2 ranks and -+// full or half DQ width. it then resets the parameters to the original values. -+// dram_para2 is updated with the rank & width findings. -+// -+int auto_scan_dram_rank_width(struct dram_para_t *para) -+{ -+ unsigned int s1 = para->dram_tpr13; -+ unsigned int s2 = para->dram_para1; -+ unsigned int v; -+ -+ para->dram_para1 = 0x00b000b0; -+ v = (para->dram_para2 & 0xfffffff0) | 0x1000; -+ para->dram_para2 = v; -+ -+ v = (s1 & 0xfffffff7) | 0x5; // set DQS probe mode -+ para->dram_tpr13 = v; -+ -+ mctl_core_init(para); -+ if (readl(0x3103010) & (1 << 20)) { -+ return 0; -+ } -+ if (dqs_gate_detect(para) == 0) { -+ return 0; -+ } -+ -+ para->dram_tpr13 = s1; -+ para->dram_para1 = s2; -+ return 1; -+} -+ -+// This routine determines the sdram topology. It first establishes the number -+// of ranks and the DQ width. Then it scans the sdram address lines to establish -+// the size of each rank. It then updates dram_tpr13 to reflect that the sizes -+// are now known: a re-init will not repeat the autoscan. -+// -+int auto_scan_dram_config(struct dram_para_t *para) -+{ -+ if (((para->dram_tpr13 & (1 << 14)) == 0) && -+ (auto_scan_dram_rank_width(para) == 0)) -+ { -+ printf("[ERROR DEBUG] auto scan dram rank & width failed !\n"); -+ return 0; -+ } -+ if (((para->dram_tpr13 & (1 << 0)) == 0) && -+ (auto_scan_dram_size(para) == 0 )) -+ { -+ printf("[ERROR DEBUG] auto scan dram size failed !\n"); -+ return 0; -+ } -+ if ((para->dram_tpr13 & (1 << 15)) == 0) { -+ para->dram_tpr13 |= 0x6003; -+ } -+ return 1; -+} -+ -+ -+signed int init_DRAM(int type, struct dram_para_t *para) // s0 -+{ -+ int rc, mem_size; -+ -+ // Test ZQ status -+ if (para->dram_tpr13 & (1 << 16)) { -+ printf("DRAM only have internal ZQ!!\n"); -+ writel(0x3000160, readl(0x3000160) | 0x100); -+ writel(0x3000168, 0); -+ udelay(10); -+ } -+ else { -+ writel(0x7010254, 0); -+ writel(0x3000160, readl(0x3000160) & ~0x003); -+ udelay(10); -+ writel(0x3000160, readl(0x3000160) & ~0x108); -+ udelay(10); -+ writel(0x3000160, readl(0x3000160) | 0x001); -+ udelay(20); -+ printf("ZQ value = 0x%x***********\n", readl(0x3000172)); -+ } -+ -+ // Set voltage -+ dram_vol_set(para); -+ -+ // Set SDRAM controller auto config -+ if ( (para->dram_tpr13 & 0x1)==0 ) { -+ if ( auto_scan_dram_config(para)==0 ) { -+ return 0; -+ } -+ } -+ -+ // Print header message (too late) -+ printf("DRAM BOOT DRIVE INFO: %s\n", "V0.24"); -+ printf("DRAM CLK = %d MHz\n", para->dram_clk); -+ printf("DRAM Type = %d (2:DDR2,3:DDR3)\n", para->dram_type); -+ if ( (para->dram_odt_en & 0x1) == 0 ) { -+ printf("DRAMC read ODT off.\n"); -+ } -+ else { -+ printf("DRAMC ZQ value: 0x%x\n", para->dram_zq); -+ } -+ -+ // report ODT -+ rc = para->dram_mr1; -+ if ( (rc & 0x44)==0 ) { -+ printf("DRAM ODT off.\n"); -+ } -+ else { -+ printf("DRAM ODT value: 0x%x.\n", rc); -+ } -+ -+ // Init core, final run -+ if ( mctl_core_init(para)==0 ) { -+ printf("DRAM initialisation error : 1 !\n"); -+ return 0; -+ } -+ -+ // Get sdram size -+ rc = para->dram_para2; -+ if ( rc<0 ) { -+ rc = (rc & 0x7fff0000U) >> 16; -+ } -+ else { -+ rc = DRAMC_get_dram_size(); -+ printf("DRAM SIZE =%d M\n", rc); -+ para->dram_para2 = (para->dram_para2 & 0xffffu) | rc << 16; -+ } -+ mem_size = rc; -+ -+ // Purpose ?? -+ if ( para->dram_tpr13 & (1 << 30) ) { -+ rc = readl(¶->dram_tpr8); -+ if ( rc==0 ) { -+ rc = 0x10000200; -+ } -+ writel(0x31030a0, rc); -+ writel(0x310309c, 0x40a); -+ writel(0x3103004, readl(0x3103004) | 1 ); -+ printf("Enable Auto SR"); -+ } -+ else { -+ writel(0x31030a0, readl(0x31030a0) & 0xffff0000); -+ writel(0x3103004, readl(0x3103004) & (~0x1) ); -+ } -+ -+ // Pupose ?? -+ rc = readl(0x3103100) & ~(0xf000); -+ if ( (para->dram_tpr13 & 0x200)==0 ) { -+ if ( para->dram_type != 6 ) { -+ writel(0x3103100, rc); -+ } -+ } -+ else { -+ writel(0x3103100, rc | 0x5000); -+ } -+ -+ writel(0x3103140, readl(0x3103140) | (1 << 31)); -+ if (para->dram_tpr13 & (1 << 8)) { -+ writel(0x31030b8, readl(0x3103140) | 0x300); -+ } -+ -+ rc = readl(0x3103108); -+ if (para->dram_tpr13 & (1 << 16)) { -+ rc &= 0xffffdfff; -+ } -+ else { -+ rc |= 0x00002000; -+ } -+ writel(0x3103108, rc); -+ -+ -+ // Purpose ?? -+ if (para->dram_type == 7) { -+ rc = readl(0x310307c) & 0xfff0ffff; -+ rc |= 0x0001000; -+ writel(0x310307c, rc); -+ } -+ -+ dram_enable_all_master(); -+ //if (dramc_simple_wr_test(mem_size, 64)) return 0; -+ if (para->dram_tpr13 & (1 << 28)) { -+ rc = readl(0x70005d4); -+ if ( (rc & (1 << 16)) || dramc_simple_wr_test(mem_size, 4096) ) { -+ return 0; -+ } -+ } -+ -+ return mem_size; -+} -+ -+struct sunxi_ram_priv { -+ size_t size; -+}; -+ -+static struct dram_para_t dram_para = { -+ 0x00000318, -+ 0x00000003, -+ 0x007b7bfb, -+ 0x00000001, -+ 0x000010d2, -+ 0x00000000, -+ 0x00001c70, -+ 0x00000042, -+ 0x00000018, -+ 0x00000000, -+ 0x004a2195, -+ 0x02423190, -+ 0x0008b061, -+ 0xb4787896, -+ 0x00000000, -+ 0x48484848, -+ 0x00000048, -+ 0x1620121e, -+ 0x00000000, -+ 0x00000000, -+ 0x00000000, -+ 0x00870000, -+ 0x00000024, -+ 0x34050100, -+}; -+ -+static int sunxi_ram_probe(struct udevice *dev) -+{ -+ struct sunxi_ram_priv *priv = dev_get_priv(dev); -+ int ret; -+ -+ printf("%s: %s: probing\n", __func__, dev->name); -+ -+ ret = init_DRAM(0, &dram_para); -+ if (ret <= 0) { -+ printf("DRAM init failed: %d\n", ret); -+ return ret; -+ } -+ -+ priv->size = ret * 1024 * 1024; -+ -+ return 0; -+} -+ -+static int sunxi_ram_get_info(struct udevice *dev, struct ram_info *info) -+{ -+ struct sunxi_ram_priv *priv = dev_get_priv(dev); -+ -+ printf("%s: %s: getting info\n", __func__, dev->name); -+ -+ info->base = CONFIG_SYS_SDRAM_BASE; -+ info->size = priv->size; -+ -+ return 0; -+} -+ -+static struct ram_ops sunxi_ram_ops = { -+ .get_info = sunxi_ram_get_info, -+}; -+ -+static const struct udevice_id sunxi_ram_ids[] = { -+ { .compatible = "allwinner,sun20i-d1-mbus" }, -+ { } -+}; -+ -+U_BOOT_DRIVER(sunxi_ram) = { -+ .name = "sunxi_ram", -+ .id = UCLASS_RAM, -+ .of_match = sunxi_ram_ids, -+ .ops = &sunxi_ram_ops, -+ .probe = sunxi_ram_probe, -+ .priv_auto = sizeof(struct sunxi_ram_priv), -+}; -+ -+#endif ---- /dev/null -+++ b/drivers/ram/sunxi/sdram.h -@@ -0,0 +1,46 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+ -+/* -+ * dram_para1 bits: -+ * 16-19 = page size -+ * 20-27 = row count -+ * 28 = banks 4 or 8 -+ * -+ * dram_para2 bits: -+ * 0 = DQ width -+ * 4 = CS1 control -+ * 8-11 = rank flags? bit 8 = ranks differ in config -+ * 12-13 = rank -+ */ -+ -+/* MC_WORK_MODE bits -+ * 0- 1 = ranks code -+ * 2- 3 = banks, log2 - 2 2 3 2 -+ * 4- 7 = row width, log2 - 1 16 11 11 -+ * 8-11 = page size, log2 - 3 9 9 13 -+ * 12-15 = DQ width (or 12-14?) -+ * 16-18 = dram type (2=DDR2, 3=DDR3, 6=LPDDR2, 7=LPDDR3) -+ * 19 = 2T or 1T -+ * 23-24 = ranks code (again?) -+ */ -+ -+#define DRAM_MR0 ((void*)0x3103030) -+#define DRAM_MR1 ((void*)0x3103034) -+#define DRAM_MR2 ((void*)0x3103038) -+#define DRAM_MR3 ((void*)0x310303c) -+ -+#define DRAMTMG0 ((void*)0x3103058) -+#define DRAMTMG1 ((void*)0x310305c) -+#define DRAMTMG2 ((void*)0x3103060) -+#define DRAMTMG3 ((void*)0x3103064) -+#define DRAMTMG4 ((void*)0x3103068) -+#define DRAMTMG5 ((void*)0x310306c) -+#define DRAMTMG6 ((void*)0x3103070) -+#define DRAMTMG7 ((void*)0x3103074) -+#define DRAMTMG8 ((void*)0x3103078) -+ -+#define PITMG0 ((void*)0x3103080) -+#define PTR3 ((void*)0x3103050) -+#define PTR4 ((void*)0x3103054) -+#define RFSHTMG ((void*)0x3103090) -+#define RFSHCTL1 ((void*)0x3103094) diff --git a/lede/package/boot/uboot-d1/patches/0084-spi-sunxi-Hack-up-the-driver-for-the-D1.patch b/lede/package/boot/uboot-d1/patches/0084-spi-sunxi-Hack-up-the-driver-for-the-D1.patch deleted file mode 100644 index 1ce106e987..0000000000 --- a/lede/package/boot/uboot-d1/patches/0084-spi-sunxi-Hack-up-the-driver-for-the-D1.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 46f73ce33478734dabd5a93d425f7148b60198e1 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Wed, 8 Sep 2021 21:31:06 -0500 -Subject: [PATCH 84/90] spi: sunxi: Hack up the driver for the D1 - -Signed-off-by: Samuel Holland ---- - drivers/spi/spi-sunxi.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/spi/spi-sunxi.c -+++ b/drivers/spi/spi-sunxi.c -@@ -30,6 +30,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -85,7 +86,7 @@ DECLARE_GLOBAL_DATA_PTR; - #define SUN4I_SPI_DEFAULT_RATE 1000000 - #define SUN4I_SPI_TIMEOUT_MS 1000 - --#define SPI_REG(priv, reg) ((priv)->base + \ -+#define SPI_REG(priv, reg) (void *)((priv)->base + \ - (priv)->variant->regs[reg]) - #define SPI_BIT(priv, bit) ((priv)->variant->bits[bit]) - #define SPI_CS(priv, cs) (((cs) << SPI_BIT(priv, SPI_TCR_CS_SEL)) & \ diff --git a/lede/package/boot/uboot-d1/patches/0085-spi-sunxi-Add-support-for-the-D1.patch b/lede/package/boot/uboot-d1/patches/0085-spi-sunxi-Add-support-for-the-D1.patch deleted file mode 100644 index 9ae2c144eb..0000000000 --- a/lede/package/boot/uboot-d1/patches/0085-spi-sunxi-Add-support-for-the-D1.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 4993c31d314d5c7ebad1d08e3e3f79694dca8738 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 11 Sep 2021 23:12:06 -0500 -Subject: [PATCH 85/90] spi: sunxi: Add support for the D1 - -Signed-off-by: Samuel Holland ---- - drivers/spi/spi-sunxi.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/spi/spi-sunxi.c -+++ b/drivers/spi/spi-sunxi.c -@@ -558,6 +558,10 @@ static const struct udevice_id sun4i_spi - .compatible = "allwinner,sun8i-h3-spi", - .data = (ulong)&sun8i_h3_spi_variant, - }, -+ { -+ .compatible = "allwinner,sun50i-r329-spi", -+ .data = (ulong)&sun8i_h3_spi_variant, -+ }, - { /* sentinel */ } - }; - diff --git a/lede/package/boot/uboot-d1/patches/0086-usb-musb-new-Hack-up-the-driver-for-the-D1.patch b/lede/package/boot/uboot-d1/patches/0086-usb-musb-new-Hack-up-the-driver-for-the-D1.patch deleted file mode 100644 index f76cb86131..0000000000 --- a/lede/package/boot/uboot-d1/patches/0086-usb-musb-new-Hack-up-the-driver-for-the-D1.patch +++ /dev/null @@ -1,91 +0,0 @@ -From eb0cf5922cf0656a7e9f96d6b83397469a26825a Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 11 Sep 2021 10:12:24 -0500 -Subject: [PATCH 86/90] usb: musb-new: Hack up the driver for the D1 - -Signed-off-by: Samuel Holland ---- - arch/riscv/include/asm/bitops.h | 1 + - arch/riscv/include/asm/io.h | 2 +- - arch/riscv/include/asm/processor.h | 2 ++ - drivers/usb/musb-new/musb_io.h | 2 +- - drivers/usb/musb-new/sunxi.c | 6 ++++-- - 5 files changed, 9 insertions(+), 4 deletions(-) - ---- a/arch/riscv/include/asm/bitops.h -+++ b/arch/riscv/include/asm/bitops.h -@@ -78,6 +78,7 @@ static inline int __test_and_set_bit(int - return retval; - } - -+#define test_and_clear_bit __test_and_clear_bit - static inline int __test_and_clear_bit(int nr, void *addr) - { - int mask, retval; ---- a/arch/riscv/include/asm/io.h -+++ b/arch/riscv/include/asm/io.h -@@ -218,6 +218,7 @@ static inline u64 readq(const volatile v - #define insb(p, d, l) readsb(__io(p), d, l) - #define insw(p, d, l) readsw(__io(p), d, l) - #define insl(p, d, l) readsl(__io(p), d, l) -+#endif - - static inline void readsb(unsigned int *addr, void *data, int bytelen) - { -@@ -308,7 +309,6 @@ static inline void writesl(unsigned int - longlen--; - } - } --#endif - - #define outb_p(val, port) outb((val), (port)) - #define outw_p(val, port) outw((val), (port)) ---- a/arch/riscv/include/asm/processor.h -+++ b/arch/riscv/include/asm/processor.h -@@ -23,4 +23,6 @@ - * no one uses the macros defined in this head file. - **************************************************************/ - -+#define cpu_relax() barrier() -+ - #endif /* __ASM_RISCV_PROCESSOR_H */ ---- a/drivers/usb/musb-new/musb_io.h -+++ b/drivers/usb/musb-new/musb_io.h -@@ -23,7 +23,7 @@ - #if !defined(CONFIG_ARM) && !defined(CONFIG_SUPERH) \ - && !defined(CONFIG_PPC32) \ - && !defined(CONFIG_PPC64) && !defined(CONFIG_MIPS) \ -- && !defined(CONFIG_M68K) -+ && !defined(CONFIG_M68K) && !defined(CONFIG_RISCV) - static inline void readsl(const void __iomem *addr, void *buf, int len) - { insl((unsigned long)addr, buf, len); } - static inline void readsw(const void __iomem *addr, void *buf, int len) ---- a/drivers/usb/musb-new/sunxi.c -+++ b/drivers/usb/musb-new/sunxi.c -@@ -23,8 +23,8 @@ - #include - #include - #include --#include --#include -+//#include -+//#include - #include - #include - #include -@@ -174,6 +174,7 @@ static void USBC_ForceVbusValidToHigh(__ - - static void USBC_ConfigFIFO_Base(void) - { -+#if 0 - u32 reg_value; - - /* config usb fifo, 8kb mode */ -@@ -181,6 +182,7 @@ static void USBC_ConfigFIFO_Base(void) - reg_value &= ~(0x03 << 0); - reg_value |= BIT(0); - writel(reg_value, SUNXI_SRAMC_BASE + 0x04); -+#endif - } - - /****************************************************************************** diff --git a/lede/package/boot/uboot-d1/patches/0087-sunxi-Add-temporary-RISC-V-version-of-board-code.patch b/lede/package/boot/uboot-d1/patches/0087-sunxi-Add-temporary-RISC-V-version-of-board-code.patch deleted file mode 100644 index c066f29162..0000000000 --- a/lede/package/boot/uboot-d1/patches/0087-sunxi-Add-temporary-RISC-V-version-of-board-code.patch +++ /dev/null @@ -1,725 +0,0 @@ -From e3152c690732fb141500379f32fbe2203fa47059 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 6 Aug 2022 00:48:38 -0500 -Subject: [PATCH 87/90] sunxi: Add temporary RISC-V version of board code - -Signed-off-by: Samuel Holland ---- - board/sunxi/Makefile | 3 +- - board/sunxi/board-riscv.c | 687 +++++++++++++++++++++++++++++++++ - include/configs/sunxi-common.h | 1 - - 3 files changed, 689 insertions(+), 2 deletions(-) - create mode 100644 board/sunxi/board-riscv.c - ---- a/board/sunxi/Makefile -+++ b/board/sunxi/Makefile -@@ -6,7 +6,8 @@ - # - # (C) Copyright 2000-2003 - # Wolfgang Denk, DENX Software Engineering, wd@denx.de. --obj-y += board.o -+obj-$(CONFIG_ARM) += board.o -+obj-$(CONFIG_RISCV) += board-riscv.o - obj-$(CONFIG_SUN7I_GMAC) += gmac.o - obj-$(CONFIG_MACH_SUN4I) += dram_sun4i_auto.o - obj-$(CONFIG_MACH_SUN5I) += dram_sun5i_auto.o ---- /dev/null -+++ b/board/sunxi/board-riscv.c -@@ -0,0 +1,687 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2012-2013 Henrik Nordstrom -+ * (C) Copyright 2013 Luke Kenneth Casson Leighton -+ * -+ * (C) Copyright 2007-2011 -+ * Allwinner Technology Co., Ltd. -+ * Tom Cubie -+ * -+ * Some board init for the Allwinner A10-evb board. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#ifdef CONFIG_RISCV -+int board_init(void) -+{ -+ /* https://lore.kernel.org/u-boot/31587574-4cd1-02da-9761-0134ac82b94b@sholland.org/ */ -+ return cpu_probe_all(); -+} -+ -+int sunxi_get_sid(unsigned int *sid) -+{ -+ return -ENODEV; -+} -+ -+#define SPL_ADDR CONFIG_SUNXI_SRAM_ADDRESS -+ -+/* The low 8-bits of the 'boot_media' field in the SPL header */ -+#define SUNXI_BOOTED_FROM_MMC0 0 -+#define SUNXI_BOOTED_FROM_NAND 1 -+#define SUNXI_BOOTED_FROM_MMC2 2 -+#define SUNXI_BOOTED_FROM_SPI 3 -+#define SUNXI_BOOTED_FROM_MMC0_HIGH 0x10 -+#define SUNXI_BOOTED_FROM_MMC2_HIGH 0x12 -+ -+#define SUNXI_INVALID_BOOT_SOURCE -1 -+ -+static int sunxi_egon_valid(struct boot_file_head *egon_head) -+{ -+ return !memcmp(egon_head->magic, BOOT0_MAGIC, 8); /* eGON.BT0 */ -+} -+ -+static int sunxi_toc0_valid(struct toc0_main_info *toc0_info) -+{ -+ return !memcmp(toc0_info->name, TOC0_MAIN_INFO_NAME, 8); /* TOC0.GLH */ -+} -+ -+static int sunxi_get_boot_source(void) -+{ -+ struct boot_file_head *egon_head = (void *)SPL_ADDR; -+ struct toc0_main_info *toc0_info = (void *)SPL_ADDR; -+ -+ /* -+ * On the ARMv5 SoCs, the SPL header in SRAM is overwritten by the -+ * exception vectors in U-Boot proper, so we won't find any -+ * information there. Also the FEL stash is only valid in the SPL, -+ * so we can't use that either. So if this is called from U-Boot -+ * proper, just return MMC0 as a placeholder, for now. -+ */ -+ if (IS_ENABLED(CONFIG_MACH_SUNIV) && -+ !IS_ENABLED(CONFIG_SPL_BUILD)) -+ return SUNXI_BOOTED_FROM_MMC0; -+ -+ if (sunxi_egon_valid(egon_head)) -+ return readb(&egon_head->boot_media); -+ if (sunxi_toc0_valid(toc0_info)) -+ return readb(&toc0_info->platform[0]); -+ -+ /* Not a valid image, so we must have been booted via FEL. */ -+ return SUNXI_INVALID_BOOT_SOURCE; -+} -+ -+/* The sunxi internal brom will try to loader external bootloader -+ * from mmc0, nand flash, mmc2. -+ */ -+uint32_t sunxi_get_boot_device(void) -+{ -+ int boot_source = sunxi_get_boot_source(); -+ -+ /* -+ * When booting from the SD card or NAND memory, the "eGON.BT0" -+ * signature is expected to be found in memory at the address 0x0004 -+ * (see the "mksunxiboot" tool, which generates this header). -+ * -+ * When booting in the FEL mode over USB, this signature is patched in -+ * memory and replaced with something else by the 'fel' tool. This other -+ * signature is selected in such a way, that it can't be present in a -+ * valid bootable SD card image (because the BROM would refuse to -+ * execute the SPL in this case). -+ * -+ * This checks for the signature and if it is not found returns to -+ * the FEL code in the BROM to wait and receive the main u-boot -+ * binary over USB. If it is found, it determines where SPL was -+ * read from. -+ */ -+ switch (boot_source) { -+ case SUNXI_INVALID_BOOT_SOURCE: -+ return BOOT_DEVICE_BOARD; -+ case SUNXI_BOOTED_FROM_MMC0: -+ case SUNXI_BOOTED_FROM_MMC0_HIGH: -+ return BOOT_DEVICE_MMC1; -+ case SUNXI_BOOTED_FROM_NAND: -+ return BOOT_DEVICE_NAND; -+ case SUNXI_BOOTED_FROM_MMC2: -+ case SUNXI_BOOTED_FROM_MMC2_HIGH: -+ return BOOT_DEVICE_MMC2; -+ case SUNXI_BOOTED_FROM_SPI: -+ return BOOT_DEVICE_SPI; -+ } -+ -+ panic("Unknown boot source %d\n", boot_source); -+ return -1; /* Never reached */ -+} -+ -+uint32_t sunxi_get_spl_size(void) -+{ -+ struct boot_file_head *egon_head = (void *)SPL_ADDR; -+ struct toc0_main_info *toc0_info = (void *)SPL_ADDR; -+ -+ if (sunxi_egon_valid(egon_head)) -+ return readl(&egon_head->length); -+ if (sunxi_toc0_valid(toc0_info)) -+ return readl(&toc0_info->length); -+ -+ /* Not a valid image, so use the default U-Boot offset. */ -+ return 0; -+} -+ -+/* -+ * The eGON SPL image can be located at 8KB or at 128KB into an SD card or -+ * an eMMC device. The boot source has bit 4 set in the latter case. -+ * By adding 120KB to the normal offset when booting from a "high" location -+ * we can support both cases. -+ * Also U-Boot proper is located at least 32KB after the SPL, but will -+ * immediately follow the SPL if that is bigger than that. -+ */ -+unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc, -+ unsigned long raw_sect) -+{ -+ unsigned long spl_size = sunxi_get_spl_size(); -+ unsigned long sector; -+ -+ sector = max(raw_sect, spl_size / 512); -+ -+ switch (sunxi_get_boot_source()) { -+ case SUNXI_BOOTED_FROM_MMC0_HIGH: -+ case SUNXI_BOOTED_FROM_MMC2_HIGH: -+ sector += (128 - 8) * 2; -+ break; -+ } -+ -+ printf("SPL size = %lu, sector = %lu\n", spl_size, sector); -+ -+ return sector; -+} -+ -+u32 spl_boot_device(void) -+{ -+ return sunxi_get_boot_device(); -+} -+ -+#define CSR_MXSTATUS 0x7c0 -+#define CSR_MHCR 0x7c1 -+#define CSR_MCOR 0x7c2 -+#define CSR_MHINT 0x7c5 -+ -+int spl_board_init_f(void) -+{ -+ int ret; -+ struct udevice *dev; -+ -+ /* DDR init */ -+ ret = uclass_get_device(UCLASS_RAM, 0, &dev); -+ if (ret) { -+ debug("DRAM init failed: %d\n", ret); -+ return ret; -+ } -+ -+ /* Initialize extension CSRs. */ -+ printf("mxstatus=0x%08lx mhcr=0x%08lx mcor=0x%08lx mhint=0x%08lx\n", -+ csr_read(CSR_MXSTATUS), -+ csr_read(CSR_MHCR), -+ csr_read(CSR_MCOR), -+ csr_read(CSR_MHINT)); -+ -+ csr_set(CSR_MXSTATUS, 0x638000); -+ csr_write(CSR_MCOR, 0x70013); -+ csr_write(CSR_MHCR, 0x11ff); -+ csr_write(CSR_MHINT, 0x16e30c); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_SPL_BUILD -+void spl_perform_fixups(struct spl_image_info *spl_image) -+{ -+ struct ram_info info; -+ struct udevice *dev; -+ int ret; -+ -+ ret = uclass_get_device(UCLASS_RAM, 0, &dev); -+ if (ret) -+ panic("No RAM device"); -+ -+ ret = ram_get_info(dev, &info); -+ if (ret) -+ panic("No RAM info"); -+ -+ ret = fdt_fixup_memory(spl_image->fdt_addr, info.base, info.size); -+ if (ret) -+ panic("Failed to update DTB"); -+} -+#endif -+#endif -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+/* -+ * Try to use the environment from the boot source first. -+ * For MMC, this means a FAT partition on the boot device (SD or eMMC). -+ * If the raw MMC environment is also enabled, this is tried next. -+ * When booting from NAND we try UBI first, then NAND directly. -+ * SPI flash falls back to FAT (on SD card). -+ */ -+enum env_location env_get_location(enum env_operation op, int prio) -+{ -+ if (prio > 1) -+ return ENVL_UNKNOWN; -+ -+ /* NOWHERE is exclusive, no other option can be defined. */ -+ if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE)) -+ return ENVL_NOWHERE; -+ -+ switch (sunxi_get_boot_device()) { -+ case BOOT_DEVICE_MMC1: -+ case BOOT_DEVICE_MMC2: -+ if (prio == 0 && IS_ENABLED(CONFIG_ENV_IS_IN_FAT)) -+ return ENVL_FAT; -+ if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC)) -+ return ENVL_MMC; -+ break; -+ case BOOT_DEVICE_NAND: -+ if (prio == 0 && IS_ENABLED(CONFIG_ENV_IS_IN_UBI)) -+ return ENVL_UBI; -+ if (IS_ENABLED(CONFIG_ENV_IS_IN_NAND)) -+ return ENVL_NAND; -+ break; -+ case BOOT_DEVICE_SPI: -+ if (prio == 0 && IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH)) -+ return ENVL_SPI_FLASH; -+ if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT)) -+ return ENVL_FAT; -+ break; -+ case BOOT_DEVICE_BOARD: -+ break; -+ default: -+ break; -+ } -+ -+ /* -+ * If we come here for the first time, we *must* return a valid -+ * environment location other than ENVL_UNKNOWN, or the setup sequence -+ * in board_f() will silently hang. This is arguably a bug in -+ * env_init(), but for now pick one environment for which we know for -+ * sure to have a driver for. For all defconfigs this is either FAT -+ * or UBI, or NOWHERE, which is already handled above. -+ */ -+ if (prio == 0) { -+ if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT)) -+ return ENVL_FAT; -+ if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI)) -+ return ENVL_UBI; -+ } -+ -+ return ENVL_UNKNOWN; -+} -+ -+/* -+ * On older SoCs the SPL is actually at address zero, so using NULL as -+ * an error value does not work. -+ */ -+#define INVALID_SPL_HEADER ((void *)~0UL) -+ -+static struct boot_file_head * get_spl_header(uint8_t req_version) -+{ -+ struct boot_file_head *spl = (void *)(ulong)SPL_ADDR; -+ uint8_t spl_header_version = spl->spl_signature[3]; -+ -+ /* Is there really the SPL header (still) there? */ -+ if (memcmp(spl->spl_signature, SPL_SIGNATURE, 3) != 0) -+ return INVALID_SPL_HEADER; -+ -+ if (spl_header_version < req_version) { -+ printf("sunxi SPL version mismatch: expected %u, got %u\n", -+ req_version, spl_header_version); -+ return INVALID_SPL_HEADER; -+ } -+ -+ return spl; -+} -+ -+static const char *get_spl_dt_name(void) -+{ -+ struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); -+ -+ /* Check if there is a DT name stored in the SPL header. */ -+ if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) -+ return (char *)spl + spl->dt_name_offset; -+ -+ return NULL; -+} -+ -+#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 -+int mmc_get_env_dev(void) -+{ -+ switch (sunxi_get_boot_device()) { -+ case BOOT_DEVICE_MMC1: -+ return 0; -+ case BOOT_DEVICE_MMC2: -+ return 1; -+ default: -+ return CONFIG_SYS_MMC_ENV_DEV; -+ } -+} -+#endif -+ -+#ifdef CONFIG_SPL_BUILD -+void sunxi_board_init(void) -+{ -+#ifdef CONFIG_LED_STATUS -+ if (IS_ENABLED(CONFIG_SPL_DRIVERS_MISC)) -+ status_led_init(); -+#endif -+} -+#endif -+ -+#ifdef CONFIG_USB_GADGET -+int g_dnl_board_usb_cable_connected(void) -+{ -+ struct udevice *dev; -+ struct phy phy; -+ int ret; -+ -+ ret = uclass_get_device(UCLASS_USB_GADGET_GENERIC, 0, &dev); -+ if (ret) { -+ pr_err("%s: Cannot find USB device\n", __func__); -+ return ret; -+ } -+ -+ ret = generic_phy_get_by_name(dev, "usb", &phy); -+ if (ret) { -+ pr_err("failed to get %s USB PHY\n", dev->name); -+ return ret; -+ } -+ -+ ret = generic_phy_init(&phy); -+ if (ret) { -+ pr_debug("failed to init %s USB PHY\n", dev->name); -+ return ret; -+ } -+ -+ return sun4i_usb_phy_vbus_detect(&phy); -+} -+#endif -+ -+#ifdef CONFIG_SERIAL_TAG -+void get_board_serial(struct tag_serialnr *serialnr) -+{ -+ char *serial_string; -+ unsigned long long serial; -+ -+ serial_string = env_get("serial#"); -+ -+ if (serial_string) { -+ serial = simple_strtoull(serial_string, NULL, 16); -+ -+ serialnr->high = (unsigned int) (serial >> 32); -+ serialnr->low = (unsigned int) (serial & 0xffffffff); -+ } else { -+ serialnr->high = 0; -+ serialnr->low = 0; -+ } -+} -+#endif -+ -+/* -+ * Check the SPL header for the "sunxi" variant. If found: parse values -+ * that might have been passed by the loader ("fel" utility), and update -+ * the environment accordingly. -+ */ -+static void parse_spl_header(const uint32_t spl_addr) -+{ -+ struct boot_file_head *spl = get_spl_header(SPL_ENV_HEADER_VERSION); -+ -+ if (spl == INVALID_SPL_HEADER) -+ return; -+ -+ if (!spl->fel_script_address) -+ return; -+ -+ if (spl->fel_uEnv_length != 0) { -+ /* -+ * data is expected in uEnv.txt compatible format, so "env -+ * import -t" the string(s) at fel_script_address right away. -+ */ -+ himport_r(&env_htab, (char *)(uintptr_t)spl->fel_script_address, -+ spl->fel_uEnv_length, '\n', H_NOCLEAR, 0, 0, NULL); -+ return; -+ } -+ /* otherwise assume .scr format (mkimage-type script) */ -+ env_set_hex("fel_scriptaddr", spl->fel_script_address); -+} -+ -+static bool get_unique_sid(unsigned int *sid) -+{ -+ if (sunxi_get_sid(sid) != 0) -+ return false; -+ -+ if (!sid[0]) -+ return false; -+ -+ /* -+ * The single words 1 - 3 of the SID have quite a few bits -+ * which are the same on many models, so we take a crc32 -+ * of all 3 words, to get a more unique value. -+ * -+ * Note we only do this on newer SoCs as we cannot change -+ * the algorithm on older SoCs since those have been using -+ * fixed mac-addresses based on only using word 3 for a -+ * long time and changing a fixed mac-address with an -+ * u-boot update is not good. -+ */ -+#if !defined(CONFIG_MACH_SUN4I) && !defined(CONFIG_MACH_SUN5I) && \ -+ !defined(CONFIG_MACH_SUN6I) && !defined(CONFIG_MACH_SUN7I) && \ -+ !defined(CONFIG_MACH_SUN8I_A23) && !defined(CONFIG_MACH_SUN8I_A33) -+ sid[3] = crc32(0, (unsigned char *)&sid[1], 12); -+#endif -+ -+ /* Ensure the NIC specific bytes of the mac are not all 0 */ -+ if ((sid[3] & 0xffffff) == 0) -+ sid[3] |= 0x800000; -+ -+ return true; -+} -+ -+/* -+ * Note this function gets called multiple times. -+ * It must not make any changes to env variables which already exist. -+ */ -+static void setup_environment(const void *fdt) -+{ -+ char serial_string[17] = { 0 }; -+ unsigned int sid[4]; -+ uint8_t mac_addr[6]; -+ char ethaddr[16]; -+ int i; -+ -+ if (!get_unique_sid(sid)) -+ return; -+ -+ for (i = 0; i < 4; i++) { -+ sprintf(ethaddr, "ethernet%d", i); -+ if (!fdt_get_alias(fdt, ethaddr)) -+ continue; -+ -+ if (i == 0) -+ strcpy(ethaddr, "ethaddr"); -+ else -+ sprintf(ethaddr, "eth%daddr", i); -+ -+ if (env_get(ethaddr)) -+ continue; -+ -+ /* Non OUI / registered MAC address */ -+ mac_addr[0] = (i << 4) | 0x02; -+ mac_addr[1] = (sid[0] >> 0) & 0xff; -+ mac_addr[2] = (sid[3] >> 24) & 0xff; -+ mac_addr[3] = (sid[3] >> 16) & 0xff; -+ mac_addr[4] = (sid[3] >> 8) & 0xff; -+ mac_addr[5] = (sid[3] >> 0) & 0xff; -+ -+ eth_env_set_enetaddr(ethaddr, mac_addr); -+ } -+ -+ if (!env_get("serial#")) { -+ snprintf(serial_string, sizeof(serial_string), -+ "%08x%08x", sid[0], sid[3]); -+ -+ env_set("serial#", serial_string); -+ } -+} -+ -+int misc_init_r(void) -+{ -+ const char *spl_dt_name; -+ uint boot; -+ -+ env_set("fel_booted", NULL); -+ env_set("fel_scriptaddr", NULL); -+ env_set("mmc_bootdev", NULL); -+ -+ boot = sunxi_get_boot_device(); -+ /* determine if we are running in FEL mode */ -+ if (boot == BOOT_DEVICE_BOARD) { -+ env_set("fel_booted", "1"); -+ parse_spl_header(SPL_ADDR); -+ /* or if we booted from MMC, and which one */ -+ } else if (boot == BOOT_DEVICE_MMC1) { -+ env_set("mmc_bootdev", "0"); -+ } else if (boot == BOOT_DEVICE_MMC2) { -+ env_set("mmc_bootdev", "1"); -+ } -+ -+ /* Set fdtfile to match the FIT configuration chosen in SPL. */ -+ spl_dt_name = get_spl_dt_name(); -+ if (spl_dt_name) { -+ char *prefix = IS_ENABLED(CONFIG_ARM64) ? "allwinner/" : ""; -+ char str[64]; -+ -+ snprintf(str, sizeof(str), "%s%s.dtb", prefix, spl_dt_name); -+ env_set("fdtfile", str); -+ } -+ -+ setup_environment(gd->fdt_blob); -+ -+ return 0; -+} -+ -+int board_late_init(void) -+{ -+#ifdef CONFIG_USB_ETHER -+ usb_ether_init(); -+#endif -+ -+#ifdef SUNXI_SCP_BASE -+ if (!rproc_load(0, SUNXI_SCP_BASE, SUNXI_SCP_MAX_SIZE)) { -+ puts("Starting SCP...\n"); -+ rproc_start(0); -+ } -+#endif -+ -+ return 0; -+} -+ -+static void bluetooth_dt_fixup(void *blob) -+{ -+ /* Some devices ship with a Bluetooth controller default address. -+ * Set a valid address through the device tree. -+ */ -+ uchar tmp[ETH_ALEN], bdaddr[ETH_ALEN]; -+ unsigned int sid[4]; -+ int i; -+ -+ if (!CONFIG_BLUETOOTH_DT_DEVICE_FIXUP[0]) -+ return; -+ -+ if (eth_env_get_enetaddr("bdaddr", tmp)) { -+ /* Convert between the binary formats of the corresponding stacks */ -+ for (i = 0; i < ETH_ALEN; ++i) -+ bdaddr[i] = tmp[ETH_ALEN - i - 1]; -+ } else { -+ if (!get_unique_sid(sid)) -+ return; -+ -+ bdaddr[0] = ((sid[3] >> 0) & 0xff) ^ 1; -+ bdaddr[1] = (sid[3] >> 8) & 0xff; -+ bdaddr[2] = (sid[3] >> 16) & 0xff; -+ bdaddr[3] = (sid[3] >> 24) & 0xff; -+ bdaddr[4] = (sid[0] >> 0) & 0xff; -+ bdaddr[5] = 0x02; -+ } -+ -+ do_fixup_by_compat(blob, CONFIG_BLUETOOTH_DT_DEVICE_FIXUP, -+ "local-bd-address", bdaddr, ETH_ALEN, 1); -+} -+ -+int ft_board_setup(void *blob, struct bd_info *bd) -+{ -+ int __maybe_unused r; -+ -+ /* -+ * Call setup_environment and fdt_fixup_ethernet again -+ * in case the boot fdt has ethernet aliases the u-boot -+ * copy does not have. -+ */ -+ setup_environment(blob); -+ fdt_fixup_ethernet(blob); -+ -+ bluetooth_dt_fixup(blob); -+ -+#ifdef CONFIG_VIDEO_DT_SIMPLEFB -+ r = sunxi_simplefb_setup(blob); -+ if (r) -+ return r; -+#endif -+ return 0; -+} -+ -+#ifdef CONFIG_SPL_LOAD_FIT -+ -+static void set_spl_dt_name(const char *name) -+{ -+ struct boot_file_head *spl = get_spl_header(SPL_ENV_HEADER_VERSION); -+ -+ if (spl == INVALID_SPL_HEADER) -+ return; -+ -+ /* Promote the header version for U-Boot proper, if needed. */ -+ if (spl->spl_signature[3] < SPL_DT_HEADER_VERSION) -+ spl->spl_signature[3] = SPL_DT_HEADER_VERSION; -+ -+ strcpy((char *)&spl->string_pool, name); -+ spl->dt_name_offset = offsetof(struct boot_file_head, string_pool); -+} -+ -+int board_fit_config_name_match(const char *name) -+{ -+ const char *best_dt_name = get_spl_dt_name(); -+ int ret; -+ -+#ifdef CONFIG_DEFAULT_DEVICE_TREE -+ if (best_dt_name == NULL) -+ best_dt_name = CONFIG_DEFAULT_DEVICE_TREE; -+#endif -+ -+ if (best_dt_name == NULL) { -+ /* No DT name was provided, so accept the first config. */ -+ return 0; -+ } -+#ifdef CONFIG_PINE64_DT_SELECTION -+ if (strstr(best_dt_name, "-pine64-plus")) { -+ /* Differentiate the Pine A64 boards by their DRAM size. */ -+ if ((gd->ram_size == 512 * 1024 * 1024)) -+ best_dt_name = "sun50i-a64-pine64"; -+ } -+#endif -+#ifdef CONFIG_PINEPHONE_DT_SELECTION -+ if (strstr(best_dt_name, "-pinephone")) { -+ /* Differentiate the PinePhone revisions by GPIO inputs. */ -+ prcm_apb0_enable(PRCM_APB0_GATE_PIO); -+ sunxi_gpio_set_pull(SUNXI_GPL(6), SUNXI_GPIO_PULL_UP); -+ sunxi_gpio_set_cfgpin(SUNXI_GPL(6), SUNXI_GPIO_INPUT); -+ udelay(100); -+ -+ /* PL6 is pulled low by the modem on v1.2. */ -+ if (gpio_get_value(SUNXI_GPL(6)) == 0) -+ best_dt_name = "sun50i-a64-pinephone-1.2"; -+ else -+ best_dt_name = "sun50i-a64-pinephone-1.1"; -+ -+ sunxi_gpio_set_cfgpin(SUNXI_GPL(6), SUNXI_GPIO_DISABLE); -+ sunxi_gpio_set_pull(SUNXI_GPL(6), SUNXI_GPIO_PULL_DISABLE); -+ prcm_apb0_disable(PRCM_APB0_GATE_PIO); -+ } -+#endif -+ -+ ret = strcmp(name, best_dt_name); -+ -+ /* -+ * If one of the FIT configurations matches the most accurate DT name, -+ * update the SPL header to provide that DT name to U-Boot proper. -+ */ -+ if (ret == 0) -+ set_spl_dt_name(best_dt_name); -+ -+ return ret; -+} -+#endif ---- a/include/configs/sunxi-common.h -+++ b/include/configs/sunxi-common.h -@@ -12,7 +12,6 @@ - #ifndef _SUNXI_COMMON_CONFIG_H - #define _SUNXI_COMMON_CONFIG_H - --#include - #include - - /* Serial & console */ diff --git a/lede/package/boot/uboot-d1/patches/0088-sunxi-riscv-Copy-in-WIP-version-of-devicetrees.patch b/lede/package/boot/uboot-d1/patches/0088-sunxi-riscv-Copy-in-WIP-version-of-devicetrees.patch deleted file mode 100644 index 95ed7b2027..0000000000 --- a/lede/package/boot/uboot-d1/patches/0088-sunxi-riscv-Copy-in-WIP-version-of-devicetrees.patch +++ /dev/null @@ -1,1327 +0,0 @@ -From 197d4096c697bcde8f9833b1d04b17eb2b232b85 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Mon, 31 Oct 2022 22:59:00 -0500 -Subject: [PATCH 88/90] sunxi: riscv: Copy in WIP version of devicetrees - -While the bindings still are not stable, this should help things work -out of the box. - -Signed-off-by: Samuel Holland ---- - .../riscv/dts/sun20i-d1-clockworkpi-v3.14.dts | 134 +++++++- - .../dts/sun20i-d1-common-regulators.dtsi | 13 + - arch/riscv/dts/sun20i-d1-devterm-v3.14.dts | 16 + - .../dts/sun20i-d1-dongshan-nezha-stu.dts | 48 ++- - .../dts/sun20i-d1-lichee-rv-86-panel-480p.dts | 51 +++ - .../dts/sun20i-d1-lichee-rv-86-panel.dtsi | 64 ++++ - arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts | 98 ++++++ - arch/riscv/dts/sun20i-d1-lichee-rv.dts | 6 + - arch/riscv/dts/sun20i-d1-mangopi-mq-pro.dts | 41 +++ - arch/riscv/dts/sun20i-d1-nezha.dts | 117 ++++++- - arch/riscv/dts/sun20i-d1.dtsi | 314 +++++++++++++++++- - 11 files changed, 881 insertions(+), 21 deletions(-) - ---- a/arch/riscv/dts/sun20i-d1-clockworkpi-v3.14.dts -+++ b/arch/riscv/dts/sun20i-d1-clockworkpi-v3.14.dts -@@ -22,16 +22,78 @@ - stdout-path = "serial0:115200n8"; - }; - -+ audio_amplifier: audio-amplifier { -+ compatible = "simple-audio-amplifier"; -+ enable-gpios = <&pio 4 1 GPIO_ACTIVE_HIGH>; /* PE1/GPIO11 */ -+ sound-name-prefix = "Amplifier"; -+ VCC-supply = <®_vcc>; -+ }; -+ -+ /* -+ * FIXME: This is not really an amplifier, but the amplifier binding -+ * has the needed properties and behavior. -+ */ -+ audio_switch: audio-switch { -+ compatible = "simple-audio-amplifier"; -+ enable-gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2/AUD_SWITCH */ -+ sound-name-prefix = "Switch"; -+ VCC-supply = <®_aldo1>; -+ }; -+ -+ backlight: backlight { -+ compatible = "pwm-backlight"; -+ power-supply = <®_vcc>; -+ pwms = <&pwm 4 50000 0>; /* PD20/GPIO9 */ -+ }; -+ -+ bt_sco_codec: bt-sco-codec { -+ #sound-dai-cells = <0>; -+ compatible = "linux,bt-sco"; -+ }; -+ -+ bt-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "Bluetooth"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ simple-audio-card,dai-link@0 { -+ format = "dsp_a"; -+ frame-master = <&bt_sound_cpu>; -+ bitclock-master = <&bt_sound_cpu>; -+ -+ bt_sound_cpu: cpu { -+ sound-dai = <&i2s1>; -+ }; -+ -+ codec { -+ sound-dai = <&bt_sco_codec>; -+ }; -+ }; -+ }; -+ -+ hdmi_connector: connector { -+ compatible = "hdmi-connector"; -+ type = "d"; -+ -+ port { -+ hdmi_connector_in: endpoint { -+ remote-endpoint = <&hdmi_out_connector>; -+ }; -+ }; -+ }; -+ - /* - * This regulator is PWM-controlled, but the PWM controller is not - * yet supported, so fix the regulator to its default voltage. - */ - reg_vdd_cpu: vdd-cpu { -- compatible = "regulator-fixed"; -+ compatible = "pwm-regulator"; -+ pwms = <&pwm 0 50000 0>; -+ pwm-supply = <®_vcc>; - regulator-name = "vdd-cpu"; -- regulator-min-microvolt = <1100000>; -- regulator-max-microvolt = <1100000>; -- vin-supply = <®_vcc>; -+ regulator-min-microvolt = <810000>; -+ regulator-max-microvolt = <1160000>; - }; - - wifi_pwrseq: wifi-pwrseq { -@@ -40,14 +102,51 @@ - }; - }; - -+&codec { -+ aux-devs = <&audio_amplifier>, <&audio_switch>; -+ hp-det-gpio = <&pio 1 12 GPIO_ACTIVE_HIGH>; /* PB12/GPIO10 */ -+ pin-switches = "Internal Speakers"; -+ routing = "Internal Speakers", "Amplifier OUTL", -+ "Internal Speakers", "Amplifier OUTR", -+ "Amplifier INL", "Switch OUTL", -+ "Amplifier INR", "Switch OUTR", -+ "Headphone Jack", "Switch OUTL", -+ "Headphone Jack", "Switch OUTR", -+ "Switch INL", "HPOUTL", -+ "Switch INR", "HPOUTR", -+ "MICIN3", "Headset Microphone", -+ "Headset Microphone", "HBIAS"; -+ widgets = "Microphone", "Headset Microphone", -+ "Headphone", "Headphone Jack", -+ "Speaker", "Internal Speakers"; -+}; -+ - &cpu0 { - cpu-supply = <®_vdd_cpu>; - }; - -+&de { -+ status = "okay"; -+}; -+ - &ehci1 { - status = "okay"; - }; - -+&hdmi { -+ status = "okay"; -+}; -+ -+&hdmi_out { -+ hdmi_out_connector: endpoint { -+ remote-endpoint = <&hdmi_connector_in>; -+ }; -+}; -+ -+&hdmi_phy { -+ status = "okay"; -+}; -+ - &i2c0 { - pinctrl-0 = <&i2c0_pb10_pins>; - pinctrl-names = "default"; -@@ -169,6 +268,12 @@ - }; - }; - -+&i2s1 { -+ pinctrl-0 = <&i2s1_clk_pins>, <&i2s1_din_pin>, <&i2s1_dout_pin>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ - &mmc0 { - broken-cd; - bus-width = <4>; -@@ -205,6 +310,27 @@ - - &pio { - vcc-pg-supply = <®_ldoa>; -+ -+ i2s1_clk_pins: i2s1-clk-pins { -+ pins = "PG12", "PG13"; -+ function = "i2s1"; -+ }; -+ -+ i2s1_din_pin: i2s1-din-pin { -+ pins = "PG14"; -+ function = "i2s1_din"; -+ }; -+ -+ i2s1_dout_pin: i2s1-dout-pin { -+ pins = "PG15"; -+ function = "i2s1_dout"; -+ }; -+}; -+ -+&pwm { -+ pinctrl-0 = <&pwm0_pd16_pin>, <&pwm4_pd20_pin>; -+ pinctrl-names = "default"; -+ status = "okay"; - }; - - &uart0 { ---- a/arch/riscv/dts/sun20i-d1-common-regulators.dtsi -+++ b/arch/riscv/dts/sun20i-d1-common-regulators.dtsi -@@ -18,6 +18,15 @@ - }; - }; - -+&codec { -+ avcc-supply = <®_aldo>; -+ hpvcc-supply = <®_hpldo>; -+}; -+ -+&hdmi { -+ hvcc-supply = <®_ldoa>; -+}; -+ - &lradc { - vref-supply = <®_aldo>; - }; -@@ -49,3 +58,7 @@ - regulator-max-microvolt = <1800000>; - ldo-in-supply = <®_vcc_3v3>; - }; -+ -+&ths { -+ vref-supply = <®_aldo>; -+}; ---- a/arch/riscv/dts/sun20i-d1-devterm-v3.14.dts -+++ b/arch/riscv/dts/sun20i-d1-devterm-v3.14.dts -@@ -35,3 +35,19 @@ - }; - }; - }; -+ -+&dsi { -+ pinctrl-0 = <&dsi_4lane_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ panel@0 { -+ compatible = "clockwork,cwd686"; -+ reg = <0>; -+ backlight = <&backlight>; -+ reset-gpios = <&pio 3 19 GPIO_ACTIVE_LOW>; /* PD19/GPIO8 */ -+ rotation = <90>; -+ iovcc-supply = <®_dcdc3>; -+ vci-supply = <®_aldo2>; -+ }; -+}; ---- a/arch/riscv/dts/sun20i-d1-dongshan-nezha-stu.dts -+++ b/arch/riscv/dts/sun20i-d1-dongshan-nezha-stu.dts -@@ -23,6 +23,17 @@ - stdout-path = "serial0:115200n8"; - }; - -+ hdmi_connector: connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_connector_in: endpoint { -+ remote-endpoint = <&hdmi_out_connector>; -+ }; -+ }; -+ }; -+ - leds { - compatible = "gpio-leds"; - -@@ -43,16 +54,13 @@ - vin-supply = <®_vcc>; - }; - -- /* -- * This regulator is PWM-controlled, but the PWM controller is not -- * yet supported, so fix the regulator to its default voltage. -- */ - reg_vdd_cpu: vdd-cpu { -- compatible = "regulator-fixed"; -+ compatible = "pwm-regulator"; -+ pwms = <&pwm 0 50000 0>; -+ pwm-supply = <®_vcc>; - regulator-name = "vdd-cpu"; -- regulator-min-microvolt = <1100000>; -- regulator-max-microvolt = <1100000>; -- vin-supply = <®_vcc>; -+ regulator-min-microvolt = <810000>; -+ regulator-max-microvolt = <1160000>; - }; - }; - -@@ -60,6 +68,10 @@ - cpu-supply = <®_vdd_cpu>; - }; - -+&de { -+ status = "okay"; -+}; -+ - &ehci0 { - status = "okay"; - }; -@@ -73,6 +85,20 @@ - status = "okay"; - }; - -+&hdmi { -+ status = "okay"; -+}; -+ -+&hdmi_out { -+ hdmi_out_connector: endpoint { -+ remote-endpoint = <&hdmi_connector_in>; -+ }; -+}; -+ -+&hdmi_phy { -+ status = "okay"; -+}; -+ - &mdio { - ext_rgmii_phy: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; -@@ -95,6 +121,12 @@ - status = "okay"; - }; - -+&pwm { -+ pinctrl-0 = <&pwm0_pd16_pin>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ - &uart0 { - pinctrl-0 = <&uart0_pb8_pins>; - pinctrl-names = "default"; ---- a/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel-480p.dts -+++ b/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel-480p.dts -@@ -7,6 +7,40 @@ - model = "Sipeed Lichee RV 86 Panel (480p)"; - compatible = "sipeed,lichee-rv-86-panel-480p", "sipeed,lichee-rv", - "allwinner,sun20i-d1"; -+ -+ backlight: backlight { -+ compatible = "pwm-backlight"; -+ power-supply = <®_vcc>; -+ pwms = <&pwm 7 50000 0>; -+ }; -+ -+ spi { -+ compatible = "spi-gpio"; -+ cs-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */ -+ mosi-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */ -+ sck-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */ -+ num-chipselects = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ panel@0 { -+ compatible = "sitronix,st7701s"; -+ reg = <0>; -+ backlight = <&backlight>; -+ reset-gpios = <&pio 6 13 GPIO_ACTIVE_LOW>; /* PG13 */ -+ spi-3wire; -+ -+ port { -+ panel_in_tcon_lcd0: endpoint { -+ remote-endpoint = <&tcon_lcd0_out_panel>; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&de { -+ status = "okay"; - }; - - &i2c2 { -@@ -27,3 +61,20 @@ - wakeup-source; - }; - }; -+ -+&pwm { -+ pinctrl-0 = <&pwm7_pd22_pin>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&tcon_lcd0 { -+ pinctrl-0 = <&lcd_rgb666_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&tcon_lcd0_out { -+ tcon_lcd0_out_panel: endpoint { -+ remote-endpoint = <&panel_in_tcon_lcd0>; -+ }; -+}; ---- a/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel.dtsi -+++ b/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel.dtsi -@@ -9,6 +9,39 @@ - ethernet1 = &xr829; - }; - -+ audio_amplifier: audio-amplifier { -+ compatible = "simple-audio-amplifier"; -+ enable-gpios = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */ -+ sound-name-prefix = "Amplifier"; -+ }; -+ -+ dmic_codec: dmic-codec { -+ compatible = "dmic-codec"; -+ num-channels = <2>; -+ #sound-dai-cells = <0>; -+ }; -+ -+ dmic-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "DMIC"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ simple-audio-card,dai-link@0 { -+ format = "pdm"; -+ frame-master = <&link0_cpu>; -+ bitclock-master = <&link0_cpu>; -+ -+ link0_cpu: cpu { -+ sound-dai = <&dmic>; -+ }; -+ -+ link0_codec: codec { -+ sound-dai = <&dmic_codec>; -+ }; -+ }; -+ }; -+ - /* PC1 is repurposed as BT_WAKE_AP */ - /delete-node/ leds; - -@@ -24,6 +57,27 @@ - }; - }; - -+&codec { -+ aux-devs = <&audio_amplifier>; -+ routing = "Internal Speaker", "Amplifier OUTL", -+ "Internal Speaker", "Amplifier OUTR", -+ "Amplifier INL", "HPOUTL", -+ "Amplifier INR", "HPOUTR", -+ "LINEINL", "HPOUTL", -+ "LINEINR", "HPOUTR", -+ "MICIN3", "Internal Microphone", -+ "Internal Microphone", "HBIAS"; -+ widgets = "Microphone", "Internal Microphone", -+ "Speaker", "Internal Speaker"; -+ status = "okay"; -+}; -+ -+&dmic { -+ pinctrl-0 = <&dmic_pb11_d0_pin>, <&dmic_pe17_clk_pin>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ - &ehci1 { - status = "okay"; - }; -@@ -69,6 +123,16 @@ - pins = "PG11"; - function = "clk"; - }; -+ -+ dmic_pb11_d0_pin: dmic-pb11-d0-pin { -+ pins = "PB11"; -+ function = "dmic"; -+ }; -+ -+ dmic_pe17_clk_pin: dmic-pe17-clk-pin { -+ pins = "PE17"; -+ function = "dmic"; -+ }; - }; - - &uart1 { ---- a/arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts -+++ b/arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts -@@ -15,16 +15,102 @@ - ethernet1 = &rtl8723ds; - }; - -+ dmic_codec: dmic-codec { -+ compatible = "dmic-codec"; -+ num-channels = <2>; -+ #sound-dai-cells = <0>; -+ }; -+ -+ dmic-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "DMIC"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ simple-audio-card,dai-link@0 { -+ format = "pdm"; -+ frame-master = <&link0_cpu>; -+ bitclock-master = <&link0_cpu>; -+ -+ link0_cpu: cpu { -+ sound-dai = <&dmic>; -+ }; -+ -+ link0_codec: codec { -+ sound-dai = <&dmic_codec>; -+ }; -+ }; -+ }; -+ -+ hdmi_connector: connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_connector_in: endpoint { -+ remote-endpoint = <&hdmi_out_connector>; -+ }; -+ }; -+ }; -+ - wifi_pwrseq: wifi-pwrseq { - compatible = "mmc-pwrseq-simple"; - reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */ - }; - }; - -+&codec { -+ routing = "Internal Speaker", "HPOUTL", -+ "Internal Speaker", "HPOUTR", -+ "LINEINL", "HPOUTL", -+ "LINEINR", "HPOUTR", -+ "MICIN3", "Internal Microphone", -+ "Internal Microphone", "HBIAS"; -+ widgets = "Microphone", "Internal Microphone", -+ "Speaker", "Internal Speaker"; -+ status = "okay"; -+}; -+ -+&de { -+ status = "okay"; -+}; -+ -+&dmic { -+ pinctrl-0 = <&dmic_pb11_d0_pin>, <&dmic_pe17_clk_pin>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ - &ehci1 { - status = "okay"; - }; - -+&hdmi { -+ status = "okay"; -+}; -+ -+&hdmi_out { -+ hdmi_out_connector: endpoint { -+ remote-endpoint = <&hdmi_connector_in>; -+ }; -+}; -+ -+&hdmi_phy { -+ status = "okay"; -+}; -+ -+&ledc { -+ pinctrl-0 = <&ledc_pc0_pin>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ multi-led@0 { -+ reg = <0x0>; -+ color = ; -+ function = LED_FUNCTION_STATUS; -+ }; -+}; -+ - &lradc { - status = "okay"; - -@@ -55,6 +141,18 @@ - status = "okay"; - }; - -+&pio { -+ dmic_pb11_d0_pin: dmic-pb11-d0-pin { -+ pins = "PB11"; -+ function = "dmic"; -+ }; -+ -+ dmic_pe17_clk_pin: dmic-pe17-clk-pin { -+ pins = "PE17"; -+ function = "dmic"; -+ }; -+}; -+ - &uart1 { - uart-has-rtscts; - pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>; ---- a/arch/riscv/dts/sun20i-d1-lichee-rv.dts -+++ b/arch/riscv/dts/sun20i-d1-lichee-rv.dts -@@ -65,6 +65,12 @@ - status = "okay"; - }; - -+&spi0 { -+ pinctrl-0 = <&spi0_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ - &uart0 { - pinctrl-0 = <&uart0_pb8_pins>; - pinctrl-names = "default"; ---- a/arch/riscv/dts/sun20i-d1-mangopi-mq-pro.dts -+++ b/arch/riscv/dts/sun20i-d1-mangopi-mq-pro.dts -@@ -4,6 +4,7 @@ - /dts-v1/; - - #include -+#include - - #include "sun20i-d1.dtsi" - #include "sun20i-d1-common-regulators.dtsi" -@@ -22,6 +23,28 @@ - stdout-path = "serial0:115200n8"; - }; - -+ hdmi_connector: connector { -+ compatible = "hdmi-connector"; -+ type = "c"; -+ -+ port { -+ hdmi_connector_in: endpoint { -+ remote-endpoint = <&hdmi_out_connector>; -+ }; -+ }; -+ }; -+ -+ leds { -+ compatible = "pwm-leds"; -+ -+ led { -+ color = ; -+ function = LED_FUNCTION_STATUS; -+ max-brightness = <255>; -+ pwms = <&pwm 2 50000 0>; -+ }; -+ }; -+ - reg_avdd2v8: avdd2v8 { - compatible = "regulator-fixed"; - regulator-name = "avdd2v8"; -@@ -56,10 +79,28 @@ - cpu-supply = <®_vdd_cpu>; - }; - -+&de { -+ status = "okay"; -+}; -+ - &ehci1 { - status = "okay"; - }; - -+&hdmi { -+ status = "okay"; -+}; -+ -+&hdmi_out { -+ hdmi_out_connector: endpoint { -+ remote-endpoint = <&hdmi_connector_in>; -+ }; -+}; -+ -+&hdmi_phy { -+ status = "okay"; -+}; -+ - &mmc0 { - bus-width = <4>; - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ ---- a/arch/riscv/dts/sun20i-d1-nezha.dts -+++ b/arch/riscv/dts/sun20i-d1-nezha.dts -@@ -5,6 +5,7 @@ - - #include - #include -+#include - - #include "sun20i-d1.dtsi" - #include "sun20i-d1-common-regulators.dtsi" -@@ -18,12 +19,24 @@ - ethernet1 = &xr829; - mmc0 = &mmc0; - serial0 = &uart0; -+ spi0 = &spi0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - -+ hdmi_connector: connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_connector_in: endpoint { -+ remote-endpoint = <&hdmi_out_connector>; -+ }; -+ }; -+ }; -+ - reg_usbvbus: usbvbus { - compatible = "regulator-fixed"; - regulator-name = "usbvbus"; -@@ -34,16 +47,13 @@ - vin-supply = <®_vcc>; - }; - -- /* -- * This regulator is PWM-controlled, but the PWM controller is not -- * yet supported, so fix the regulator to its default voltage. -- */ - reg_vdd_cpu: vdd-cpu { -- compatible = "regulator-fixed"; -+ compatible = "pwm-regulator"; -+ pwms = <&pwm 0 50000 0>; -+ pwm-supply = <®_vcc>; - regulator-name = "vdd-cpu"; -- regulator-min-microvolt = <1100000>; -- regulator-max-microvolt = <1100000>; -- vin-supply = <®_vcc>; -+ regulator-min-microvolt = <810000>; -+ regulator-max-microvolt = <1160000>; - }; - - wifi_pwrseq: wifi-pwrseq { -@@ -52,10 +62,26 @@ - }; - }; - -+&codec { -+ routing = "Headphone Jack", "HPOUTL", -+ "Headphone Jack", "HPOUTR", -+ "LINEINL", "HPOUTL", -+ "LINEINR", "HPOUTR", -+ "MICIN3", "Headset Microphone", -+ "Headset Microphone", "HBIAS"; -+ widgets = "Microphone", "Headset Microphone", -+ "Headphone", "Headphone Jack"; -+ status = "okay"; -+}; -+ - &cpu0 { - cpu-supply = <®_vdd_cpu>; - }; - -+&de { -+ status = "okay"; -+}; -+ - &ehci0 { - status = "okay"; - }; -@@ -73,6 +99,20 @@ - status = "okay"; - }; - -+&hdmi { -+ status = "okay"; -+}; -+ -+&hdmi_out { -+ hdmi_out_connector: endpoint { -+ remote-endpoint = <&hdmi_connector_in>; -+ }; -+}; -+ -+&hdmi_phy { -+ status = "okay"; -+}; -+ - &i2c2 { - pinctrl-0 = <&i2c2_pb0_pins>; - pinctrl-names = "default"; -@@ -90,6 +130,18 @@ - }; - }; - -+&ledc { -+ pinctrl-0 = <&ledc_pc0_pin>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ multi-led@0 { -+ reg = <0x0>; -+ color = ; -+ function = LED_FUNCTION_STATUS; -+ }; -+}; -+ - &lradc { - status = "okay"; - -@@ -142,6 +194,55 @@ - status = "okay"; - }; - -+&pwm { -+ pinctrl-0 = <&pwm0_pd16_pin>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&spi0 { -+ pinctrl-0 = <&spi0_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ flash@0 { -+ compatible = "spi-nand"; -+ reg = <0>; -+ -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ label = "boot0"; -+ reg = <0x00000000 0x00100000>; -+ }; -+ -+ partition@100000 { -+ label = "uboot"; -+ reg = <0x00100000 0x00300000>; -+ }; -+ -+ partition@400000 { -+ label = "secure_storage"; -+ reg = <0x00400000 0x00100000>; -+ }; -+ -+ partition@500000 { -+ label = "sys"; -+ reg = <0x00500000 0x0fb00000>; -+ }; -+ }; -+ }; -+}; -+ -+&spi1 { -+ pinctrl-0 = <&spi1_pd_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ - &uart0 { - pinctrl-0 = <&uart0_pb8_pins>; - pinctrl-names = "default"; ---- a/arch/riscv/dts/sun20i-d1.dtsi -+++ b/arch/riscv/dts/sun20i-d1.dtsi -@@ -59,6 +59,35 @@ - #clock-cells = <0>; - }; - -+ thermal-zones { -+ cpu-thermal { -+ polling-delay = <0>; -+ polling-delay-passive = <0>; -+ thermal-sensors = <&ths>; -+ -+ trips { -+ cpu_target: cpu-target { -+ hysteresis = <3000>; -+ temperature = <85000>; -+ type = "passive"; -+ }; -+ -+ cpu-crit { -+ hysteresis = <0>; -+ temperature = <110000>; -+ type = "critical"; -+ }; -+ }; -+ -+ cooling-maps { -+ map0 { -+ trip = <&cpu_target>; -+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ }; -+ }; -+ }; -+ - soc { - compatible = "simple-bus"; - ranges; -@@ -95,6 +124,14 @@ - #interrupt-cells = <3>; - - /omit-if-no-ref/ -+ dsi_4lane_pins: dsi-4lane-pins { -+ pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", -+ "PD6", "PD7", "PD8", "PD9"; -+ drive-strength = <30>; -+ function = "dsi"; -+ }; -+ -+ /omit-if-no-ref/ - i2c0_pb10_pins: i2c0-pb10-pins { - pins = "PB10", "PB11"; - function = "i2c0"; -@@ -116,6 +153,12 @@ - }; - - /omit-if-no-ref/ -+ ledc_pc0_pin: ledc-pc0-pin { -+ pins = "PC0"; -+ function = "ledc"; -+ }; -+ -+ /omit-if-no-ref/ - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; - function = "mmc0"; -@@ -149,6 +192,48 @@ - }; - - /omit-if-no-ref/ -+ pwm0_pd16_pin: pwm0-pd16-pin { -+ pins = "PD16"; -+ function = "pwm0"; -+ }; -+ -+ /omit-if-no-ref/ -+ pwm2_pd18_pin: pwm2-pd18-pin { -+ pins = "PD18"; -+ function = "pwm2"; -+ }; -+ -+ /omit-if-no-ref/ -+ pwm4_pd20_pin: pwm4-pd20-pin { -+ pins = "PD20"; -+ function = "pwm4"; -+ }; -+ -+ /omit-if-no-ref/ -+ pwm7_pd22_pin: pwm7-pd22-pin { -+ pins = "PD22"; -+ function = "pwm7"; -+ }; -+ -+ /omit-if-no-ref/ -+ spi0_pins: spi0-pins { -+ pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; -+ function = "spi0"; -+ }; -+ -+ /omit-if-no-ref/ -+ spi1_pb_pins: spi1-pb-pins { -+ pins = "PB0", "PB8", "PB9", "PB10", "PB11", "PB12"; -+ function = "spi1"; -+ }; -+ -+ /omit-if-no-ref/ -+ spi1_pd_pins: spi1-pd-pins { -+ pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15"; -+ function = "spi1"; -+ }; -+ -+ /omit-if-no-ref/ - uart0_pb8_pins: uart0-pb8-pins { - pins = "PB8", "PB9"; - function = "uart0"; -@@ -167,6 +252,17 @@ - }; - }; - -+ pwm: pwm@2000c00 { -+ compatible = "allwinner,sun20i-d1-pwm"; -+ reg = <0x2000c00 0x400>; -+ interrupts = <34 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_PWM>, <&osc24M>; -+ clock-names = "bus", "mod"; -+ resets = <&ccu RST_BUS_PWM>; -+ status = "disabled"; -+ #pwm-cells = <3>; -+ }; -+ - ccu: clock-controller@2001000 { - compatible = "allwinner,sun20i-d1-ccu"; - reg = <0x2001000 0x1000>; -@@ -178,6 +274,33 @@ - #reset-cells = <1>; - }; - -+ ledc: led-controller@2008000 { -+ compatible = "allwinner,sun20i-d1-ledc", -+ "allwinner,sun50i-a100-ledc"; -+ reg = <0x2008000 0x400>; -+ interrupts = <36 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_LEDC>, <&ccu CLK_LEDC>; -+ clock-names = "bus", "mod"; -+ resets = <&ccu RST_BUS_LEDC>; -+ dmas = <&dma 42>; -+ dma-names = "tx"; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ ths: temperature-sensor@2009400 { -+ compatible = "allwinner,sun20i-d1-ths"; -+ reg = <0x2009400 0x400>; -+ interrupts = <74 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_THS>, <&osc24M>; -+ clock-names = "bus", "mod"; -+ resets = <&ccu RST_BUS_THS>; -+ nvmem-cells = <&ths_calib>; -+ nvmem-cell-names = "calibration"; -+ #thermal-sensor-cells = <0>; -+ }; -+ - lradc: keys@2009800 { - compatible = "allwinner,sun20i-d1-lradc", - "allwinner,sun50i-r329-lradc"; -@@ -188,11 +311,30 @@ - status = "disabled"; - }; - -+ iommu: iommu@2010000 { -+ compatible = "allwinner,sun20i-d1-iommu"; -+ reg = <0x2010000 0x10000>; -+ interrupts = <80 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_IOMMU>; -+ #iommu-cells = <1>; -+ }; -+ - codec: audio-codec@2030000 { -- compatible = "simple-mfd", "syscon"; -+ compatible = "allwinner,sun20i-d1-codec", "simple-mfd", "syscon"; - reg = <0x2030000 0x1000>; -+ interrupts = <41 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_AUDIO>, -+ <&ccu CLK_AUDIO_ADC>, -+ <&ccu CLK_AUDIO_DAC>, -+ <&osc24M>, -+ <&rtc CLK_OSC32K>; -+ clock-names = "bus", "adc", "dac", "hosc", "losc"; -+ resets = <&ccu RST_BUS_AUDIO>; -+ dmas = <&dma 7>, <&dma 7>; -+ dma-names = "rx", "tx"; - #address-cells = <1>; - #size-cells = <1>; -+ #sound-dai-cells = <0>; - - regulators@2030348 { - compatible = "allwinner,sun20i-d1-analog-ldos"; -@@ -208,6 +350,21 @@ - }; - }; - -+ dmic: dmic@2031000 { -+ compatible = "allwinner,sun20i-d1-dmic", -+ "allwinner,sun50i-h6-dmic"; -+ reg = <0x2031000 0x400>; -+ interrupts = <40 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_DMIC>, -+ <&ccu CLK_DMIC>; -+ clock-names = "bus", "mod"; -+ resets = <&ccu RST_BUS_DMIC>; -+ dmas = <&dma 8>; -+ dma-names = "rx"; -+ status = "disabled"; -+ #sound-dai-cells = <0>; -+ }; -+ - i2s0: i2s@2032000 { - compatible = "allwinner,sun20i-d1-i2s", - "allwinner,sun50i-r329-i2s"; -@@ -238,6 +395,7 @@ - #sound-dai-cells = <0>; - }; - -+ // TODO: how to integrate ASRC? same or separate node? - i2s2: i2s@2034000 { - compatible = "allwinner,sun20i-d1-i2s", - "allwinner,sun50i-r329-i2s"; -@@ -253,6 +411,22 @@ - #sound-dai-cells = <0>; - }; - -+ // TODO: add receive functionality -+ spdif: spdif@2036000 { -+ compatible = "allwinner,sun20i-d1-spdif"; -+ reg = <0x2036000 0x400>; -+ interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_SPDIF>, -+ <&ccu CLK_SPDIF_RX>, -+ <&ccu CLK_SPDIF_TX>; -+ clock-names = "apb", "rx", "tx"; -+ resets = <&ccu RST_BUS_SPDIF>; -+ dmas = <&dma 2>, <&dma 2>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ #sound-dai-cells = <0>; -+ }; -+ - timer: timer@2050000 { - compatible = "allwinner,sun20i-d1-timer", - "allwinner,sun8i-a23-timer"; -@@ -457,6 +631,18 @@ - }; - }; - -+ crypto: crypto@3040000 { -+ compatible = "allwinner,sun20i-d1-crypto"; -+ reg = <0x3040000 0x800>; -+ interrupts = <68 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_CE>, -+ <&ccu CLK_CE>, -+ <&ccu CLK_MBUS_CE>, -+ <&rtc CLK_IOSC>; -+ clock-names = "bus", "mod", "ram", "trng"; -+ resets = <&ccu RST_BUS_CE>; -+ }; -+ - mbus: dram-controller@3102000 { - compatible = "allwinner,sun20i-d1-mbus"; - reg = <0x3102000 0x1000>, -@@ -525,6 +711,39 @@ - #size-cells = <0>; - }; - -+ spi0: spi@4025000 { -+ compatible = "allwinner,sun20i-d1-spi", -+ "allwinner,sun50i-r329-spi"; -+ reg = <0x4025000 0x1000>; -+ interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; -+ clock-names = "ahb", "mod"; -+ resets = <&ccu RST_BUS_SPI0>; -+ dmas = <&dma 22>, <&dma 22>; -+ dma-names = "rx", "tx"; -+ num-cs = <1>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ spi1: spi@4026000 { -+ compatible = "allwinner,sun20i-d1-spi-dbi", -+ "allwinner,sun50i-r329-spi-dbi", -+ "allwinner,sun50i-r329-spi"; -+ reg = <0x4026000 0x1000>; -+ interrupts = <32 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; -+ clock-names = "ahb", "mod"; -+ resets = <&ccu RST_BUS_SPI1>; -+ dmas = <&dma 23>, <&dma 23>; -+ dma-names = "rx", "tx"; -+ num-cs = <1>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ - usb_otg: usb@4100000 { - compatible = "allwinner,sun20i-d1-musb", - "allwinner,sun8i-a33-musb"; -@@ -653,6 +872,7 @@ - <&display_clocks CLK_MIXER0>; - clock-names = "bus", "mod"; - resets = <&display_clocks RST_MIXER0>; -+ iommus = <&iommu 2>; - - ports { - #address-cells = <1>; -@@ -675,6 +895,7 @@ - <&display_clocks CLK_MIXER1>; - clock-names = "bus", "mod"; - resets = <&display_clocks RST_MIXER1>; -+ iommus = <&iommu 2>; - - ports { - #address-cells = <1>; -@@ -690,6 +911,40 @@ - }; - }; - -+ dsi: dsi@5450000 { -+ compatible = "allwinner,sun20i-d1-mipi-dsi", -+ "allwinner,sun50i-a100-mipi-dsi"; -+ reg = <0x5450000 0x1000>; -+ interrupts = <108 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_MIPI_DSI>, -+ <&tcon_top CLK_TCON_TOP_DSI>; -+ clock-names = "bus", "mod"; -+ resets = <&ccu RST_BUS_MIPI_DSI>; -+ phys = <&dphy>; -+ phy-names = "dphy"; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port { -+ dsi_in_tcon_lcd0: endpoint { -+ remote-endpoint = <&tcon_lcd0_out_dsi>; -+ }; -+ }; -+ }; -+ -+ dphy: phy@5451000 { -+ compatible = "allwinner,sun20i-d1-mipi-dphy", -+ "allwinner,sun50i-a100-mipi-dphy"; -+ reg = <0x5451000 0x1000>; -+ interrupts = <108 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_MIPI_DSI>, -+ <&ccu CLK_MIPI_DSI>; -+ clock-names = "bus", "mod"; -+ resets = <&ccu RST_BUS_MIPI_DSI>; -+ #phy-cells = <0>; -+ }; -+ - tcon_top: tcon-top@5460000 { - compatible = "allwinner,sun20i-d1-tcon-top"; - reg = <0x5460000 0x1000>; -@@ -770,6 +1025,10 @@ - - tcon_top_hdmi_out: port@5 { - reg = <5>; -+ -+ tcon_top_hdmi_out_hdmi: endpoint { -+ remote-endpoint = <&hdmi_in_tcon_top>; -+ }; - }; - }; - }; -@@ -785,6 +1044,8 @@ - resets = <&ccu RST_BUS_TCON_LCD0>, - <&ccu RST_BUS_LVDS0>; - reset-names = "lcd", "lvds"; -+ phys = <&dphy>; -+ phy-names = "lvds0"; - #clock-cells = <0>; - - ports { -@@ -809,6 +1070,13 @@ - - tcon_lcd0_out: port@1 { - reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ tcon_lcd0_out_dsi: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&dsi_in_tcon_lcd0>; -+ }; - }; - }; - }; -@@ -853,6 +1121,50 @@ - }; - }; - -+ hdmi: hdmi@5500000 { -+ compatible = "allwinner,sun20i-d1-dw-hdmi"; -+ reg = <0x5500000 0x10000>; -+ reg-io-width = <1>; -+ interrupts = <109 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&ccu CLK_BUS_HDMI>, -+ <&ccu CLK_HDMI_24M>, -+ <&ccu CLK_HDMI_CEC>; -+ clock-names = "iahb", "isfr", "cec"; -+ resets = <&ccu RST_BUS_HDMI_SUB>; -+ reset-names = "ctrl"; -+ phys = <&hdmi_phy>; -+ phy-names = "phy"; -+ status = "disabled"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ -+ hdmi_in_tcon_top: endpoint { -+ remote-endpoint = <&tcon_top_hdmi_out_hdmi>; -+ }; -+ }; -+ -+ hdmi_out: port@1 { -+ reg = <1>; -+ }; -+ }; -+ }; -+ -+ hdmi_phy: phy@5510000 { -+ compatible = "allwinner,sun20i-d1-hdmi-phy"; -+ reg = <0x5510000 0x10000>; -+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_24M>; -+ clock-names = "bus", "mod"; -+ resets = <&ccu RST_BUS_HDMI_MAIN>; -+ reset-names = "phy"; -+ status = "disabled"; -+ #phy-cells = <0>; -+ }; -+ - riscv_wdt: watchdog@6011000 { - compatible = "allwinner,sun20i-d1-wdt"; - reg = <0x6011000 0x20>; diff --git a/lede/package/boot/uboot-d1/patches/0089-sunxi-riscv-Add-defconfigs-for-several-boards.patch b/lede/package/boot/uboot-d1/patches/0089-sunxi-riscv-Add-defconfigs-for-several-boards.patch deleted file mode 100644 index a1c2ac9ad9..0000000000 --- a/lede/package/boot/uboot-d1/patches/0089-sunxi-riscv-Add-defconfigs-for-several-boards.patch +++ /dev/null @@ -1,108 +0,0 @@ -From 0a4e7a1a19dd505bc5b6ff887b2ce39983aaa92d Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Mon, 31 Oct 2022 23:27:08 -0500 -Subject: [PATCH 89/90] sunxi: riscv: Add defconfigs for several boards - -Signed-off-by: Samuel Holland ---- - configs/devterm_r_01_defconfig | 10 ++++++++++ - configs/dongshan_nezha_stu_defconfig | 13 +++++++++++++ - configs/lichee_rv_86_panel_defconfig | 13 +++++++++++++ - configs/lichee_rv_dock_defconfig | 10 ++++++++++ - configs/mangopi_mq_pro_defconfig | 10 ++++++++++ - configs/nezha_defconfig | 13 +++++++++++++ - 6 files changed, 69 insertions(+) - create mode 100644 configs/devterm_r_01_defconfig - create mode 100644 configs/dongshan_nezha_stu_defconfig - create mode 100644 configs/lichee_rv_86_panel_defconfig - create mode 100644 configs/lichee_rv_dock_defconfig - create mode 100644 configs/mangopi_mq_pro_defconfig - create mode 100644 configs/nezha_defconfig - ---- /dev/null -+++ b/configs/devterm_r_01_defconfig -@@ -0,0 +1,10 @@ -+CONFIG_RISCV=y -+CONFIG_DEFAULT_DEVICE_TREE="sun20i-d1-devterm-v3.14" -+CONFIG_TARGET_SUN20I_D1=y -+CONFIG_ARCH_RV64I=y -+CONFIG_RISCV_SMODE=y -+# CONFIG_SPL_SMP is not set -+CONFIG_SYS_SPL_MALLOC=y -+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0 -+# CONFIG_SYS_I2C_MVTWSI is not set -+CONFIG_DM_REGULATOR_FIXED=y ---- /dev/null -+++ b/configs/dongshan_nezha_stu_defconfig -@@ -0,0 +1,13 @@ -+CONFIG_RISCV=y -+CONFIG_DEFAULT_DEVICE_TREE="sun20i-d1-dongshan-nezha-stu" -+CONFIG_TARGET_SUN20I_D1=y -+CONFIG_ARCH_RV64I=y -+CONFIG_RISCV_SMODE=y -+# CONFIG_SPL_SMP is not set -+CONFIG_SYS_SPL_MALLOC=y -+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0 -+CONFIG_NET_RANDOM_ETHADDR=y -+# CONFIG_SYS_I2C_MVTWSI is not set -+CONFIG_PHY_REALTEK=y -+CONFIG_SUN8I_EMAC=y -+CONFIG_DM_REGULATOR_FIXED=y ---- /dev/null -+++ b/configs/lichee_rv_86_panel_defconfig -@@ -0,0 +1,13 @@ -+CONFIG_RISCV=y -+CONFIG_DEFAULT_DEVICE_TREE="sun20i-d1-lichee-rv-86-panel-480p" -+CONFIG_TARGET_SUN20I_D1=y -+CONFIG_ARCH_RV64I=y -+CONFIG_RISCV_SMODE=y -+# CONFIG_SPL_SMP is not set -+CONFIG_SYS_SPL_MALLOC=y -+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0 -+CONFIG_NET_RANDOM_ETHADDR=y -+# CONFIG_SYS_I2C_MVTWSI is not set -+CONFIG_PHY_REALTEK=y -+CONFIG_SUN8I_EMAC=y -+CONFIG_DM_REGULATOR_FIXED=y ---- /dev/null -+++ b/configs/lichee_rv_dock_defconfig -@@ -0,0 +1,10 @@ -+CONFIG_RISCV=y -+CONFIG_DEFAULT_DEVICE_TREE="sun20i-d1-lichee-rv-dock" -+CONFIG_TARGET_SUN20I_D1=y -+CONFIG_ARCH_RV64I=y -+CONFIG_RISCV_SMODE=y -+# CONFIG_SPL_SMP is not set -+CONFIG_SYS_SPL_MALLOC=y -+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0 -+# CONFIG_SYS_I2C_MVTWSI is not set -+CONFIG_DM_REGULATOR_FIXED=y ---- /dev/null -+++ b/configs/mangopi_mq_pro_defconfig -@@ -0,0 +1,10 @@ -+CONFIG_RISCV=y -+CONFIG_DEFAULT_DEVICE_TREE="sun20i-d1-mangopi-mq-pro" -+CONFIG_TARGET_SUN20I_D1=y -+CONFIG_ARCH_RV64I=y -+CONFIG_RISCV_SMODE=y -+# CONFIG_SPL_SMP is not set -+CONFIG_SYS_SPL_MALLOC=y -+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0 -+# CONFIG_SYS_I2C_MVTWSI is not set -+CONFIG_DM_REGULATOR_FIXED=y ---- /dev/null -+++ b/configs/nezha_defconfig -@@ -0,0 +1,13 @@ -+CONFIG_RISCV=y -+CONFIG_DEFAULT_DEVICE_TREE="sun20i-d1-nezha" -+CONFIG_TARGET_SUN20I_D1=y -+CONFIG_ARCH_RV64I=y -+CONFIG_RISCV_SMODE=y -+# CONFIG_SPL_SMP is not set -+CONFIG_SYS_SPL_MALLOC=y -+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0 -+CONFIG_NET_RANDOM_ETHADDR=y -+# CONFIG_SYS_I2C_MVTWSI is not set -+CONFIG_PHY_REALTEK=y -+CONFIG_SUN8I_EMAC=y -+CONFIG_DM_REGULATOR_FIXED=y diff --git a/lede/package/boot/uboot-d1/patches/0090-drivers-phy-fix-typo.patch b/lede/package/boot/uboot-d1/patches/0090-drivers-phy-fix-typo.patch deleted file mode 100644 index c9c3b9b959..0000000000 --- a/lede/package/boot/uboot-d1/patches/0090-drivers-phy-fix-typo.patch +++ /dev/null @@ -1,21 +0,0 @@ -From 62419798c137c9eec2d2c1011e417d1520aecffb Mon Sep 17 00:00:00 2001 -From: Zoltan HERPAI -Date: Tue, 6 Jun 2023 19:46:30 +0000 -Subject: [PATCH 90/90] drivers: phy: fix typo - -Signed-off-by: Zoltan HERPAI ---- - drivers/phy/allwinner/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/phy/allwinner/Kconfig -+++ b/drivers/phy/allwinner/Kconfig -@@ -3,7 +3,7 @@ - # - config PHY_SUN4I_USB - bool "Allwinner Sun4I USB PHY driver" -- depends on depends on BOARD_SUNXI -+ depends on BOARD_SUNXI - default y - select DM_REGULATOR - select PHY diff --git a/lede/package/boot/uboot-envtools/files/realtek b/lede/package/boot/uboot-envtools/files/realtek index f191503876..055730eb27 100644 --- a/lede/package/boot/uboot-envtools/files/realtek +++ b/lede/package/boot/uboot-envtools/files/realtek @@ -8,6 +8,14 @@ touch /etc/config/ubootenv board=$(board_name) case "$board" in +apresia,aplgs120gtss) + idx="$(find_mtd_index u-boot-env)" + [ -n "$idx" ] && \ + ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x10000" + idx2="$(find_mtd_index u-boot-env2)" + [ -n "$idx2" ] && \ + ubootenv_add_uci_sys_config "/dev/mtd$idx2" "0x0" "0x40000" "0x10000" + ;; d-link,dgs-1210-10mp|\ d-link,dgs-1210-10p|\ d-link,dgs-1210-16|\ @@ -20,6 +28,7 @@ zyxel,gs1900-10hp|\ zyxel,gs1900-16|\ zyxel,gs1900-24-v1|\ zyxel,gs1900-24e|\ +zyxel,gs1900-24ep|\ zyxel,gs1900-24hp-v1|\ zyxel,gs1900-24hp-v2) idx="$(find_mtd_index u-boot-env)" diff --git a/lede/package/boot/uboot-sifiveu/Makefile b/lede/package/boot/uboot-sifiveu/Makefile index 5def1c1fcb..4ba5614ad7 100644 --- a/lede/package/boot/uboot-sifiveu/Makefile +++ b/lede/package/boot/uboot-sifiveu/Makefile @@ -7,8 +7,8 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_RELEASE:=1 -PKG_VERSION:=2022.10 -PKG_HASH:=50b4482a505bc281ba8470c399a3c26e145e29b23500bc35c50debd7fa46bdf8 +PKG_VERSION:=2023.10 +PKG_HASH:=e00e6c6f014e046101739d08d06f328811cebcf5ae101348f409cbbd55ce6900 include $(INCLUDE_DIR)/u-boot.mk include $(INCLUDE_DIR)/package.mk @@ -56,7 +56,7 @@ define Build/InstallDev $(INSTALL_BIN) $(PKG_BUILD_DIR)/spl/u-boot-spl.bin $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-$(UBOOT_IMAGE)-spl $(INSTALL_BIN) $(PKG_BUILD_DIR)/$(DTS_DIR)/$(UBOOT_DTS) $(STAGING_DIR_IMAGE)/$(UBOOT_DTS) - mkimage -C none -A arm -T script -d uEnv-$(UENV).txt \ + mkimage -C none -A riscv -T script -d uEnv-$(UENV).txt \ $(STAGING_DIR_IMAGE)/$(BUILD_DEVICES)-boot.scr endef diff --git a/lede/package/boot/uboot-sifiveu/patches/0002-board-sifive-spl-Initialized-the-PWM-setting-in-the-.patch b/lede/package/boot/uboot-sifiveu/patches/0002-board-sifive-spl-Initialized-the-PWM-setting-in-the-.patch deleted file mode 100644 index 27cda75326..0000000000 --- a/lede/package/boot/uboot-sifiveu/patches/0002-board-sifive-spl-Initialized-the-PWM-setting-in-the-.patch +++ /dev/null @@ -1,104 +0,0 @@ -From 725595e667cc4423347c255da8ca4c5b3aa0980a Mon Sep 17 00:00:00 2001 -From: Vincent Chen -Date: Mon, 15 Nov 2021 03:31:04 -0800 -Subject: [PATCH 2/8] board: sifive: spl: Initialized the PWM setting in the - SPL stage - -LEDs and multiple fans can be controlled by SPL. This patch ensures -that all fans have been enabled in the SPL stage. In addition, the -LED's color will be set to yellow. ---- - board/sifive/unmatched/Makefile | 1 + - board/sifive/unmatched/pwm.c | 57 +++++++++++++++++++++++++++++++++ - board/sifive/unmatched/spl.c | 2 ++ - 3 files changed, 60 insertions(+) - create mode 100644 board/sifive/unmatched/pwm.c - -diff --git a/board/sifive/unmatched/Makefile b/board/sifive/unmatched/Makefile -index 1345330089..5df01982e9 100644 ---- a/board/sifive/unmatched/Makefile -+++ b/board/sifive/unmatched/Makefile -@@ -9,3 +9,4 @@ obj-y += spl.o - else - obj-y += unmatched.o - endif -+obj-y += pwm.o -diff --git a/board/sifive/unmatched/pwm.c b/board/sifive/unmatched/pwm.c -new file mode 100644 -index 0000000000..e1cc02310a ---- /dev/null -+++ b/board/sifive/unmatched/pwm.c -@@ -0,0 +1,57 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (c) 2021, SiFive Inc -+ * -+ * Authors: -+ * Vincent Chen -+ * David Abdurachmanov -+ */ -+ -+#include -+#include -+ -+struct pwm_sifive_regs { -+ unsigned int cfg; /* PWM configuration register */ -+ unsigned int pad0; /* Reserved */ -+ unsigned int cnt; /* PWM count register */ -+ unsigned int pad1; /* Reserved */ -+ unsigned int pwms; /* Scaled PWM count register */ -+ unsigned int pad2; /* Reserved */ -+ unsigned int pad3; /* Reserved */ -+ unsigned int pad4; /* Reserved */ -+ unsigned int cmp0; /* PWM 0 compare register */ -+ unsigned int cmp1; /* PWM 1 compare register */ -+ unsigned int cmp2; /* PWM 2 compare register */ -+ unsigned int cmp3; /* PWM 3 compare register */ -+}; -+ -+#define PWM0_BASE 0x10020000 -+#define PWM1_BASE 0x10021000 -+#define PWM_CFG_INIT 0x1000 -+#define PWM_CMP_ENABLE_VAL 0x0 -+#define PWM_CMP_DISABLE_VAL 0xffff -+ -+void pwm_device_init(void) -+{ -+ struct pwm_sifive_regs *pwm0, *pwm1; -+ pwm0 = (struct pwm_sifive_regs *)PWM0_BASE; -+ pwm1 = (struct pwm_sifive_regs *)PWM1_BASE; -+ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp0); -+ /* Set the 3-color PWM LEDs to yellow in SPL */ -+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp1); -+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp2); -+ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp3); -+ writel(PWM_CFG_INIT, (void *)&pwm0->cfg); -+ -+ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp3); -+ /* Turn on all the fans, (J21), (J23) and (J24), on the unmatched board */ -+ /* The SoC fan(J21) on the rev3 board cannot be controled by PWM_COMP0, -+ so here sets the initial value of PWM_COMP0 as DISABLE */ -+ if (get_pcb_revision_from_eeprom() == PCB_REVISION_REV3) -+ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm1->cmp1); -+ else -+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp1); -+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp2); -+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp3); -+ writel(PWM_CFG_INIT, (void *)&pwm1->cfg); -+} -diff --git a/board/sifive/unmatched/spl.c b/board/sifive/unmatched/spl.c -index 7c0beedc08..f3a661a81e 100644 ---- a/board/sifive/unmatched/spl.c -+++ b/board/sifive/unmatched/spl.c -@@ -90,6 +90,8 @@ int spl_board_init_f(void) - goto end; - } - -+ pwm_device_init(); -+ - ret = spl_gemgxl_init(); - if (ret) { - debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret); --- -2.27.0 - diff --git a/lede/package/boot/uboot-sifiveu/patches/0003-board-sifive-Set-LED-s-color-to-purple-in-the-U-boot.patch b/lede/package/boot/uboot-sifiveu/patches/0003-board-sifive-Set-LED-s-color-to-purple-in-the-U-boot.patch deleted file mode 100644 index 9820d2e2f9..0000000000 --- a/lede/package/boot/uboot-sifiveu/patches/0003-board-sifive-Set-LED-s-color-to-purple-in-the-U-boot.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 7ead6d662a2f9d8498af6650ea38418c64b52048 Mon Sep 17 00:00:00 2001 -From: Vincent Chen -Date: Mon, 24 Jan 2022 02:42:02 -0800 -Subject: [PATCH 3/8] board: sifive: Set LED's color to purple in the U-boot - stage - -Set LED's color to purple in the U-boot stage. Because there are still -some functions to be executed before board_early_init_f(), it means -the LED's is not changed to purple instantly when entering the U-boot -stage. ---- - board/sifive/unmatched/pwm.c | 7 +++++++ - board/sifive/unmatched/unmatched.c | 6 ++++++ - configs/sifive_unmatched_defconfig | 1 + - 3 files changed, 14 insertions(+) - -diff --git a/board/sifive/unmatched/pwm.c b/board/sifive/unmatched/pwm.c -index e1cc02310a..bd67672c22 100644 ---- a/board/sifive/unmatched/pwm.c -+++ b/board/sifive/unmatched/pwm.c -@@ -36,6 +36,7 @@ void pwm_device_init(void) - struct pwm_sifive_regs *pwm0, *pwm1; - pwm0 = (struct pwm_sifive_regs *)PWM0_BASE; - pwm1 = (struct pwm_sifive_regs *)PWM1_BASE; -+#ifdef CONFIG_SPL_BUILD - writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp0); - /* Set the 3-color PWM LEDs to yellow in SPL */ - writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp1); -@@ -54,4 +55,10 @@ void pwm_device_init(void) - writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp2); - writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp3); - writel(PWM_CFG_INIT, (void *)&pwm1->cfg); -+#else -+ /* Set the 3-color PWM LEDs to purple in U-boot */ -+ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp1); -+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp2); -+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp3); -+#endif - } -diff --git a/board/sifive/unmatched/unmatched.c b/board/sifive/unmatched/unmatched.c -index 6295deeae2..30c082d001 100644 ---- a/board/sifive/unmatched/unmatched.c -+++ b/board/sifive/unmatched/unmatched.c -@@ -22,6 +22,12 @@ void *board_fdt_blob_setup(int *err) - return (ulong *)&_end; - } - -+int board_early_init_f(void) -+{ -+ pwm_device_init(); -+ return 0; -+} -+ - int board_init(void) - { - /* enable all cache ways */ -diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig -index d400ed0b23..0758f8e90f 100644 ---- a/configs/sifive_unmatched_defconfig -+++ b/configs/sifive_unmatched_defconfig -@@ -51,3 +51,4 @@ CONFIG_DM_SCSI=y - CONFIG_USB=y - CONFIG_USB_XHCI_HCD=y - CONFIG_USB_XHCI_PCI=y -+CONFIG_BOARD_EARLY_INIT_F=y --- -2.27.0 - diff --git a/lede/package/boot/uboot-sifiveu/patches/0004-board-sifive-Set-LED-s-color-to-blue-before-jumping-.patch b/lede/package/boot/uboot-sifiveu/patches/0004-board-sifive-Set-LED-s-color-to-blue-before-jumping-.patch deleted file mode 100644 index b5bffd22bd..0000000000 --- a/lede/package/boot/uboot-sifiveu/patches/0004-board-sifive-Set-LED-s-color-to-blue-before-jumping-.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 6ef7023c0dcfde320015ab19e0e0d423921be77d Mon Sep 17 00:00:00 2001 -From: Vincent Chen -Date: Mon, 15 Nov 2021 03:39:07 -0800 -Subject: [PATCH 1/2] board: sifive: Set LED's color to blue before jumping to - Linux - -The LED's color wil be changed from purple to blue before executing -the sysboot command. Because the sysboot command includes the image loading -from the boot partition, It means the LED's color is blue when executing -"Retrieving file: /Image.gz". ---- - include/configs/sifive-unmatched.h | 7 ++++++- - 1 file changed, 6 insertions(+), 1 deletion(-) - ---- a/include/configs/sifive-unmatched.h -+++ b/include/configs/sifive-unmatched.h -@@ -49,7 +49,12 @@ - "type_guid_gpt_system=" TYPE_GUID_SYSTEM "\0" \ - "partitions=" PARTS_DEFAULT "\0" \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ -- BOOTENV -+ "setled_blue=mw.l 0x10020024 0x0000ffff; mw.l 0x10020028 0x0000ffff; mw.l 0x1002002c 0x0\0" \ -+ BOOTENV \ -+ "boot_extlinux=" \ -+ "run setled_blue; " \ -+ "sysboot ${devtype} ${devnum}:${distro_bootpart} any " \ -+ "${scriptaddr} ${prefix}${boot_syslinux_conf};\0" - - #define CONFIG_SYS_EEPROM_BUS_NUM 0 - diff --git a/lede/package/boot/uboot-sifiveu/patches/0005-board-sifive-spl-Set-remote-thermal-of-TMP451-to-85-.patch b/lede/package/boot/uboot-sifiveu/patches/0005-board-sifive-spl-Set-remote-thermal-of-TMP451-to-85-.patch deleted file mode 100644 index dc0d04151f..0000000000 --- a/lede/package/boot/uboot-sifiveu/patches/0005-board-sifive-spl-Set-remote-thermal-of-TMP451-to-85-.patch +++ /dev/null @@ -1,111 +0,0 @@ -From 07f84ed283b913cbdf87181ae2ed65467d923df5 Mon Sep 17 00:00:00 2001 -From: Vincent Chen -Date: Mon, 24 Jan 2022 02:57:40 -0800 -Subject: [PATCH 2/2] board: sifive: spl: Set remote thermal of TMP451 to 85 - deg C for the unmatched board - -For TMP451 on the unmatched board, the default value of the remote -thermal threshold is 108 deg C. This commit initilizes it to 85 deg C at SPL. ---- - board/sifive/unmatched/spl.c | 29 +++++++++++++++++++++++++++++ - drivers/misc/Kconfig | 10 ++++++++++ - include/configs/sifive-unmatched.h | 4 ++++ - scripts/config_whitelist.txt | 1 + - 4 files changed, 44 insertions(+) - ---- a/board/sifive/unmatched/spl.c -+++ b/board/sifive/unmatched/spl.c -@@ -10,6 +10,8 @@ - #include - #include - #include -+#include -+#include - #include - #include - #include -@@ -26,6 +28,27 @@ - #define MODE_SELECT_SD 0xb - #define MODE_SELECT_MASK GENMASK(3, 0) - -+#define TMP451_REMOTE_THERM_LIMIT_REG_OFFSET 0x19 -+#define TMP451_REMOTE_THERM_LIMIT_INIT_VALUE 0x55 -+ -+static inline int init_tmp451_remote_therm_limit(void) -+{ -+ struct udevice *dev; -+ unsigned char r_therm_limit = TMP451_REMOTE_THERM_LIMIT_INIT_VALUE; -+ int ret; -+ -+ ret = i2c_get_chip_for_busnum(CONFIG_SYS_TMP451_BUS_NUM, -+ CONFIG_SYS_I2C_TMP451_ADDR, -+ CONFIG_SYS_I2C_TMP451_ADDR_LEN, -+ &dev); -+ -+ if (!ret) -+ ret = dm_i2c_write(dev, TMP451_REMOTE_THERM_LIMIT_REG_OFFSET, -+ &r_therm_limit, -+ sizeof(unsigned char)); -+ return ret; -+} -+ - static inline int spl_reset_device_by_gpio(const char *label, int pin, int low_width) - { - int ret; -@@ -92,6 +115,12 @@ int spl_board_init_f(void) - - pwm_device_init(); - -+ ret = init_tmp451_remote_therm_limit(); -+ if (ret) { -+ debug("TMP451 remote THERM limit init failed: %d\n", ret); -+ goto end; -+ } -+ - ret = spl_gemgxl_init(); - if (ret) { - debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret); ---- a/drivers/misc/Kconfig -+++ b/drivers/misc/Kconfig -@@ -536,8 +536,18 @@ config SYS_I2C_EEPROM_ADDR - depends on ID_EEPROM || I2C_EEPROM || SPL_I2C_EEPROM || CMD_EEPROM || ENV_IS_IN_EEPROM - default 0 - -+config SYS_I2C_TMP451_ADDR -+ hex "Chip address of the TMP451 device" -+ default 0 -+ - if I2C_EEPROM - -+config SYS_I2C_TMP451_ADDR_LEN -+ int "Length in bytes of the TMP451 memory array address" -+ default 1 -+ help -+ Note: This is NOT the chip address length! -+ - config SYS_I2C_EEPROM_ADDR_OVERFLOW - hex "EEPROM Address Overflow" - default 0x0 ---- a/include/configs/sifive-unmatched.h -+++ b/include/configs/sifive-unmatched.h -@@ -15,6 +15,10 @@ - - #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 - -+#define CONFIG_SYS_TMP451_BUS_NUM 0 -+#define CONFIG_SYS_I2C_TMP451_ADDR 0x4c -+#define CONFIG_SYS_I2C_TMP451_ADDR_LEN 0x1 -+ - /* Environment options */ - - #define BOOT_TARGET_DEVICES(func) \ ---- a/scripts/config_whitelist.txt -+++ b/scripts/config_whitelist.txt -@@ -1268,6 +1268,7 @@ CONFIG_SYS_TIMER_BASE - CONFIG_SYS_TIMER_COUNTER - CONFIG_SYS_TIMER_COUNTS_DOWN - CONFIG_SYS_TIMER_RATE -+CONFIG_SYS_TMP451_BUS_NUM - CONFIG_SYS_TMPVIRT - CONFIG_SYS_TSEC1_OFFSET - CONFIG_SYS_TX_ETH_BUFFER diff --git a/lede/package/boot/uboot-sifiveu/patches/0008-riscv-dts-Add-few-PMU-events.patch b/lede/package/boot/uboot-sifiveu/patches/0005-riscv-dts-Add-few-PMU-events.patch similarity index 88% rename from lede/package/boot/uboot-sifiveu/patches/0008-riscv-dts-Add-few-PMU-events.patch rename to lede/package/boot/uboot-sifiveu/patches/0005-riscv-dts-Add-few-PMU-events.patch index 3f3feb9da7..225c845d3c 100644 --- a/lede/package/boot/uboot-sifiveu/patches/0008-riscv-dts-Add-few-PMU-events.patch +++ b/lede/package/boot/uboot-sifiveu/patches/0005-riscv-dts-Add-few-PMU-events.patch @@ -1,7 +1,7 @@ -From c29e4d84cfa17ab96eff2a9044f486ba3c8b5c43 Mon Sep 17 00:00:00 2001 +From 9b2868e9fda750c985313a40e60b67f96dc77ed1 Mon Sep 17 00:00:00 2001 From: Atish Patra Date: Mon, 25 Oct 2021 11:35:41 -0700 -Subject: [PATCH] riscv: dts: Add few PMU events +Subject: [PATCH 5/5] riscv: dts: Add few PMU events fu740 has 2 HPM counters and many HPM events defined in the fu740 manual[1]. This patch adds some of these events and their mapping as per the @@ -9,6 +9,7 @@ OpenSBI PMU DT binding for now. [1]https://sifive.cdn.prismic.io/sifive/de1491e5-077c-461d-9605-e8a0ce57337d_fu740-c000-manual-v1p3.pdf +Upstream-Status: Pending Signed-off-by: Atish Patra --- arch/riscv/dts/fu740-c000.dtsi | 11 +++++++++++ diff --git a/lede/package/boot/uboot-sifiveu/patches/0006-riscv-sifive-fu740-reduce-DDR-speed-from-1866MT-s-to.patch b/lede/package/boot/uboot-sifiveu/patches/0006-riscv-sifive-fu740-reduce-DDR-speed-from-1866MT-s-to.patch new file mode 100644 index 0000000000..380342d4a8 --- /dev/null +++ b/lede/package/boot/uboot-sifiveu/patches/0006-riscv-sifive-fu740-reduce-DDR-speed-from-1866MT-s-to.patch @@ -0,0 +1,22 @@ +From 45f9941ddc6346b38aa9eb7f033e1e169b63bdc7 Mon Sep 17 00:00:00 2001 +From: Thomas Perrot +Date: Fri, 8 Dec 2023 11:24:37 +0100 +Subject: [PATCH] riscv: sifive: fu740: reduce DDR speed from 1866MT/s to + 1600MT/s + +Signed-off-by: Thomas Perrot +--- + arch/riscv/dts/fu740-c000-u-boot.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/riscv/dts/fu740-c000-u-boot.dtsi ++++ b/arch/riscv/dts/fu740-c000-u-boot.dtsi +@@ -77,7 +77,7 @@ + 0x0 0x100b2000 0x0 0x2000 + 0x0 0x100b8000 0x0 0x1000>; + clocks = <&prci FU740_PRCI_CLK_DDRPLL>; +- clock-frequency = <933333324>; ++ clock-frequency = <800000004>; + bootph-pre-ram; + }; + }; diff --git a/lede/package/boot/uboot-sifiveu/patches/0009-riscv-Fix-build-against-binutils.patch b/lede/package/boot/uboot-sifiveu/patches/0009-riscv-Fix-build-against-binutils.patch deleted file mode 100644 index 87dbf984ec..0000000000 --- a/lede/package/boot/uboot-sifiveu/patches/0009-riscv-Fix-build-against-binutils.patch +++ /dev/null @@ -1,50 +0,0 @@ -commit 1dde977518f13824b847e23275001191139bc384 -Author: Alexandre Ghiti -Date: Mon Oct 3 18:07:54 2022 +0200 - - riscv: Fix build against binutils 2.38 - - The following description is copied from the equivalent patch for the - Linux Kernel proposed by Aurelien Jarno: - - >From version 2.38, binutils default to ISA spec version 20191213. This - means that the csr read/write (csrr*/csrw*) instructions and fence.i - instruction has separated from the `I` extension, become two standalone - extensions: Zicsr and Zifencei. As the kernel uses those instruction, - this causes the following build failure: - - arch/riscv/cpu/mtrap.S: Assembler messages: - arch/riscv/cpu/mtrap.S:65: Error: unrecognized opcode `csrr a0,scause' - arch/riscv/cpu/mtrap.S:66: Error: unrecognized opcode `csrr a1,sepc' - arch/riscv/cpu/mtrap.S:67: Error: unrecognized opcode `csrr a2,stval' - arch/riscv/cpu/mtrap.S:70: Error: unrecognized opcode `csrw sepc,a0' - - Signed-off-by: Alexandre Ghiti - Reviewed-by: Bin Meng - Tested-by: Heinrich Schuchardt - Tested-by: Heiko Stuebner - Tested-by: Christian Stewart - Reviewed-by: Rick Chen - -diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile -index 0b80eb8d86..53d1194ffb 100644 ---- a/arch/riscv/Makefile -+++ b/arch/riscv/Makefile -@@ -24,7 +24,16 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y) - CMODEL = medany - endif - --ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \ -+RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_C) -+ -+# Newer binutils versions default to ISA spec version 20191213 which moves some -+# instructions from the I extension to the Zicsr and Zifencei extensions. -+toolchain-need-zicsr-zifencei := $(call cc-option-yn, -mabi=$(ABI) -march=$(RISCV_MARCH)_zicsr_zifencei) -+ifeq ($(toolchain-need-zicsr-zifencei),y) -+ RISCV_MARCH := $(RISCV_MARCH)_zicsr_zifencei -+endif -+ -+ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \ - -mcmodel=$(CMODEL) - - PLATFORM_CPPFLAGS += $(ARCH_FLAGS) diff --git a/lede/package/boot/uboot-sifiveu/patches/100-mkimage-check-environment-for-dtc-binary-location.patch b/lede/package/boot/uboot-sifiveu/patches/100-mkimage-check-environment-for-dtc-binary-location.patch index 482aa1a369..fcc30ce35c 100644 --- a/lede/package/boot/uboot-sifiveu/patches/100-mkimage-check-environment-for-dtc-binary-location.patch +++ b/lede/package/boot/uboot-sifiveu/patches/100-mkimage-check-environment-for-dtc-binary-location.patch @@ -17,7 +17,7 @@ Cc: Simon Glass --- a/tools/fit_image.c +++ b/tools/fit_image.c -@@ -726,9 +726,14 @@ static int fit_handle_file(struct image_ +@@ -754,9 +754,14 @@ static int fit_handle_file(struct image_ } *cmd = '\0'; } else if (params->datafile) { diff --git a/lede/package/boot/uboot-sifiveu/patches/110-no-kwbimage.patch b/lede/package/boot/uboot-sifiveu/patches/110-no-kwbimage.patch index 65d14f5bec..f83814b9b2 100644 --- a/lede/package/boot/uboot-sifiveu/patches/110-no-kwbimage.patch +++ b/lede/package/boot/uboot-sifiveu/patches/110-no-kwbimage.patch @@ -1,10 +1,10 @@ --- a/tools/Makefile +++ b/tools/Makefile -@@ -119,7 +119,6 @@ dumpimage-mkimage-objs := aisimage.o \ +@@ -114,7 +114,6 @@ dumpimage-mkimage-objs := aisimage.o \ imximage.o \ imx8image.o \ imx8mimage.o \ - kwbimage.o \ - lib/md5.o \ + generated/lib/md5.o \ lpc32xximage.o \ mxsimage.o \ diff --git a/lede/package/kernel/linux/modules/i2c.mk b/lede/package/kernel/linux/modules/i2c.mk index 236c2e03ac..324a59dda9 100644 --- a/lede/package/kernel/linux/modules/i2c.mk +++ b/lede/package/kernel/linux/modules/i2c.mk @@ -116,17 +116,35 @@ I2C_DWPCI_MODULES:= \ define KernelPackage/i2c-designware-pci $(call i2c_defaults,$(I2C_DWPCI_MODULES),59) - TITLE:=Synopsys DesignWare PCI + TITLE:=Synopsys DesignWare I2C PCI DEPENDS:=@PCI_SUPPORT +kmod-i2c-designware-core +kmod-i2c-ccgs-ucsi endef define KernelPackage/i2c-designware-pci/description - Support for Synopsys DesignWare I2C controller. Only master mode is supported. + Support for Synopsys DesignWare I2C PCI controller. Only master mode is + supported. endef $(eval $(call KernelPackage,i2c-designware-pci)) +I2C_DWPLAT_MODULES:= \ + CONFIG_I2C_DESIGNWARE_PLATFORM:drivers/i2c/busses/i2c-designware-platform + +define KernelPackage/i2c-designware-platform + $(call i2c_defaults,$(I2C_DWPLAT_MODULES),59) + TITLE:=Synopsys DesignWare I2C Platform + DEPENDS:=+kmod-i2c-designware-core +endef + +define KernelPackage/i2c-designware-platform/description + Support for Synopsys DesignWare I2C Platform controller. Only master mode + is supported. +endef + +$(eval $(call KernelPackage,i2c-designware-platform)) + + I2C_GPIO_MODULES:= \ CONFIG_I2C_GPIO:drivers/i2c/busses/i2c-gpio @@ -150,7 +168,9 @@ I2C_I801_MODULES:= \ define KernelPackage/i2c-i801 $(call i2c_defaults,$(I2C_I801_MODULES),59) TITLE:=Intel I801 and compatible I2C interfaces - DEPENDS:=@PCI_SUPPORT @TARGET_x86 +kmod-i2c-core +kmod-i2c-smbus + DEPENDS:= \ + @PCI_SUPPORT @TARGET_x86 +kmod-i2c-core +kmod-i2c-smbus \ + PACKAGE_kmod-i2c-mux-gpio:kmod-i2c-mux-gpio endef define KernelPackage/i2c-i801/description @@ -169,6 +189,24 @@ endef $(eval $(call KernelPackage,i2c-i801)) +I2C_MLXCPLD_MODULES:= \ + CONFIG_I2C_MLXCPLD:drivers/i2c/busses/i2c-mlxcpld + +define KernelPackage/i2c-mlxcpld + $(call i2c_defaults,$(I2C_MLXCPLD_MODULES),59) + TITLE:=Mellanox I2C driver + DEPENDS:=@TARGET_x86_64 +kmod-regmap-core +endef + +define KernelPackage/i2c-mlxcpld/description + This exposes the Mellanox platform I2C busses + to the linux I2C layer for X86 based systems. + Controller is implemented as CPLD logic. +endef + +$(eval $(call KernelPackage,i2c-mlxcpld)) + + I2C_MUX_MODULES:= \ CONFIG_I2C_MUX:drivers/i2c/i2c-mux @@ -200,6 +238,24 @@ endef $(eval $(call KernelPackage,i2c-mux-gpio)) +I2C_MUX_MLXCPLD_MODULES:= \ + CONFIG_I2C_MUX_MLXCPLD:drivers/i2c/muxes/i2c-mux-mlxcpld + +define KernelPackage/i2c-mux-mlxcpld + $(call i2c_defaults,$(I2C_MUX_MLXCPLD_MODULES),51) + TITLE:=Mellanox CPLD based I2C multiplexer + DEPENDS:=+kmod-i2c-mlxcpld +kmod-i2c-mux +endef + +define KernelPackage/i2c-mux-mlxcpld/description + This driver provides access to + I2C busses connected through a MUX, which is controlled + by a CPLD register. +endef + +$(eval $(call KernelPackage,i2c-mux-mlxcpld)) + + I2C_MUX_REG_MODULES:= \ CONFIG_I2C_MUX_REG:drivers/i2c/muxes/i2c-mux-reg @@ -253,7 +309,7 @@ I2C_PIIX4_MODULES:= \ define KernelPackage/i2c-piix4 $(call i2c_defaults,$(I2C_PIIX4_MODULES),59) TITLE:=Intel PIIX4 and compatible I2C interfaces - DEPENDS:=@PCI_SUPPORT @TARGET_x86 +kmod-i2c-core + DEPENDS:=@PCI_SUPPORT @TARGET_x86 +kmod-i2c-core +kmod-i2c-smbus endef define KernelPackage/i2c-piix4/description diff --git a/lede/package/kernel/linux/modules/iio.mk b/lede/package/kernel/linux/modules/iio.mk index 0ab73a2fcb..dfdc783a29 100644 --- a/lede/package/kernel/linux/modules/iio.mk +++ b/lede/package/kernel/linux/modules/iio.mk @@ -46,6 +46,25 @@ endef $(eval $(call KernelPackage,iio-kfifo-buf)) +define KernelPackage/industrialio-backend + TITLE:=IIO Backend support + KCONFIG=CONFIG_IIO_BACKEND + FILES:=$(LINUX_DIR)/drivers/iio/industrialio-backend.ko + AUTOLOAD:=$(call AutoProbe,industrialio-backend) + $(call AddDepends/iio) +endef + +define KernelPackage/industrialio-backend/description + Framework to handle complex IIO aggregate devices. The typical + architecture that can make use of this framework is to have one + device as the frontend device which can be "linked" against one or + multiple backend devices. The framework then makes it easy to get + and control such backend devices. +endef + +$(eval $(call KernelPackage,industrialio-backend)) + + define KernelPackage/industrialio-hw-consumer TITLE:=Provides a bonding way to an other device in hardware KCONFIG:=CONFIG_IIO_BUFFER_HW_CONSUMER diff --git a/lede/package/kernel/linux/modules/other.mk b/lede/package/kernel/linux/modules/other.mk index 8406232992..9a82cfc2b2 100644 --- a/lede/package/kernel/linux/modules/other.mk +++ b/lede/package/kernel/linux/modules/other.mk @@ -1272,7 +1272,7 @@ $(eval $(call KernelPackage,tpm)) define KernelPackage/tpm-tis SUBMENU:=$(OTHER_MENU) TITLE:=TPM TIS 1.2 Interface / TPM 2.0 FIFO Interface - DEPENDS:= @TARGET_x86 +kmod-tpm + DEPENDS:= @(TARGET_x86||TARGET_armsr) +kmod-tpm KCONFIG:= CONFIG_TCG_TIS FILES:= \ $(LINUX_DIR)/drivers/char/tpm/tpm_tis.ko \ diff --git a/lede/package/kernel/mac80211/patches/build/900-fix-iwlwifi-build-with-kernel-6.12.patch b/lede/package/kernel/mac80211/patches/build/900-fix-iwlwifi-build-with-kernel-6.12.patch new file mode 100644 index 0000000000..1749a600a6 --- /dev/null +++ b/lede/package/kernel/mac80211/patches/build/900-fix-iwlwifi-build-with-kernel-6.12.patch @@ -0,0 +1,37 @@ +--- a/drivers/net/wireless/intel/iwlwifi/mvm/tt.c ++++ b/drivers/net/wireless/intel/iwlwifi/mvm/tt.c +@@ -679,8 +679,13 @@ + } + #endif + ++#if LINUX_VERSION_IS_LESS(6,12,0) + static int iwl_mvm_tzone_set_trip_temp(struct thermal_zone_device *device, + int trip, int temp) ++#else ++static int iwl_mvm_tzone_set_trip_temp(struct thermal_zone_device *device, ++ const struct thermal_trip *trip, int temp) ++#endif + { + struct iwl_mvm *mvm = thermal_zone_device_priv(device); + struct iwl_mvm_thermal_device *tzone; +@@ -754,8 +759,10 @@ + .set_trip_temp = iwl_mvm_tzone_set_trip_temp, + }; + ++#if LINUX_VERSION_IS_LESS(6,12,0) + /* make all trips writable */ + #define IWL_WRITABLE_TRIPS_MSK (BIT(IWL_MAX_DTS_TRIPS) - 1) ++#endif + + static void iwl_mvm_thermal_zone_register(struct iwl_mvm *mvm) + { +@@ -779,7 +786,9 @@ + mvm->tz_device.trips, + #endif + IWL_MAX_DTS_TRIPS, ++#if LINUX_VERSION_IS_LESS(6,12,0) + IWL_WRITABLE_TRIPS_MSK, ++#endif + mvm, &tzone_ops, + NULL, 0, 0); + if (IS_ERR(mvm->tz_device.tzone)) { diff --git a/lede/package/kernel/mac80211/patches/rtl/101-rtw89-pci-kernel-6.12.patch b/lede/package/kernel/mac80211/patches/rtl/101-rtw89-pci-kernel-6.12.patch index 3a7938d78f..ba164b1081 100644 --- a/lede/package/kernel/mac80211/patches/rtl/101-rtw89-pci-kernel-6.12.patch +++ b/lede/package/kernel/mac80211/patches/rtl/101-rtw89-pci-kernel-6.12.patch @@ -1,12 +1,9 @@ --- a/drivers/net/wireless/realtek/rtw89/pci.c +++ b/drivers/net/wireless/realtek/rtw89/pci.c - -/drivers/net/wireless/realtek/rtw89/pci.c -@@ -3295,8 +3295,11 @@ - { +@@ -3296,7 +3296,11 @@ static int rtw89_pci_request_irq(struct unsigned long flags = 0; int ret; -- + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 10, 0)) flags |= PCI_IRQ_LEGACY | PCI_IRQ_MSI; +#else diff --git a/lede/target/linux/d1/Makefile b/lede/target/linux/allwinner/Makefile similarity index 96% rename from lede/target/linux/d1/Makefile rename to lede/target/linux/allwinner/Makefile index 23a987bc58..191bfdd6c8 100644 --- a/lede/target/linux/d1/Makefile +++ b/lede/target/linux/allwinner/Makefile @@ -5,7 +5,7 @@ include $(TOPDIR)/rules.mk ARCH:=riscv64 -BOARD:=d1 +BOARD:=allwinner BOARDNAME:=AllWinner D1 RISC-V SoC FEATURES:=ext4 squashfs KERNELNAME:=Image dtbs diff --git a/lede/target/linux/d1/base-files/etc/board.d/02_network b/lede/target/linux/allwinner/base-files/etc/board.d/02_network similarity index 100% rename from lede/target/linux/d1/base-files/etc/board.d/02_network rename to lede/target/linux/allwinner/base-files/etc/board.d/02_network diff --git a/lede/target/linux/d1/base-files/etc/inittab b/lede/target/linux/allwinner/base-files/etc/inittab similarity index 100% rename from lede/target/linux/d1/base-files/etc/inittab rename to lede/target/linux/allwinner/base-files/etc/inittab diff --git a/lede/target/linux/d1/config-6.12 b/lede/target/linux/allwinner/config-6.12 similarity index 93% rename from lede/target/linux/d1/config-6.12 rename to lede/target/linux/allwinner/config-6.12 index 5d2b2e58fe..9c7ef1eab2 100644 --- a/lede/target/linux/d1/config-6.12 +++ b/lede/target/linux/allwinner/config-6.12 @@ -46,35 +46,6 @@ CONFIG_CRC16=y CONFIG_CRC32_SLICEBY8=y CONFIG_CRC7=y CONFIG_CRC_ITU_T=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_DEV_ALLWINNER=y -# CONFIG_CRYPTO_DEV_SUN4I_SS is not set -CONFIG_CRYPTO_DEV_SUN8I_CE=y -# CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG is not set -CONFIG_CRYPTO_DEV_SUN8I_CE_HASH=y -CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG=y -CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG=y -# CONFIG_CRYPTO_DEV_SUN8I_SS is not set -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_ENGINE=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_DES=y -CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 -CONFIG_CRYPTO_LIB_SHA1=y -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_LIB_UTILS=y -# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set -# CONFIG_CRYPTO_MANAGER_EXTRA_TESTS is not set -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=y CONFIG_DECOMPRESS_GZIP=y CONFIG_DMADEVICES=y CONFIG_DMA_DIRECT_REMAP=y diff --git a/lede/target/linux/d1/generic/target.mk b/lede/target/linux/allwinner/generic/target.mk similarity index 100% rename from lede/target/linux/d1/generic/target.mk rename to lede/target/linux/allwinner/generic/target.mk diff --git a/lede/target/linux/d1/image/Config.in b/lede/target/linux/allwinner/image/Config.in similarity index 76% rename from lede/target/linux/d1/image/Config.in rename to lede/target/linux/allwinner/image/Config.in index 92169c8eb2..7cf835f3e5 100644 --- a/lede/target/linux/d1/image/Config.in +++ b/lede/target/linux/allwinner/image/Config.in @@ -1,5 +1,5 @@ config D1_SD_BOOT_PARTSIZE int "Boot (SD Card) filesystem partition size (in MB)" - depends on TARGET_d1 + depends on TARGET_allwinner default 32 diff --git a/lede/target/linux/d1/image/Makefile b/lede/target/linux/allwinner/image/Makefile similarity index 97% rename from lede/target/linux/d1/image/Makefile rename to lede/target/linux/allwinner/image/Makefile index 576e6f24a4..5b42d0ea0b 100644 --- a/lede/target/linux/d1/image/Makefile +++ b/lede/target/linux/allwinner/image/Makefile @@ -49,17 +49,6 @@ define Device/FitImage KERNEL_NAME := Image endef -define Device/widora_mangopi-mq-pro - $(call Device/Default) - DEVICE_VENDOR := MangoPi - DEVICE_MODEL := MQ Pro - DEVICE_DTS := allwinner/sun20i-d1-mangopi-mq-pro - SUPPORTED_DEVICES += mangopi_mq_pro - DEVICE_PACKAGES += kmod-rtw88-8723ds wpad-basic-mbedtls - UBOOT := mangopi_mq_pro -endef -TARGET_DEVICES += widora_mangopi-mq-pro - define Device/100ask_dongshan-nezha-stu $(call Device/Default) DEVICE_VENDOR := Dongshan @@ -70,6 +59,17 @@ define Device/100ask_dongshan-nezha-stu endef TARGET_DEVICES += 100ask_dongshan-nezha-stu +define Device/allwinner_d1-nezha + $(call Device/Default) + DEVICE_VENDOR := Allwinner + DEVICE_MODEL := D1 Nezha + DEVICE_DTS := allwinner/sun20i-d1-nezha + SUPPORTED_DEVICES += nezha + DEVICE_PACKAGES += kmod-gpio-pcf857x + UBOOT := nezha +endef +TARGET_DEVICES += allwinner_d1-nezha + define Device/sipeed_lichee-rv-dock $(call Device/Default) DEVICE_VENDOR := Sipeed @@ -81,16 +81,16 @@ define Device/sipeed_lichee-rv-dock endef TARGET_DEVICES += sipeed_lichee-rv-dock -define Device/allwinner_d1-nezha +define Device/widora_mangopi-mq-pro $(call Device/Default) - DEVICE_VENDOR := Nezha - DEVICE_MODEL := D1 - DEVICE_DTS := allwinner/sun20i-d1-nezha - SUPPORTED_DEVICES += nezha - DEVICE_PACKAGES += kmod-gpio-pcf857x - UBOOT := nezha + DEVICE_VENDOR := MangoPi + DEVICE_MODEL := MQ Pro + DEVICE_DTS := allwinner/sun20i-d1-mangopi-mq-pro + SUPPORTED_DEVICES += mangopi_mq_pro + DEVICE_PACKAGES += kmod-rtw88-8723ds wpad-basic-mbedtls + UBOOT := mangopi_mq_pro endef -TARGET_DEVICES += allwinner_d1-nezha +TARGET_DEVICES += widora_mangopi-mq-pro define Image/Build $(call Image/Build/$(1),$(1)) diff --git a/lede/target/linux/d1/image/gen_d1_sdcard_img.sh b/lede/target/linux/allwinner/image/gen_d1_sdcard_img.sh similarity index 100% rename from lede/target/linux/d1/image/gen_d1_sdcard_img.sh rename to lede/target/linux/allwinner/image/gen_d1_sdcard_img.sh diff --git a/lede/target/linux/armsr/image/Makefile b/lede/target/linux/armsr/image/Makefile index b34c1f16e7..79173e67da 100644 --- a/lede/target/linux/armsr/image/Makefile +++ b/lede/target/linux/armsr/image/Makefile @@ -12,7 +12,6 @@ GRUB_TERMINAL_CONFIG = GRUB_CONSOLE_CMDLINE = earlycon ifneq ($(CONFIG_GRUB_CONSOLE),) - GRUB_CONSOLE_CMDLINE += console=tty1 GRUB_TERMINALS += console endif diff --git a/lede/target/linux/armsr/patches-6.6/300-printk-always-setup-default-consoles.patch b/lede/target/linux/armsr/patches-6.6/300-printk-always-setup-default-consoles.patch new file mode 100644 index 0000000000..076bfd21da --- /dev/null +++ b/lede/target/linux/armsr/patches-6.6/300-printk-always-setup-default-consoles.patch @@ -0,0 +1,47 @@ +From 0059efbd0f9c291795078fb4e50722641d525f38 Mon Sep 17 00:00:00 2001 +From: Mathew McBride +Date: Thu, 16 Jan 2025 11:48:44 +1100 +Subject: [PATCH] printk: always setup default (tty0 + stdout / SPCR) consoles + when no console= present + +(This is a hack specific to OpenWrt's armsr target) + +This change resolves a difference in behaviour between arm64 ACPI +and DT systems. +Our usecase is to ensure the system console is always present +regardless of display mode (serial port or screen). + +Both ACPI and DT have mechanisms to setup a serial console from +information passed by firmware (SPCR and stdout-path respectively). + +On ACPI systems, the SPCR table is parsed very early on in the kernel +boot which prevents the screen console (tty0) from appearing if it is +not explicitly set. + +We would like to avoid specifying console= arguments as there are many +possible configurations on the serial side (like ttyS0, ttyAMA0, ttymxc0 +etc.). + +If the kernel does not consume the serial port in SPCR/stdout-path, +then the 'default' settings from the firmware (baud rate etc.) are lost. + +If the system administrator explicitly specifies a console= argument, +then the old behaviour is returned. + +Signed-off-by: Mathew McBride +Link: https://github.com/openwrt/openwrt/pull/17012#issuecomment-2591751115 +--- + kernel/printk/printk.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/kernel/printk/printk.c ++++ b/kernel/printk/printk.c +@@ -3515,7 +3515,7 @@ void register_console(struct console *ne + * Note that a console with tty binding will have CON_CONSDEV + * flag set and will be first in the list. + */ +- if (preferred_console < 0) { ++ if (!console_set_on_cmdline) { + if (hlist_empty(&console_list) || !console_first()->device || + console_first()->flags & CON_BOOT) { + try_enable_default_console(newcon); diff --git a/lede/target/linux/ath79/config-5.10 b/lede/target/linux/ath79/config-5.10 deleted file mode 100644 index 53f444c68b..0000000000 --- a/lede/target/linux/ath79/config-5.10 +++ /dev/null @@ -1,202 +0,0 @@ -CONFIG_AG71XX=y -# CONFIG_AG71XX_DEBUG is not set -CONFIG_AG71XX_DEBUG_FS=y -CONFIG_AR8216_PHY=y -CONFIG_AR8216_PHY_LEDS=y -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_AT803X_PHY=y -CONFIG_ATH79=y -CONFIG_ATH79_WDT=y -CONFIG_BLK_MQ_PCI=y -CONFIG_CEVT_R4K=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="rootfstype=squashfs,jffs2" -CONFIG_CMDLINE_BOOL=y -# CONFIG_CMDLINE_OVERRIDE is not set -CONFIG_COMMON_CLK=y -# CONFIG_COMMON_CLK_BOSTON is not set -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_GENERIC_DUMP_TLB=y -CONFIG_CPU_HAS_DIEI=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_RIXI=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_CPU_MIPSR2=y -CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y -CONFIG_CPU_R4K_CACHE_TLB=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CPU_SUPPORTS_MSA=y -# CONFIG_CRYPTO_CHACHA_MIPS is not set -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -# CONFIG_CRYPTO_POLY1305_MIPS is not set -CONFIG_CRYPTO_RNG2=y -CONFIG_CSRC_R4K=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DTC=y -CONFIG_EARLY_PRINTK=y -CONFIG_ETHERNET_PACKET_MANGLE=y -CONFIG_FIXED_PHY=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_LIB_ASHLDI3=y -CONFIG_GENERIC_LIB_ASHRDI3=y -CONFIG_GENERIC_LIB_CMPDI2=y -CONFIG_GENERIC_LIB_LSHRDI3=y -CONFIG_GENERIC_LIB_UCMPDI2=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_74X164=y -CONFIG_GPIO_ATH79=y -CONFIG_GPIO_GENERIC=y -# CONFIG_GPIO_LATCH is not set -# CONFIG_GPIO_RB91X_KEY is not set -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HZ_PERIODIC=y -CONFIG_IMAGE_CMDLINE_HACK=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MIPS_CPU=y -CONFIG_IRQ_WORK=y -# CONFIG_KERNEL_ZSTD is not set -CONFIG_LEDS_GPIO=y -# CONFIG_LEDS_RESET is not set -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_MDIO_BITBANG=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_GPIO=y -CONFIG_MEMFD_CREATE=y -# CONFIG_MFD_RB4XX_CPLD is not set -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MIPS=y -CONFIG_MIPS_ASID_BITS=8 -CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_CBPF_JIT=y -CONFIG_MIPS_CLOCK_VSYSCALL=y -# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set -# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set -# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_MIPS_CMDLINE_FROM_DTB=y -# CONFIG_MIPS_ELF_APPENDED_DTB is not set -# CONFIG_MIPS_GENERIC_KERNEL is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -CONFIG_MIPS_LD_CAN_LINK_VDSO=y -# CONFIG_MIPS_NO_APPENDED_DTB is not set -CONFIG_MIPS_RAW_APPENDED_DTB=y -CONFIG_MIPS_SPRAM=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_CFI_I2 is not set -# CONFIG_MTD_CFI_INTELEXT is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set -CONFIG_MTD_PARSER_CYBERTAN=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_ELF_FW=y -CONFIG_MTD_SPLIT_LZMA_FW=y -CONFIG_MTD_SPLIT_SEAMA_FW=y -CONFIG_MTD_SPLIT_TPLINK_FW=y -CONFIG_MTD_SPLIT_UIMAGE_FW=y -CONFIG_MTD_SPLIT_WRGG_FW=y -CONFIG_MTD_VIRT_CONCAT=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_PCI=y -CONFIG_PCI_AR71XX=y -CONFIG_PCI_AR724X=y -CONFIG_PCI_DISABLE_COMMON_QUIRKS=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DRIVERS_LEGACY=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -# CONFIG_PHY_AR7100_USB is not set -# CONFIG_PHY_AR7200_USB is not set -# CONFIG_PHY_ATH79_USB is not set -CONFIG_PINCTRL=y -CONFIG_RATIONAL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -CONFIG_RESET_ATH79=y -CONFIG_RESET_CONTROLLER=y -CONFIG_SERIAL_8250_NR_UARTS=1 -CONFIG_SERIAL_8250_RUNTIME_UARTS=1 -CONFIG_SERIAL_AR933X=y -CONFIG_SERIAL_AR933X_CONSOLE=y -CONFIG_SERIAL_AR933X_NR_UARTS=2 -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SPI=y -CONFIG_SPI_AR934X=y -CONFIG_SPI_ATH79=y -CONFIG_SPI_BITBANG=y -CONFIG_SPI_GPIO=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -# CONFIG_SPI_RB4XX is not set -CONFIG_SRCU=y -CONFIG_SWCONFIG=y -CONFIG_SWCONFIG_LEDS=y -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_HAS_CPU_MIPS32_R2=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_MIPS16=y -CONFIG_SYS_SUPPORTS_ZBOOT=y -CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y -CONFIG_TARGET_ISA_REV=2 -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TINY_SRCU=y -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y diff --git a/lede/target/linux/ath79/files/drivers/gpio/gpio-latch-mikrotik.c b/lede/target/linux/ath79/files/drivers/gpio/gpio-latch-mikrotik.c new file mode 100644 index 0000000000..a0759fe9e3 --- /dev/null +++ b/lede/target/linux/ath79/files/drivers/gpio/gpio-latch-mikrotik.c @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * GPIO latch driver + * + * Copyright (C) 2014 Gabor Juhos + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define GPIO_LATCH_DRIVER_NAME "gpio-latch-mikrotik" +#define GPIO_LATCH_LINES 9 + +struct gpio_latch_chip { + struct gpio_chip gc; + struct mutex mutex; + struct mutex latch_mutex; + bool latch_enabled; + int le_gpio; + bool le_active_low; + struct gpio_desc *gpios[GPIO_LATCH_LINES]; +}; + +static void gpio_latch_lock(struct gpio_latch_chip *glc, bool enable) +{ + mutex_lock(&glc->mutex); + + if (enable) + glc->latch_enabled = true; + + if (glc->latch_enabled) + mutex_lock(&glc->latch_mutex); +} + +static void gpio_latch_unlock(struct gpio_latch_chip *glc, bool disable) +{ + if (glc->latch_enabled) + mutex_unlock(&glc->latch_mutex); + + if (disable) + glc->latch_enabled = true; + + mutex_unlock(&glc->mutex); +} + +static int +gpio_latch_get(struct gpio_chip *gc, unsigned offset) +{ + struct gpio_latch_chip *glc = gpiochip_get_data(gc); + int ret; + + gpio_latch_lock(glc, false); + ret = gpiod_get_raw_value_cansleep(glc->gpios[offset]); + gpio_latch_unlock(glc, false); + + return ret; +} + +static void +gpio_latch_set(struct gpio_chip *gc, unsigned offset, int value) +{ + struct gpio_latch_chip *glc = gpiochip_get_data(gc); + bool enable_latch = false; + bool disable_latch = false; + + if (offset == glc->le_gpio) { + enable_latch = value ^ glc->le_active_low; + disable_latch = !enable_latch; + } + + gpio_latch_lock(glc, enable_latch); + gpiod_set_raw_value_cansleep(glc->gpios[offset], value); + gpio_latch_unlock(glc, disable_latch); +} + +static int +gpio_latch_direction_output(struct gpio_chip *gc, unsigned offset, int value) +{ + struct gpio_latch_chip *glc = gpiochip_get_data(gc); + bool enable_latch = false; + bool disable_latch = false; + int ret; + + if (offset == glc->le_gpio) { + enable_latch = value ^ glc->le_active_low; + disable_latch = !enable_latch; + } + + gpio_latch_lock(glc, enable_latch); + ret = gpiod_direction_output_raw(glc->gpios[offset], value); + gpio_latch_unlock(glc, disable_latch); + + return ret; +} + +static int gpio_latch_probe(struct platform_device *pdev) +{ + struct gpio_latch_chip *glc; + struct gpio_chip *gc; + struct device *dev = &pdev->dev; + int err, i, n; + + glc = devm_kzalloc(dev, sizeof(*glc), GFP_KERNEL); + if (!glc) + return -ENOMEM; + + err = devm_mutex_init(&pdev->dev, &glc->mutex); + if (err) + return err; + + err = devm_mutex_init(&pdev->dev, &glc->latch_mutex); + if (err) + return err; + + n = gpiod_count(dev, NULL); + if (n <= 0) + return dev_err_probe(dev, n, "failed to get gpios"); + if (n != GPIO_LATCH_LINES) { + dev_err(dev, "expected %d gpios", GPIO_LATCH_LINES); + return -EINVAL; + } + + for (i = 0; i < n; i++) { + glc->gpios[i] = devm_gpiod_get_index_optional(dev, NULL, i, + GPIOD_OUT_LOW); + if (IS_ERR(glc->gpios[i])) + return dev_err_probe(dev, PTR_ERR(glc->gpios[i]), + "failed to get gpio %d", i); + } + + glc->le_gpio = 8; + glc->le_active_low = gpiod_is_active_low(glc->gpios[glc->le_gpio]); + + if (!glc->gpios[glc->le_gpio]) { + dev_err(dev, "missing required latch-enable gpio %d\n", + glc->le_gpio); + return -EINVAL; + } + + gc = &glc->gc; + gc->label = GPIO_LATCH_DRIVER_NAME; + gc->parent = dev; + gc->can_sleep = true; + gc->base = -1; + gc->ngpio = GPIO_LATCH_LINES; + gc->get = gpio_latch_get; + gc->set = gpio_latch_set; + gc->direction_output = gpio_latch_direction_output; + + return devm_gpiochip_add_data(dev, gc, glc); +} + +static const struct of_device_id gpio_latch_match[] = { + { .compatible = GPIO_LATCH_DRIVER_NAME }, + {}, +}; + +MODULE_DEVICE_TABLE(of, gpio_latch_match); + +static struct platform_driver gpio_latch_driver = { + .probe = gpio_latch_probe, + .driver = { + .name = GPIO_LATCH_DRIVER_NAME, + .of_match_table = gpio_latch_match, + }, +}; + +module_platform_driver(gpio_latch_driver); + +MODULE_DESCRIPTION("GPIO latch driver"); +MODULE_AUTHOR("Gabor Juhos "); +MODULE_AUTHOR("Denis Kalashnikov "); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:" GPIO_LATCH_DRIVER_NAME); diff --git a/lede/target/linux/ath79/files/drivers/gpio/gpio-rb4xx.c b/lede/target/linux/ath79/files/drivers/gpio/gpio-rb4xx.c index f8022436e0..299dc7d0a1 100644 --- a/lede/target/linux/ath79/files/drivers/gpio/gpio-rb4xx.c +++ b/lede/target/linux/ath79/files/drivers/gpio/gpio-rb4xx.c @@ -105,6 +105,7 @@ static int rb4xx_gpio_probe(struct platform_device *pdev) struct device *parent = dev->parent; struct rb4xx_gpio *gpio; u32 val; + int err; if (!parent) return -ENODEV; @@ -117,7 +118,10 @@ static int rb4xx_gpio_probe(struct platform_device *pdev) gpio->cpld = dev_get_drvdata(parent); gpio->dev = dev; gpio->values = 0; - mutex_init(&gpio->lock); + + err = devm_mutex_init(&pdev->dev, &gpio->lock); + if (err) + return err; gpio->chip.label = "rb4xx-gpio"; gpio->chip.parent = dev; @@ -134,29 +138,11 @@ static int rb4xx_gpio_probe(struct platform_device *pdev) if (!of_property_read_u32(dev->of_node, "base", &val)) gpio->chip.base = val; - return gpiochip_add_data(&gpio->chip, gpio); + return devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio); } -static int rb4xx_gpio_remove(struct platform_device *pdev) -{ - struct rb4xx_gpio *gpio = platform_get_drvdata(pdev); - - gpiochip_remove(&gpio->chip); - mutex_destroy(&gpio->lock); - - return 0; -} - -static const struct platform_device_id rb4xx_gpio_id_table[] = { - { "mikrotik,rb4xx-gpio", }, - { }, -}; -MODULE_DEVICE_TABLE(platform, rb4xx_gpio_id_table); - static struct platform_driver rb4xx_gpio_driver = { .probe = rb4xx_gpio_probe, - .remove = rb4xx_gpio_remove, - .id_table = rb4xx_gpio_id_table, .driver = { .name = "rb4xx-gpio", }, diff --git a/lede/target/linux/ath79/files/drivers/gpio/gpio-rb91x-key.c b/lede/target/linux/ath79/files/drivers/gpio/gpio-rb91x-key.c index ee8359e774..d83b690afe 100644 --- a/lede/target/linux/ath79/files/drivers/gpio/gpio-rb91x-key.c +++ b/lede/target/linux/ath79/files/drivers/gpio/gpio-rb91x-key.c @@ -41,14 +41,9 @@ struct gpio_rb91x_key { struct gpio_desc *gpio; }; -static inline struct gpio_rb91x_key *to_gpio_rb91x_key(struct gpio_chip *gc) -{ - return container_of(gc, struct gpio_rb91x_key, gc); -} - static int gpio_rb91x_key_get(struct gpio_chip *gc, unsigned offset) { - struct gpio_rb91x_key *drvdata = to_gpio_rb91x_key(gc); + struct gpio_rb91x_key *drvdata = gpiochip_get_data(gc); struct gpio_desc *gpio = drvdata->gpio; int val, bak_val; @@ -97,7 +92,7 @@ static int gpio_rb91x_key_direction_input(struct gpio_chip *gc, unsigned offset) static void gpio_rb91x_key_set(struct gpio_chip *gc, unsigned offset, int value) { - struct gpio_rb91x_key *drvdata = to_gpio_rb91x_key(gc); + struct gpio_rb91x_key *drvdata = gpiochip_get_data(gc); struct gpio_desc *gpio = drvdata->gpio; mutex_lock(&drvdata->mutex); @@ -144,27 +139,27 @@ static int gpio_rb91x_key_probe(struct platform_device *pdev) struct gpio_rb91x_key *drvdata; struct gpio_chip *gc; struct device *dev = &pdev->dev; - struct device_node *of_node = dev->of_node; - int r; + int err; drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); if (!drvdata) return -ENOMEM; - mutex_init(&drvdata->mutex); - mutex_init(&drvdata->poll_mutex); + err = devm_mutex_init(dev, &drvdata->mutex); + if (err) + return err; + + err = devm_mutex_init(dev, &drvdata->poll_mutex); + if (err) + return err; drvdata->gpio = devm_gpiod_get(dev, NULL, GPIOD_OUT_LOW); - if (IS_ERR(drvdata->gpio)) { - if (PTR_ERR(drvdata->gpio) != -EPROBE_DEFER) { - dev_err(dev, "failed to get gpio: %ld\n", - PTR_ERR(drvdata->gpio)); - } - return PTR_ERR(drvdata->gpio); - } + if (IS_ERR(drvdata->gpio)) + return dev_err_probe(dev, PTR_ERR(drvdata->gpio), "failed to get gpio"); gc = &drvdata->gc; gc->label = GPIO_RB91X_KEY_DRIVER_NAME; + gc->parent = dev; gc->can_sleep = 1; gc->base = -1; gc->ngpio = GPIO_RB91X_KEY_NGPIOS; @@ -172,25 +167,8 @@ static int gpio_rb91x_key_probe(struct platform_device *pdev) gc->set = gpio_rb91x_key_set; gc->direction_output = gpio_rb91x_key_direction_output; gc->direction_input = gpio_rb91x_key_direction_input; - gc->of_node = of_node; - platform_set_drvdata(pdev, drvdata); - - r = gpiochip_add(&drvdata->gc); - if (r) { - dev_err(dev, "gpiochip_add() failed: %d\n", r); - return r; - } - - return 0; -} - -static int gpio_rb91x_key_remove(struct platform_device *pdev) -{ - struct gpio_rb91x_key *drvdata = platform_get_drvdata(pdev); - - gpiochip_remove(&drvdata->gc); - return 0; + return devm_gpiochip_add_data(dev, gc, drvdata); } static const struct of_device_id gpio_rb91x_key_match[] = { @@ -202,10 +180,8 @@ MODULE_DEVICE_TABLE(of, gpio_rb91x_key_match); static struct platform_driver gpio_rb91x_key_driver = { .probe = gpio_rb91x_key_probe, - .remove = gpio_rb91x_key_remove, .driver = { .name = GPIO_RB91X_KEY_DRIVER_NAME, - .owner = THIS_MODULE, .of_match_table = gpio_rb91x_key_match, }, }; diff --git a/lede/target/linux/ath79/files/drivers/mfd/rb4xx-cpld.c b/lede/target/linux/ath79/files/drivers/mfd/rb4xx-cpld.c index da18424c63..b99a15bb46 100644 --- a/lede/target/linux/ath79/files/drivers/mfd/rb4xx-cpld.c +++ b/lede/target/linux/ath79/files/drivers/mfd/rb4xx-cpld.c @@ -151,11 +151,6 @@ static int rb4xx_cpld_probe(struct spi_device *spi) NULL, 0, NULL); } -static int rb4xx_cpld_remove(struct spi_device *spi) -{ - return 0; -} - static const struct of_device_id rb4xx_cpld_dt_match[] = { { .compatible = "mikrotik,rb4xx-cpld", }, { }, @@ -164,11 +159,10 @@ MODULE_DEVICE_TABLE(of, rb4xx_cpld_dt_match); static struct spi_driver rb4xx_cpld_driver = { .probe = rb4xx_cpld_probe, - .remove = rb4xx_cpld_remove, .driver = { .name = "rb4xx-cpld", .bus = &spi_bus_type, - .of_match_table = of_match_ptr(rb4xx_cpld_dt_match), + .of_match_table = rb4xx_cpld_dt_match, }, }; diff --git a/lede/target/linux/ath79/files/drivers/mtd/nand/raw/ar934x_nand.c b/lede/target/linux/ath79/files/drivers/mtd/nand/raw/ar934x_nand.c index fafb3f56b8..c1670b61a5 100644 --- a/lede/target/linux/ath79/files/drivers/mtd/nand/raw/ar934x_nand.c +++ b/lede/target/linux/ath79/files/drivers/mtd/nand/raw/ar934x_nand.c @@ -1325,10 +1325,10 @@ static int ar934x_nfc_attach_chip(struct nand_chip *nand) if (ret) return ret; - if (mtd->writesize == 2048) - nand->options |= NAND_NO_SUBPAGE_WRITE; - if (nand->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) { + if (mtd->writesize == 2048) + nand->options |= NAND_NO_SUBPAGE_WRITE; + ret = ar934x_nfc_setup_hwecc(nfc); if (ret) return ret; @@ -1359,7 +1359,6 @@ static const struct nand_controller_ops ar934x_nfc_controller_ops = { static int ar934x_nfc_probe(struct platform_device *pdev) { struct ar934x_nfc *nfc; - struct resource *res; struct mtd_info *mtd; struct nand_chip *nand; int ret; @@ -1367,19 +1366,13 @@ static int ar934x_nfc_probe(struct platform_device *pdev) pdev->dev.dma_mask = &ar934x_nfc_dma_mask; pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, "failed to get I/O memory\n"); - return -EINVAL; - } - nfc = devm_kzalloc(&pdev->dev, sizeof(struct ar934x_nfc), GFP_KERNEL); if (!nfc) { dev_err(&pdev->dev, "failed to allocate driver data\n"); return -ENOMEM; } - nfc->base = devm_ioremap_resource(&pdev->dev, res); + nfc->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(nfc->base)) { dev_err(&pdev->dev, "failed to remap I/O memory\n"); return PTR_ERR(nfc->base); @@ -1459,7 +1452,7 @@ err_free_buf: return ret; } -static int ar934x_nfc_remove(struct platform_device *pdev) +static void ar934x_nfc_remove(struct platform_device *pdev) { struct ar934x_nfc *nfc; @@ -1469,8 +1462,6 @@ static int ar934x_nfc_remove(struct platform_device *pdev) nand_cleanup(&nfc->nand_chip); ar934x_nfc_free_buf(nfc); } - - return 0; } static const struct of_device_id ar934x_nfc_match[] = { @@ -1482,10 +1473,9 @@ MODULE_DEVICE_TABLE(of, ar934x_nfc_match); static struct platform_driver ar934x_nfc_driver = { .probe = ar934x_nfc_probe, - .remove = ar934x_nfc_remove, + .remove_new = ar934x_nfc_remove, .driver = { .name = AR934X_NFC_DRIVER_NAME, - .owner = THIS_MODULE, .of_match_table = ar934x_nfc_match, }, }; diff --git a/lede/target/linux/ath79/files/drivers/mtd/nand/raw/nand_rb4xx.c b/lede/target/linux/ath79/files/drivers/mtd/nand/raw/nand_rb4xx.c index e42631525c..e475105170 100644 --- a/lede/target/linux/ath79/files/drivers/mtd/nand/raw/nand_rb4xx.c +++ b/lede/target/linux/ath79/files/drivers/mtd/nand/raw/nand_rb4xx.c @@ -214,26 +214,17 @@ static int rb4xx_nand_probe(struct platform_device *pdev) return 0; } -static int rb4xx_nand_remove(struct platform_device *pdev) +static void rb4xx_nand_remove(struct platform_device *pdev) { struct rb4xx_nand *nand = platform_get_drvdata(pdev); mtd_device_unregister(nand_to_mtd(&nand->chip)); nand_cleanup(&nand->chip); - - return 0; } -static const struct platform_device_id rb4xx_nand_id_table[] = { - { "mikrotik,rb4xx-nand", }, - { }, -}; -MODULE_DEVICE_TABLE(platform, rb4xx_nand_id_table); - static struct platform_driver rb4xx_nand_driver = { .probe = rb4xx_nand_probe, - .remove = rb4xx_nand_remove, - .id_table = rb4xx_nand_id_table, + .remove_new = rb4xx_nand_remove, .driver = { .name = "rb4xx-nand", }, diff --git a/lede/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c b/lede/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c index 244fd27590..8a154c3514 100644 --- a/lede/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c +++ b/lede/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c @@ -284,13 +284,8 @@ static int rb91x_nand_probe(struct platform_device *pdev) platform_set_drvdata(pdev, drvdata); gpios = gpiod_get_array(dev, NULL, GPIOD_OUT_LOW); - if (IS_ERR(gpios)) { - if (PTR_ERR(gpios) != -EPROBE_DEFER) { - dev_err(dev, "failed to get gpios: %d\n", - PTR_ERR(gpios)); - } - return PTR_ERR(gpios); - } + if (IS_ERR(gpios)) + return dev_err_probe(dev, PTR_ERR(gpios), "failed to get gpios"); if (gpios->ndescs != RB91X_NAND_GPIOS) { dev_err(dev, "expected %d gpios\n", RB91X_NAND_GPIOS); @@ -333,25 +328,18 @@ static int rb91x_nand_probe(struct platform_device *pdev) r = mtd_device_register(mtd, NULL, 0); if (r) { - dev_err(dev, "mtd_device_register() failed: %d\n", - r); - goto err_release_nand; + rb91x_nand_release(drvdata); + return dev_err_probe(dev, r, "mtd_device_register() failed"); } return 0; - -err_release_nand: - rb91x_nand_release(drvdata); - return r; } -static int rb91x_nand_remove(struct platform_device *pdev) +static void rb91x_nand_remove(struct platform_device *pdev) { struct rb91x_nand_drvdata *drvdata = platform_get_drvdata(pdev); rb91x_nand_release(drvdata); - - return 0; } static const struct of_device_id rb91x_nand_match[] = { @@ -363,10 +351,9 @@ MODULE_DEVICE_TABLE(of, rb91x_nand_match); static struct platform_driver rb91x_nand_driver = { .probe = rb91x_nand_probe, - .remove = rb91x_nand_remove, + .remove_new = rb91x_nand_remove, .driver = { .name = "rb91x-nand", - .owner = THIS_MODULE, .of_match_table = rb91x_nand_match, }, }; diff --git a/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Kconfig b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Kconfig index 4df2d21e34..e1504b9234 100644 --- a/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Kconfig +++ b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Kconfig @@ -1,4 +1,4 @@ -config AG71XX +config AG71XX_LEGACY tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support" depends on ATH79 select PHYLIB @@ -6,18 +6,16 @@ config AG71XX If you wish to compile a kernel for AR7XXX/91XXX and enable ethernet support, then you should always answer Y to this. -if AG71XX +if AG71XX_LEGACY -config AG71XX_DEBUG +config AG71XX_LEGACY_DEBUG bool "Atheros AR71xx built-in ethernet driver debugging" - default n help Atheros AR71xx built-in ethernet driver debugging messages. -config AG71XX_DEBUG_FS +config AG71XX_LEGACY_DEBUG_FS bool "Atheros AR71xx built-in ethernet driver debugfs support" depends on DEBUG_FS - default n help Say Y, if you need access to various statistics provided by the ag71xx driver. diff --git a/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Makefile b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Makefile index 87add0d208..86e47290e6 100644 --- a/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Makefile +++ b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Makefile @@ -2,12 +2,12 @@ # Makefile for the Atheros AR71xx built-in ethernet macs # -ag71xx-y += ag71xx_main.o -ag71xx-y += ag71xx_gmac.o -ag71xx-y += ag71xx_ethtool.o -ag71xx-y += ag71xx_phy.o +ag71xx_legacy-y += ag71xx_main.o +ag71xx_legacy-y += ag71xx_gmac.o +ag71xx_legacy-y += ag71xx_ethtool.o +ag71xx_legacy-y += ag71xx_phy.o -ag71xx-$(CONFIG_AG71XX_DEBUG_FS) += ag71xx_debugfs.o +ag71xx_legacy-$(CONFIG_AG71XX_LEGACY_DEBUG_FS) += ag71xx_legacy_debugfs.o -obj-$(CONFIG_AG71XX) += ag71xx_mdio.o -obj-$(CONFIG_AG71XX) += ag71xx.o +obj-$(CONFIG_AG71XX_LEGACY) += ag71xx_legacy_mdio.o +obj-$(CONFIG_AG71XX_LEGACY) += ag71xx_legacy.o diff --git a/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h index 1955cd288f..da716d94c3 100644 --- a/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h +++ b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h @@ -40,7 +40,7 @@ #include #include -#define AG71XX_DRV_NAME "ag71xx" +#define AG71XX_DRV_NAME "ag71xx-legacy" /* * For our NAPI weight bigger does *NOT* mean better - it means more @@ -65,10 +65,10 @@ #define AG71XX_TX_RING_SIZE_DEFAULT 128 #define AG71XX_RX_RING_SIZE_DEFAULT 256 -#define AG71XX_TX_RING_SIZE_MAX 128 +#define AG71XX_TX_RING_SIZE_MAX 256 #define AG71XX_RX_RING_SIZE_MAX 256 -#ifdef CONFIG_AG71XX_DEBUG +#ifdef CONFIG_AG71XX_LEGACY_DEBUG #define DBG(fmt, args...) pr_debug(fmt, ## args) #else #define DBG(fmt, args...) do {} while (0) @@ -195,7 +195,7 @@ struct ag71xx { u32 pllreg[3]; struct regmap *pllregmap; -#ifdef CONFIG_AG71XX_DEBUG_FS +#ifdef CONFIG_AG71XX_LEGACY_DEBUG_FS struct ag71xx_debug debug; #endif }; @@ -310,11 +310,11 @@ ag71xx_ring_size_order(int size) #define FIFO_CFG4_MC BIT(8) /* Multicast Packet */ #define FIFO_CFG4_BC BIT(9) /* Broadcast Packet */ #define FIFO_CFG4_DR BIT(10) /* Dribble */ -#define FIFO_CFG4_LE BIT(11) /* Long Event */ -#define FIFO_CFG4_CF BIT(12) /* Control Frame */ -#define FIFO_CFG4_PF BIT(13) /* Pause Frame */ -#define FIFO_CFG4_UO BIT(14) /* Unsupported Opcode */ -#define FIFO_CFG4_VT BIT(15) /* VLAN tag detected */ +#define FIFO_CFG4_CF BIT(11) /* Control Frame */ +#define FIFO_CFG4_PF BIT(12) /* Pause Frame */ +#define FIFO_CFG4_UO BIT(13) /* Unsupported Opcode */ +#define FIFO_CFG4_VT BIT(14) /* VLAN tag detected */ +#define FIFO_CFG4_LE BIT(15) /* Long Event */ #define FIFO_CFG4_FT BIT(16) /* Frame Truncated */ #define FIFO_CFG4_UC BIT(17) /* Unicast Packet */ @@ -322,20 +322,20 @@ ag71xx_ring_size_order(int size) #define FIFO_CFG5_DV BIT(1) /* RX_DV Event */ #define FIFO_CFG5_FC BIT(2) /* False Carrier */ #define FIFO_CFG5_CE BIT(3) /* Code Error */ -#define FIFO_CFG5_LM BIT(4) /* Length Mismatch */ -#define FIFO_CFG5_LO BIT(5) /* Length Out of Range */ -#define FIFO_CFG5_OK BIT(6) /* Packet is OK */ -#define FIFO_CFG5_MC BIT(7) /* Multicast Packet */ -#define FIFO_CFG5_BC BIT(8) /* Broadcast Packet */ -#define FIFO_CFG5_DR BIT(9) /* Dribble */ -#define FIFO_CFG5_CF BIT(10) /* Control Frame */ -#define FIFO_CFG5_PF BIT(11) /* Pause Frame */ -#define FIFO_CFG5_UO BIT(12) /* Unsupported Opcode */ -#define FIFO_CFG5_VT BIT(13) /* VLAN tag detected */ -#define FIFO_CFG5_LE BIT(14) /* Long Event */ -#define FIFO_CFG5_FT BIT(15) /* Frame Truncated */ -#define FIFO_CFG5_16 BIT(16) /* unknown */ -#define FIFO_CFG5_17 BIT(17) /* unknown */ +#define FIFO_CFG5_CR BIT(4) /* CRC error */ +#define FIFO_CFG5_LM BIT(5) /* Length Mismatch */ +#define FIFO_CFG5_LO BIT(6) /* Length out of range */ +#define FIFO_CFG5_OK BIT(7) /* Packet is OK */ +#define FIFO_CFG5_MC BIT(8) /* Multicast Packet */ +#define FIFO_CFG5_BC BIT(9) /* Broadcast Packet */ +#define FIFO_CFG5_DR BIT(10) /* Dribble */ +#define FIFO_CFG5_CF BIT(11) /* Control Frame */ +#define FIFO_CFG5_PF BIT(12) /* Pause Frame */ +#define FIFO_CFG5_UO BIT(13) /* Unsupported Opcode */ +#define FIFO_CFG5_VT BIT(14) /* VLAN tag detected */ +#define FIFO_CFG5_LE BIT(15) /* Long Event */ +#define FIFO_CFG5_FT BIT(16) /* Frame Truncated */ +#define FIFO_CFG5_UC BIT(17) /* Unicast Packet */ #define FIFO_CFG5_SF BIT(18) /* Short Frame */ #define FIFO_CFG5_BM BIT(19) /* Byte Mode */ @@ -425,7 +425,7 @@ static inline void ag71xx_int_disable(struct ag71xx *ag, u32 ints) ag71xx_cb(ag, AG71XX_REG_INT_ENABLE, ints); } -#ifdef CONFIG_AG71XX_DEBUG_FS +#ifdef CONFIG_AG71XX_LEGACY_DEBUG_FS int ag71xx_debugfs_root_init(void); void ag71xx_debugfs_root_exit(void); int ag71xx_debugfs_init(struct ag71xx *ag); @@ -441,7 +441,7 @@ static inline void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status) {} static inline void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx) {} -#endif /* CONFIG_AG71XX_DEBUG_FS */ +#endif /* CONFIG_AG71XX_LEGACY_DEBUG_FS */ int ag71xx_ar7240_init(struct ag71xx *ag, struct device_node *np); void ag71xx_ar7240_cleanup(struct ag71xx *ag); diff --git a/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c index 104b9320b9..14c6560907 100644 --- a/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c +++ b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c @@ -80,8 +80,11 @@ static void ag71xx_ethtool_set_msglevel(struct net_device *dev, u32 msg_level) ag->msg_enable = msg_level; } -static void ag71xx_ethtool_get_ringparam(struct net_device *dev, - struct ethtool_ringparam *er) +static void +ag71xx_ethtool_get_ringparam(struct net_device *dev, + struct ethtool_ringparam *er, + struct kernel_ethtool_ringparam *kernel_ring, + struct netlink_ext_ack *extack) { struct ag71xx *ag = netdev_priv(dev); @@ -99,8 +102,11 @@ static void ag71xx_ethtool_get_ringparam(struct net_device *dev, er->tx_pending /= AG71XX_TX_RING_DS_PER_PKT; } -static int ag71xx_ethtool_set_ringparam(struct net_device *dev, - struct ethtool_ringparam *er) +static int +ag71xx_ethtool_set_ringparam(struct net_device *dev, + struct ethtool_ringparam *er, + struct kernel_ethtool_ringparam *kernel_ring, + struct netlink_ext_ack *extack) { struct ag71xx *ag = netdev_priv(dev); unsigned tx_size; @@ -155,8 +161,7 @@ static void ag71xx_ethtool_get_strings(struct net_device *netdev, u32 sset, int i; for (i = 0; i < ARRAY_SIZE(ag71xx_statistics); i++) - memcpy(data + i * ETH_GSTRING_LEN, - ag71xx_statistics[i].name, ETH_GSTRING_LEN); + ethtool_puts(&data, ag71xx_statistics[i].name); } } diff --git a/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_legacy_debugfs.c b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_legacy_debugfs.c new file mode 100644 index 0000000000..20cf1c15c8 --- /dev/null +++ b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_legacy_debugfs.c @@ -0,0 +1,285 @@ +/* + * Atheros AR71xx built-in ethernet mac driver + * + * Copyright (C) 2008-2010 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * Based on Atheros' AG7100 driver + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include "ag71xx.h" + +static struct dentry *ag71xx_debugfs_root; + +static int ag71xx_debugfs_generic_open(struct inode *inode, struct file *file) +{ + file->private_data = inode->i_private; + return 0; +} + +void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status) +{ + if (status) + ag->debug.int_stats.total++; + if (status & AG71XX_INT_TX_PS) + ag->debug.int_stats.tx_ps++; + if (status & AG71XX_INT_TX_UR) + ag->debug.int_stats.tx_ur++; + if (status & AG71XX_INT_TX_BE) + ag->debug.int_stats.tx_be++; + if (status & AG71XX_INT_RX_PR) + ag->debug.int_stats.rx_pr++; + if (status & AG71XX_INT_RX_OF) + ag->debug.int_stats.rx_of++; + if (status & AG71XX_INT_RX_BE) + ag->debug.int_stats.rx_be++; +} + +static ssize_t read_file_int_stats(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ +#define PR_INT_STAT(_label, _field) \ + len += snprintf(buf + len, sizeof(buf) - len, \ + "%20s: %10lu\n", _label, ag->debug.int_stats._field); + + struct ag71xx *ag = file->private_data; + char buf[256]; + unsigned int len = 0; + + PR_INT_STAT("TX Packet Sent", tx_ps); + PR_INT_STAT("TX Underrun", tx_ur); + PR_INT_STAT("TX Bus Error", tx_be); + PR_INT_STAT("RX Packet Received", rx_pr); + PR_INT_STAT("RX Overflow", rx_of); + PR_INT_STAT("RX Bus Error", rx_be); + len += snprintf(buf + len, sizeof(buf) - len, "\n"); + PR_INT_STAT("Total", total); + + return simple_read_from_buffer(user_buf, count, ppos, buf, len); +#undef PR_INT_STAT +} + +static const struct file_operations ag71xx_fops_int_stats = { + .open = ag71xx_debugfs_generic_open, + .read = read_file_int_stats, + .owner = THIS_MODULE +}; + +void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx) +{ + struct ag71xx_napi_stats *stats = &ag->debug.napi_stats; + + if (rx) { + stats->rx_count++; + stats->rx_packets += rx; + if (rx <= AG71XX_NAPI_WEIGHT) + stats->rx[rx]++; + if (rx > stats->rx_packets_max) + stats->rx_packets_max = rx; + } + + if (tx) { + stats->tx_count++; + stats->tx_packets += tx; + if (tx <= AG71XX_NAPI_WEIGHT) + stats->tx[tx]++; + if (tx > stats->tx_packets_max) + stats->tx_packets_max = tx; + } +} + +static ssize_t read_file_napi_stats(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct ag71xx *ag = file->private_data; + struct ag71xx_napi_stats *stats = &ag->debug.napi_stats; + char *buf; + unsigned int buflen; + unsigned int len = 0; + unsigned long rx_avg = 0; + unsigned long tx_avg = 0; + int ret; + int i; + + buflen = 2048; + buf = kmalloc(buflen, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + if (stats->rx_count) + rx_avg = stats->rx_packets / stats->rx_count; + + if (stats->tx_count) + tx_avg = stats->tx_packets / stats->tx_count; + + len += snprintf(buf + len, buflen - len, "%3s %10s %10s\n", + "len", "rx", "tx"); + + for (i = 1; i <= AG71XX_NAPI_WEIGHT; i++) + len += snprintf(buf + len, buflen - len, + "%3d: %10lu %10lu\n", + i, stats->rx[i], stats->tx[i]); + + len += snprintf(buf + len, buflen - len, "\n"); + + len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", + "sum", stats->rx_count, stats->tx_count); + len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", + "avg", rx_avg, tx_avg); + len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", + "max", stats->rx_packets_max, stats->tx_packets_max); + len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", + "pkt", stats->rx_packets, stats->tx_packets); + + ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); + kfree(buf); + + return ret; +} + +static const struct file_operations ag71xx_fops_napi_stats = { + .open = ag71xx_debugfs_generic_open, + .read = read_file_napi_stats, + .owner = THIS_MODULE +}; + +#define DESC_PRINT_LEN 64 + +static ssize_t read_file_ring(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos, + struct ag71xx *ag, + struct ag71xx_ring *ring, + unsigned desc_reg) +{ + int ring_size = BIT(ring->order); + int ring_mask = ring_size - 1; + char *buf; + unsigned int buflen; + unsigned int len = 0; + unsigned long flags; + ssize_t ret; + int curr; + int dirty; + u32 desc_hw; + int i; + + buflen = (ring_size * DESC_PRINT_LEN); + buf = kmalloc(buflen, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + len += snprintf(buf + len, buflen - len, + "Idx ... %-8s %-8s %-8s %-8s .\n", + "desc", "next", "data", "ctrl"); + + spin_lock_irqsave(&ag->lock, flags); + + curr = (ring->curr & ring_mask); + dirty = (ring->dirty & ring_mask); + desc_hw = ag71xx_rr(ag, desc_reg); + for (i = 0; i < ring_size; i++) { + struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); + u32 desc_dma = ((u32) ring->descs_dma) + i * AG71XX_DESC_SIZE; + + len += snprintf(buf + len, buflen - len, + "%3d %c%c%c %08x %08x %08x %08x %c\n", + i, + (i == curr) ? 'C' : ' ', + (i == dirty) ? 'D' : ' ', + (desc_hw == desc_dma) ? 'H' : ' ', + desc_dma, + desc->next, + desc->data, + desc->ctrl, + (desc->ctrl & DESC_EMPTY) ? 'E' : '*'); + } + + spin_unlock_irqrestore(&ag->lock, flags); + + ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); + kfree(buf); + + return ret; +} + +static ssize_t read_file_tx_ring(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct ag71xx *ag = file->private_data; + + return read_file_ring(file, user_buf, count, ppos, ag, &ag->tx_ring, + AG71XX_REG_TX_DESC); +} + +static const struct file_operations ag71xx_fops_tx_ring = { + .open = ag71xx_debugfs_generic_open, + .read = read_file_tx_ring, + .owner = THIS_MODULE +}; + +static ssize_t read_file_rx_ring(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct ag71xx *ag = file->private_data; + + return read_file_ring(file, user_buf, count, ppos, ag, &ag->rx_ring, + AG71XX_REG_RX_DESC); +} + +static const struct file_operations ag71xx_fops_rx_ring = { + .open = ag71xx_debugfs_generic_open, + .read = read_file_rx_ring, + .owner = THIS_MODULE +}; + +void ag71xx_debugfs_exit(struct ag71xx *ag) +{ + debugfs_remove_recursive(ag->debug.debugfs_dir); +} + +int ag71xx_debugfs_init(struct ag71xx *ag) +{ + struct device *dev = &ag->pdev->dev; + + ag->debug.debugfs_dir = debugfs_create_dir(dev_name(dev), + ag71xx_debugfs_root); + if (!ag->debug.debugfs_dir) { + dev_err(dev, "unable to create debugfs directory\n"); + return -ENOENT; + } + + debugfs_create_file("int_stats", S_IRUGO, ag->debug.debugfs_dir, + ag, &ag71xx_fops_int_stats); + debugfs_create_file("napi_stats", S_IRUGO, ag->debug.debugfs_dir, + ag, &ag71xx_fops_napi_stats); + debugfs_create_file("tx_ring", S_IRUGO, ag->debug.debugfs_dir, + ag, &ag71xx_fops_tx_ring); + debugfs_create_file("rx_ring", S_IRUGO, ag->debug.debugfs_dir, + ag, &ag71xx_fops_rx_ring); + + return 0; +} + +int ag71xx_debugfs_root_init(void) +{ + if (ag71xx_debugfs_root) + return -EBUSY; + + ag71xx_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); + if (!ag71xx_debugfs_root) + return -ENOENT; + + return 0; +} + +void ag71xx_debugfs_root_exit(void) +{ + debugfs_remove(ag71xx_debugfs_root); + ag71xx_debugfs_root = NULL; +} diff --git a/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_legacy_mdio.c b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_legacy_mdio.c new file mode 100644 index 0000000000..9ccba74720 --- /dev/null +++ b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_legacy_mdio.c @@ -0,0 +1,249 @@ +/* + * Atheros AR71xx built-in ethernet mac driver + * + * Copyright (C) 2008-2010 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * Based on Atheros' AG7100 driver + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include "ag71xx.h" + +#define AG71XX_MDIO_RETRY 1000 +#define AG71XX_MDIO_DELAY 5 + +static int bus_count; + +static int ag71xx_mdio_wait_busy(struct ag71xx_mdio *am) +{ + int i; + + for (i = 0; i < AG71XX_MDIO_RETRY; i++) { + u32 busy; + + udelay(AG71XX_MDIO_DELAY); + + regmap_read(am->mii_regmap, AG71XX_REG_MII_IND, &busy); + if (!busy) + return 0; + + udelay(AG71XX_MDIO_DELAY); + } + + pr_err("%s: MDIO operation timed out\n", am->mii_bus->name); + + return -ETIMEDOUT; +} + +static int ag71xx_mdio_mii_read(struct mii_bus *bus, int addr, int reg) +{ + struct ag71xx_mdio *am = bus->priv; + int err; + int ret; + + err = ag71xx_mdio_wait_busy(am); + if (err) + return 0xffff; + + regmap_write(am->mii_regmap, AG71XX_REG_MII_CMD, MII_CMD_WRITE); + regmap_write(am->mii_regmap, AG71XX_REG_MII_ADDR, + ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff)); + regmap_write(am->mii_regmap, AG71XX_REG_MII_CMD, MII_CMD_READ); + + err = ag71xx_mdio_wait_busy(am); + if (err) + return 0xffff; + + regmap_read(am->mii_regmap, AG71XX_REG_MII_STATUS, &ret); + ret &= 0xffff; + regmap_write(am->mii_regmap, AG71XX_REG_MII_CMD, MII_CMD_WRITE); + + DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr, reg, ret); + + return ret; +} + +static int ag71xx_mdio_mii_write(struct mii_bus *bus, int addr, int reg, u16 val) +{ + struct ag71xx_mdio *am = bus->priv; + + DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr, reg, val); + + regmap_write(am->mii_regmap, AG71XX_REG_MII_ADDR, + ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff)); + regmap_write(am->mii_regmap, AG71XX_REG_MII_CTRL, val); + + ag71xx_mdio_wait_busy(am); + + return 0; +} + +static const u32 ar71xx_mdio_div_table[] = { + 4, 4, 6, 8, 10, 14, 20, 28, +}; + +static const u32 ar7240_mdio_div_table[] = { + 2, 2, 4, 6, 8, 12, 18, 26, 32, 40, 48, 56, 62, 70, 78, 96, +}; + +static const u32 ar933x_mdio_div_table[] = { + 4, 4, 6, 8, 10, 14, 20, 28, 34, 42, 50, 58, 66, 74, 82, 98, +}; + +static int ag71xx_mdio_get_divider(struct device_node *np, u32 *div) +{ + struct clk *ref_clk = of_clk_get(np, 0); + unsigned long ref_clock; + u32 mdio_clock; + const u32 *table; + int ndivs, i; + + if (IS_ERR(ref_clk)) + return -EINVAL; + + ref_clock = clk_get_rate(ref_clk); + clk_put(ref_clk); + + if(of_property_read_u32(np, "qca,mdio-max-frequency", &mdio_clock)) { + if (of_property_read_bool(np, "builtin-switch")) + mdio_clock = 5000000; + else + mdio_clock = 2000000; + } + + if (of_device_is_compatible(np, "qca,ar9330-mdio") || + of_device_is_compatible(np, "qca,ar9340-mdio")) { + table = ar933x_mdio_div_table; + ndivs = ARRAY_SIZE(ar933x_mdio_div_table); + } else if (of_device_is_compatible(np, "qca,ar7240-mdio")) { + table = ar7240_mdio_div_table; + ndivs = ARRAY_SIZE(ar7240_mdio_div_table); + } else { + table = ar71xx_mdio_div_table; + ndivs = ARRAY_SIZE(ar71xx_mdio_div_table); + } + + for (i = 0; i < ndivs; i++) { + unsigned long t; + + t = ref_clock / table[i]; + if (t <= mdio_clock) { + *div = i; + return 0; + } + } + + return -ENOENT; +} + +static int ag71xx_mdio_reset(struct mii_bus *bus) +{ + struct device_node *np = bus->dev.of_node; + struct ag71xx_mdio *am = bus->priv; + bool builtin_switch; + u32 t; + + builtin_switch = of_property_read_bool(np, "builtin-switch"); + + if (ag71xx_mdio_get_divider(np, &t)) { + if (of_device_is_compatible(np, "qca,ar9340-mdio")) + t = MII_CFG_CLK_DIV_58; + else if (builtin_switch) + t = MII_CFG_CLK_DIV_10; + else + t = MII_CFG_CLK_DIV_28; + } + + regmap_write(am->mii_regmap, AG71XX_REG_MII_CFG, t | MII_CFG_RESET); + udelay(100); + + regmap_write(am->mii_regmap, AG71XX_REG_MII_CFG, t); + udelay(100); + + return 0; +} + +static int ag71xx_mdio_probe(struct platform_device *pdev) +{ + struct device *amdev = &pdev->dev; + struct device_node *np = pdev->dev.of_node; + struct ag71xx_mdio *am; + struct mii_bus *mii_bus; + bool builtin_switch; + int i, err; + + am = devm_kzalloc(amdev, sizeof(*am), GFP_KERNEL); + if (!am) + return -ENOMEM; + + am->mii_regmap = syscon_regmap_lookup_by_phandle(np, "regmap"); + if (IS_ERR(am->mii_regmap)) + return PTR_ERR(am->mii_regmap); + + mii_bus = devm_mdiobus_alloc(amdev); + if (!mii_bus) + return -ENOMEM; + + am->mdio_reset = devm_reset_control_get_exclusive(amdev, "mdio"); + builtin_switch = of_property_read_bool(np, "builtin-switch"); + + mii_bus->name = "ag71xx_mdio"; + mii_bus->read = ag71xx_mdio_mii_read; + mii_bus->write = ag71xx_mdio_mii_write; + mii_bus->reset = ag71xx_mdio_reset; + mii_bus->priv = am; + mii_bus->parent = amdev; + snprintf(mii_bus->id, MII_BUS_ID_SIZE, "%s.%d", np->name, bus_count++); + + for (i = 0; i < PHY_MAX_ADDR; i++) + mii_bus->irq[i] = PHY_POLL; + + if (!IS_ERR(am->mdio_reset)) { + reset_control_assert(am->mdio_reset); + msleep(100); + reset_control_deassert(am->mdio_reset); + msleep(200); + } + + err = of_mdiobus_register(mii_bus, np); + if (err) + return err; + + am->mii_bus = mii_bus; + platform_set_drvdata(pdev, am); + + return 0; +} + +static void ag71xx_mdio_remove(struct platform_device *pdev) +{ + struct ag71xx_mdio *am = platform_get_drvdata(pdev); + + mdiobus_unregister(am->mii_bus); +} + +static const struct of_device_id ag71xx_mdio_match[] = { + { .compatible = "qca,ar7240-mdio" }, + { .compatible = "qca,ar9330-mdio" }, + { .compatible = "qca,ar9340-mdio" }, + { .compatible = "qca,ath79-mdio" }, + {} +}; + +static struct platform_driver ag71xx_mdio_driver = { + .probe = ag71xx_mdio_probe, + .remove_new = ag71xx_mdio_remove, + .driver = { + .name = "ag71xx-legacy-mdio", + .of_match_table = ag71xx_mdio_match, + } +}; + +module_platform_driver(ag71xx_mdio_driver); +MODULE_LICENSE("GPL"); diff --git a/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c index 2fc18d5979..f2d1e35828 100644 --- a/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ b/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c @@ -34,7 +34,7 @@ MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)"); #define ETH_SWITCH_HEADER_LEN 2 -static int ag71xx_tx_packets(struct ag71xx *ag, bool flush); +static int ag71xx_tx_packets(struct ag71xx *ag, bool flush, int budget); static inline unsigned int ag71xx_max_frame_len(unsigned int mtu) { @@ -333,7 +333,7 @@ static unsigned char *ag71xx_speed_str(struct ag71xx *ag) return "?"; } -static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac) +static void ag71xx_hw_set_macaddr(struct ag71xx *ag, const unsigned char *mac) { u32 t; @@ -407,11 +407,11 @@ static void ag71xx_dma_reset(struct ag71xx *ag) FIFO_CFG4_VT) #define FIFO_CFG5_INIT (FIFO_CFG5_DE | FIFO_CFG5_DV | FIFO_CFG5_FC | \ - FIFO_CFG5_CE | FIFO_CFG5_LO | FIFO_CFG5_OK | \ - FIFO_CFG5_MC | FIFO_CFG5_BC | FIFO_CFG5_DR | \ - FIFO_CFG5_CF | FIFO_CFG5_PF | FIFO_CFG5_VT | \ - FIFO_CFG5_LE | FIFO_CFG5_FT | FIFO_CFG5_16 | \ - FIFO_CFG5_17 | FIFO_CFG5_SF) + FIFO_CFG5_CE | FIFO_CFG5_LM | FIFO_CFG5_LO | \ + FIFO_CFG5_OK | FIFO_CFG5_MC | FIFO_CFG5_BC | \ + FIFO_CFG5_DR | FIFO_CFG5_CF | FIFO_CFG5_UO | \ + FIFO_CFG5_VT | FIFO_CFG5_LE | FIFO_CFG5_FT | \ + FIFO_CFG5_UC | FIFO_CFG5_SF) static void ag71xx_hw_stop(struct ag71xx *ag) { @@ -478,7 +478,7 @@ static void ag71xx_fast_reset(struct ag71xx *ag) mii_reg = ag71xx_rr(ag, AG71XX_REG_MII_CFG); rx_ds = ag71xx_rr(ag, AG71XX_REG_RX_DESC); - ag71xx_tx_packets(ag, true); + ag71xx_tx_packets(ag, true, 0); reset_control_assert(ag->mac_reset); udelay(10); @@ -1162,33 +1162,10 @@ static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) { struct ag71xx *ag = netdev_priv(dev); + if (ag->phy_dev == NULL) + return -ENODEV; - switch (cmd) { - case SIOCSIFHWADDR: - if (copy_from_user - (dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr))) - return -EFAULT; - return 0; - - case SIOCGIFHWADDR: - if (copy_to_user - (ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr))) - return -EFAULT; - return 0; - - case SIOCGMIIPHY: - case SIOCGMIIREG: - case SIOCSMIIREG: - if (ag->phy_dev == NULL) - break; - - return phy_mii_ioctl(ag->phy_dev, ifr, cmd); - - default: - break; - } - - return -EOPNOTSUPP; + return phy_mii_ioctl(ag->phy_dev, ifr, cmd); } static void ag71xx_oom_timer_handler(struct timer_list *t) @@ -1245,7 +1222,7 @@ static bool ag71xx_check_dma_stuck(struct ag71xx *ag) return false; } -static int ag71xx_tx_packets(struct ag71xx *ag, bool flush) +static int ag71xx_tx_packets(struct ag71xx *ag, bool flush, int budget) { struct ag71xx_ring *ring = &ag->tx_ring; bool dma_stuck = false; @@ -1278,7 +1255,7 @@ static int ag71xx_tx_packets(struct ag71xx *ag, bool flush) if (!skb) continue; - dev_kfree_skb_any(skb); + napi_consume_skb(skb, budget); ring->buf[i].skb = NULL; bytes_compl += ring->buf[i].len; @@ -1319,7 +1296,6 @@ static int ag71xx_rx_packets(struct ag71xx *ag, int limit) int ring_mask = BIT(ring->order) - 1; int ring_size = BIT(ring->order); struct list_head rx_list; - struct sk_buff *next; struct sk_buff *skb; int done = 0; @@ -1352,7 +1328,7 @@ static int ag71xx_rx_packets(struct ag71xx *ag, int limit) dev->stats.rx_packets++; dev->stats.rx_bytes += pktlen; - skb = build_skb(ring->buf[i].rx_buf, ag71xx_buffer_size(ag)); + skb = napi_build_skb(ring->buf[i].rx_buf, ag71xx_buffer_size(ag)); if (!skb) { skb_free_frag(ring->buf[i].rx_buf); goto next; @@ -1379,7 +1355,7 @@ next: ag71xx_ring_rx_refill(ag); - list_for_each_entry_safe(skb, next, &rx_list, list) + list_for_each_entry(skb, &rx_list, list) skb->protocol = eth_type_trans(skb, dev); netif_receive_skb_list(&rx_list); @@ -1400,7 +1376,7 @@ static int ag71xx_poll(struct napi_struct *napi, int limit) int tx_done; int rx_done; - tx_done = ag71xx_tx_packets(ag, false); + tx_done = ag71xx_tx_packets(ag, false, limit); DBG("%s: processing RX ring\n", dev->name); rx_done = ag71xx_rx_packets(ag, limit); @@ -1502,7 +1478,7 @@ static const struct net_device_ops ag71xx_netdev_ops = { .ndo_open = ag71xx_open, .ndo_stop = ag71xx_stop, .ndo_start_xmit = ag71xx_hard_start_xmit, - .ndo_do_ioctl = ag71xx_do_ioctl, + .ndo_eth_ioctl = ag71xx_do_ioctl, .ndo_tx_timeout = ag71xx_tx_timeout, .ndo_change_mtu = ag71xx_change_mtu, .ndo_set_mac_address = eth_mac_addr, @@ -1669,10 +1645,13 @@ static int ag71xx_probe(struct platform_device *pdev) ag->stop_desc->ctrl = 0; ag->stop_desc->next = (u32) ag->stop_desc_dma; - of_get_mac_address(np, dev->dev_addr); - if (!is_valid_ether_addr(dev->dev_addr)) { + err = of_get_ethdev_address(np, dev); + if (err) { + if (err == -EPROBE_DEFER) + return err; + dev_err(&pdev->dev, "invalid MAC address, using random address\n"); - eth_random_addr(dev->dev_addr); + eth_hw_addr_random(dev); } err = of_get_phy_mode(np, &ag->phy_if_mode); @@ -1699,7 +1678,7 @@ static int ag71xx_probe(struct platform_device *pdev) break; } - netif_napi_add(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT); + netif_napi_add_weight(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT); ag71xx_dump_regs(ag); @@ -1752,20 +1731,20 @@ err_phy_disconnect: return err; } -static int ag71xx_remove(struct platform_device *pdev) +static void ag71xx_remove(struct platform_device *pdev) { struct net_device *dev = platform_get_drvdata(pdev); struct ag71xx *ag; if (!dev) - return 0; + return; ag = netdev_priv(dev); ag71xx_debugfs_exit(ag); ag71xx_phy_disconnect(ag); unregister_netdev(dev); platform_set_drvdata(pdev, NULL); - return 0; + } static const struct of_device_id ag71xx_match[] = { @@ -1784,7 +1763,7 @@ static const struct of_device_id ag71xx_match[] = { static struct platform_driver ag71xx_driver = { .probe = ag71xx_probe, - .remove = ag71xx_remove, + .remove_new = ag71xx_remove, .driver = { .name = AG71XX_DRV_NAME, .of_match_table = ag71xx_match, diff --git a/lede/target/linux/ath79/generic/config-default b/lede/target/linux/ath79/generic/config-default index 0ac756642f..6c7a087f3f 100644 --- a/lede/target/linux/ath79/generic/config-default +++ b/lede/target/linux/ath79/generic/config-default @@ -6,22 +6,20 @@ CONFIG_GPIO_WATCHDOG=y CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y CONFIG_I2C=y CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_BOARDINFO=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_GPIO=y CONFIG_INTEL_XWAY_PHY=y CONFIG_IP17XX_PHY=y -CONFIG_LEDS_RESET=y CONFIG_MARVELL_PHY=y CONFIG_MICREL_PHY=y -CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-3 CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_SPI_NOR_SWP_DISABLE=y +# CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE is not set +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y CONFIG_MTD_SPLIT_EVA_FW=y -CONFIG_PHY_AR7100_USB=y -CONFIG_PHY_AR7200_USB=y +CONFIG_REALTEK_PHY=y +CONFIG_REGMAP_I2C=y CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_RTL8366RB_PHY=y -CONFIG_RTL8366S_PHY=y -CONFIG_RTL8366_SMI=y -CONFIG_RTL8367_PHY=y CONFIG_VITESSE_PHY=y CONFIG_WATCHDOG_CORE=y diff --git a/lede/target/linux/ath79/generic/target.mk b/lede/target/linux/ath79/generic/target.mk index af330b09b8..27c3365a29 100644 --- a/lede/target/linux/ath79/generic/target.mk +++ b/lede/target/linux/ath79/generic/target.mk @@ -1,8 +1,6 @@ BOARDNAME:=Generic -DEFAULT_PACKAGES += wpad-basic-wolfssl - -KERNEL_TESTING_PATCHVER:=5.15 +DEFAULT_PACKAGES += wpad-basic-mbedtls define Target/Description Build firmware images for generic Atheros AR71xx/AR913x/AR934x based boards. diff --git a/lede/target/linux/ath79/mikrotik/config-default b/lede/target/linux/ath79/mikrotik/config-default index 2ff8a14f1d..57b697a13d 100644 --- a/lede/target/linux/ath79/mikrotik/config-default +++ b/lede/target/linux/ath79/mikrotik/config-default @@ -1,20 +1,25 @@ CONFIG_CRC16=y CONFIG_CRYPTO_DEFLATE=y -CONFIG_GPIO_LATCH=y -CONFIG_GPIO_RB91X_KEY=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_GPIO_LATCH_MIKROTIK=y CONFIG_GPIO_RB4XX=y +CONFIG_GPIO_RB91X_KEY=y CONFIG_GPIO_WATCHDOG=y CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y -CONFIG_LEDS_RESET=y +CONFIG_GRO_CELLS=y +CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y -CONFIG_MDIO_GPIO=y +CONFIG_MFD_CORE=y CONFIG_MFD_RB4XX_CPLD=y CONFIG_MIKROTIK=y CONFIG_MIKROTIK_RB_SYSFS=y -CONFIG_MTD_NAND=y +CONFIG_MIKROTIK_WLAN_DECOMPRESS_LZ77=y CONFIG_MTD_NAND_AR934X=y CONFIG_MTD_NAND_CORE=y CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y CONFIG_MTD_NAND_RB4XX=y CONFIG_MTD_NAND_RB91X=y CONFIG_MTD_RAW_NAND=y @@ -23,17 +28,24 @@ CONFIG_MTD_SPI_NAND=y CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y CONFIG_MTD_SPLIT_MINOR_FW=y CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_BLOCK=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y -CONFIG_NET_SWITCHDEV=y -CONFIG_PCI_AR71XX=y -CONFIG_PHY_AR7100_USB=y -CONFIG_PHY_AR7200_USB=y +# CONFIG_NVMEM_LAYOUT_MIKROTIK is not set +# CONFIG_NVMEM_LAYOUT_U_BOOT_ENV is not set +# CONFIG_NVMEM_SYSFS is not set +# CONFIG_NVMEM_U_BOOT_ENV is not set +CONFIG_PHYLINK=y CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_SGL_ALLOC=y CONFIG_SPI_RB4XX=y CONFIG_UBIFS_FS=y CONFIG_WATCHDOG_CORE=y +CONFIG_XXHASH=y CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/lede/target/linux/ath79/mikrotik/target.mk b/lede/target/linux/ath79/mikrotik/target.mk index f5df904487..a3c876d7a7 100644 --- a/lede/target/linux/ath79/mikrotik/target.mk +++ b/lede/target/linux/ath79/mikrotik/target.mk @@ -3,7 +3,7 @@ FEATURES += minor nand KERNELNAME := vmlinux vmlinuz IMAGES_DIR := ../../.. -DEFAULT_PACKAGES += wpad-basic-wolfssl +DEFAULT_PACKAGES += wpad-basic-mbedtls yafut define Target/Description Build firmware images for MikroTik devices based on Qualcomm Atheros diff --git a/lede/target/linux/ath79/nand/config-default b/lede/target/linux/ath79/nand/config-default index 39aaacdb4a..71ce1caad7 100644 --- a/lede/target/linux/ath79/nand/config-default +++ b/lede/target/linux/ath79/nand/config-default @@ -1,15 +1,16 @@ +CONFIG_BCH=y CONFIG_CRC16=y -CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LZO=y -CONFIG_GPIO_WATCHDOG=y -CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y +CONFIG_CRYPTO_ZSTD=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y -CONFIG_MTD_NAND=y CONFIG_MTD_NAND_AR934X=y CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_BCH=y +# CONFIG_MTD_NAND_RB91X is not set CONFIG_MTD_RAW_NAND=y CONFIG_MTD_SPI_NAND=y CONFIG_MTD_UBI=y @@ -17,10 +18,13 @@ CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_BLOCK=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 # CONFIG_PCI_AR71XX is not set -CONFIG_PHY_AR7200_USB=y CONFIG_POWER_RESET=y CONFIG_POWER_RESET_GPIO_RESTART=y CONFIG_SGL_ALLOC=y CONFIG_UBIFS_FS=y +CONFIG_XXHASH=y CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/lede/target/linux/ath79/nand/target.mk b/lede/target/linux/ath79/nand/target.mk index 7ea9b57f45..e0900abfe4 100644 --- a/lede/target/linux/ath79/nand/target.mk +++ b/lede/target/linux/ath79/nand/target.mk @@ -2,7 +2,7 @@ BOARDNAME := Generic devices with NAND flash FEATURES += nand -DEFAULT_PACKAGES += wpad-basic-wolfssl +DEFAULT_PACKAGES += wpad-basic-mbedtls define Target/Description Firmware for boards using Qualcomm Atheros, MIPS-based SoCs diff --git a/lede/target/linux/ath79/patches-5.10/0003-leds-add-reset-controller-based-driver.patch b/lede/target/linux/ath79/patches-5.10/0003-leds-add-reset-controller-based-driver.patch deleted file mode 100644 index 4ca7abdd47..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0003-leds-add-reset-controller-based-driver.patch +++ /dev/null @@ -1,186 +0,0 @@ -From ecbd9c87f073f097d9fe56390353e64e963e866a Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 10:03:03 +0100 -Subject: [PATCH 03/27] leds: add reset-controller based driver - -Signed-off-by: John Crispin ---- - drivers/leds/Kconfig | 11 ++++ - drivers/leds/Makefile | 1 + - drivers/leds/leds-reset.c | 137 ++++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 149 insertions(+) - create mode 100644 drivers/leds/leds-reset.c - ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -930,6 +930,17 @@ config LEDS_ACER_A500 - This option enables support for the Power Button LED of - Acer Iconia Tab A500. - -+config LEDS_RESET -+ tristate "LED support for reset-controller API" -+ depends on LEDS_CLASS -+ depends on RESET_CONTROLLER -+ help -+ This option enables support for LEDs connected to pins driven by reset -+ controllers. Yes, DNI actual built HW like that. -+ -+ To compile this driver as a module, choose M here: the module -+ will be called leds-reset. -+ - comment "LED Triggers" - source "drivers/leds/trigger/Kconfig" - ---- /dev/null -+++ b/drivers/leds/leds-reset.c -@@ -0,0 +1,140 @@ -+/* -+ * Copyright (C) 2018 John Crispin -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+struct reset_led_data { -+ struct led_classdev cdev; -+ struct reset_control *rst; -+}; -+ -+static inline struct reset_led_data * -+ cdev_to_reset_led_data(struct led_classdev *led_cdev) -+{ -+ return container_of(led_cdev, struct reset_led_data, cdev); -+} -+ -+static void reset_led_set(struct led_classdev *led_cdev, -+ enum led_brightness value) -+{ -+ struct reset_led_data *led_dat = cdev_to_reset_led_data(led_cdev); -+ -+ if (value == LED_OFF) -+ reset_control_assert(led_dat->rst); -+ else -+ reset_control_deassert(led_dat->rst); -+} -+ -+struct reset_leds_priv { -+ int num_leds; -+ struct reset_led_data leds[]; -+}; -+ -+static inline int sizeof_reset_leds_priv(int num_leds) -+{ -+ return sizeof(struct reset_leds_priv) + -+ (sizeof(struct reset_led_data) * num_leds); -+} -+ -+static struct reset_leds_priv *reset_leds_create(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct fwnode_handle *child; -+ struct reset_leds_priv *priv; -+ int count, ret; -+ -+ count = device_get_child_node_count(dev); -+ if (!count) -+ return ERR_PTR(-ENODEV); -+ -+ priv = devm_kzalloc(dev, sizeof_reset_leds_priv(count), GFP_KERNEL); -+ if (!priv) -+ return ERR_PTR(-ENOMEM); -+ -+ device_for_each_child_node(dev, child) { -+ struct reset_led_data *led = &priv->leds[priv->num_leds]; -+ struct device_node *np = to_of_node(child); -+ -+ ret = fwnode_property_read_string(child, "label", &led->cdev.name); -+ if (!led->cdev.name) { -+ fwnode_handle_put(child); -+ return ERR_PTR(-EINVAL); -+ } -+ led->rst = __of_reset_control_get(np, NULL, 0, 0, 0, true); -+ if (IS_ERR(led->rst)) -+ return ERR_PTR(-EINVAL); -+ -+ fwnode_property_read_string(child, "linux,default-trigger", -+ &led->cdev.default_trigger); -+ -+ led->cdev.brightness_set = reset_led_set; -+ ret = devm_led_classdev_register(&pdev->dev, &led->cdev); -+ if (ret < 0) -+ return ERR_PTR(ret); -+ led->cdev.dev->of_node = np; -+ priv->num_leds++; -+ } -+ -+ return priv; -+} -+ -+static const struct of_device_id of_reset_leds_match[] = { -+ { .compatible = "reset-leds", }, -+ {}, -+}; -+ -+MODULE_DEVICE_TABLE(of, of_reset_leds_match); -+ -+static int reset_led_probe(struct platform_device *pdev) -+{ -+ struct reset_leds_priv *priv; -+ -+ priv = reset_leds_create(pdev); -+ if (IS_ERR(priv)) -+ return PTR_ERR(priv); -+ -+ platform_set_drvdata(pdev, priv); -+ -+ return 0; -+} -+ -+static void reset_led_shutdown(struct platform_device *pdev) -+{ -+ struct reset_leds_priv *priv = platform_get_drvdata(pdev); -+ int i; -+ -+ for (i = 0; i < priv->num_leds; i++) { -+ struct reset_led_data *led = &priv->leds[i]; -+ -+ if (!(led->cdev.flags & LED_RETAIN_AT_SHUTDOWN)) -+ reset_led_set(&led->cdev, LED_OFF); -+ } -+} -+ -+static struct platform_driver reset_led_driver = { -+ .probe = reset_led_probe, -+ .shutdown = reset_led_shutdown, -+ .driver = { -+ .name = "leds-reset", -+ .of_match_table = of_reset_leds_match, -+ }, -+}; -+ -+module_platform_driver(reset_led_driver); -+ -+MODULE_AUTHOR("John Crispin "); -+MODULE_DESCRIPTION("reset controller LED driver"); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("platform:leds-reset"); ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -93,6 +93,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA) += leds - obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o - obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o - obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o -+obj-$(CONFIG_LEDS_RESET) += leds-reset.o - - # LED SPI Drivers - obj-$(CONFIG_LEDS_CR0014114) += leds-cr0014114.o diff --git a/lede/target/linux/ath79/patches-5.10/0004-phy-add-ath79-usb-phys.patch b/lede/target/linux/ath79/patches-5.10/0004-phy-add-ath79-usb-phys.patch deleted file mode 100644 index 56c3d61887..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0004-phy-add-ath79-usb-phys.patch +++ /dev/null @@ -1,333 +0,0 @@ -From 08c9d6ceef01893678a5d2e8a15517c745417f21 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 10:04:05 +0100 -Subject: [PATCH 04/27] phy: add ath79 usb phys - -Signed-off-by: John Crispin ---- - drivers/phy/Kconfig | 16 ++++++ - drivers/phy/Makefile | 2 + - drivers/phy/phy-ar7100-usb.c | 124 +++++++++++++++++++++++++++++++++++++++++++ - drivers/phy/phy-ar7200-usb.c | 108 +++++++++++++++++++++++++++++++++++++ - 4 files changed, 250 insertions(+) - create mode 100644 drivers/phy/phy-ar7100-usb.c - create mode 100644 drivers/phy/phy-ar7200-usb.c - ---- a/drivers/phy/Kconfig -+++ b/drivers/phy/Kconfig -@@ -24,6 +24,22 @@ config GENERIC_PHY_MIPI_DPHY - Provides a number of helpers a core functions for MIPI D-PHY - drivers to us. - -+config PHY_AR7100_USB -+ tristate "Atheros AR7100 USB PHY driver" -+ depends on ATH79 || COMPILE_TEST -+ default y if USB_EHCI_HCD_PLATFORM -+ select GENERIC_PHY -+ help -+ Enable this to support the USB PHY on Atheros AR7100 SoCs. -+ -+config PHY_AR7200_USB -+ tristate "Atheros AR7200 USB PHY driver" -+ depends on ATH79 || COMPILE_TEST -+ default y if USB_EHCI_HCD_PLATFORM -+ select GENERIC_PHY -+ help -+ Enable this to support the USB PHY on Atheros AR7200 SoCs. -+ - config PHY_LPC18XX_USB_OTG - tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" - depends on OF && (ARCH_LPC18XX || COMPILE_TEST) ---- a/drivers/phy/Makefile -+++ b/drivers/phy/Makefile -@@ -4,6 +4,8 @@ - # - - obj-$(CONFIG_GENERIC_PHY) += phy-core.o -+obj-$(CONFIG_PHY_AR7100_USB) += phy-ar7100-usb.o -+obj-$(CONFIG_PHY_AR7200_USB) += phy-ar7200-usb.o - obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) += phy-core-mipi-dphy.o - obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o - obj-$(CONFIG_PHY_XGENE) += phy-xgene.o ---- /dev/null -+++ b/drivers/phy/phy-ar7100-usb.c -@@ -0,0 +1,140 @@ -+/* -+ * Copyright (C) 2018 John Crispin -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+struct ar7100_usb_phy { -+ struct reset_control *rst_phy; -+ struct reset_control *rst_host; -+ struct reset_control *rst_ohci_dll; -+ void __iomem *io_base; -+ struct phy *phy; -+ int gpio; -+}; -+ -+static int ar7100_usb_phy_power_off(struct phy *phy) -+{ -+ struct ar7100_usb_phy *priv = phy_get_drvdata(phy); -+ int err = 0; -+ -+ err |= reset_control_assert(priv->rst_host); -+ err |= reset_control_assert(priv->rst_phy); -+ err |= reset_control_assert(priv->rst_ohci_dll); -+ -+ return err; -+} -+ -+static int ar7100_usb_phy_power_on(struct phy *phy) -+{ -+ struct ar7100_usb_phy *priv = phy_get_drvdata(phy); -+ int err = 0; -+ -+ err |= ar7100_usb_phy_power_off(phy); -+ mdelay(100); -+ err |= reset_control_deassert(priv->rst_ohci_dll); -+ err |= reset_control_deassert(priv->rst_phy); -+ err |= reset_control_deassert(priv->rst_host); -+ mdelay(500); -+ iowrite32(0xf0000, priv->io_base + AR71XX_USB_CTRL_REG_CONFIG); -+ iowrite32(0x20c00, priv->io_base + AR71XX_USB_CTRL_REG_FLADJ); -+ -+ return err; -+} -+ -+static const struct phy_ops ar7100_usb_phy_ops = { -+ .power_on = ar7100_usb_phy_power_on, -+ .power_off = ar7100_usb_phy_power_off, -+ .owner = THIS_MODULE, -+}; -+ -+static int ar7100_usb_phy_probe(struct platform_device *pdev) -+{ -+ struct phy_provider *phy_provider; -+ struct resource *res; -+ struct ar7100_usb_phy *priv; -+ -+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ priv->io_base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(priv->io_base)) -+ return PTR_ERR(priv->io_base); -+ -+ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy"); -+ if (IS_ERR(priv->rst_phy)) { -+ dev_err(&pdev->dev, "phy reset is missing\n"); -+ return PTR_ERR(priv->rst_phy); -+ } -+ -+ priv->rst_host = devm_reset_control_get(&pdev->dev, "usb-host"); -+ if (IS_ERR(priv->rst_host)) { -+ dev_err(&pdev->dev, "host reset is missing\n"); -+ return PTR_ERR(priv->rst_host); -+ } -+ -+ priv->rst_ohci_dll = devm_reset_control_get(&pdev->dev, "usb-ohci-dll"); -+ if (IS_ERR(priv->rst_ohci_dll)) { -+ dev_err(&pdev->dev, "ohci-dll reset is missing\n"); -+ return PTR_ERR(priv->rst_host); -+ } -+ -+ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7100_usb_phy_ops); -+ if (IS_ERR(priv->phy)) { -+ dev_err(&pdev->dev, "failed to create PHY\n"); -+ return PTR_ERR(priv->phy); -+ } -+ -+ priv->gpio = of_get_gpio(pdev->dev.of_node, 0); -+ if (priv->gpio >= 0) { -+ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev)); -+ -+ if (ret) { -+ dev_err(&pdev->dev, "failed to request gpio\n"); -+ return ret; -+ } -+ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev)); -+ gpio_set_value(priv->gpio, 1); -+ } -+ -+ phy_set_drvdata(priv->phy, priv); -+ -+ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate); -+ -+ -+ return PTR_ERR_OR_ZERO(phy_provider); -+} -+ -+static const struct of_device_id ar7100_usb_phy_of_match[] = { -+ { .compatible = "qca,ar7100-usb-phy" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, ar7100_usb_phy_of_match); -+ -+static struct platform_driver ar7100_usb_phy_driver = { -+ .probe = ar7100_usb_phy_probe, -+ .driver = { -+ .of_match_table = ar7100_usb_phy_of_match, -+ .name = "ar7100-usb-phy", -+ } -+}; -+module_platform_driver(ar7100_usb_phy_driver); -+ -+MODULE_DESCRIPTION("ATH79 USB PHY driver"); -+MODULE_AUTHOR("Alban Bedel "); -+MODULE_LICENSE("GPL"); ---- /dev/null -+++ b/drivers/phy/phy-ar7200-usb.c -@@ -0,0 +1,136 @@ -+/* -+ * Copyright (C) 2015 Alban Bedel -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+struct ar7200_usb_phy { -+ struct reset_control *rst_phy; -+ struct reset_control *rst_phy_analog; -+ struct reset_control *suspend_override; -+ struct phy *phy; -+ int gpio; -+}; -+ -+static int ar7200_usb_phy_power_on(struct phy *phy) -+{ -+ struct ar7200_usb_phy *priv = phy_get_drvdata(phy); -+ int err = 0; -+ -+ if (priv->suspend_override) -+ err = reset_control_assert(priv->suspend_override); -+ if (priv->rst_phy) -+ err |= reset_control_deassert(priv->rst_phy); -+ if (priv->rst_phy_analog) -+ err |= reset_control_deassert(priv->rst_phy_analog); -+ -+ return err; -+} -+ -+static int ar7200_usb_phy_power_off(struct phy *phy) -+{ -+ struct ar7200_usb_phy *priv = phy_get_drvdata(phy); -+ int err = 0; -+ -+ if (priv->suspend_override) -+ err = reset_control_deassert(priv->suspend_override); -+ if (priv->rst_phy) -+ err |= reset_control_assert(priv->rst_phy); -+ if (priv->rst_phy_analog) -+ err |= reset_control_assert(priv->rst_phy_analog); -+ -+ return err; -+} -+ -+static const struct phy_ops ar7200_usb_phy_ops = { -+ .power_on = ar7200_usb_phy_power_on, -+ .power_off = ar7200_usb_phy_power_off, -+ .owner = THIS_MODULE, -+}; -+ -+static int ar7200_usb_phy_probe(struct platform_device *pdev) -+{ -+ struct phy_provider *phy_provider; -+ struct ar7200_usb_phy *priv; -+ -+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy"); -+ if (IS_ERR(priv->rst_phy)) { -+ if (PTR_ERR(priv->rst_phy) != -EPROBE_DEFER) -+ dev_err(&pdev->dev, "phy reset is missing\n"); -+ return PTR_ERR(priv->rst_phy); -+ } -+ -+ priv->rst_phy_analog = devm_reset_control_get_optional( -+ &pdev->dev, "usb-phy-analog"); -+ if (IS_ERR(priv->rst_phy_analog)) { -+ if (PTR_ERR(priv->rst_phy_analog) == -ENOENT) -+ priv->rst_phy_analog = NULL; -+ else -+ return PTR_ERR(priv->rst_phy_analog); -+ } -+ -+ priv->suspend_override = devm_reset_control_get_optional( -+ &pdev->dev, "usb-suspend-override"); -+ if (IS_ERR(priv->suspend_override)) { -+ if (PTR_ERR(priv->suspend_override) == -ENOENT) -+ priv->suspend_override = NULL; -+ else -+ return PTR_ERR(priv->suspend_override); -+ } -+ -+ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7200_usb_phy_ops); -+ if (IS_ERR(priv->phy)) { -+ dev_err(&pdev->dev, "failed to create PHY\n"); -+ return PTR_ERR(priv->phy); -+ } -+ -+ priv->gpio = of_get_gpio(pdev->dev.of_node, 0); -+ if (priv->gpio >= 0) { -+ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev)); -+ -+ if (ret) { -+ dev_err(&pdev->dev, "failed to request gpio\n"); -+ return ret; -+ } -+ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev)); -+ gpio_set_value(priv->gpio, 1); -+ } -+ -+ phy_set_drvdata(priv->phy, priv); -+ -+ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate); -+ -+ return PTR_ERR_OR_ZERO(phy_provider); -+} -+ -+static const struct of_device_id ar7200_usb_phy_of_match[] = { -+ { .compatible = "qca,ar7200-usb-phy" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, ar7200_usb_phy_of_match); -+ -+static struct platform_driver ar7200_usb_phy_driver = { -+ .probe = ar7200_usb_phy_probe, -+ .driver = { -+ .of_match_table = ar7200_usb_phy_of_match, -+ .name = "ar7200-usb-phy", -+ } -+}; -+module_platform_driver(ar7200_usb_phy_driver); -+ -+MODULE_DESCRIPTION("ATH79 USB PHY driver"); -+MODULE_AUTHOR("Alban Bedel "); -+MODULE_LICENSE("GPL"); diff --git a/lede/target/linux/ath79/patches-5.10/0005-usb-add-more-OF-quirk-properties.patch b/lede/target/linux/ath79/patches-5.10/0005-usb-add-more-OF-quirk-properties.patch deleted file mode 100644 index d6d8cb6952..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0005-usb-add-more-OF-quirk-properties.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 2201818e5bd33f389beceb3943fdfcf5a698fc5b Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 10:01:43 +0100 -Subject: [PATCH 05/27] usb: add more OF/quirk properties - -Signed-off-by: John Crispin ---- - drivers/usb/host/ehci-platform.c | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/drivers/usb/host/ehci-platform.c -+++ b/drivers/usb/host/ehci-platform.c -@@ -277,6 +277,11 @@ static int ehci_platform_probe(struct pl - ehci = hcd_to_ehci(hcd); - - if (pdata == &ehci_platform_defaults && dev->dev.of_node) { -+ of_property_read_u32(dev->dev.of_node, "caps-offset", &pdata->caps_offset); -+ -+ if (of_property_read_bool(dev->dev.of_node, "has-synopsys-hc-bug")) -+ pdata->has_synopsys_hc_bug = 1; -+ - if (of_property_read_bool(dev->dev.of_node, "big-endian-regs")) - ehci->big_endian_mmio = 1; - diff --git a/lede/target/linux/ath79/patches-5.10/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch b/lede/target/linux/ath79/patches-5.10/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch deleted file mode 100644 index ceda511c21..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch +++ /dev/null @@ -1,168 +0,0 @@ -From f3eacff2310a60348a755c50a8da6fc251fc8587 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 09:55:13 +0100 -Subject: [PATCH 07/33] irqchip/irq-ath79-intc: add irq cascade driver for - QCA9556 SoCs - -Signed-off-by: John Crispin ---- - drivers/irqchip/Makefile | 1 + - drivers/irqchip/irq-ath79-intc.c | 142 +++++++++++++++++++++++++++++++++++++++ - 2 files changed, 143 insertions(+) - create mode 100644 drivers/irqchip/irq-ath79-intc.c - ---- a/drivers/irqchip/Makefile -+++ b/drivers/irqchip/Makefile -@@ -4,6 +4,7 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o - obj-$(CONFIG_AL_FIC) += irq-al-fic.o - obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o - obj-$(CONFIG_ATH79) += irq-ath79-cpu.o -+obj-$(CONFIG_ATH79) += irq-ath79-intc.o - obj-$(CONFIG_ATH79) += irq-ath79-misc.o - obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o - obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o ---- /dev/null -+++ b/drivers/irqchip/irq-ath79-intc.c -@@ -0,0 +1,142 @@ -+/* -+ * Atheros AR71xx/AR724x/AR913x specific interrupt handling -+ * -+ * Copyright (C) 2018 John Crispin -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#define ATH79_MAX_INTC_CASCADE 3 -+ -+struct ath79_intc { -+ struct irq_chip chip; -+ u32 irq; -+ u32 pending_mask; -+ u32 int_status; -+ u32 irq_mask[ATH79_MAX_INTC_CASCADE]; -+ u32 irq_wb_chan[ATH79_MAX_INTC_CASCADE]; -+}; -+ -+static void ath79_intc_irq_handler(struct irq_desc *desc) -+{ -+ struct irq_domain *domain = irq_desc_get_handler_data(desc); -+ struct ath79_intc *intc = domain->host_data; -+ u32 pending; -+ -+ pending = ath79_reset_rr(intc->int_status); -+ pending &= intc->pending_mask; -+ -+ if (pending) { -+ int i; -+ -+ for (i = 0; i < domain->hwirq_max; i++) -+ if (pending & intc->irq_mask[i]) { -+ if (intc->irq_wb_chan[i] != 0xffffffff) -+ ath79_ddr_wb_flush(intc->irq_wb_chan[i]); -+ generic_handle_irq(irq_find_mapping(domain, i)); -+ } -+ } else { -+ spurious_interrupt(); -+ } -+} -+ -+static void ath79_intc_irq_enable(struct irq_data *d) -+{ -+ struct ath79_intc *intc = d->domain->host_data; -+ enable_irq(intc->irq); -+} -+ -+static void ath79_intc_irq_disable(struct irq_data *d) -+{ -+ struct ath79_intc *intc = d->domain->host_data; -+ disable_irq(intc->irq); -+} -+ -+static int ath79_intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) -+{ -+ struct ath79_intc *intc = d->host_data; -+ -+ irq_set_chip_and_handler(irq, &intc->chip, handle_level_irq); -+ -+ return 0; -+} -+ -+static const struct irq_domain_ops ath79_irq_domain_ops = { -+ .xlate = irq_domain_xlate_onecell, -+ .map = ath79_intc_map, -+}; -+ -+static int __init ath79_intc_of_init( -+ struct device_node *node, struct device_node *parent) -+{ -+ struct irq_domain *domain; -+ struct ath79_intc *intc; -+ int cnt, cntwb, i, err; -+ -+ cnt = of_property_count_u32_elems(node, "qca,pending-bits"); -+ if (cnt > ATH79_MAX_INTC_CASCADE) -+ panic("Too many INTC pending bits\n"); -+ -+ intc = kzalloc(sizeof(*intc), GFP_KERNEL); -+ if (!intc) -+ panic("Failed to allocate INTC memory\n"); -+ intc->chip = dummy_irq_chip; -+ intc->chip.name = "INTC"; -+ intc->chip.irq_disable = ath79_intc_irq_disable; -+ intc->chip.irq_enable = ath79_intc_irq_enable; -+ -+ if (of_property_read_u32(node, "qca,int-status-addr", &intc->int_status) < 0) { -+ panic("Missing address of interrupt status register\n"); -+ } -+ -+ of_property_read_u32_array(node, "qca,pending-bits", intc->irq_mask, cnt); -+ for (i = 0; i < cnt; i++) { -+ intc->pending_mask |= intc->irq_mask[i]; -+ intc->irq_wb_chan[i] = 0xffffffff; -+ } -+ -+ cntwb = of_count_phandle_with_args( -+ node, "qca,ddr-wb-channels", "#qca,ddr-wb-channel-cells"); -+ -+ for (i = 0; i < cntwb; i++) { -+ struct of_phandle_args args; -+ u32 irq = i; -+ -+ of_property_read_u32_index( -+ node, "qca,ddr-wb-channel-interrupts", i, &irq); -+ if (irq >= ATH79_MAX_INTC_CASCADE) -+ continue; -+ -+ err = of_parse_phandle_with_args( -+ node, "qca,ddr-wb-channels", -+ "#qca,ddr-wb-channel-cells", -+ i, &args); -+ if (err) -+ return err; -+ -+ intc->irq_wb_chan[irq] = args.args[0]; -+ } -+ -+ intc->irq = irq_of_parse_and_map(node, 0); -+ if (!intc->irq) -+ panic("Failed to get INTC IRQ"); -+ -+ domain = irq_domain_add_linear(node, cnt, &ath79_irq_domain_ops, intc); -+ irq_set_chained_handler_and_data(intc->irq, ath79_intc_irq_handler, domain); -+ -+ return 0; -+} -+IRQCHIP_DECLARE(ath79_intc, "qca,ar9340-intc", -+ ath79_intc_of_init); diff --git a/lede/target/linux/ath79/patches-5.10/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch b/lede/target/linux/ath79/patches-5.10/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch deleted file mode 100644 index 13117d9a8e..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch +++ /dev/null @@ -1,23 +0,0 @@ -From e029f998594f151008ecbfa024e2957edd2a5189 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 09:58:19 +0100 -Subject: [PATCH 08/33] irqchip/irq-ath79-cpu: drop !OF init helper - -Signed-off-by: John Crispin ---- - drivers/irqchip/irq-ath79-cpu.c | 7 ------- - 1 file changed, 7 deletions(-) - ---- a/drivers/irqchip/irq-ath79-cpu.c -+++ b/drivers/irqchip/irq-ath79-cpu.c -@@ -85,10 +85,3 @@ static int __init ar79_cpu_intc_of_init( - } - IRQCHIP_DECLARE(ar79_cpu_intc, "qca,ar7100-cpu-intc", - ar79_cpu_intc_of_init); -- --void __init ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3) --{ -- irq_wb_chan[2] = irq_wb_chan2; -- irq_wb_chan[3] = irq_wb_chan3; -- mips_cpu_irq_init(); --} diff --git a/lede/target/linux/ath79/patches-5.10/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch b/lede/target/linux/ath79/patches-5.10/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch deleted file mode 100644 index bf7eb691a5..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 4a4f869ec58ed8910b9b2e68d0eee50957e9bb20 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Mon, 25 Jun 2018 15:52:10 +0200 -Subject: [PATCH 17/33] dt-bindings: PCI: qcom,ar7100: adds binding doc - -With the driver being converted from platform_data to pure OF, we need to -also add some docs. - -Cc: Rob Herring -Cc: devicetree@vger.kernel.org -Signed-off-by: John Crispin ---- - .../devicetree/bindings/pci/qcom,ar7100-pci.txt | 38 ++++++++++++++++++++++ - 1 file changed, 38 insertions(+) - create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt -@@ -0,0 +1,38 @@ -+* Qualcomm Atheros AR7100 PCI express root complex -+ -+Required properties: -+- compatible: should contain "qcom,ar7100-pci" to identify the core. -+- reg: Should contain the register ranges as listed in the reg-names property. -+- reg-names: Definition: Must include the following entries -+ - "cfg_base" IO Memory -+- #address-cells: set to <3> -+- #size-cells: set to <2> -+- ranges: ranges for the PCI memory and I/O regions -+- interrupt-map-mask and interrupt-map: standard PCI -+ properties to define the mapping of the PCIe interface to interrupt -+ numbers. -+- #interrupt-cells: set to <1> -+- interrupt-controller: define to enable the builtin IRQ cascade. -+ -+Optional properties: -+- interrupt-parent: phandle to the MIPS IRQ controller -+ -+* Example for ar7100 -+ pcie-controller@180c0000 { -+ compatible = "qca,ar7100-pci"; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ bus-range = <0x0 0x0>; -+ reg = <0x17010000 0x100>; -+ reg-names = "cfg_base"; -+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 -+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>; -+ interrupt-parent = <&cpuintc>; -+ interrupts = <2>; -+ -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ -+ interrupt-map-mask = <0 0 0 1>; -+ interrupt-map = <0 0 0 0 &pcie0 0>; -+ }; diff --git a/lede/target/linux/ath79/patches-5.10/0018-MIPS-pci-ar71xx-convert-to-OF.patch b/lede/target/linux/ath79/patches-5.10/0018-MIPS-pci-ar71xx-convert-to-OF.patch deleted file mode 100644 index e600a4f0d9..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0018-MIPS-pci-ar71xx-convert-to-OF.patch +++ /dev/null @@ -1,202 +0,0 @@ -From 1855ab6b1d27f5b38a648baf57ff6a534afec26d Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sat, 23 Jun 2018 15:07:23 +0200 -Subject: [PATCH 18/33] MIPS: pci-ar71xx: convert to OF - -With the ath79 target getting converted to pure OF, we can drop all the -platform data code and add the missing OF bits to the driver. We also add -a irq domain for the PCI/e controllers cascade, thus making it usable from -dts files. - -Signed-off-by: John Crispin ---- - arch/mips/pci/pci-ar71xx.c | 82 +++++++++++++++++++++++----------------------- - 1 file changed, 41 insertions(+), 41 deletions(-) - ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -15,8 +15,11 @@ - #include - #include - #include -+#include - #include - #include -+#include -+#include - - #include - #include -@@ -46,12 +49,13 @@ - #define AR71XX_PCI_IRQ_COUNT 5 - - struct ar71xx_pci_controller { -+ struct device_node *np; - void __iomem *cfg_base; - int irq; -- int irq_base; - struct pci_controller pci_ctrl; - struct resource io_res; - struct resource mem_res; -+ struct irq_domain *domain; - }; - - /* Byte lane enable bits */ -@@ -225,29 +229,30 @@ static struct pci_ops ar71xx_pci_ops = { - - static void ar71xx_pci_irq_handler(struct irq_desc *desc) - { -- struct ar71xx_pci_controller *apc; - void __iomem *base = ath79_reset_base; -+ struct irq_chip *chip = irq_desc_get_chip(desc); -+ struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc); - u32 pending; - -- apc = irq_desc_get_handler_data(desc); -- -+ chained_irq_enter(chip, desc); - pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & - __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); - - if (pending & AR71XX_PCI_INT_DEV0) -- generic_handle_irq(apc->irq_base + 0); -+ generic_handle_irq(irq_linear_revmap(apc->domain, 1)); - - else if (pending & AR71XX_PCI_INT_DEV1) -- generic_handle_irq(apc->irq_base + 1); -+ generic_handle_irq(irq_linear_revmap(apc->domain, 2)); - - else if (pending & AR71XX_PCI_INT_DEV2) -- generic_handle_irq(apc->irq_base + 2); -+ generic_handle_irq(irq_linear_revmap(apc->domain, 3)); - - else if (pending & AR71XX_PCI_INT_CORE) -- generic_handle_irq(apc->irq_base + 4); -+ generic_handle_irq(irq_linear_revmap(apc->domain, 4)); - - else - spurious_interrupt(); -+ chained_irq_exit(chip, desc); - } - - static void ar71xx_pci_irq_unmask(struct irq_data *d) -@@ -258,7 +263,7 @@ static void ar71xx_pci_irq_unmask(struct - u32 t; - - apc = irq_data_get_irq_chip_data(d); -- irq = d->irq - apc->irq_base; -+ irq = irq_linear_revmap(apc->domain, d->irq); - - t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); - __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -@@ -275,7 +280,7 @@ static void ar71xx_pci_irq_mask(struct i - u32 t; - - apc = irq_data_get_irq_chip_data(d); -- irq = d->irq - apc->irq_base; -+ irq = irq_linear_revmap(apc->domain, d->irq); - - t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); - __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -@@ -291,24 +296,31 @@ static struct irq_chip ar71xx_pci_irq_ch - .irq_mask_ack = ar71xx_pci_irq_mask, - }; - -+static int ar71xx_pci_irq_map(struct irq_domain *d, -+ unsigned int irq, irq_hw_number_t hw) -+{ -+ struct ar71xx_pci_controller *apc = d->host_data; -+ -+ irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq); -+ irq_set_chip_data(irq, apc); -+ -+ return 0; -+} -+ -+static const struct irq_domain_ops ar71xx_pci_domain_ops = { -+ .xlate = irq_domain_xlate_onecell, -+ .map = ar71xx_pci_irq_map, -+}; -+ - static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc) - { - void __iomem *base = ath79_reset_base; -- int i; - - __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); - __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); - -- BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT); -- -- apc->irq_base = ATH79_PCI_IRQ_BASE; -- for (i = apc->irq_base; -- i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) { -- irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip, -- handle_level_irq); -- irq_set_chip_data(i, apc); -- } -- -+ apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT, -+ &ar71xx_pci_domain_ops, apc); - irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler, - apc); - } -@@ -325,6 +337,11 @@ static void ar71xx_pci_reset(void) - mdelay(100); - } - -+static const struct of_device_id ar71xx_pci_ids[] = { -+ { .compatible = "qca,ar7100-pci" }, -+ {}, -+}; -+ - static int ar71xx_pci_probe(struct platform_device *pdev) - { - struct ar71xx_pci_controller *apc; -@@ -345,26 +362,6 @@ static int ar71xx_pci_probe(struct platf - if (apc->irq < 0) - return -EINVAL; - -- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); -- if (!res) -- return -EINVAL; -- -- apc->io_res.parent = res; -- apc->io_res.name = "PCI IO space"; -- apc->io_res.start = res->start; -- apc->io_res.end = res->end; -- apc->io_res.flags = IORESOURCE_IO; -- -- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base"); -- if (!res) -- return -EINVAL; -- -- apc->mem_res.parent = res; -- apc->mem_res.name = "PCI memory space"; -- apc->mem_res.start = res->start; -- apc->mem_res.end = res->end; -- apc->mem_res.flags = IORESOURCE_MEM; -- - ar71xx_pci_reset(); - - /* setup COMMAND register */ -@@ -377,9 +374,11 @@ static int ar71xx_pci_probe(struct platf - - ar71xx_pci_irq_init(apc); - -+ apc->np = pdev->dev.of_node; - apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; - apc->pci_ctrl.mem_resource = &apc->mem_res; - apc->pci_ctrl.io_resource = &apc->io_res; -+ pci_load_of_ranges(&apc->pci_ctrl, pdev->dev.of_node); - - register_pci_controller(&apc->pci_ctrl); - -@@ -390,6 +389,7 @@ static struct platform_driver ar71xx_pci - .probe = ar71xx_pci_probe, - .driver = { - .name = "ar71xx-pci", -+ .of_match_table = of_match_ptr(ar71xx_pci_ids), - }, - }; - diff --git a/lede/target/linux/ath79/patches-5.10/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch b/lede/target/linux/ath79/patches-5.10/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch deleted file mode 100644 index a0af79cb4d..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch +++ /dev/null @@ -1,61 +0,0 @@ -From ea27764bc3ef2a05decf3ae05edffc289cd0d93c Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Mon, 25 Jun 2018 15:52:02 +0200 -Subject: [PATCH 19/33] dt-bindings: PCI: qcom,ar7240: adds binding doc - -With the driver being converted from platform_data to pure OF, we need to -also add some docs. - -Cc: Rob Herring -Cc: devicetree@vger.kernel.org -Signed-off-by: John Crispin ---- - .../devicetree/bindings/pci/qcom,ar7240-pci.txt | 42 ++++++++++++++++++++++ - 1 file changed, 42 insertions(+) - create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt -@@ -0,0 +1,42 @@ -+* Qualcomm Atheros AR724X PCI express root complex -+ -+Required properties: -+- compatible: should contain "qcom,ar7240-pci" to identify the core. -+- reg: Should contain the register ranges as listed in the reg-names property. -+- reg-names: Definition: Must include the following entries -+ - "crp_base" Configuration registers -+ - "ctrl_base" Control registers -+ - "cfg_base" IO Memory -+- #address-cells: set to <3> -+- #size-cells: set to <2> -+- ranges: ranges for the PCI memory and I/O regions -+- interrupt-map-mask and interrupt-map: standard PCI -+ properties to define the mapping of the PCIe interface to interrupt -+ numbers. -+- #interrupt-cells: set to <1> -+- interrupt-parent: phandle to the MIPS IRQ controller -+ -+Optional properties: -+- interrupt-controller: define to enable the builtin IRQ cascade. -+ -+* Example for qca9557 -+ pcie-controller@180c0000 { -+ compatible = "qcom,ar7240-pci"; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ bus-range = <0x0 0x0>; -+ reg = <0x180c0000 0x1000>, -+ <0x180f0000 0x100>, -+ <0x14000000 0x1000>; -+ reg-names = "crp_base", "ctrl_base", "cfg_base"; -+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 -+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>; -+ interrupt-parent = <&intc2>; -+ interrupts = <1>; -+ -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ -+ interrupt-map-mask = <0 0 0 1>; -+ interrupt-map = <0 0 0 0 &pcie0 0>; -+ }; diff --git a/lede/target/linux/ath79/patches-5.10/0020-MIPS-pci-ar724x-convert-to-OF.patch b/lede/target/linux/ath79/patches-5.10/0020-MIPS-pci-ar724x-convert-to-OF.patch deleted file mode 100644 index 2772c53392..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0020-MIPS-pci-ar724x-convert-to-OF.patch +++ /dev/null @@ -1,205 +0,0 @@ -From a522ee0199d5d3ea114ca2e211f6ac398d3e8e0b Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sat, 23 Jun 2018 15:07:37 +0200 -Subject: [PATCH 20/33] MIPS: pci-ar724x: convert to OF - -With the ath79 target getting converted to pure OF, we can drop all the -platform data code and add the missing OF bits to the driver. We also add -a irq domain for the PCI/e controllers cascade, thus making it usable from -dts files. - -Signed-off-by: John Crispin ---- - arch/mips/pci/pci-ar724x.c | 88 ++++++++++++++++++++++------------------------ - 1 file changed, 42 insertions(+), 46 deletions(-) - ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -11,8 +11,11 @@ - #include - #include - #include -+#include - #include - #include -+#include -+#include - - #define AR724X_PCI_REG_APP 0x00 - #define AR724X_PCI_REG_RESET 0x18 -@@ -42,17 +45,20 @@ struct ar724x_pci_controller { - void __iomem *crp_base; - - int irq; -- int irq_base; - - bool link_up; - bool bar0_is_cached; - u32 bar0_value; - -+ struct device_node *np; - struct pci_controller pci_controller; -+ struct irq_domain *domain; - struct resource io_res; - struct resource mem_res; - }; - -+static struct irq_chip ar724x_pci_irq_chip; -+ - static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc) - { - u32 reset; -@@ -228,35 +234,31 @@ static struct pci_ops ar724x_pci_ops = { - - static void ar724x_pci_irq_handler(struct irq_desc *desc) - { -- struct ar724x_pci_controller *apc; -- void __iomem *base; -+ struct irq_chip *chip = irq_desc_get_chip(desc); -+ struct ar724x_pci_controller *apc = irq_desc_get_handler_data(desc); - u32 pending; - -- apc = irq_desc_get_handler_data(desc); -- base = apc->ctrl_base; -- -- pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) & -- __raw_readl(base + AR724X_PCI_REG_INT_MASK); -+ chained_irq_enter(chip, desc); -+ pending = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_STATUS) & -+ __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_MASK); - - if (pending & AR724X_PCI_INT_DEV0) -- generic_handle_irq(apc->irq_base + 0); -- -+ generic_handle_irq(irq_linear_revmap(apc->domain, 1)); - else - spurious_interrupt(); -+ chained_irq_exit(chip, desc); - } - - static void ar724x_pci_irq_unmask(struct irq_data *d) - { - struct ar724x_pci_controller *apc; - void __iomem *base; -- int offset; - u32 t; - - apc = irq_data_get_irq_chip_data(d); - base = apc->ctrl_base; -- offset = apc->irq_base - d->irq; - -- switch (offset) { -+ switch (irq_linear_revmap(apc->domain, d->irq)) { - case 0: - t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); - __raw_writel(t | AR724X_PCI_INT_DEV0, -@@ -270,14 +272,12 @@ static void ar724x_pci_irq_mask(struct i - { - struct ar724x_pci_controller *apc; - void __iomem *base; -- int offset; - u32 t; - - apc = irq_data_get_irq_chip_data(d); - base = apc->ctrl_base; -- offset = apc->irq_base - d->irq; - -- switch (offset) { -+ switch (irq_linear_revmap(apc->domain, d->irq)) { - case 0: - t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); - __raw_writel(t & ~AR724X_PCI_INT_DEV0, -@@ -302,26 +302,34 @@ static struct irq_chip ar724x_pci_irq_ch - .irq_mask_ack = ar724x_pci_irq_mask, - }; - -+static int ar724x_pci_irq_map(struct irq_domain *d, -+ unsigned int irq, irq_hw_number_t hw) -+{ -+ struct ar724x_pci_controller *apc = d->host_data; -+ -+ irq_set_chip_and_handler(irq, &ar724x_pci_irq_chip, handle_level_irq); -+ irq_set_chip_data(irq, apc); -+ -+ return 0; -+} -+ -+static const struct irq_domain_ops ar724x_pci_domain_ops = { -+ .xlate = irq_domain_xlate_onecell, -+ .map = ar724x_pci_irq_map, -+}; -+ - static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc, - int id) - { - void __iomem *base; -- int i; - - base = apc->ctrl_base; - - __raw_writel(0, base + AR724X_PCI_REG_INT_MASK); - __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS); - -- apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT); -- -- for (i = apc->irq_base; -- i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) { -- irq_set_chip_and_handler(i, &ar724x_pci_irq_chip, -- handle_level_irq); -- irq_set_chip_data(i, apc); -- } -- -+ apc->domain = irq_domain_add_linear(apc->np, 2, -+ &ar724x_pci_domain_ops, apc); - irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler, - apc); - } -@@ -388,29 +396,11 @@ static int ar724x_pci_probe(struct platf - if (apc->irq < 0) - return -EINVAL; - -- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); -- if (!res) -- return -EINVAL; -- -- apc->io_res.parent = res; -- apc->io_res.name = "PCI IO space"; -- apc->io_res.start = res->start; -- apc->io_res.end = res->end; -- apc->io_res.flags = IORESOURCE_IO; -- -- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base"); -- if (!res) -- return -EINVAL; -- -- apc->mem_res.parent = res; -- apc->mem_res.name = "PCI memory space"; -- apc->mem_res.start = res->start; -- apc->mem_res.end = res->end; -- apc->mem_res.flags = IORESOURCE_MEM; -- -+ apc->np = pdev->dev.of_node; - apc->pci_controller.pci_ops = &ar724x_pci_ops; - apc->pci_controller.io_resource = &apc->io_res; - apc->pci_controller.mem_resource = &apc->mem_res; -+ pci_load_of_ranges(&apc->pci_controller, pdev->dev.of_node); - - /* - * Do the full PCIE Root Complex Initialization Sequence if the PCIe -@@ -432,10 +422,16 @@ static int ar724x_pci_probe(struct platf - return 0; - } - -+static const struct of_device_id ar724x_pci_ids[] = { -+ { .compatible = "qcom,ar7240-pci" }, -+ {}, -+}; -+ - static struct platform_driver ar724x_pci_driver = { - .probe = ar724x_pci_probe, - .driver = { - .name = "ar724x-pci", -+ .of_match_table = of_match_ptr(ar724x_pci_ids), - }, - }; - diff --git a/lede/target/linux/ath79/patches-5.10/0032-MIPS-ath79-sanitize-symbols.patch b/lede/target/linux/ath79/patches-5.10/0032-MIPS-ath79-sanitize-symbols.patch deleted file mode 100644 index 7509df82f3..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0032-MIPS-ath79-sanitize-symbols.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 3fc8585cf76022dba7496627074d42af88c30718 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sat, 23 Jun 2018 15:16:55 +0200 -Subject: [PATCH 32/33] MIPS: ath79: sanitize symbols - -We no longer need to select which SoCs are supported as the whole arch -code is always built. So lets drop all the SoC symbols - -Signed-off-by: John Crispin ---- - arch/mips/Kconfig | 2 ++ - arch/mips/ath79/Kconfig | 44 +++++--------------------------------------- - arch/mips/pci/Makefile | 2 +- - 3 files changed, 8 insertions(+), 40 deletions(-) - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -246,6 +246,8 @@ config ATH79 - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_MIPS16 - select SYS_SUPPORTS_ZBOOT_UART_PROM -+ select HAVE_PCI -+ select USB_ARCH_HAS_EHCI - select USE_OF - select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM - help ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -1,48 +1,14 @@ - # SPDX-License-Identifier: GPL-2.0 - if ATH79 - --config SOC_AR71XX -- select HAVE_PCI -- def_bool n -- --config SOC_AR724X -- select HAVE_PCI -- select PCI_AR724X if PCI -- def_bool n -- --config SOC_AR913X -- def_bool n -- --config SOC_AR933X -- def_bool n -- --config SOC_AR934X -- select HAVE_PCI -- select PCI_AR724X if PCI -- def_bool n -- --config SOC_QCA955X -- select HAVE_PCI -- select PCI_AR724X if PCI -+config PCI_AR71XX -+ bool "PCI support for AR7100 type SoCs" -+ depends on PCI - def_bool n - - config PCI_AR724X -- def_bool n -- --config ATH79_DEV_GPIO_BUTTONS -- def_bool n -- --config ATH79_DEV_LEDS_GPIO -- def_bool n -- --config ATH79_DEV_SPI -- def_bool n -- --config ATH79_DEV_USB -- def_bool n -- --config ATH79_DEV_WMAC -- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) -+ bool "PCI support for AR724x type SoCs" -+ depends on PCI - def_bool n - - endif ---- a/arch/mips/pci/Makefile -+++ b/arch/mips/pci/Makefile -@@ -21,7 +21,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o - ops-bcm63xx.o - obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o - obj-$(CONFIG_PCI_AR2315) += pci-ar2315.o --obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o -+obj-$(CONFIG_PCI_AR71XX) += pci-ar71xx.o - obj-$(CONFIG_PCI_AR724X) += pci-ar724x.o - obj-$(CONFIG_PCI_XTALK_BRIDGE) += pci-xtalk-bridge.o - # diff --git a/lede/target/linux/ath79/patches-5.10/0033-spi-ath79-drop-pdata-support.patch b/lede/target/linux/ath79/patches-5.10/0033-spi-ath79-drop-pdata-support.patch deleted file mode 100644 index 162a82bda3..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0033-spi-ath79-drop-pdata-support.patch +++ /dev/null @@ -1,70 +0,0 @@ -From c4e197bbcecc7233aa9e553e7047fa50e4e1fe77 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Mon, 25 Jun 2018 15:52:34 +0200 -Subject: [PATCH 33/33] spi: ath79: drop pdata support - -The target is being converted to pure OF. We can therefore drop all of the -platform data code from the driver. - -Cc: linux-spi@vger.kernel.org -Acked-by: Mark Brown -Signed-off-by: John Crispin ---- - include/linux/platform_data/spi-ath79.h | 16 ------------------- - drivers/spi/spi-ath79.c | 8 -------- - 2 files changed, 27 deletions(-) - delete mode 100644 arch/mips/include/asm/mach-ath79/ath79_spi_platform.h - ---- a/include/linux/platform_data/spi-ath79.h -+++ /dev/null -@@ -1,16 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0-only */ --/* -- * Platform data definition for Atheros AR71XX/AR724X/AR913X SPI controller -- * -- * Copyright (C) 2008-2010 Gabor Juhos -- */ -- --#ifndef _ATH79_SPI_PLATFORM_H --#define _ATH79_SPI_PLATFORM_H -- --struct ath79_spi_platform_data { -- unsigned bus_num; -- unsigned num_chipselect; --}; -- --#endif /* _ATH79_SPI_PLATFORM_H */ ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -19,7 +19,6 @@ - #include - #include - #include --#include - - #define DRV_NAME "ath79-spi" - -@@ -138,7 +137,6 @@ static int ath79_spi_probe(struct platfo - { - struct spi_master *master; - struct ath79_spi *sp; -- struct ath79_spi_platform_data *pdata; - unsigned long rate; - int ret; - -@@ -152,15 +150,9 @@ static int ath79_spi_probe(struct platfo - master->dev.of_node = pdev->dev.of_node; - platform_set_drvdata(pdev, sp); - -- pdata = dev_get_platdata(&pdev->dev); -- - master->use_gpio_descriptors = true; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); - master->flags = SPI_MASTER_GPIO_SS; -- if (pdata) { -- master->bus_num = pdata->bus_num; -- master->num_chipselect = pdata->num_chipselect; -- } - - sp->bitbang.master = master; - sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/lede/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch b/lede/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch deleted file mode 100644 index 71acc22210..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch +++ /dev/null @@ -1,27 +0,0 @@ ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -31,11 +31,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq); - - enum ath79_soc_type ath79_soc; - unsigned int ath79_soc_rev; -+EXPORT_SYMBOL_GPL(ath79_soc_rev); - - void __iomem *ath79_pll_base; - void __iomem *ath79_reset_base; - EXPORT_SYMBOL_GPL(ath79_reset_base); --static void __iomem *ath79_ddr_base; -+void __iomem *ath79_ddr_base; -+EXPORT_SYMBOL_GPL(ath79_ddr_base); - static void __iomem *ath79_ddr_wb_flush_base; - static void __iomem *ath79_ddr_pci_win_base; - ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -149,6 +149,7 @@ void ath79_ddr_wb_flush(unsigned int reg - void ath79_ddr_set_pci_windows(void); - - extern void __iomem *ath79_pll_base; -+extern void __iomem *ath79_ddr_base; - extern void __iomem *ath79_reset_base; - - static inline void ath79_pll_wr(unsigned reg, u32 val) diff --git a/lede/target/linux/ath79/patches-5.10/0036-MIPS-ath79-remove-irq-code-from-pci.patch b/lede/target/linux/ath79/patches-5.10/0036-MIPS-ath79-remove-irq-code-from-pci.patch deleted file mode 100644 index 80fcd0a7f5..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0036-MIPS-ath79-remove-irq-code-from-pci.patch +++ /dev/null @@ -1,139 +0,0 @@ ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -51,11 +51,9 @@ - struct ar71xx_pci_controller { - struct device_node *np; - void __iomem *cfg_base; -- int irq; - struct pci_controller pci_ctrl; - struct resource io_res; - struct resource mem_res; -- struct irq_domain *domain; - }; - - /* Byte lane enable bits */ -@@ -227,104 +225,6 @@ static struct pci_ops ar71xx_pci_ops = { - .write = ar71xx_pci_write_config, - }; - --static void ar71xx_pci_irq_handler(struct irq_desc *desc) --{ -- void __iomem *base = ath79_reset_base; -- struct irq_chip *chip = irq_desc_get_chip(desc); -- struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc); -- u32 pending; -- -- chained_irq_enter(chip, desc); -- pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & -- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- -- if (pending & AR71XX_PCI_INT_DEV0) -- generic_handle_irq(irq_linear_revmap(apc->domain, 1)); -- -- else if (pending & AR71XX_PCI_INT_DEV1) -- generic_handle_irq(irq_linear_revmap(apc->domain, 2)); -- -- else if (pending & AR71XX_PCI_INT_DEV2) -- generic_handle_irq(irq_linear_revmap(apc->domain, 3)); -- -- else if (pending & AR71XX_PCI_INT_CORE) -- generic_handle_irq(irq_linear_revmap(apc->domain, 4)); -- -- else -- spurious_interrupt(); -- chained_irq_exit(chip, desc); --} -- --static void ar71xx_pci_irq_unmask(struct irq_data *d) --{ -- struct ar71xx_pci_controller *apc; -- unsigned int irq; -- void __iomem *base = ath79_reset_base; -- u32 t; -- -- apc = irq_data_get_irq_chip_data(d); -- irq = irq_linear_revmap(apc->domain, d->irq); -- -- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- -- /* flush write */ -- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); --} -- --static void ar71xx_pci_irq_mask(struct irq_data *d) --{ -- struct ar71xx_pci_controller *apc; -- unsigned int irq; -- void __iomem *base = ath79_reset_base; -- u32 t; -- -- apc = irq_data_get_irq_chip_data(d); -- irq = irq_linear_revmap(apc->domain, d->irq); -- -- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- -- /* flush write */ -- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); --} -- --static struct irq_chip ar71xx_pci_irq_chip = { -- .name = "AR71XX PCI", -- .irq_mask = ar71xx_pci_irq_mask, -- .irq_unmask = ar71xx_pci_irq_unmask, -- .irq_mask_ack = ar71xx_pci_irq_mask, --}; -- --static int ar71xx_pci_irq_map(struct irq_domain *d, -- unsigned int irq, irq_hw_number_t hw) --{ -- struct ar71xx_pci_controller *apc = d->host_data; -- -- irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq); -- irq_set_chip_data(irq, apc); -- -- return 0; --} -- --static const struct irq_domain_ops ar71xx_pci_domain_ops = { -- .xlate = irq_domain_xlate_onecell, -- .map = ar71xx_pci_irq_map, --}; -- --static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc) --{ -- void __iomem *base = ath79_reset_base; -- -- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); -- -- apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT, -- &ar71xx_pci_domain_ops, apc); -- irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler, -- apc); --} -- - static void ar71xx_pci_reset(void) - { - ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE); -@@ -358,10 +258,6 @@ static int ar71xx_pci_probe(struct platf - if (IS_ERR(apc->cfg_base)) - return PTR_ERR(apc->cfg_base); - -- apc->irq = platform_get_irq(pdev, 0); -- if (apc->irq < 0) -- return -EINVAL; -- - ar71xx_pci_reset(); - - /* setup COMMAND register */ -@@ -372,8 +268,6 @@ static int ar71xx_pci_probe(struct platf - /* clear bus errors */ - ar71xx_pci_check_error(apc, 1); - -- ar71xx_pci_irq_init(apc); -- - apc->np = pdev->dev.of_node; - apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; - apc->pci_ctrl.mem_resource = &apc->mem_res; diff --git a/lede/target/linux/ath79/patches-5.10/0037-missing-registers.patch b/lede/target/linux/ath79/patches-5.10/0037-missing-registers.patch deleted file mode 100644 index 9067e4ca7b..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0037-missing-registers.patch +++ /dev/null @@ -1,21 +0,0 @@ -commit f3ffac90bc7266b7d917616f3233f58e8c08a196 -Author: Christian Lamparter -Date: Fri Aug 10 23:24:47 2018 +0200 - - ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344 - - Signed-off-by: Christian Lamparter - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -1226,6 +1226,10 @@ - #define AR934X_ETH_CFG_RDV_DELAY BIT(16) - #define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3 - #define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16 -+#define AR934X_ETH_CFG_TXD_DELAY_MASK 0x3 -+#define AR934X_ETH_CFG_TXD_DELAY_SHIFT 18 -+#define AR934X_ETH_CFG_TXE_DELAY_MASK 0x3 -+#define AR934X_ETH_CFG_TXE_DELAY_SHIFT 20 - - /* - * QCA953X GMAC Interface diff --git a/lede/target/linux/ath79/patches-5.10/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch b/lede/target/linux/ath79/patches-5.10/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch deleted file mode 100644 index bc09062dc5..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 60efe35257b063ce584968f9f80b437030ce6ba6 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Mon, 18 Mar 2019 00:54:06 +0100 -Subject: [PATCH] MIPS: ath79: add missing QCA955x GMAC registers - -This adds missing GMAC register definitions for the Qualcomm Atheros -QCA955X series MIPS SoCs. - -They originate from the platforms U-Boot code and the AVM FRITZ!WLAN -Repeater 450E's GPL tarball. - -Signed-off-by: David Bauer ---- - .../mips/include/asm/mach-ath79/ar71xx_regs.h | 54 +++++++++++++++++++ - 1 file changed, 54 insertions(+) - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -1246,7 +1246,12 @@ - */ - - #define QCA955X_GMAC_REG_ETH_CFG 0x00 -+#define QCA955X_GMAC_REG_SGMII_RESET 0x14 - #define QCA955X_GMAC_REG_SGMII_SERDES 0x18 -+#define QCA955X_GMAC_REG_MR_AN_CONTROL 0x1c -+#define QCA955X_GMAC_REG_MR_AN_STATUS 0x20 -+#define QCA955X_GMAC_REG_SGMII_CONFIG 0x34 -+#define QCA955X_GMAC_REG_SGMII_DEBUG 0x58 - - #define QCA955X_ETH_CFG_RGMII_EN BIT(0) - #define QCA955X_ETH_CFG_MII_GE0 BIT(1) -@@ -1268,9 +1273,58 @@ - #define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3 - #define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20 - -+#define QCA955X_SGMII_RESET_RX_CLK_N_RESET 0 -+#define QCA955X_SGMII_RESET_RX_CLK_N BIT(0) -+#define QCA955X_SGMII_RESET_TX_CLK_N BIT(1) -+#define QCA955X_SGMII_RESET_RX_125M_N BIT(2) -+#define QCA955X_SGMII_RESET_TX_125M_N BIT(3) -+#define QCA955X_SGMII_RESET_HW_RX_125M_N BIT(4) -+ - #define QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15) - #define QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23 - #define QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf -+ -+#define QCA955X_MR_AN_CONTROL_SPEED_SEL1 BIT(6) -+#define QCA955X_MR_AN_CONTROL_DUPLEX_MODE BIT(8) -+#define QCA955X_MR_AN_CONTROL_RESTART_AN BIT(9) -+#define QCA955X_MR_AN_CONTROL_POWER_DOWN BIT(11) -+#define QCA955X_MR_AN_CONTROL_AN_ENABLE BIT(12) -+#define QCA955X_MR_AN_CONTROL_SPEED_SEL0 BIT(13) -+#define QCA955X_MR_AN_CONTROL_LOOPBACK BIT(14) -+#define QCA955X_MR_AN_CONTROL_PHY_RESET BIT(15) -+ -+#define QCA955X_MR_AN_STATUS_EXT_CAP BIT(0) -+#define QCA955X_MR_AN_STATUS_LINK_UP BIT(2) -+#define QCA955X_MR_AN_STATUS_AN_ABILITY BIT(3) -+#define QCA955X_MR_AN_STATUS_REMOTE_FAULT BIT(4) -+#define QCA955X_MR_AN_STATUS_AN_COMPLETE BIT(5) -+#define QCA955X_MR_AN_STATUS_NO_PREAMBLE BIT(6) -+#define QCA955X_MR_AN_STATUS_BASE_PAGE BIT(7) -+ -+#define QCA955X_SGMII_CONFIG_MODE_CTRL_SHIFT 0 -+#define QCA955X_SGMII_CONFIG_MODE_CTRL_MASK 0x7 -+#define QCA955X_SGMII_CONFIG_ENABLE_SGMII_TX_PAUSE BIT(3) -+#define QCA955X_SGMII_CONFIG_MR_REG4_CHANGED BIT(4) -+#define QCA955X_SGMII_CONFIG_FORCE_SPEED BIT(5) -+#define QCA955X_SGMII_CONFIG_SPEED_SHIFT 6 -+#define QCA955X_SGMII_CONFIG_SPEED_MASK 0xc0 -+#define QCA955X_SGMII_CONFIG_REMOTE_PHY_LOOPBACK BIT(8) -+#define QCA955X_SGMII_CONFIG_NEXT_PAGE_LOADED BIT(9) -+#define QCA955X_SGMII_CONFIG_MDIO_ENABLE BIT(10) -+#define QCA955X_SGMII_CONFIG_MDIO_PULSE BIT(11) -+#define QCA955X_SGMII_CONFIG_MDIO_COMPLETE BIT(12) -+#define QCA955X_SGMII_CONFIG_PRBS_ENABLE BIT(13) -+#define QCA955X_SGMII_CONFIG_BERT_ENABLE BIT(14) -+ -+#define QCA955X_SGMII_DEBUG_TX_STATE_MASK 0xff -+#define QCA955X_SGMII_DEBUG_TX_STATE_SHIFT 0 -+#define QCA955X_SGMII_DEBUG_RX_STATE_MASK 0xff00 -+#define QCA955X_SGMII_DEBUG_RX_STATE_SHIFT 8 -+#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_MASK 0xff0000 -+#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_SHIFT 16 -+#define QCA955X_SGMII_DEBUG_ARB_STATE_MASK 0xf000000 -+#define QCA955X_SGMII_DEBUG_ARB_STATE_SHIFT 24 -+ - /* - * QCA956X GMAC Interface - */ diff --git a/lede/target/linux/ath79/patches-5.10/0039-MIPS-ath79-export-UART1-reference-clock.patch b/lede/target/linux/ath79/patches-5.10/0039-MIPS-ath79-export-UART1-reference-clock.patch deleted file mode 100644 index edf888c7e7..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0039-MIPS-ath79-export-UART1-reference-clock.patch +++ /dev/null @@ -1,52 +0,0 @@ ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -40,6 +40,7 @@ static const char * const clk_names[ATH7 - [ATH79_CLK_AHB] = "ahb", - [ATH79_CLK_REF] = "ref", - [ATH79_CLK_MDIO] = "mdio", -+ [ATH79_CLK_UART1] = "uart1", - }; - - static const char * __init ath79_clk_name(int type) -@@ -344,6 +345,9 @@ static void __init ar934x_clocks_init(vo - if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) - ath79_set_clk(ATH79_CLK_MDIO, 100 * 1000 * 1000); - -+ if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL) -+ ath79_set_clk(ATH79_CLK_UART1, 100 * 1000 * 1000); -+ - iounmap(dpll_base); - } - -@@ -649,6 +653,9 @@ static void __init ath79_clocks_init_dt( - if (!clks[ATH79_CLK_MDIO]) - clks[ATH79_CLK_MDIO] = clks[ATH79_CLK_REF]; - -+ if (!clks[ATH79_CLK_UART1]) -+ clks[ATH79_CLK_UART1] = clks[ATH79_CLK_REF]; -+ - if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) { - pr_err("%pOF: could not register clk provider\n", np); - goto err_iounmap; ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -348,6 +348,7 @@ - #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - - #define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6) -+#define AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL BIT(7) - - #define QCA953X_PLL_CPU_CONFIG_REG 0x00 - #define QCA953X_PLL_DDR_CONFIG_REG 0x04 ---- a/include/dt-bindings/clock/ath79-clk.h -+++ b/include/dt-bindings/clock/ath79-clk.h -@@ -11,7 +11,8 @@ - #define ATH79_CLK_AHB 2 - #define ATH79_CLK_REF 3 - #define ATH79_CLK_MDIO 4 -+#define ATH79_CLK_UART1 5 - --#define ATH79_CLK_END 5 -+#define ATH79_CLK_END 6 - - #endif /* __DT_BINDINGS_ATH79_CLK_H */ diff --git a/lede/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch b/lede/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch deleted file mode 100644 index 4a2a3b741d..0000000000 --- a/lede/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch +++ /dev/null @@ -1,18 +0,0 @@ -HACK: register the GPIO driver earlier to ensure that gpio_request calls -from mach files succeed. - ---- a/drivers/gpio/gpio-ath79.c -+++ b/drivers/gpio/gpio-ath79.c -@@ -306,7 +306,11 @@ static struct platform_driver ath79_gpio - .probe = ath79_gpio_probe, - }; - --module_platform_driver(ath79_gpio_driver); -+static int __init ath79_gpio_init(void) -+{ -+ return platform_driver_register(&ath79_gpio_driver); -+} -+postcore_initcall(ath79_gpio_init); - - MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X GPIO API support"); - MODULE_LICENSE("GPL v2"); diff --git a/lede/target/linux/ath79/patches-5.10/0040-ath79-sgmii-config.patch b/lede/target/linux/ath79/patches-5.10/0040-ath79-sgmii-config.patch deleted file mode 100644 index bf7cbf2716..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0040-ath79-sgmii-config.patch +++ /dev/null @@ -1,9 +0,0 @@ ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -1376,5 +1376,6 @@ - - #define QCA956X_SGMII_CONFIG_MODE_CTRL_SHIFT 0 - #define QCA956X_SGMII_CONFIG_MODE_CTRL_MASK 0x7 -+#define QCA956X_SGMII_CONFIG_MODE_CTRL_SGMII_MAC 0x2 - - #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/lede/target/linux/ath79/patches-5.10/0052-mtd-spi-nor-use-4-bit-locking-for-MX25L12805D.patch b/lede/target/linux/ath79/patches-5.10/0052-mtd-spi-nor-use-4-bit-locking-for-MX25L12805D.patch deleted file mode 100644 index 317bef2201..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0052-mtd-spi-nor-use-4-bit-locking-for-MX25L12805D.patch +++ /dev/null @@ -1,33 +0,0 @@ -From a449cd03db4d0e1d292b3734f7676634cfd94f53 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Sun, 25 Oct 2020 01:14:22 +0200 -Subject: [PATCH] mtd: spi-nor: use 4 bit locking for MX25L12805D - -Macronix MX25L12805D supports locking with 4 block -protection bits in its status register. Add the corresponding -flag in order to clear these bits when unloking the flash. - -Otherwise, the flash might not be writable depending on the state -left by the bootloader. - -Tested-on: Ubiquiti UniFi AC Lite (ath79) - -Fixes commit 62593cf40b23 ("mtd: spi-nor: refactor block protection functions") - -Signed-off-by: David Bauer ---- - drivers/mtd/spi-nor/macronix.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/mtd/spi-nor/macronix.c -+++ b/drivers/mtd/spi-nor/macronix.c -@@ -50,7 +50,8 @@ static const struct flash_info macronix_ - { "mx25u4035", INFO(0xc22533, 0, 64 * 1024, 8, SECT_4K) }, - { "mx25u8035", INFO(0xc22534, 0, 64 * 1024, 16, SECT_4K) }, - { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, -- { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, SECT_4K) }, -+ { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, SECT_4K | -+ SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP) }, - { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, - { "mx25r1635f", INFO(0xc22815, 0, 64 * 1024, 32, - SECT_4K | SPI_NOR_DUAL_READ | diff --git a/lede/target/linux/ath79/patches-5.10/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch b/lede/target/linux/ath79/patches-5.10/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch deleted file mode 100644 index f596ddb733..0000000000 --- a/lede/target/linux/ath79/patches-5.10/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch +++ /dev/null @@ -1,130 +0,0 @@ -From: David Bauer -Date: Sat, 11 Apr 2020 14:03:12 +0200 -Subject: MIPS: pci-ar724x: add QCA9550 reset sequence - -The QCA9550 family of SoCs have a slightly different reset -sequence compared to older chips. - -Normally the bootloader performs this sequence, however -some bootloader implementation expect the operating system -to clear the reset. - -Also get the resets from OF to support handling of the second -PCIe root-complex on the QCA9558. - -Signed-off-by: David Bauer - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -391,6 +391,7 @@ - #define QCA955X_PLL_CPU_CONFIG_REG 0x00 - #define QCA955X_PLL_DDR_CONFIG_REG 0x04 - #define QCA955X_PLL_CLK_CTRL_REG 0x08 -+#define QCA955X_PLL_PCIE_CONFIG_REG 0x0c - #define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 - #define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 - #define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c -@@ -476,6 +477,9 @@ - #define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21) - #define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - -+#define QCA955X_PLL_PCIE_CONFIG_PLL_PWD BIT(30) -+#define QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS BIT(16) -+ - #define QCA956X_PLL_SWITCH_CLOCK_SPARE_I2C_CLK_SELB BIT(5) - #define QCA956X_PLL_SWITCH_CLOCK_SPARE_MDIO_CLK_SEL0_1 BIT(6) - #define QCA956X_PLL_SWITCH_CLOCK_SPARE_UART1_CLK_SEL BIT(7) ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -8,6 +8,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -55,6 +56,9 @@ struct ar724x_pci_controller { - struct irq_domain *domain; - struct resource io_res; - struct resource mem_res; -+ -+ struct reset_control *hc_reset; -+ struct reset_control *phy_reset; - }; - - static struct irq_chip ar724x_pci_irq_chip; -@@ -340,18 +344,30 @@ static void ar724x_pci_hw_init(struct ar - int wait = 0; - - /* deassert PCIe host controller and PCIe PHY reset */ -- ath79_device_reset_clear(AR724X_RESET_PCIE); -- ath79_device_reset_clear(AR724X_RESET_PCIE_PHY); -+ reset_control_deassert(apc->hc_reset); -+ reset_control_deassert(apc->phy_reset); - -- /* remove the reset of the PCIE PLL */ -- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET; -- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -- -- /* deassert bypass for the PCIE PLL */ -- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS; -- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -+ if (of_device_is_compatible(apc->np, "qcom,qca9550-pci")) { -+ /* remove the reset of the PCIE PLL */ -+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG); -+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_PWD; -+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl); -+ -+ /* deassert bypass for the PCIE PLL */ -+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG); -+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS; -+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl); -+ } else { -+ /* remove the reset of the PCIE PLL */ -+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET; -+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -+ -+ /* deassert bypass for the PCIE PLL */ -+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS; -+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -+ } - - /* set PCIE Application Control to ready */ - app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP); -@@ -396,6 +412,14 @@ static int ar724x_pci_probe(struct platf - if (apc->irq < 0) - return -EINVAL; - -+ apc->hc_reset = devm_reset_control_get_exclusive(&pdev->dev, "hc"); -+ if (IS_ERR(apc->hc_reset)) -+ return PTR_ERR(apc->hc_reset); -+ -+ apc->phy_reset = devm_reset_control_get_exclusive(&pdev->dev, "phy"); -+ if (IS_ERR(apc->phy_reset)) -+ return PTR_ERR(apc->phy_reset); -+ - apc->np = pdev->dev.of_node; - apc->pci_controller.pci_ops = &ar724x_pci_ops; - apc->pci_controller.io_resource = &apc->io_res; -@@ -406,7 +430,7 @@ static int ar724x_pci_probe(struct platf - * Do the full PCIE Root Complex Initialization Sequence if the PCIe - * host controller is in reset. - */ -- if (ath79_reset_rr(AR724X_RESET_REG_RESET_MODULE) & AR724X_RESET_PCIE) -+ if (reset_control_status(apc->hc_reset)) - ar724x_pci_hw_init(apc); - - apc->link_up = ar724x_pci_check_link(apc); -@@ -424,6 +448,7 @@ static int ar724x_pci_probe(struct platf - - static const struct of_device_id ar724x_pci_ids[] = { - { .compatible = "qcom,ar7240-pci" }, -+ { .compatible = "qcom,qca9550-pci" }, - {}, - }; - diff --git a/lede/target/linux/ath79/patches-5.10/401-mtd-nor-support-mtd-name-from-device-tree.patch b/lede/target/linux/ath79/patches-5.10/401-mtd-nor-support-mtd-name-from-device-tree.patch deleted file mode 100644 index fa5e19cd41..0000000000 --- a/lede/target/linux/ath79/patches-5.10/401-mtd-nor-support-mtd-name-from-device-tree.patch +++ /dev/null @@ -1,54 +0,0 @@ -From f32bc2aa01edcba2f2ed5db151cf183eac9ef919 Mon Sep 17 00:00:00 2001 -From: Abhimanyu Vishwakarma -Date: Sat, 25 Feb 2017 16:42:50 +0000 -Subject: mtd: nor: support mtd name from device tree - -Signed-off-by: Abhimanyu Vishwakarma ---- - drivers/mtd/spi-nor/spi-nor.c | 8 +++++++- - 1 file changed, 7 insertions(+), 1 deletion(-) - ---- a/drivers/mtd/spi-nor/core.c -+++ b/drivers/mtd/spi-nor/core.c -@@ -3162,6 +3162,7 @@ int spi_nor_scan(struct spi_nor *nor, co - struct device *dev = nor->dev; - struct mtd_info *mtd = &nor->mtd; - struct device_node *np = spi_nor_get_flash_node(nor); -+ const char __maybe_unused *of_mtd_name = NULL; - int ret; - int i; - -@@ -3216,7 +3217,12 @@ int spi_nor_scan(struct spi_nor *nor, co - if (ret) - return ret; - -- if (!mtd->name) -+#ifdef CONFIG_MTD_OF_PARTS -+ of_property_read_string(np, "linux,mtd-name", &of_mtd_name); -+#endif -+ if (of_mtd_name) -+ mtd->name = of_mtd_name; -+ else if (!mtd->name) - mtd->name = dev_name(dev); - mtd->priv = nor; - mtd->type = MTD_NORFLASH; ---- a/drivers/mtd/mtdcore.c -+++ b/drivers/mtd/mtdcore.c -@@ -780,6 +780,17 @@ out_error: - */ - static void mtd_set_dev_defaults(struct mtd_info *mtd) - { -+#ifdef CONFIG_MTD_OF_PARTS -+ const char __maybe_unused *of_mtd_name = NULL; -+ struct device_node *np; -+ -+ np = mtd_get_of_node(mtd); -+ if (np && !mtd->name) { -+ of_property_read_string(np, "linux,mtd-name", &of_mtd_name); -+ if (of_mtd_name) -+ mtd->name = of_mtd_name; -+ } else -+#endif - if (mtd->dev.parent) { - if (!mtd->owner && mtd->dev.parent->driver) - mtd->owner = mtd->dev.parent->driver->owner; diff --git a/lede/target/linux/ath79/patches-5.10/404-mtd-cybertan-trx-parser.patch b/lede/target/linux/ath79/patches-5.10/404-mtd-cybertan-trx-parser.patch deleted file mode 100644 index 923589661e..0000000000 --- a/lede/target/linux/ath79/patches-5.10/404-mtd-cybertan-trx-parser.patch +++ /dev/null @@ -1,27 +0,0 @@ ---- a/drivers/mtd/parsers/Makefile -+++ b/drivers/mtd/parsers/Makefile -@@ -8,6 +8,7 @@ obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o - ofpart-y += ofpart_core.o - ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908) += ofpart_bcm4908.o - ofpart-$(CONFIG_MTD_OF_PARTS_LINKSYS_NS)+= ofpart_linksys_ns.o -+obj-$(CONFIG_MTD_PARSER_CYBERTAN) += parser_cybertan.o - obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o - obj-$(CONFIG_MTD_AFS_PARTS) += afs.o - obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o ---- a/drivers/mtd/parsers/Kconfig -+++ b/drivers/mtd/parsers/Kconfig -@@ -102,6 +102,14 @@ config MTD_OF_PARTS_LINKSYS_NS - two "firmware" partitions. Currently used firmware has to be detected - using CFE environment variable. - -+config MTD_PARSER_CYBERTAN -+ tristate "Parser for Cybertan format partitions" -+ depends on MTD && (ATH79 || COMPILE_TEST) -+ help -+ Cybertan has a proprietory header than encompasses a Broadcom trx -+ header. This driver will parse the header and take care of the -+ special offsets that result in the extra headers. -+ - config MTD_PARSER_IMAGETAG - tristate "Parser for BCM963XX Image Tag format partitions" - depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST diff --git a/lede/target/linux/ath79/patches-5.10/408-mtd-redboot_partition_scan.patch b/lede/target/linux/ath79/patches-5.10/408-mtd-redboot_partition_scan.patch deleted file mode 100644 index ad5257fabd..0000000000 --- a/lede/target/linux/ath79/patches-5.10/408-mtd-redboot_partition_scan.patch +++ /dev/null @@ -1,44 +0,0 @@ ---- a/drivers/mtd/parsers/redboot.c -+++ b/drivers/mtd/parsers/redboot.c -@@ -91,12 +91,18 @@ static int parse_redboot_partitions(stru - - parse_redboot_of(master); - -+ buf = vmalloc(master->erasesize); -+ if (!buf) -+ return -ENOMEM; -+ -+ restart: - if ( directory < 0 ) { - offset = master->size + directory * master->erasesize; - while (mtd_block_isbad(master, offset)) { - if (!offset) { - nogood: - printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n"); -+ vfree(buf); - return -EIO; - } - offset -= master->erasesize; -@@ -109,10 +115,6 @@ static int parse_redboot_partitions(stru - goto nogood; - } - } -- buf = vmalloc(master->erasesize); -- -- if (!buf) -- return -ENOMEM; - - printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n", - master->name, offset); -@@ -185,6 +187,11 @@ static int parse_redboot_partitions(stru - } - if (i == numslots) { - /* Didn't find it */ -+ if (offset + master->erasesize < master->size) { -+ /* not at the end of the flash yet, maybe next block :) */ -+ directory++; -+ goto restart; -+ } - printk(KERN_NOTICE "No RedBoot partition table detected in %s\n", - master->name); - ret = 0; diff --git a/lede/target/linux/ath79/patches-5.10/410-spi-ath79-Implement-the-spi_mem-interface.patch b/lede/target/linux/ath79/patches-5.10/410-spi-ath79-Implement-the-spi_mem-interface.patch deleted file mode 100644 index 51a71c6ef2..0000000000 --- a/lede/target/linux/ath79/patches-5.10/410-spi-ath79-Implement-the-spi_mem-interface.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 8d8cdb4a6ccee5b62cc0dc64651c3946364514dc Mon Sep 17 00:00:00 2001 -From: Luiz Angelo Daros de Luca -Date: Mon, 10 Feb 2020 16:11:27 -0300 -Subject: [PATCH] spi: ath79: Implement the spi_mem interface - -Signed-off-by: Luiz Angelo Daros de Luca ---- - drivers/spi/spi-ath79.c | 35 +++++++++++++++++++++++++++++++++++ - 1 file changed, 35 insertions(+) - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -133,6 +134,39 @@ static u32 ath79_spi_txrx_mode0(struct s - return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); - } - -+static int ath79_exec_mem_op(struct spi_mem *mem, -+ const struct spi_mem_op *op) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(mem->spi); -+ -+ /* Ensures that reading is performed on device connected -+ to hardware cs0 */ -+ if (mem->spi->chip_select || mem->spi->cs_gpiod) -+ return -ENOTSUPP; -+ -+ /* Only use for fast-read op. */ -+ if (op->cmd.opcode != 0x0b || op->data.dir != SPI_MEM_DATA_IN || -+ op->addr.nbytes != 3 || op->dummy.nbytes != 1) -+ return -ENOTSUPP; -+ -+ /* disable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); -+ -+ memcpy_fromio(op->data.buf.in, sp->base + op->addr.val, op->data.nbytes); -+ -+ /* enable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); -+ -+ /* restore IOC register */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); -+ -+ return 0; -+} -+ -+static const struct spi_controller_mem_ops ath79_mem_ops = { -+ .exec_op = ath79_exec_mem_op, -+}; -+ - static int ath79_spi_probe(struct platform_device *pdev) - { - struct spi_master *master; -@@ -164,6 +198,7 @@ static int ath79_spi_probe(struct platfo - ret = PTR_ERR(sp->base); - goto err_put_master; - } -+ master->mem_ops = &ath79_mem_ops; - - sp->clk = devm_clk_get(&pdev->dev, "ahb"); - if (IS_ERR(sp->clk)) { diff --git a/lede/target/linux/ath79/patches-5.10/412-spi-ath79-set-number-of-chipselect-lines.patch b/lede/target/linux/ath79/patches-5.10/412-spi-ath79-set-number-of-chipselect-lines.patch deleted file mode 100644 index 614bcbcded..0000000000 --- a/lede/target/linux/ath79/patches-5.10/412-spi-ath79-set-number-of-chipselect-lines.patch +++ /dev/null @@ -1,26 +0,0 @@ -From e2e9f6d9f9bd7449ff113c157b639ce1a24b9d3f Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Sat, 24 Apr 2021 16:14:48 +0200 -Subject: [PATCH 2/2] spi: ath79: set number of chipselect lines - -All chipsets from AR7100 up to QCA9563 have three dedicated chipselect -lines for the integrated SPI controller. Remove the number of -chipselects from the platform data, as there is no need to manually set -this to a different value. - -Signed-off-by: David Bauer ---- - drivers/spi/spi-ath79.c | 2 +- - include/linux/platform_data/spi-ath79.h | 1 - - 2 files changed, 1 insertion(+), 2 deletions(-) - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -187,6 +187,7 @@ static int ath79_spi_probe(struct platfo - master->use_gpio_descriptors = true; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); - master->flags = SPI_MASTER_GPIO_SS; -+ master->num_chipselect = 3; - - sp->bitbang.master = master; - sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/lede/target/linux/ath79/patches-5.10/420-net-use-downstream-ag71xx.patch b/lede/target/linux/ath79/patches-5.10/420-net-use-downstream-ag71xx.patch deleted file mode 100644 index 7ce3f0d29c..0000000000 --- a/lede/target/linux/ath79/patches-5.10/420-net-use-downstream-ag71xx.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/drivers/net/ethernet/atheros/Kconfig -+++ b/drivers/net/ethernet/atheros/Kconfig -@@ -17,13 +17,7 @@ config NET_VENDOR_ATHEROS - - if NET_VENDOR_ATHEROS - --config AG71XX -- tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support" -- depends on ATH79 -- select PHYLINK -- help -- If you wish to compile a kernel for AR7XXX/91XXX and enable -- ethernet support, then you should always answer Y to this. -+source "drivers/net/ethernet/atheros/ag71xx/Kconfig" - - config ATL2 - tristate "Atheros L2 Fast Ethernet support" ---- a/drivers/net/ethernet/atheros/Makefile -+++ b/drivers/net/ethernet/atheros/Makefile -@@ -3,7 +3,7 @@ - # Makefile for the Atheros network device drivers. - # - --obj-$(CONFIG_AG71XX) += ag71xx.o -+obj-$(CONFIG_AG71XX) += ag71xx/ - obj-$(CONFIG_ATL1) += atlx/ - obj-$(CONFIG_ATL2) += atlx/ - obj-$(CONFIG_ATL1E) += atl1e/ diff --git a/lede/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch b/lede/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch deleted file mode 100644 index bf224b5f47..0000000000 --- a/lede/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch +++ /dev/null @@ -1,16 +0,0 @@ ---- a/drivers/net/phy/at803x.c -+++ b/drivers/net/phy/at803x.c -@@ -830,6 +830,13 @@ static int at803x_aneg_done(struct phy_d - if (!(phy_read(phydev, AT803X_PSSR) & AT803X_PSSR_MR_AN_COMPLETE)) { - phydev_warn(phydev, "803x_aneg_done: SGMII link is not ok\n"); - aneg_done = 0; -+#ifdef CONFIG_OF_MDIO -+ if (phydev->mdio.dev.of_node && -+ of_property_read_bool(phydev->mdio.dev.of_node, -+ "at803x-override-sgmii-link-check")) { -+ aneg_done = 1; -+ } -+#endif - } - /* switch back to copper page */ - phy_write(phydev, AT803X_REG_CHIP_CONFIG, ccr | AT803X_BT_BX_REG_SEL); diff --git a/lede/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch b/lede/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch deleted file mode 100644 index 7590793dc9..0000000000 --- a/lede/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch +++ /dev/null @@ -1,12 +0,0 @@ ---- a/drivers/Makefile -+++ b/drivers/Makefile -@@ -81,8 +81,8 @@ obj-y += scsi/ - obj-y += nvme/ - obj-$(CONFIG_ATA) += ata/ - obj-$(CONFIG_TARGET_CORE) += target/ --obj-$(CONFIG_MTD) += mtd/ - obj-$(CONFIG_SPI) += spi/ -+obj-$(CONFIG_MTD) += mtd/ - obj-$(CONFIG_SPMI) += spmi/ - obj-$(CONFIG_HSI) += hsi/ - obj-$(CONFIG_SLIMBUS) += slimbus/ diff --git a/lede/target/linux/ath79/patches-5.10/440-mtd-ar934x-nand-driver.patch b/lede/target/linux/ath79/patches-5.10/440-mtd-ar934x-nand-driver.patch deleted file mode 100644 index 1e2d573ebf..0000000000 --- a/lede/target/linux/ath79/patches-5.10/440-mtd-ar934x-nand-driver.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/mtd/nand/raw/Kconfig -+++ b/drivers/mtd/nand/raw/Kconfig -@@ -556,4 +556,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE - load time (assuming you build diskonchip as a module) with the module - parameter "inftl_bbt_write=1". - -+config MTD_NAND_AR934X -+ tristate "Support for NAND controller on Qualcomm Atheros AR934x/QCA955x SoCs" -+ depends on ATH79 || COMPILE_TEST -+ depends on HAS_IOMEM -+ help -+ Enables support for NAND controller on Qualcomm Atheros SoCs. -+ This controller is found on AR934x and QCA955x SoCs. -+ - endif # MTD_RAW_NAND ---- a/drivers/mtd/nand/raw/Makefile -+++ b/drivers/mtd/nand/raw/Makefile -@@ -58,6 +58,7 @@ obj-$(CONFIG_MTD_NAND_STM32_FMC2) += stm - obj-$(CONFIG_MTD_NAND_MESON) += meson_nand.o - obj-$(CONFIG_MTD_NAND_CADENCE) += cadence-nand-controller.o - obj-$(CONFIG_MTD_NAND_ARASAN) += arasan-nand-controller.o -+obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o - - nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o - nand-objs += nand_onfi.o diff --git a/lede/target/linux/ath79/patches-5.10/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch b/lede/target/linux/ath79/patches-5.10/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch deleted file mode 100644 index 924faec509..0000000000 --- a/lede/target/linux/ath79/patches-5.10/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch +++ /dev/null @@ -1,98 +0,0 @@ ---- /dev/null -+++ b/arch/mips/include/asm/mach-ath79/mangle-port.h -@@ -0,0 +1,37 @@ -+/* -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h -+ * Copyright (C) 2003, 2004 Ralf Baechle -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H -+#define __ASM_MACH_ATH79_MANGLE_PORT_H -+ -+#ifdef CONFIG_PCI_AR71XX -+extern unsigned long (ath79_pci_swizzle_b)(unsigned long port); -+extern unsigned long (ath79_pci_swizzle_w)(unsigned long port); -+#else -+#define ath79_pci_swizzle_b(port) (port) -+#define ath79_pci_swizzle_w(port) (port) -+#endif -+ -+#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port) -+#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port) -+#define __swizzle_addr_l(port) (port) -+#define __swizzle_addr_q(port) (port) -+ -+# define ioswabb(a, x) (x) -+# define __mem_ioswabb(a, x) (x) -+# define ioswabw(a, x) (x) -+# define __mem_ioswabw(a, x) cpu_to_le16(x) -+# define ioswabl(a, x) (x) -+# define __mem_ioswabl(a, x) cpu_to_le32(x) -+# define ioswabq(a, x) (x) -+# define __mem_ioswabq(a, x) cpu_to_le64(x) -+ -+#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */ ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -68,6 +68,45 @@ static const u32 ar71xx_pci_read_mask[8] - 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0 - }; - -+static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port); -+static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port); -+ -+static inline bool ar71xx_is_pci_addr(unsigned long port) -+{ -+ unsigned long phys = CPHYSADDR(port); -+ -+ return (phys >= AR71XX_PCI_MEM_BASE && -+ phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE); -+} -+ -+static unsigned long ar71xx_pci_swizzle_b(unsigned long port) -+{ -+ return ar71xx_is_pci_addr(port) ? port ^ 3 : port; -+} -+ -+static unsigned long ar71xx_pci_swizzle_w(unsigned long port) -+{ -+ return ar71xx_is_pci_addr(port) ? port ^ 2 : port; -+} -+ -+unsigned long ath79_pci_swizzle_b(unsigned long port) -+{ -+ if (__ath79_pci_swizzle_b) -+ return __ath79_pci_swizzle_b(port); -+ -+ return port; -+} -+EXPORT_SYMBOL(ath79_pci_swizzle_b); -+ -+unsigned long ath79_pci_swizzle_w(unsigned long port) -+{ -+ if (__ath79_pci_swizzle_w) -+ return __ath79_pci_swizzle_w(port); -+ -+ return port; -+} -+EXPORT_SYMBOL(ath79_pci_swizzle_w); -+ - static inline u32 ar71xx_pci_get_ble(int where, int size, int local) - { - u32 t; -@@ -276,6 +315,9 @@ static int ar71xx_pci_probe(struct platf - - register_pci_controller(&apc->pci_ctrl); - -+ __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b; -+ __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w; -+ - return 0; - } - diff --git a/lede/target/linux/ath79/patches-5.10/900-mdio_bitbang_ignore_ta_value.patch b/lede/target/linux/ath79/patches-5.10/900-mdio_bitbang_ignore_ta_value.patch deleted file mode 100644 index 928f241abd..0000000000 --- a/lede/target/linux/ath79/patches-5.10/900-mdio_bitbang_ignore_ta_value.patch +++ /dev/null @@ -1,32 +0,0 @@ ---- a/drivers/net/mdio/mdio-bitbang.c -+++ b/drivers/net/mdio/mdio-bitbang.c -@@ -152,7 +152,7 @@ static int mdiobb_cmd_addr(struct mdiobb - static int mdiobb_read(struct mii_bus *bus, int phy, int reg) - { - struct mdiobb_ctrl *ctrl = bus->priv; -- int ret, i; -+ int ret; - - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); -@@ -162,19 +162,7 @@ static int mdiobb_read(struct mii_bus *b - - ctrl->ops->set_mdio_dir(ctrl, 0); - -- /* check the turnaround bit: the PHY should be driving it to zero, if this -- * PHY is listed in phy_ignore_ta_mask as having broken TA, skip that -- */ -- if (mdiobb_get_bit(ctrl) != 0 && -- !(bus->phy_ignore_ta_mask & (1 << phy))) { -- /* PHY didn't drive TA low -- flush any bits it -- * may be trying to send. -- */ -- for (i = 0; i < 32; i++) -- mdiobb_get_bit(ctrl); -- -- return 0xffff; -- } -+ mdiobb_get_bit(ctrl); - - ret = mdiobb_get_num(ctrl, 16); - mdiobb_get_bit(ctrl); diff --git a/lede/target/linux/ath79/patches-5.10/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch b/lede/target/linux/ath79/patches-5.10/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch deleted file mode 100644 index e6fae3349d..0000000000 --- a/lede/target/linux/ath79/patches-5.10/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 66e584435ac0de6e0abeb6d7166fe4fe25d6bb73 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Tue, 16 Jun 2015 13:15:08 +0200 -Subject: [PATCH] phy/mdio-bitbang: prevent rescheduling during command - -It seems some phys have some maximum timings for accessing the MDIO line, -resulting in bit errors under cpu stress. Prevent this from happening by -disabling interrupts when sending commands. - -Signed-off-by: Jonas Gorski ---- - drivers/net/mdio/mdio-bitbang.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/drivers/net/mdio/mdio-bitbang.c -+++ b/drivers/net/mdio/mdio-bitbang.c -@@ -15,6 +15,7 @@ - */ - - #include -+#include - #include - #include - #include -@@ -153,7 +154,9 @@ static int mdiobb_read(struct mii_bus *b - { - struct mdiobb_ctrl *ctrl = bus->priv; - int ret; -+ unsigned long flags; - -+ local_irq_save(flags); - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); - mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg); -@@ -166,13 +169,17 @@ static int mdiobb_read(struct mii_bus *b - - ret = mdiobb_get_num(ctrl, 16); - mdiobb_get_bit(ctrl); -+ local_irq_restore(flags); -+ - return ret; - } - - static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val) - { - struct mdiobb_ctrl *ctrl = bus->priv; -+ unsigned long flags; - -+ local_irq_save(flags); - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); - mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg); -@@ -187,6 +194,8 @@ static int mdiobb_write(struct mii_bus * - - ctrl->ops->set_mdio_dir(ctrl, 0); - mdiobb_get_bit(ctrl); -+ local_irq_restore(flags); -+ - return 0; - } - diff --git a/lede/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch b/lede/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch deleted file mode 100644 index 5f25c844a8..0000000000 --- a/lede/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch +++ /dev/null @@ -1,904 +0,0 @@ -From: Felix Fietkau -Subject: [PATCH] ar71xx: fix unaligned access in a few more places - -SVN-Revision: 35130 ---- - arch/mips/include/asm/checksum.h | 83 +++--------------- - include/uapi/linux/ip.h | 2 +- - include/uapi/linux/ipv6.h | 2 +- - include/uapi/linux/tcp.h | 4 ++-- - include/uapi/linux/udp.h | 2 +- - net/netfilter/nf_conntrack_core.c | 4 ++-- - include/uapi/linux/icmp.h | 2 +- - include/uapi/linux/in6.h | 2 +- - net/ipv6/tcp_ipv6.c | 9 +++-- - net/ipv6/datagram.c | 6 ++-- - net/ipv6/exthdrs.c | 2 +- - include/linux/types.h | 5 +++ - net/ipv4/af_inet.c | 4 ++-- - net/ipv4/tcp_output.c | 69 +++++++++-------- - include/uapi/linux/igmp.h | 8 +++--- - net/core/flow_dissector.c | 2 +- - include/uapi/linux/icmpv6.h | 2 +- - include/net/ndisc.h | 10 ++++---- - net/sched/cls_u32.c | 6 +++--- - net/ipv6/ip6_offload.c | 2 +- - include/net/addrconf.h | 2 +- - include/net/inet_ecn.h | 4 ++-- - include/net/ipv6.h | 23 +++++---- - include/net/secure_seq.h | 1 + - include/uapi/linux/in.h | 2 +- - net/ipv6/ip6_fib.h | 2 +- - net/netfilter/nf_conntrack_proto_tcp.c | 2 +- - net/xfrm/xfrm_input.c | 4 ++-- - net/ipv4/tcp_input.c | 12 ++++--- - include/uapi/linux/if_pppox.h | 1 + - net/ipv6/netfilter/nf_log_ipv6.c | 4 ++-- - include/net/neighbour.h | 6 +++-- - include/uapi/linux/netfilter_arp/arp_tables.h | 2 +- - net/core/utils.c | 10 +++++-- - include/linux/etherdevice.h | 11 ++++--- - net/ipv4/tcp_offload.c | 6 +++--- - net/ipv6/netfilter/ip6table_mangle.c | 4 ++-- - 37 file changed, 171 insertions(+), 141 deletions(-) - ---- a/arch/mips/include/asm/checksum.h -+++ b/arch/mips/include/asm/checksum.h -@@ -100,26 +100,30 @@ static inline __sum16 ip_fast_csum(const - const unsigned int *stop = word + ihl; - unsigned int csum; - int carry; -+ unsigned int w; - -- csum = word[0]; -- csum += word[1]; -- carry = (csum < word[1]); -+ csum = net_hdr_word(word++); -+ -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- csum += word[2]; -- carry = (csum < word[2]); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- csum += word[3]; -- carry = (csum < word[3]); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- word += 4; - do { -- csum += *word; -- carry = (csum < *word); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; -- word++; - } while (word != stop); - - return csum_fold(csum); -@@ -180,74 +184,6 @@ static inline __sum16 ip_compute_csum(co - return csum_fold(csum_partial(buff, len, 0)); - } - --#define _HAVE_ARCH_IPV6_CSUM --static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, -- const struct in6_addr *daddr, -- __u32 len, __u8 proto, -- __wsum sum) --{ -- __wsum tmp; -- -- __asm__( -- " .set push # csum_ipv6_magic\n" -- " .set noreorder \n" -- " .set noat \n" -- " addu %0, %5 # proto (long in network byte order)\n" -- " sltu $1, %0, %5 \n" -- " addu %0, $1 \n" -- -- " addu %0, %6 # csum\n" -- " sltu $1, %0, %6 \n" -- " lw %1, 0(%2) # four words source address\n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 4(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 8(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 12(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 0(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 4(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 8(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 12(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " addu %0, $1 # Add final carry\n" -- " .set pop" -- : "=&r" (sum), "=&r" (tmp) -- : "r" (saddr), "r" (daddr), -- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum) -- : "memory"); -- -- return csum_fold(sum); --} -- - #include - #endif /* CONFIG_GENERIC_CSUM */ - ---- a/include/uapi/linux/ip.h -+++ b/include/uapi/linux/ip.h -@@ -106,7 +106,7 @@ struct iphdr { - __be32 daddr; - ); - /*The options start here. */ --}; -+} __attribute__((packed, aligned(2))); - - - struct ip_auth_hdr { ---- a/include/uapi/linux/ipv6.h -+++ b/include/uapi/linux/ipv6.h -@@ -135,7 +135,7 @@ struct ipv6hdr { - struct in6_addr saddr; - struct in6_addr daddr; - ); --}; -+} __attribute__((packed, aligned(2))); - - - /* index values for the variables in ipv6_devconf */ ---- a/include/uapi/linux/tcp.h -+++ b/include/uapi/linux/tcp.h -@@ -55,7 +55,7 @@ struct tcphdr { - __be16 window; - __sum16 check; - __be16 urg_ptr; --}; -+} __attribute__((packed, aligned(2))); - - /* - * The union cast uses a gcc extension to avoid aliasing problems -@@ -65,7 +65,7 @@ struct tcphdr { - union tcp_word_hdr { - struct tcphdr hdr; - __be32 words[5]; --}; -+} __attribute__((packed, aligned(2))); - - #define tcp_flag_word(tp) ( ((union tcp_word_hdr *)(tp))->words [3]) - ---- a/include/uapi/linux/udp.h -+++ b/include/uapi/linux/udp.h -@@ -25,7 +25,7 @@ struct udphdr { - __be16 dest; - __be16 len; - __sum16 check; --}; -+} __attribute__((packed, aligned(2))); - - /* UDP socket options */ - #define UDP_CORK 1 /* Never send partially complete segments */ ---- a/net/netfilter/nf_conntrack_core.c -+++ b/net/netfilter/nf_conntrack_core.c -@@ -271,8 +271,8 @@ nf_ct_get_tuple(const struct sk_buff *sk - - switch (l3num) { - case NFPROTO_IPV4: -- tuple->src.u3.ip = ap[0]; -- tuple->dst.u3.ip = ap[1]; -+ tuple->src.u3.ip = net_hdr_word(ap++); -+ tuple->dst.u3.ip = net_hdr_word(ap); - break; - case NFPROTO_IPV6: - memcpy(tuple->src.u3.ip6, ap, sizeof(tuple->src.u3.ip6)); ---- a/include/uapi/linux/icmp.h -+++ b/include/uapi/linux/icmp.h -@@ -83,7 +83,7 @@ struct icmphdr { - } frag; - __u8 reserved[4]; - } un; --}; -+} __attribute__((packed, aligned(2))); - - - /* ---- a/include/uapi/linux/in6.h -+++ b/include/uapi/linux/in6.h -@@ -43,7 +43,7 @@ struct in6_addr { - #define s6_addr16 in6_u.u6_addr16 - #define s6_addr32 in6_u.u6_addr32 - #endif --}; -+} __attribute__((packed, aligned(2))); - #endif /* __UAPI_DEF_IN6_ADDR */ - - #if __UAPI_DEF_SOCKADDR_IN6 ---- a/net/ipv6/tcp_ipv6.c -+++ b/net/ipv6/tcp_ipv6.c -@@ -35,6 +35,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -929,10 +930,10 @@ static void tcp_v6_send_response(const s - topt = (__be32 *)(t1 + 1); - - if (tsecr) { -- *topt++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -- (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP); -- *topt++ = htonl(tsval); -- *topt++ = htonl(tsecr); -+ put_unaligned_be32((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP, topt++); -+ put_unaligned_be32(tsval, topt++); -+ put_unaligned_be32(tsecr, topt++); - } - - #ifdef CONFIG_TCP_MD5SIG ---- a/net/ipv6/datagram.c -+++ b/net/ipv6/datagram.c -@@ -492,7 +492,7 @@ int ipv6_recv_error(struct sock *sk, str - ipv6_iface_scope_id(&sin->sin6_addr, - IP6CB(skb)->iif); - } else { -- ipv6_addr_set_v4mapped(*(__be32 *)(nh + serr->addr_offset), -+ ipv6_addr_set_v4mapped(net_hdr_word(nh + serr->addr_offset), - &sin->sin6_addr); - sin->sin6_scope_id = 0; - } -@@ -846,12 +846,12 @@ int ip6_datagram_send_ctl(struct net *ne - } - - if (fl6->flowlabel&IPV6_FLOWINFO_MASK) { -- if ((fl6->flowlabel^*(__be32 *)CMSG_DATA(cmsg))&~IPV6_FLOWINFO_MASK) { -+ if ((fl6->flowlabel^net_hdr_word(CMSG_DATA(cmsg)))&~IPV6_FLOWINFO_MASK) { - err = -EINVAL; - goto exit_f; - } - } -- fl6->flowlabel = IPV6_FLOWINFO_MASK & *(__be32 *)CMSG_DATA(cmsg); -+ fl6->flowlabel = IPV6_FLOWINFO_MASK & net_hdr_word(CMSG_DATA(cmsg)); - break; - - case IPV6_2292HOPOPTS: ---- a/net/ipv6/exthdrs.c -+++ b/net/ipv6/exthdrs.c -@@ -941,7 +941,7 @@ static bool ipv6_hop_jumbo(struct sk_buf - goto drop; - } - -- pkt_len = ntohl(*(__be32 *)(nh + optoff + 2)); -+ pkt_len = ntohl(net_hdr_word(nh + optoff + 2)); - if (pkt_len <= IPV6_MAXPLEN) { - __IP6_INC_STATS(net, idev, IPSTATS_MIB_INHDRERRORS); - icmpv6_param_prob(skb, ICMPV6_HDR_FIELD, optoff+2); ---- a/include/linux/types.h -+++ b/include/linux/types.h -@@ -227,5 +227,11 @@ typedef void (*swap_func_t)(void *a, voi - typedef int (*cmp_r_func_t)(const void *a, const void *b, const void *priv); - typedef int (*cmp_func_t)(const void *a, const void *b); - -+struct net_hdr_word { -+ u32 words[1]; -+} __attribute__((packed, aligned(2))); -+ -+#define net_hdr_word(_p) (((struct net_hdr_word *) (_p))->words[0]) -+ - #endif /* __ASSEMBLY__ */ - #endif /* _LINUX_TYPES_H */ ---- a/net/ipv4/af_inet.c -+++ b/net/ipv4/af_inet.c -@@ -1483,8 +1483,8 @@ struct sk_buff *inet_gro_receive(struct - if (unlikely(ip_fast_csum((u8 *)iph, 5))) - goto out_unlock; - -- id = ntohl(*(__be32 *)&iph->id); -- flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id & ~IP_DF)); -+ id = ntohl(net_hdr_word(&iph->id)); -+ flush = (u16)((ntohl(net_hdr_word(iph)) ^ skb_gro_len(skb)) | (id & ~IP_DF)); - id >>= 16; - - list_for_each_entry(p, head, list) { ---- a/net/ipv4/tcp_output.c -+++ b/net/ipv4/tcp_output.c -@@ -608,48 +608,53 @@ static void tcp_options_write(__be32 *pt - u16 options = opts->options; /* mungable copy */ - - if (unlikely(OPTION_MD5 & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -- (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); - /* overload cookie hash location */ - opts->hash_location = (__u8 *)ptr; - ptr += 4; - } - - if (unlikely(opts->mss)) { -- *ptr++ = htonl((TCPOPT_MSS << 24) | -- (TCPOLEN_MSS << 16) | -- opts->mss); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_MSS << 24) | (TCPOLEN_MSS << 16) | -+ opts->mss); - } - - if (likely(OPTION_TS & options)) { - if (unlikely(OPTION_SACK_ADVERTISE & options)) { -- *ptr++ = htonl((TCPOPT_SACK_PERM << 24) | -- (TCPOLEN_SACK_PERM << 16) | -- (TCPOPT_TIMESTAMP << 8) | -- TCPOLEN_TIMESTAMP); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_SACK_PERM << 24) | -+ (TCPOLEN_SACK_PERM << 16) | -+ (TCPOPT_TIMESTAMP << 8) | -+ TCPOLEN_TIMESTAMP); - options &= ~OPTION_SACK_ADVERTISE; - } else { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_TIMESTAMP << 8) | -- TCPOLEN_TIMESTAMP); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | -+ TCPOLEN_TIMESTAMP); - } -- *ptr++ = htonl(opts->tsval); -- *ptr++ = htonl(opts->tsecr); -+ net_hdr_word(ptr++) = htonl(opts->tsval); -+ net_hdr_word(ptr++) = htonl(opts->tsecr); - } - - if (unlikely(OPTION_SACK_ADVERTISE & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_SACK_PERM << 8) | -- TCPOLEN_SACK_PERM); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_SACK_PERM << 8) | -+ TCPOLEN_SACK_PERM); - } - - if (unlikely(OPTION_WSCALE & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_WINDOW << 16) | -- (TCPOLEN_WINDOW << 8) | -- opts->ws); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_WINDOW << 16) | -+ (TCPOLEN_WINDOW << 8) | -+ opts->ws); - } - - if (unlikely(opts->num_sack_blocks)) { -@@ -657,16 +662,17 @@ static void tcp_options_write(__be32 *pt - tp->duplicate_sack : tp->selective_acks; - int this_sack; - -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_SACK << 8) | -- (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_SACK << 8) | -+ (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * - TCPOLEN_SACK_PERBLOCK))); - - for (this_sack = 0; this_sack < opts->num_sack_blocks; - ++this_sack) { -- *ptr++ = htonl(sp[this_sack].start_seq); -- *ptr++ = htonl(sp[this_sack].end_seq); -+ net_hdr_word(ptr++) = htonl(sp[this_sack].start_seq); -+ net_hdr_word(ptr++) = htonl(sp[this_sack].end_seq); - } - - tp->rx_opt.dsack = 0; -@@ -679,13 +685,14 @@ static void tcp_options_write(__be32 *pt - - if (foc->exp) { - len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len; -- *ptr = htonl((TCPOPT_EXP << 24) | (len << 16) | -+ net_hdr_word(ptr) = -+ htonl((TCPOPT_EXP << 24) | (len << 16) | - TCPOPT_FASTOPEN_MAGIC); - p += TCPOLEN_EXP_FASTOPEN_BASE; - } else { - len = TCPOLEN_FASTOPEN_BASE + foc->len; -- *p++ = TCPOPT_FASTOPEN; -- *p++ = len; -+ net_hdr_word(p++) = TCPOPT_FASTOPEN; -+ net_hdr_word(p++) = len; - } - - memcpy(p, foc->val, foc->len); ---- a/include/uapi/linux/igmp.h -+++ b/include/uapi/linux/igmp.h -@@ -33,7 +33,7 @@ struct igmphdr { - __u8 code; /* For newer IGMP */ - __sum16 csum; - __be32 group; --}; -+} __attribute__((packed, aligned(2))); - - /* V3 group record types [grec_type] */ - #define IGMPV3_MODE_IS_INCLUDE 1 -@@ -49,7 +49,7 @@ struct igmpv3_grec { - __be16 grec_nsrcs; - __be32 grec_mca; - __be32 grec_src[0]; --}; -+} __attribute__((packed, aligned(2))); - - struct igmpv3_report { - __u8 type; -@@ -58,7 +58,7 @@ struct igmpv3_report { - __be16 resv2; - __be16 ngrec; - struct igmpv3_grec grec[0]; --}; -+} __attribute__((packed, aligned(2))); - - struct igmpv3_query { - __u8 type; -@@ -79,7 +79,7 @@ struct igmpv3_query { - __u8 qqic; - __be16 nsrcs; - __be32 srcs[0]; --}; -+} __attribute__((packed, aligned(2))); - - #define IGMP_HOST_MEMBERSHIP_QUERY 0x11 /* From RFC1112 */ - #define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */ ---- a/net/core/flow_dissector.c -+++ b/net/core/flow_dissector.c -@@ -128,7 +128,7 @@ __be32 __skb_flow_get_ports(const struct - ports = __skb_header_pointer(skb, thoff + poff, - sizeof(_ports), data, hlen, &_ports); - if (ports) -- return *ports; -+ return (__be32)net_hdr_word(ports); - } - - return 0; ---- a/include/uapi/linux/icmpv6.h -+++ b/include/uapi/linux/icmpv6.h -@@ -78,7 +78,7 @@ struct icmp6hdr { - #define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other - #define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime - #define icmp6_router_pref icmp6_dataun.u_nd_ra.router_pref --}; -+} __attribute__((packed, aligned(2))); - - - #define ICMPV6_ROUTER_PREF_LOW 0x3 ---- a/include/net/ndisc.h -+++ b/include/net/ndisc.h -@@ -93,7 +93,7 @@ struct ra_msg { - struct icmp6hdr icmph; - __be32 reachable_time; - __be32 retrans_timer; --}; -+} __attribute__((packed, aligned(2))); - - struct rd_msg { - struct icmp6hdr icmph; -@@ -372,10 +372,10 @@ static inline u32 ndisc_hashfn(const voi - { - const u32 *p32 = pkey; - -- return (((p32[0] ^ hash32_ptr(dev)) * hash_rnd[0]) + -- (p32[1] * hash_rnd[1]) + -- (p32[2] * hash_rnd[2]) + -- (p32[3] * hash_rnd[3])); -+ return (((net_hdr_word(&p32[0]) ^ hash32_ptr(dev)) * hash_rnd[0]) + -+ (net_hdr_word(&p32[1]) * hash_rnd[1]) + -+ (net_hdr_word(&p32[2]) * hash_rnd[2]) + -+ (net_hdr_word(&p32[3]) * hash_rnd[3])); - } - - static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey) ---- a/net/sched/cls_u32.c -+++ b/net/sched/cls_u32.c -@@ -155,7 +155,7 @@ next_knode: - data = skb_header_pointer(skb, toff, 4, &hdata); - if (!data) - goto out; -- if ((*data ^ key->val) & key->mask) { -+ if ((net_hdr_word(data) ^ key->val) & key->mask) { - n = rcu_dereference_bh(n->next); - goto next_knode; - } -@@ -206,8 +206,8 @@ check_terminal: - &hdata); - if (!data) - goto out; -- sel = ht->divisor & u32_hash_fold(*data, &n->sel, -- n->fshift); -+ sel = ht->divisor & u32_hash_fold(net_hdr_word(data), -+ &n->sel, n->fshift); - } - if (!(n->sel.flags & (TC_U32_VAROFFSET | TC_U32_OFFSET | TC_U32_EAT))) - goto next_ht; ---- a/net/ipv6/ip6_offload.c -+++ b/net/ipv6/ip6_offload.c -@@ -240,7 +240,7 @@ INDIRECT_CALLABLE_SCOPE struct sk_buff * - continue; - - iph2 = (struct ipv6hdr *)(p->data + off); -- first_word = *(__be32 *)iph ^ *(__be32 *)iph2; -+ first_word = net_hdr_word(iph) ^ net_hdr_word(iph2); - - /* All fields must match except length and Traffic Class. - * XXX skbs on the gro_list have all been parsed and pulled ---- a/include/net/addrconf.h -+++ b/include/net/addrconf.h -@@ -52,7 +52,7 @@ struct prefix_info { - __be32 reserved2; - - struct in6_addr prefix; --}; -+} __attribute__((packed, aligned(2))); - - /* rfc4861 4.6.2: IPv6 PIO is 32 bytes in size */ - static_assert(sizeof(struct prefix_info) == 32); ---- a/include/net/inet_ecn.h -+++ b/include/net/inet_ecn.h -@@ -140,9 +140,9 @@ static inline int IP6_ECN_set_ce(struct - if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph))) - return 0; - -- from = *(__be32 *)iph; -+ from = net_hdr_word(iph); - to = from | htonl(INET_ECN_CE << 20); -- *(__be32 *)iph = to; -+ net_hdr_word(iph) = to; - if (skb->ip_summed == CHECKSUM_COMPLETE) - skb->csum = csum_add(csum_sub(skb->csum, (__force __wsum)from), - (__force __wsum)to); ---- a/include/net/ipv6.h -+++ b/include/net/ipv6.h -@@ -146,7 +146,7 @@ struct frag_hdr { - __u8 reserved; - __be16 frag_off; - __be32 identification; --}; -+} __attribute__((packed, aligned(2))); - - #define IP6_MF 0x0001 - #define IP6_OFFSET 0xFFF8 -@@ -560,8 +560,8 @@ static inline void __ipv6_addr_set_half( - } - #endif - #endif -- addr[0] = wh; -- addr[1] = wl; -+ net_hdr_word(&addr[0]) = wh; -+ net_hdr_word(&addr[1]) = wl; - } - - static inline void ipv6_addr_set(struct in6_addr *addr, -@@ -620,6 +620,8 @@ static inline bool ipv6_prefix_equal(con - const __be32 *a1 = addr1->s6_addr32; - const __be32 *a2 = addr2->s6_addr32; - unsigned int pdw, pbi; -+ /* Used for last <32-bit fraction of prefix */ -+ u32 pbia1, pbia2; - - /* check complete u32 in prefix */ - pdw = prefixlen >> 5; -@@ -628,7 +630,9 @@ static inline bool ipv6_prefix_equal(con - - /* check incomplete u32 in prefix */ - pbi = prefixlen & 0x1f; -- if (pbi && ((a1[pdw] ^ a2[pdw]) & htonl((0xffffffff) << (32 - pbi)))) -+ pbia1 = net_hdr_word(&a1[pdw]); -+ pbia2 = net_hdr_word(&a2[pdw]); -+ if (pbi && ((pbia1 ^ pbia2) & htonl((0xffffffff) << (32 - pbi)))) - return false; - - return true; -@@ -745,13 +749,13 @@ static inline void ipv6_addr_set_v4mappe - */ - static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen) - { -- const __be32 *a1 = token1, *a2 = token2; -+ const struct in6_addr *a1 = token1, *a2 = token2; - int i; - - addrlen >>= 2; - - for (i = 0; i < addrlen; i++) { -- __be32 xb = a1[i] ^ a2[i]; -+ __be32 xb = a1->s6_addr32[i] ^ a2->s6_addr32[i]; - if (xb) - return i * 32 + 31 - __fls(ntohl(xb)); - } -@@ -937,17 +941,18 @@ static inline int ip6_multipath_hash_pol - static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass, - __be32 flowlabel) - { -- *(__be32 *)hdr = htonl(0x60000000 | (tclass << 20)) | flowlabel; -+ net_hdr_word((__be32 *)hdr) = -+ htonl(0x60000000 | (tclass << 20)) | flowlabel; - } - - static inline __be32 ip6_flowinfo(const struct ipv6hdr *hdr) - { -- return *(__be32 *)hdr & IPV6_FLOWINFO_MASK; -+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWINFO_MASK; - } - - static inline __be32 ip6_flowlabel(const struct ipv6hdr *hdr) - { -- return *(__be32 *)hdr & IPV6_FLOWLABEL_MASK; -+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWLABEL_MASK; - } - - static inline u8 ip6_tclass(__be32 flowinfo) ---- a/include/net/secure_seq.h -+++ b/include/net/secure_seq.h -@@ -3,6 +3,7 @@ - #define _NET_SECURE_SEQ - - #include -+#include - - u64 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); - u64 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, ---- a/include/uapi/linux/in.h -+++ b/include/uapi/linux/in.h -@@ -88,7 +88,7 @@ enum { - /* Internet address. */ - struct in_addr { - __be32 s_addr; --}; -+} __attribute__((packed, aligned(2))); - #endif - - #define IP_TOS 1 ---- a/net/ipv6/ip6_fib.c -+++ b/net/ipv6/ip6_fib.c -@@ -140,7 +140,7 @@ static __be32 addr_bit_set(const void *t - * See include/asm-generic/bitops/le.h. - */ - return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) & -- addr[fn_bit >> 5]; -+ net_hdr_word(&addr[fn_bit >> 5]); - } - - struct fib6_info *fib6_info_alloc(gfp_t gfp_flags, bool with_fib6_nh) ---- a/net/netfilter/nf_conntrack_proto_tcp.c -+++ b/net/netfilter/nf_conntrack_proto_tcp.c -@@ -423,7 +423,7 @@ static void tcp_sack(const struct sk_buf - - /* Fast path for timestamp-only option */ - if (length == TCPOLEN_TSTAMP_ALIGNED -- && *(__be32 *)ptr == htonl((TCPOPT_NOP << 24) -+ && net_hdr_word(ptr) == htonl((TCPOPT_NOP << 24) - | (TCPOPT_NOP << 16) - | (TCPOPT_TIMESTAMP << 8) - | TCPOLEN_TIMESTAMP)) ---- a/net/xfrm/xfrm_input.c -+++ b/net/xfrm/xfrm_input.c -@@ -166,8 +166,8 @@ int xfrm_parse_spi(struct sk_buff *skb, - if (!pskb_may_pull(skb, hlen)) - return -EINVAL; - -- *spi = *(__be32 *)(skb_transport_header(skb) + offset); -- *seq = *(__be32 *)(skb_transport_header(skb) + offset_seq); -+ *spi = net_hdr_word(skb_transport_header(skb) + offset); -+ *seq = net_hdr_word(skb_transport_header(skb) + offset_seq); - return 0; - } - EXPORT_SYMBOL(xfrm_parse_spi); ---- a/net/ipv4/tcp_input.c -+++ b/net/ipv4/tcp_input.c -@@ -4151,14 +4151,16 @@ static bool tcp_parse_aligned_timestamp( - { - const __be32 *ptr = (const __be32 *)(th + 1); - -- if (*ptr == htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) -- | (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { -+ if (net_hdr_word(ptr) == -+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { - tp->rx_opt.saw_tstamp = 1; - ++ptr; -- tp->rx_opt.rcv_tsval = ntohl(*ptr); -+ tp->rx_opt.rcv_tsval = get_unaligned_be32(ptr); - ++ptr; -- if (*ptr) -- tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset; -+ if (net_hdr_word(ptr)) -+ tp->rx_opt.rcv_tsecr = get_unaligned_be32(ptr) - -+ tp->tsoffset; - else - tp->rx_opt.rcv_tsecr = 0; - return true; ---- a/include/uapi/linux/if_pppox.h -+++ b/include/uapi/linux/if_pppox.h -@@ -51,6 +51,7 @@ struct pppoe_addr { - */ - struct pptp_addr { - __u16 call_id; -+ __u16 pad; - struct in_addr sin_addr; - }; - ---- a/net/ipv6/netfilter/nf_log_ipv6.c -+++ b/net/ipv6/netfilter/nf_log_ipv6.c -@@ -63,9 +63,9 @@ static void dump_ipv6_packet(struct net - /* Max length: 44 "LEN=65535 TC=255 HOPLIMIT=255 FLOWLBL=FFFFF " */ - nf_log_buf_add(m, "LEN=%zu TC=%u HOPLIMIT=%u FLOWLBL=%u ", - ntohs(ih->payload_len) + sizeof(struct ipv6hdr), -- (ntohl(*(__be32 *)ih) & 0x0ff00000) >> 20, -+ (ntohl(net_hdr_word(ih)) & 0x0ff00000) >> 20, - ih->hop_limit, -- (ntohl(*(__be32 *)ih) & 0x000fffff)); -+ (ntohl(net_hdr_word(ih)) & 0x000fffff)); - - fragment = 0; - ptr = ip6hoff + sizeof(struct ipv6hdr); ---- a/include/net/neighbour.h -+++ b/include/net/neighbour.h -@@ -270,8 +270,10 @@ static inline bool neigh_key_eq128(const - const u32 *n32 = (const u32 *)n->primary_key; - const u32 *p32 = pkey; - -- return ((n32[0] ^ p32[0]) | (n32[1] ^ p32[1]) | -- (n32[2] ^ p32[2]) | (n32[3] ^ p32[3])) == 0; -+ return ((n32[0] ^ net_hdr_word(&p32[0])) | -+ (n32[1] ^ net_hdr_word(&p32[1])) | -+ (n32[2] ^ net_hdr_word(&p32[2])) | -+ (n32[3] ^ net_hdr_word(&p32[3]))) == 0; - } - - static inline struct neighbour *___neigh_lookup_noref( ---- a/include/uapi/linux/netfilter_arp/arp_tables.h -+++ b/include/uapi/linux/netfilter_arp/arp_tables.h -@@ -70,7 +70,7 @@ struct arpt_arp { - __u8 flags; - /* Inverse flags */ - __u16 invflags; --}; -+} __attribute__((aligned(4))); - - /* Values for "flag" field in struct arpt_ip (general arp structure). - * No flags defined yet. ---- a/net/core/utils.c -+++ b/net/core/utils.c -@@ -460,8 +460,14 @@ void inet_proto_csum_replace16(__sum16 * - bool pseudohdr) - { - __be32 diff[] = { -- ~from[0], ~from[1], ~from[2], ~from[3], -- to[0], to[1], to[2], to[3], -+ ~net_hdr_word(&from[0]), -+ ~net_hdr_word(&from[1]), -+ ~net_hdr_word(&from[2]), -+ ~net_hdr_word(&from[3]), -+ net_hdr_word(&to[0]), -+ net_hdr_word(&to[1]), -+ net_hdr_word(&to[2]), -+ net_hdr_word(&to[3]), - }; - if (skb->ip_summed != CHECKSUM_PARTIAL) { - *sum = csum_fold(csum_partial(diff, sizeof(diff), ---- a/include/linux/etherdevice.h -+++ b/include/linux/etherdevice.h -@@ -525,7 +525,7 @@ static inline bool is_etherdev_addr(cons - * @b: Pointer to Ethernet header - * - * Compare two Ethernet headers, returns 0 if equal. -- * This assumes that the network header (i.e., IP header) is 4-byte -+ * This assumes that the network header (i.e., IP header) is 2-byte - * aligned OR the platform can handle unaligned access. This is the - * case for all packets coming into netif_receive_skb or similar - * entry points. -@@ -548,11 +548,12 @@ static inline unsigned long compare_ethe - fold |= *(unsigned long *)(a + 6) ^ *(unsigned long *)(b + 6); - return fold; - #else -- u32 *a32 = (u32 *)((u8 *)a + 2); -- u32 *b32 = (u32 *)((u8 *)b + 2); -+ const u16 *a16 = a; -+ const u16 *b16 = b; - -- return (*(u16 *)a ^ *(u16 *)b) | (a32[0] ^ b32[0]) | -- (a32[1] ^ b32[1]) | (a32[2] ^ b32[2]); -+ return (a16[0] ^ b16[0]) | (a16[1] ^ b16[1]) | (a16[2] ^ b16[2]) | -+ (a16[3] ^ b16[3]) | (a16[4] ^ b16[4]) | (a16[5] ^ b16[5]) | -+ (a16[6] ^ b16[6]); - #endif - } - ---- a/net/ipv4/tcp_offload.c -+++ b/net/ipv4/tcp_offload.c -@@ -223,7 +223,7 @@ struct sk_buff *tcp_gro_receive(struct l - - th2 = tcp_hdr(p); - -- if (*(u32 *)&th->source ^ *(u32 *)&th2->source) { -+ if (net_hdr_word(&th->source) ^ net_hdr_word(&th2->source)) { - NAPI_GRO_CB(p)->same_flow = 0; - continue; - } -@@ -241,8 +241,8 @@ found: - ~(TCP_FLAG_CWR | TCP_FLAG_FIN | TCP_FLAG_PSH)); - flush |= (__force int)(th->ack_seq ^ th2->ack_seq); - for (i = sizeof(*th); i < thlen; i += 4) -- flush |= *(u32 *)((u8 *)th + i) ^ -- *(u32 *)((u8 *)th2 + i); -+ flush |= net_hdr_word((u8 *)th + i) ^ -+ net_hdr_word((u8 *)th2 + i); - - /* When we receive our second frame we can made a decision on if we - * continue this flow as an atomic flow with a fixed ID or if we use ---- a/net/ipv6/netfilter/ip6table_mangle.c -+++ b/net/ipv6/netfilter/ip6table_mangle.c -@@ -47,7 +47,7 @@ ip6t_mangle_out(struct sk_buff *skb, con - hop_limit = ipv6_hdr(skb)->hop_limit; - - /* flowlabel and prio (includes version, which shouldn't change either */ -- flowlabel = *((u_int32_t *)ipv6_hdr(skb)); -+ flowlabel = net_hdr_word(ipv6_hdr(skb)); - - ret = ip6t_do_table(skb, state, state->net->ipv6.ip6table_mangle); - -@@ -56,7 +56,7 @@ ip6t_mangle_out(struct sk_buff *skb, con - !ipv6_addr_equal(&ipv6_hdr(skb)->daddr, &daddr) || - skb->mark != mark || - ipv6_hdr(skb)->hop_limit != hop_limit || -- flowlabel != *((u_int32_t *)ipv6_hdr(skb)))) { -+ flowlabel != net_hdr_word(ipv6_hdr(skb)))) { - err = ip6_route_me_harder(state->net, state->sk, skb); - if (err < 0) - ret = NF_DROP_ERR(err); diff --git a/lede/target/linux/ath79/patches-5.10/920-mikrotik-rb4xx.patch b/lede/target/linux/ath79/patches-5.10/920-mikrotik-rb4xx.patch deleted file mode 100644 index d0ab5f18ae..0000000000 --- a/lede/target/linux/ath79/patches-5.10/920-mikrotik-rb4xx.patch +++ /dev/null @@ -1,76 +0,0 @@ ---- a/drivers/mfd/Kconfig -+++ b/drivers/mfd/Kconfig -@@ -2143,6 +2143,14 @@ config RAVE_SP_CORE - Select this to get support for the Supervisory Processor - device found on several devices in RAVE line of hardware. - -+config MFD_RB4XX_CPLD -+ tristate "CPLD driver for Mikrotik RB4xx series boards" -+ select MFD_CORE -+ depends on ATH79 || COMPILE_TEST -+ help -+ Enables support for the CPLD chip (NAND & GPIO) on Mikrotik -+ Routerboard RB4xx series. -+ - config SGI_MFD_IOC3 - tristate "SGI IOC3 core driver" - depends on PCI && MIPS && 64BIT ---- a/drivers/mfd/Makefile -+++ b/drivers/mfd/Makefile -@@ -264,6 +264,7 @@ obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-b - obj-$(CONFIG_MFD_STMFX) += stmfx.o - obj-$(CONFIG_MFD_KHADAS_MCU) += khadas-mcu.o - -+obj-$(CONFIG_MFD_RB4XX_CPLD) += rb4xx-cpld.o - obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o - obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o - obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -1520,6 +1520,12 @@ config GPIO_SODAVILLE - help - Say Y here to support Intel Sodaville GPIO. - -+config GPIO_RB4XX -+ tristate "GPIO expander for Mikrotik RB4xx series boards" -+ depends on MFD_RB4XX_CPLD -+ help -+ GPIO driver for Mikrotik Routerboard RB4xx series. -+ - endmenu - - menu "SPI GPIO expanders" ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -120,6 +120,7 @@ obj-$(CONFIG_GPIO_PL061) += gpio-pl061. - obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o - obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o - obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o -+obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o - obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o - obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o - obj-$(CONFIG_GPIO_RDA) += gpio-rda.o ---- a/drivers/mtd/nand/raw/Kconfig -+++ b/drivers/mtd/nand/raw/Kconfig -@@ -564,4 +564,11 @@ config MTD_NAND_AR934X - Enables support for NAND controller on Qualcomm Atheros SoCs. - This controller is found on AR934x and QCA955x SoCs. - -+config MTD_NAND_RB4XX -+ tristate "Support for NAND driver for Mikrotik RB4xx series boards" -+ depends on MFD_RB4XX_CPLD -+ help -+ Enables support for the NAND flash chip on Mikrotik Routerboard -+ RB4xx series. -+ - endif # MTD_RAW_NAND ---- a/drivers/mtd/nand/raw/Makefile -+++ b/drivers/mtd/nand/raw/Makefile -@@ -59,6 +59,7 @@ obj-$(CONFIG_MTD_NAND_MESON) += meson_n - obj-$(CONFIG_MTD_NAND_CADENCE) += cadence-nand-controller.o - obj-$(CONFIG_MTD_NAND_ARASAN) += arasan-nand-controller.o - obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o -+obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o - - nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o - nand-objs += nand_onfi.o diff --git a/lede/target/linux/ath79/patches-5.10/930-ar8216-make-reg-access-atomic.patch b/lede/target/linux/ath79/patches-5.10/930-ar8216-make-reg-access-atomic.patch deleted file mode 100644 index 02f763534e..0000000000 --- a/lede/target/linux/ath79/patches-5.10/930-ar8216-make-reg-access-atomic.patch +++ /dev/null @@ -1,59 +0,0 @@ -From b3797d1a92afe97c173b00fdb7824cedba24eef0 Mon Sep 17 00:00:00 2001 -From: Chuanhong Guo -Date: Sun, 20 Sep 2020 01:00:45 +0800 -Subject: [PATCH] ath79: ar8216: make switch register access atomic - -due to some unknown reason these register accesses sometimes fail -on the integrated switch without this patch. - -THIS ONLY WORKS ON ATH79 AND MAY BREAK THE DRIVER ON OTHER PLATFORMS! -The mdio bus on ath79 works in polling mode and doesn't rely on -any interrupt. This patch breaks the driver on any mdio master -with interrupts used. - ---- ---- a/drivers/net/phy/ar8216.c -+++ b/drivers/net/phy/ar8216.c -@@ -252,6 +252,7 @@ ar8xxx_mii_write32(struct ar8xxx_priv *p - u32 - ar8xxx_read(struct ar8xxx_priv *priv, int reg) - { -+ unsigned long flags; - struct mii_bus *bus = priv->mii_bus; - u16 r1, r2, page; - u32 val; -@@ -259,11 +260,13 @@ ar8xxx_read(struct ar8xxx_priv *priv, in - split_addr((u32) reg, &r1, &r2, &page); - - mutex_lock(&bus->mdio_lock); -+ local_irq_save(flags); - - bus->write(bus, 0x18, 0, page); - wait_for_page_switch(); - val = ar8xxx_mii_read32(priv, 0x10 | r2, r1); - -+ local_irq_restore(flags); - mutex_unlock(&bus->mdio_lock); - - return val; -@@ -272,17 +275,20 @@ ar8xxx_read(struct ar8xxx_priv *priv, in - void - ar8xxx_write(struct ar8xxx_priv *priv, int reg, u32 val) - { -+ unsigned long flags; - struct mii_bus *bus = priv->mii_bus; - u16 r1, r2, page; - - split_addr((u32) reg, &r1, &r2, &page); - - mutex_lock(&bus->mdio_lock); -+ local_irq_save(flags); - - bus->write(bus, 0x18, 0, page); - wait_for_page_switch(); - ar8xxx_mii_write32(priv, 0x10 | r2, r1, val); - -+ local_irq_restore(flags); - mutex_unlock(&bus->mdio_lock); - } - diff --git a/lede/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch b/lede/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch deleted file mode 100644 index 4f4344b40f..0000000000 --- a/lede/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch +++ /dev/null @@ -1,68 +0,0 @@ ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -341,6 +341,13 @@ config GPIO_IXP4XX - IXP4xx series of chips. - - If unsure, say N. -+ -+config GPIO_LATCH -+ tristate "MikroTik RouterBOARD GPIO latch support" -+ depends on ATH79 -+ help -+ GPIO driver for latch on some MikroTik RouterBOARDs. -+ - config GPIO_LOGICVC - tristate "Xylon LogiCVC GPIO support" - depends on MFD_SYSCON && OF -@@ -495,6 +502,10 @@ config GPIO_REG - A 32-bit single register GPIO fixed in/out implementation. This - can be used to represent any register as a set of GPIO signals. - -+config GPIO_RB91X_KEY -+ tristate "MikroTik RB91x board series reset key support" -+ depends on ATH79 -+ - config GPIO_SAMA5D2_PIOBU - tristate "SAMA5D2 PIOBU GPIO support" - depends on MFD_SYSCON ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -72,6 +72,7 @@ obj-$(CONFIG_GPIO_IT87) += gpio-it87.o - obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o - obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o - obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o -+obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o - obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o - obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o - obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o -@@ -121,6 +122,7 @@ obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio - obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o - obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o - obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o -+obj-$(CONFIG_GPIO_RB91X_KEY) += gpio-rb91x-key.o - obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o - obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o - obj-$(CONFIG_GPIO_RDA) += gpio-rda.o ---- a/drivers/mtd/nand/raw/Kconfig -+++ b/drivers/mtd/nand/raw/Kconfig -@@ -571,4 +571,10 @@ config MTD_NAND_RB4XX - Enables support for the NAND flash chip on Mikrotik Routerboard - RB4xx series. - -+config MTD_NAND_RB91X -+ tristate "MikroTik RB91x NAND driver support" -+ depends on ATH79 && MTD_RAW_NAND -+ help -+ Enables support for the NAND flash chip on MikroTik RB91x series. -+ - endif # MTD_RAW_NAND ---- a/drivers/mtd/nand/raw/Makefile -+++ b/drivers/mtd/nand/raw/Makefile -@@ -60,6 +60,7 @@ obj-$(CONFIG_MTD_NAND_CADENCE) += caden - obj-$(CONFIG_MTD_NAND_ARASAN) += arasan-nand-controller.o - obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o - obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o -+obj-$(CONFIG_MTD_NAND_RB91X) += rb91x_nand.o - - nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o - nand-objs += nand_onfi.o diff --git a/lede/target/linux/ath79/patches-5.10/940-ath79-add-support-for-booting-QCN550x.patch b/lede/target/linux/ath79/patches-5.10/940-ath79-add-support-for-booting-QCN550x.patch deleted file mode 100644 index cf77433634..0000000000 --- a/lede/target/linux/ath79/patches-5.10/940-ath79-add-support-for-booting-QCN550x.patch +++ /dev/null @@ -1,48 +0,0 @@ -From: Wenli Looi -Date: Sun, 20 Jun 2021 23:32:28 -0700 -Subject: [PATCH] ath79: add support for booting QCN550x - -Based on wikidevi, QCN550x is a "Dragonfly" like QCA9561 and QCA9563. -Treating it as QCA956x seems to work. -Tested on Netgear EX7300v2 which boots successfully with -the same CPU clock as the stock firmware. - -Link: https://wikidevi.wi-cat.ru/Qualcomm#bgn -Link: https://wikidevi.wi-cat.ru/Qualcomm_Atheros#.28a.29bgn_2 -Signed-off-by: Wenli Looi - ---- a/arch/mips/ath79/early_printk.c -+++ b/arch/mips/ath79/early_printk.c -@@ -121,6 +121,7 @@ static void prom_putchar_init(void) - case REV_ID_MAJOR_QCA9558: - case REV_ID_MAJOR_TP9343: - case REV_ID_MAJOR_QCA956X: -+ case REV_ID_MAJOR_QCN550X: - _prom_putchar = prom_putchar_ar71xx; - break; - ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -168,6 +168,12 @@ static void __init ath79_detect_sys_type - rev = id & QCA956X_REV_ID_REVISION_MASK; - break; - -+ case REV_ID_MAJOR_QCN550X: -+ ath79_soc = ATH79_SOC_QCA956X; -+ chip = "550X"; -+ rev = id & QCA956X_REV_ID_REVISION_MASK; -+ break; -+ - case REV_ID_MAJOR_TP9343: - ath79_soc = ATH79_SOC_TP9343; - chip = "9343"; ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -867,6 +867,7 @@ - #define REV_ID_MAJOR_QCA9558 0x1130 - #define REV_ID_MAJOR_TP9343 0x0150 - #define REV_ID_MAJOR_QCA956X 0x1150 -+#define REV_ID_MAJOR_QCN550X 0x2170 - - #define AR71XX_REV_ID_MINOR_MASK 0x3 - #define AR71XX_REV_ID_MINOR_AR7130 0x0 diff --git a/lede/target/linux/ath79/tiny/config-default b/lede/target/linux/ath79/tiny/config-default index fbf08eb066..261bbb83fd 100644 --- a/lede/target/linux/ath79/tiny/config-default +++ b/lede/target/linux/ath79/tiny/config-default @@ -1,12 +1,2 @@ -CONFIG_LEDS_RESET=y CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_MV88E6060=y -# CONFIG_NET_DSA_TAG_QCA is not set -CONFIG_NET_DSA_TAG_TRAILER=y -CONFIG_NET_SWITCHDEV=y -CONFIG_PHYLINK=y -CONFIG_PHY_AR7100_USB=y -CONFIG_PHY_AR7200_USB=y CONFIG_REGULATOR_FIXED_VOLTAGE=y diff --git a/lede/target/linux/ath79/tiny/target.mk b/lede/target/linux/ath79/tiny/target.mk index 91f135b56e..fef82fdd7f 100644 --- a/lede/target/linux/ath79/tiny/target.mk +++ b/lede/target/linux/ath79/tiny/target.mk @@ -1,7 +1,7 @@ BOARDNAME:=Devices with small flash -FEATURES += small_flash +FEATURES += low_mem small_flash -DEFAULT_PACKAGES += wpad-basic-wolfssl +DEFAULT_PACKAGES += wpad-basic-mbedtls define Target/Description Build firmware images for Atheros AR71xx/AR913x/AR934x based boards with small flash diff --git a/lede/target/linux/bcm27xx/Makefile b/lede/target/linux/bcm27xx/Makefile index eccb91b199..fa9811f205 100644 --- a/lede/target/linux/bcm27xx/Makefile +++ b/lede/target/linux/bcm27xx/Makefile @@ -11,8 +11,7 @@ BOARDNAME:=Broadcom BCM27xx FEATURES:=audio boot-part display ext4 fpu gpio rootfs-part rtc squashfs usb usbgadget SUBTARGETS:=bcm2708 bcm2709 bcm2710 bcm2711 bcm2712 -KERNEL_PATCHVER:=6.6 -KERNEL_TESTING_PATCHVER:=6.12 +KERNEL_PATCHVER:=6.12 define Target/Description Build firmware image for Broadcom BCM27xx SoC devices. diff --git a/lede/target/linux/bcm27xx/base-files/etc/board.d/02_network b/lede/target/linux/bcm27xx/base-files/etc/board.d/02_network index f246139c38..e05c369d64 100644 --- a/lede/target/linux/bcm27xx/base-files/etc/board.d/02_network +++ b/lede/target/linux/bcm27xx/base-files/etc/board.d/02_network @@ -17,6 +17,8 @@ raspberrypi,3-model-b-plus |\ raspberrypi,400 |\ raspberrypi,4-compute-module |\ raspberrypi,4-model-b |\ +raspberrypi,500 |\ +raspberrypi,5-compute-module |\ raspberrypi,5-model-b |\ raspberrypi,model-b |\ raspberrypi,model-b-plus |\ diff --git a/lede/target/linux/bcm27xx/base-files/lib/preinit/05_set_preinit_iface_brcm2708 b/lede/target/linux/bcm27xx/base-files/lib/preinit/05_set_preinit_iface_brcm2708 index 120475b55d..bce75d7119 100644 --- a/lede/target/linux/bcm27xx/base-files/lib/preinit/05_set_preinit_iface_brcm2708 +++ b/lede/target/linux/bcm27xx/base-files/lib/preinit/05_set_preinit_iface_brcm2708 @@ -12,6 +12,8 @@ set_preinit_iface() { raspberrypi,400 |\ raspberrypi,4-compute-module |\ raspberrypi,4-model-b |\ + raspberrypi,500 |\ + raspberrypi,5-compute-module |\ raspberrypi,5-model-b |\ raspberrypi,model-b |\ raspberrypi,model-b-plus |\ diff --git a/lede/target/linux/bcm27xx/bcm2708/config-6.6 b/lede/target/linux/bcm27xx/bcm2708/config-6.6 deleted file mode 100644 index a8a3cc9af7..0000000000 --- a/lede/target/linux/bcm27xx/bcm2708/config-6.6 +++ /dev/null @@ -1,401 +0,0 @@ -# CONFIG_AIO is not set -CONFIG_ALIGNMENT_TRAP=y -CONFIG_APERTURE_HELPERS=y -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_BCM=y -CONFIG_ARCH_BCM2835=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_STACKWALK=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARM=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_ERRATA_411920=y -CONFIG_ARM_HAS_GROUP_RELOCS=y -CONFIG_ARM_L1_CACHE_SHIFT=5 -# CONFIG_ARM_MHU_V2 is not set -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_RASPBERRYPI_CPUFREQ=y -CONFIG_ARM_THUMB=y -CONFIG_ARM_TIMER_SP804=y -CONFIG_ARM_UNWIND=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BCM2708_VCMEM=y -# CONFIG_BCM2711_THERMAL is not set -CONFIG_BCM2835_FAST_MEMCPY=y -CONFIG_BCM2835_MBOX=y -CONFIG_BCM2835_POWER=y -# CONFIG_BCM2835_SMI is not set -CONFIG_BCM2835_THERMAL=y -CONFIG_BCM2835_TIMER=y -CONFIG_BCM2835_VCHIQ=y -# CONFIG_BCM2835_VCHIQ_MMAL is not set -CONFIG_BCM2835_WDT=y -CONFIG_BCM_VCIO=y -# CONFIG_BCM_VC_SM_CMA is not set -CONFIG_BCM_VIDEOCORE=y -CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_PM=y -CONFIG_BRCMSTB_L2_IRQ=y -CONFIG_BRCM_CHAR_DRIVERS=y -CONFIG_BUFFER_HEAD=y -# CONFIG_CACHE_L2X0 is not set -CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLK_BCM2711_DVP=y -CONFIG_CLK_BCM2835=y -CONFIG_CLK_RASPBERRYPI=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMA=y -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CMA_AREAS=7 -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=5 -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SYSFS is not set -CONFIG_COMMON_CLK=y -CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CONFIGFS_FS=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_CONTIG_ALLOC=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_ABRT_EV6=y -CONFIG_CPU_CACHE_V6=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MITIGATIONS=y -CONFIG_CPU_PABRT_V6=y -CONFIG_CPU_PM=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V6=y -CONFIG_CPU_V6K=y -CONFIG_CRC16=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y -CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CURRENT_POINTER_IN_TPIDRURO=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -CONFIG_DMABUF_HEAPS=y -CONFIG_DMABUF_HEAPS_CMA=y -CONFIG_DMABUF_HEAPS_SYSTEM=y -CONFIG_DMADEVICES=y -CONFIG_DMA_BCM2708=y -CONFIG_DMA_BCM2835=y -CONFIG_DMA_CMA=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_OPS=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DNOTIFY=y -CONFIG_DTC=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_EXT4_FS=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FB=y -CONFIG_FB_BCM2708=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CORE=y -CONFIG_FB_DEVICE=y -CONFIG_FB_IOMEM_FOPS=y -CONFIG_FB_IOMEM_HELPERS=y -CONFIG_FB_SIMPLE=y -CONFIG_FIQ=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -CONFIG_FONT_SUPPORT=y -CONFIG_FORCE_NR_CPUS=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FREEZER=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FUNCTION_ALIGNMENT=0 -CONFIG_FWNODE_MDIO=y -CONFIG_FW_CACHE=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_FW_LOADER_SYSFS=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GPIOLIB_IRQCHIP=y -# CONFIG_GPIO_BCM_VIRT is not set -CONFIG_GPIO_CDEV=y -# CONFIG_GPIO_FSM is not set -CONFIG_GPIO_RASPBERRYPI_EXP=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HW_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_BCM2835=y -CONFIG_HZ_FIXED=0 -CONFIG_I2C=y -# CONFIG_I2C_BCM2708 is not set -CONFIG_I2C_BOARDINFO=y -CONFIG_INPUT=y -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_IRQCHIP=y -CONFIG_IRQSTACKS=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_XZ is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PWM=y -CONFIG_LEDS_TRIGGER_ACTPWR=y -CONFIG_LEDS_TRIGGER_INPUT=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_CLUT224=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_MAC_PARTITION=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1f6 -CONFIG_MAILBOX=y -# CONFIG_MAILBOX_TEST is not set -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_PLATFORM_DRIVERS=y -CONFIG_MEDIA_PLATFORM_SUPPORT=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_SUPPORT_FILTER=y -CONFIG_MEMORY_ISOLATION=y -CONFIG_MFD_CORE=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -# CONFIG_MMC_BCM2835 is not set -CONFIG_MMC_BCM2835_DMA=y -CONFIG_MMC_BCM2835_MMC=y -CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2 -CONFIG_MMC_BCM2835_SDHOST=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=32 -CONFIG_MMC_HSQ=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMU_LAZY_TLB_REFCOUNT=y -CONFIG_MODULES_USE_ELF_REL=y -# CONFIG_MTD is not set -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NET_EGRESS=y -CONFIG_NET_INGRESS=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_XGRESS=y -CONFIG_NLS=y -CONFIG_NLS_ASCII=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NVMEM=y -CONFIG_NVMEM_LAYOUTS=y -CONFIG_NVMEM_RASPBERRYPI_OTP=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_CONFIGFS=y -CONFIG_OF_DYNAMIC=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_RESOLVE=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PAGE_POOL=y -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLIB_LEDS=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_BCM2835=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_GENERIC_DOMAINS_SLEEP=y -CONFIG_PM_OPP=y -CONFIG_PM_SLEEP=y -CONFIG_POWER_SUPPLY=y -CONFIG_PREEMPT_NONE_BUILD=y -CONFIG_PRINTK_TIME=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_PWM=y -CONFIG_PWM_BCM2835=y -CONFIG_PWM_GPIO=y -CONFIG_PWM_SYSFS=y -CONFIG_RANDSTRUCT_NONE=y -CONFIG_RASPBERRYPI_FIRMWARE=y -CONFIG_RASPBERRYPI_GPIOMEM=y -CONFIG_RASPBERRYPI_POWER=y -CONFIG_RATIONAL=y -# CONFIG_RAVE_SP_CORE is not set -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_RESET_CONTROLLER=y -# CONFIG_RESET_RASPBERRYPI is not set -CONFIG_RESET_SIMPLE=y -# CONFIG_RPI_POE_POWER is not set -CONFIG_SCSI=y -CONFIG_SCSI_COMMON=y -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_PROC_FS is not set -CONFIG_SERIAL_8250_BCM2835AUX=y -# CONFIG_SERIAL_8250_DMA is not set -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_NR_UARTS=1 -CONFIG_SERIAL_8250_RUNTIME_UARTS=0 -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -CONFIG_SERIAL_DEV_BUS=y -# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIAL_RPI_FW=y -CONFIG_SG_POOL=y -CONFIG_SMSC_PHY=y -CONFIG_SOFTIRQ_ON_OWN_STACK=y -CONFIG_SPARSE_IRQ=y -CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y -# CONFIG_STRIP_ASM_SYMS is not set -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SWPHY=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -# CONFIG_TEXTSEARCH is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_OF=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TINY_SRCU=y -CONFIG_UEVENT_HELPER_PATH="" -# CONFIG_UID16 is not set -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_UNWINDER_ARM=y -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_COMMON=y -CONFIG_USB_DWCOTG=y -CONFIG_USB_NET_DRIVERS=y -CONFIG_USB_NET_SMSC95XX=y -CONFIG_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_UAS=y -CONFIG_USB_USBNET=y -CONFIG_USE_OF=y -CONFIG_VCHIQ_CDEV=y -CONFIG_VFP=y -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_I2C=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ZBOOT_ROM_TEXT=0x0 diff --git a/lede/target/linux/bcm27xx/bcm2709/config-6.6 b/lede/target/linux/bcm27xx/bcm2709/config-6.6 deleted file mode 100644 index edcc8f58cc..0000000000 --- a/lede/target/linux/bcm27xx/bcm2709/config-6.6 +++ /dev/null @@ -1,506 +0,0 @@ -# CONFIG_AIO is not set -CONFIG_ALIGNMENT_TRAP=y -CONFIG_APERTURE_HELPERS=y -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_BCM=y -CONFIG_ARCH_BCM2835=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_STACKWALK=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARM=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_GIC=y -CONFIG_ARM_HAS_GROUP_RELOCS=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_LPAE=y -# CONFIG_ARM_MHU_V2 is not set -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_RASPBERRYPI_CPUFREQ=y -CONFIG_ARM_THUMB=y -CONFIG_ARM_TIMER_SP804=y -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BCM2708_VCMEM=y -CONFIG_BCM2711_THERMAL=y -CONFIG_BCM2835_MBOX=y -CONFIG_BCM2835_POWER=y -# CONFIG_BCM2835_SMI is not set -CONFIG_BCM2835_THERMAL=y -CONFIG_BCM2835_TIMER=y -CONFIG_BCM2835_VCHIQ=y -# CONFIG_BCM2835_VCHIQ_MMAL is not set -CONFIG_BCM2835_WDT=y -CONFIG_BCM7XXX_PHY=y -CONFIG_BCMGENET=y -CONFIG_BCM_NET_PHYLIB=y -CONFIG_BCM_VCIO=y -# CONFIG_BCM_VC_SM_CMA is not set -CONFIG_BCM_VIDEOCORE=y -CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BOUNCE=y -CONFIG_BRCMSTB_L2_IRQ=y -CONFIG_BRCM_CHAR_DRIVERS=y -CONFIG_BROADCOM_PHY=y -CONFIG_BUFFER_HEAD=y -# CONFIG_CACHE_L2X0 is not set -CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLK_BCM2711_DVP=y -CONFIG_CLK_BCM2835=y -CONFIG_CLK_RASPBERRYPI=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMA=y -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CMA_AREAS=7 -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=5 -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SYSFS is not set -CONFIG_COMMON_CLK=y -CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CONFIGFS_FS=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_CONTEXT_TRACKING=y -CONFIG_CONTEXT_TRACKING_IDLE=y -CONFIG_CONTIG_ALLOC=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MITIGATIONS=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CTS=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_GENIV=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA3=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_XTS=y -CONFIG_CURRENT_POINTER_IN_TPIDRURO=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -CONFIG_DIMLIB=y -CONFIG_DMABUF_HEAPS=y -CONFIG_DMABUF_HEAPS_CMA=y -CONFIG_DMABUF_HEAPS_SYSTEM=y -CONFIG_DMADEVICES=y -CONFIG_DMA_BCM2708=y -CONFIG_DMA_BCM2835=y -CONFIG_DMA_CMA=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_OPS=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DNOTIFY=y -CONFIG_DTC=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_EXT4_FS=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FB=y -CONFIG_FB_BCM2708=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CORE=y -CONFIG_FB_DEVICE=y -CONFIG_FB_IOMEM_FOPS=y -CONFIG_FB_IOMEM_HELPERS=y -CONFIG_FB_SIMPLE=y -CONFIG_FIQ=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -CONFIG_FONT_SUPPORT=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FREEZER=y -CONFIG_FS_ENCRYPTION=y -CONFIG_FS_ENCRYPTION_ALGS=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FUNCTION_ALIGNMENT=0 -CONFIG_FWNODE_MDIO=y -CONFIG_FW_CACHE=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_FW_LOADER_SYSFS=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GENERIC_VDSO_32=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_BCM_VIRT=y -CONFIG_GPIO_CDEV=y -# CONFIG_GPIO_FSM is not set -CONFIG_GPIO_RASPBERRYPI_EXP=y -# CONFIG_HARDEN_BRANCH_HISTORY is not set -# CONFIG_HARDEN_BRANCH_PREDICTOR is not set -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_SMP=y -CONFIG_HIGHMEM=y -CONFIG_HIGHPTE=y -CONFIG_HOTPLUG_CORE_SYNC=y -CONFIG_HOTPLUG_CORE_SYNC_DEAD=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HW_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_BCM2835=y -CONFIG_HW_RANDOM_IPROC_RNG200=y -CONFIG_HZ_FIXED=0 -CONFIG_I2C=y -# CONFIG_I2C_BCM2708 is not set -CONFIG_I2C_BOARDINFO=y -CONFIG_INPUT=y -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_IRQCHIP=y -CONFIG_IRQSTACKS=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_KEYS=y -CONFIG_KMAP_LOCAL=y -CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PWM=y -CONFIG_LEDS_TRIGGER_ACTPWR=y -CONFIG_LEDS_TRIGGER_INPUT=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_CLUT224=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_MAC_PARTITION=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1f6 -CONFIG_MAILBOX=y -# CONFIG_MAILBOX_TEST is not set -CONFIG_MDIO_BCM_UNIMAC=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_PLATFORM_DRIVERS=y -CONFIG_MEDIA_PLATFORM_SUPPORT=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_SUPPORT_FILTER=y -CONFIG_MEMORY_ISOLATION=y -CONFIG_MFD_CORE=y -CONFIG_MFD_SYSCON=y -CONFIG_MICROCHIP_PHY=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -# CONFIG_MMC_BCM2835 is not set -CONFIG_MMC_BCM2835_DMA=y -CONFIG_MMC_BCM2835_MMC=y -CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2 -CONFIG_MMC_BCM2835_SDHOST=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=32 -CONFIG_MMC_HSQ=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_IO_ACCESSORS=y -CONFIG_MMC_SDHCI_IPROC=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMU_LAZY_TLB_REFCOUNT=y -CONFIG_MODULES_USE_ELF_REL=y -# CONFIG_MTD is not set -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_SRCU_NMI_SAFE=y -CONFIG_NEON=y -CONFIG_NET_EGRESS=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_INGRESS=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_XGRESS=y -CONFIG_NLS=y -CONFIG_NLS_ASCII=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -CONFIG_NVMEM_LAYOUTS=y -CONFIG_NVMEM_RASPBERRYPI_OTP=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_CONFIGFS=y -CONFIG_OF_DYNAMIC=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_RESOLVE=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PAGE_POOL=y -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_BRCMSTB=y -CONFIG_PCIE_PME=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYLIB=y -CONFIG_PHYLIB_LEDS=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_BCM2835=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_GENERIC_DOMAINS_SLEEP=y -CONFIG_PM_OPP=y -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_POWER_SUPPLY=y -CONFIG_PPS=y -CONFIG_PREEMPT_NONE_BUILD=y -CONFIG_PRINTK_TIME=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_PWM=y -CONFIG_PWM_BCM2835=y -CONFIG_PWM_GPIO=y -CONFIG_PWM_SYSFS=y -CONFIG_RANDSTRUCT_NONE=y -CONFIG_RAS=y -CONFIG_RASPBERRYPI_FIRMWARE=y -CONFIG_RASPBERRYPI_GPIOMEM=y -CONFIG_RASPBERRYPI_POWER=y -CONFIG_RATIONAL=y -# CONFIG_RAVE_SP_CORE is not set -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RESET_RASPBERRYPI=y -CONFIG_RESET_SIMPLE=y -CONFIG_RFS_ACCEL=y -# CONFIG_RPI_POE_POWER is not set -CONFIG_RPS=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_SCSI=y -CONFIG_SCSI_COMMON=y -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_PROC_FS is not set -CONFIG_SERIAL_8250_BCM2835AUX=y -# CONFIG_SERIAL_8250_DMA is not set -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_NR_UARTS=1 -CONFIG_SERIAL_8250_RUNTIME_UARTS=0 -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -CONFIG_SERIAL_DEV_BUS=y -# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIAL_RPI_FW=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SMSC_PHY=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -CONFIG_SOFTIRQ_ON_OWN_STACK=y -CONFIG_SPARSE_IRQ=y -CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y -# CONFIG_STRIP_ASM_SYMS is not set -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SWIOTLB=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -# CONFIG_TEXTSEARCH is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_OF=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -# CONFIG_UCLAMP_TASK is not set -CONFIG_UEVENT_HELPER_PATH="" -# CONFIG_UID16 is not set -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_UNWINDER_ARM=y -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_COMMON=y -CONFIG_USB_DWCOTG=y -CONFIG_USB_GADGET=y -CONFIG_USB_LAN78XX=y -CONFIG_USB_NET_DRIVERS=y -CONFIG_USB_NET_SMSC95XX=y -CONFIG_USB_PCI=y -CONFIG_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_UAS=y -# CONFIG_USB_UHCI_HCD is not set -CONFIG_USB_USBNET=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_PCI=y -CONFIG_USB_XHCI_PLATFORM=y -CONFIG_USE_OF=y -CONFIG_VCHIQ_CDEV=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_I2C=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 diff --git a/lede/target/linux/bcm27xx/bcm2710/config-6.6 b/lede/target/linux/bcm27xx/bcm2710/config-6.6 deleted file mode 100644 index 18a9c26b01..0000000000 --- a/lede/target/linux/bcm27xx/bcm2710/config-6.6 +++ /dev/null @@ -1,492 +0,0 @@ -CONFIG_64BIT=y -# CONFIG_AIO is not set -CONFIG_APERTURE_HELPERS=y -CONFIG_ARCH_BCM=y -CONFIG_ARCH_BCM2835=y -CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y -CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y -CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_FORCE_MAX_ORDER=10 -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_STACKWALK=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_WANTS_NO_INSTR=y -CONFIG_ARCH_WANTS_THP_SWAP=y -CONFIG_ARM64=y -CONFIG_ARM64_4K_PAGES=y -CONFIG_ARM64_ERRATUM_819472=y -CONFIG_ARM64_ERRATUM_824069=y -CONFIG_ARM64_ERRATUM_826319=y -CONFIG_ARM64_ERRATUM_827319=y -CONFIG_ARM64_ERRATUM_832075=y -CONFIG_ARM64_ERRATUM_843419=y -CONFIG_ARM64_HW_AFDBM=y -CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PTR_AUTH=y -CONFIG_ARM64_PTR_AUTH_KERNEL=y -CONFIG_ARM64_SVE=y -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_V2M=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y -# CONFIG_ARM_MHU_V2 is not set -CONFIG_ARM_PSCI_FW=y -CONFIG_ARM_RASPBERRYPI_CPUFREQ=y -CONFIG_ARM_TIMER_SP804=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_BCM2708_VCMEM=y -# CONFIG_BCM2711_THERMAL is not set -CONFIG_BCM2835_MBOX=y -CONFIG_BCM2835_POWER=y -# CONFIG_BCM2835_SMI is not set -CONFIG_BCM2835_THERMAL=y -CONFIG_BCM2835_VCHIQ=y -# CONFIG_BCM2835_VCHIQ_MMAL is not set -CONFIG_BCM2835_WDT=y -CONFIG_BCM_VCIO=y -# CONFIG_BCM_VC_SM_CMA is not set -CONFIG_BCM_VIDEOCORE=y -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BRCMSTB_L2_IRQ=y -CONFIG_BRCM_CHAR_DRIVERS=y -CONFIG_BUFFER_HEAD=y -CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y -CONFIG_CAVIUM_ERRATUM_22375=y -CONFIG_CAVIUM_ERRATUM_23154=y -CONFIG_CAVIUM_ERRATUM_27456=y -CONFIG_CC_HAVE_SHADOW_CALL_STACK=y -CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLK_BCM2711_DVP=y -CONFIG_CLK_BCM2835=y -CONFIG_CLK_RASPBERRYPI=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMA=y -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CMA_AREAS=7 -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=5 -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SYSFS is not set -CONFIG_COMMON_CLK=y -CONFIG_COMMON_CLK_XGENE=y -CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 -# CONFIG_COMPAT_32BIT_TIME is not set -CONFIG_CONFIGFS_FS=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_CONTEXT_TRACKING=y -CONFIG_CONTEXT_TRACKING_IDLE=y -CONFIG_CONTIG_ALLOC=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MITIGATIONS=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CRC16=y -CONFIG_CRYPTO_AES_ARM64=y -CONFIG_CRYPTO_AES_ARM64_BS=y -CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_CTS=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_GENIV=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA256_ARM64=y -CONFIG_CRYPTO_SHA3=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_SHA512_ARM64=y -CONFIG_CRYPTO_XTS=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_INFO=y -CONFIG_DMABUF_HEAPS=y -CONFIG_DMABUF_HEAPS_CMA=y -CONFIG_DMABUF_HEAPS_SYSTEM=y -CONFIG_DMADEVICES=y -CONFIG_DMA_BCM2708=y -CONFIG_DMA_BCM2835=y -CONFIG_DMA_CMA=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DNOTIFY=y -CONFIG_DTC=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_EXT4_FS=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FB=y -CONFIG_FB_BCM2708=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CORE=y -CONFIG_FB_DEVICE=y -CONFIG_FB_IOMEM_FOPS=y -CONFIG_FB_IOMEM_HELPERS=y -CONFIG_FB_SIMPLE=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -CONFIG_FONT_SUPPORT=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FRAME_POINTER=y -CONFIG_FREEZER=y -CONFIG_FSL_ERRATUM_A008585=y -CONFIG_FS_ENCRYPTION=y -CONFIG_FS_ENCRYPTION_ALGS=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FUNCTION_ALIGNMENT=4 -CONFIG_FUNCTION_ALIGNMENT_4B=y -CONFIG_FWNODE_MDIO=y -CONFIG_FW_CACHE=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IOREMAP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_BCM_VIRT=y -CONFIG_GPIO_CDEV=y -# CONFIG_GPIO_FSM is not set -CONFIG_GPIO_RASPBERRYPI_EXP=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HOTPLUG_CORE_SYNC=y -CONFIG_HOTPLUG_CORE_SYNC_DEAD=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HW_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_BCM2835=y -CONFIG_I2C=y -# CONFIG_I2C_BCM2708 is not set -CONFIG_I2C_BOARDINFO=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_INPUT=y -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_KEYS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PWM=y -CONFIG_LEDS_TRIGGER_ACTPWR=y -CONFIG_LEDS_TRIGGER_INPUT=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_CLUT224=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_MAC_PARTITION=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1f6 -CONFIG_MAILBOX=y -# CONFIG_MAILBOX_TEST is not set -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_PLATFORM_DRIVERS=y -CONFIG_MEDIA_PLATFORM_SUPPORT=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_SUPPORT_FILTER=y -CONFIG_MEMORY_ISOLATION=y -CONFIG_MFD_CORE=y -CONFIG_MFD_SYSCON=y -CONFIG_MICROCHIP_PHY=y -CONFIG_MIGRATION=y -# CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set -CONFIG_MMC=y -# CONFIG_MMC_BCM2835 is not set -CONFIG_MMC_BCM2835_DMA=y -CONFIG_MMC_BCM2835_MMC=y -CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2 -CONFIG_MMC_BCM2835_SDHOST=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=32 -CONFIG_MMC_HSQ=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_IO_ACCESSORS=y -CONFIG_MMC_SDHCI_IPROC=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMU_LAZY_TLB_REFCOUNT=y -CONFIG_MODULES_USE_ELF_RELA=y -# CONFIG_MTD is not set -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NET_EGRESS=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_INGRESS=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_XGRESS=y -CONFIG_NLS=y -CONFIG_NLS_ASCII=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -CONFIG_NVMEM_LAYOUTS=y -CONFIG_NVMEM_RASPBERRYPI_OTP=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_CONFIGFS=y -CONFIG_OF_DYNAMIC=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_RESOLVE=y -CONFIG_PADATA=y -CONFIG_PAGE_POOL=y -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PARTITION_PERCPU=y -CONFIG_PCI=y -# CONFIG_PCIE_BRCMSTB is not set -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PER_VMA_LOCK=y -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYLIB=y -CONFIG_PHYLIB_LEDS=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_BCM2835=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_GENERIC_DOMAINS_SLEEP=y -CONFIG_PM_OPP=y -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y -CONFIG_POWER_RESET=y -CONFIG_POWER_SUPPLY=y -CONFIG_PREEMPT_NONE_BUILD=y -CONFIG_PRINTK_TIME=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_PWM=y -CONFIG_PWM_BCM2835=y -CONFIG_PWM_GPIO=y -CONFIG_PWM_SYSFS=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RANDSTRUCT_NONE=y -CONFIG_RASPBERRYPI_FIRMWARE=y -CONFIG_RASPBERRYPI_GPIOMEM=y -CONFIG_RASPBERRYPI_POWER=y -CONFIG_RATIONAL=y -# CONFIG_RAVE_SP_CORE is not set -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -CONFIG_RESET_CONTROLLER=y -# CONFIG_RESET_RASPBERRYPI is not set -CONFIG_RESET_SIMPLE=y -CONFIG_RFS_ACCEL=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -# CONFIG_RPI_POE_POWER is not set -CONFIG_RPS=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_SCSI=y -CONFIG_SCSI_COMMON=y -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_PROC_FS is not set -CONFIG_SERIAL_8250_BCM2835AUX=y -# CONFIG_SERIAL_8250_DMA is not set -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_NR_UARTS=1 -CONFIG_SERIAL_8250_RUNTIME_UARTS=0 -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -CONFIG_SERIAL_DEV_BUS=y -# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIAL_RPI_FW=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMSC_PHY=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -CONFIG_SOFTIRQ_ON_OWN_STACK=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSE_IRQ=y -CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y -# CONFIG_STRIP_ASM_SYMS is not set -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SWIOTLB=y -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -# CONFIG_TEXTSEARCH is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -# CONFIG_UCLAMP_TASK is not set -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_COMMON=y -CONFIG_USB_DWCOTG=y -CONFIG_USB_LAN78XX=y -CONFIG_USB_NET_DRIVERS=y -CONFIG_USB_NET_SMSC95XX=y -CONFIG_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_UAS=y -CONFIG_USB_USBNET=y -CONFIG_VCHIQ_CDEV=y -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_I2C=y -CONFIG_VMAP_STACK=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZONE_DMA32=y diff --git a/lede/target/linux/bcm27xx/bcm2711/config-6.6 b/lede/target/linux/bcm27xx/bcm2711/config-6.6 deleted file mode 100644 index a48771b8e7..0000000000 --- a/lede/target/linux/bcm27xx/bcm2711/config-6.6 +++ /dev/null @@ -1,511 +0,0 @@ -CONFIG_64BIT=y -# CONFIG_AIO is not set -CONFIG_APERTURE_HELPERS=y -CONFIG_ARCH_BCM=y -CONFIG_ARCH_BCM2835=y -CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y -CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y -CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_FORCE_MAX_ORDER=10 -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_STACKWALK=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_WANTS_NO_INSTR=y -CONFIG_ARCH_WANTS_THP_SWAP=y -CONFIG_ARM64=y -CONFIG_ARM64_4K_PAGES=y -CONFIG_ARM64_ERRATUM_1319367=y -CONFIG_ARM64_HW_AFDBM=y -CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PTR_AUTH=y -CONFIG_ARM64_PTR_AUTH_KERNEL=y -CONFIG_ARM64_SVE=y -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_V2M=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y -# CONFIG_ARM_MHU_V2 is not set -CONFIG_ARM_PSCI_FW=y -CONFIG_ARM_RASPBERRYPI_CPUFREQ=y -CONFIG_ARM_TIMER_SP804=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_BCM2708_VCMEM=y -CONFIG_BCM2711_THERMAL=y -CONFIG_BCM2835_MBOX=y -CONFIG_BCM2835_POWER=y -# CONFIG_BCM2835_SMI is not set -# CONFIG_BCM2835_THERMAL is not set -CONFIG_BCM2835_VCHIQ=y -# CONFIG_BCM2835_VCHIQ_MMAL is not set -CONFIG_BCM2835_WDT=y -CONFIG_BCM7XXX_PHY=y -CONFIG_BCMGENET=y -CONFIG_BCM_NET_PHYLIB=y -CONFIG_BCM_VCIO=y -# CONFIG_BCM_VC_SM_CMA is not set -CONFIG_BCM_VIDEOCORE=y -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BRCMSTB_L2_IRQ=y -CONFIG_BRCM_CHAR_DRIVERS=y -CONFIG_BROADCOM_PHY=y -CONFIG_BUFFER_HEAD=y -CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y -CONFIG_CAVIUM_ERRATUM_22375=y -CONFIG_CAVIUM_ERRATUM_23154=y -CONFIG_CAVIUM_ERRATUM_27456=y -CONFIG_CC_HAVE_SHADOW_CALL_STACK=y -CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLK_BCM2711_DVP=y -CONFIG_CLK_BCM2835=y -CONFIG_CLK_RASPBERRYPI=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMA=y -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CMA_AREAS=7 -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=5 -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SYSFS is not set -CONFIG_COMMON_CLK=y -CONFIG_COMMON_CLK_XGENE=y -CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 -# CONFIG_COMPAT_32BIT_TIME is not set -CONFIG_CONFIGFS_FS=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_CONTEXT_TRACKING=y -CONFIG_CONTEXT_TRACKING_IDLE=y -CONFIG_CONTIG_ALLOC=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MITIGATIONS=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CRC16=y -CONFIG_CRYPTO_AES_ARM64=y -CONFIG_CRYPTO_AES_ARM64_BS=y -CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_CTS=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_GENIV=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA256_ARM64=y -CONFIG_CRYPTO_SHA3=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_SHA512_ARM64=y -CONFIG_CRYPTO_XTS=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_INFO=y -CONFIG_DIMLIB=y -CONFIG_DMABUF_HEAPS=y -CONFIG_DMABUF_HEAPS_CMA=y -CONFIG_DMABUF_HEAPS_SYSTEM=y -CONFIG_DMADEVICES=y -CONFIG_DMA_BCM2708=y -CONFIG_DMA_BCM2835=y -CONFIG_DMA_CMA=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_ENGINE=y -# CONFIG_DMA_NUMA_CMA is not set -CONFIG_DMA_OF=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DNOTIFY=y -CONFIG_DTC=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_EXT4_FS=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FB=y -CONFIG_FB_BCM2708=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CORE=y -CONFIG_FB_DEVICE=y -CONFIG_FB_IOMEM_FOPS=y -CONFIG_FB_IOMEM_HELPERS=y -CONFIG_FB_SIMPLE=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -CONFIG_FONT_SUPPORT=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FRAME_POINTER=y -CONFIG_FREEZER=y -CONFIG_FSL_ERRATUM_A008585=y -CONFIG_FS_ENCRYPTION=y -CONFIG_FS_ENCRYPTION_ALGS=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FUNCTION_ALIGNMENT=4 -CONFIG_FUNCTION_ALIGNMENT_4B=y -CONFIG_FWNODE_MDIO=y -CONFIG_FW_CACHE=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_NUMA=y -CONFIG_GENERIC_ARCH_NUMA_EMULATION=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IOREMAP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_BCM_VIRT=y -CONFIG_GPIO_CDEV=y -# CONFIG_GPIO_FSM is not set -CONFIG_GPIO_RASPBERRYPI_EXP=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HOTPLUG_CORE_SYNC=y -CONFIG_HOTPLUG_CORE_SYNC_DEAD=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HW_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_IPROC_RNG200=y -CONFIG_I2C=y -# CONFIG_I2C_BCM2708 is not set -CONFIG_I2C_BOARDINFO=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_INPUT=y -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_KEYS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PWM=y -CONFIG_LEDS_TRIGGER_ACTPWR=y -CONFIG_LEDS_TRIGGER_INPUT=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_CLUT224=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_MAC_PARTITION=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1f6 -CONFIG_MAILBOX=y -# CONFIG_MAILBOX_TEST is not set -CONFIG_MDIO_BCM_UNIMAC=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_PLATFORM_DRIVERS=y -CONFIG_MEDIA_PLATFORM_SUPPORT=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_SUPPORT_FILTER=y -CONFIG_MEMORY_ISOLATION=y -CONFIG_MFD_CORE=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -# CONFIG_MMC_BCM2835 is not set -CONFIG_MMC_BCM2835_DMA=y -CONFIG_MMC_BCM2835_MMC=y -CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2 -CONFIG_MMC_BCM2835_SDHOST=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=32 -CONFIG_MMC_HSQ=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_IO_ACCESSORS=y -CONFIG_MMC_SDHCI_IPROC=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMU_LAZY_TLB_REFCOUNT=y -CONFIG_MODULES_USE_ELF_RELA=y -# CONFIG_MTD is not set -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NET_EGRESS=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_INGRESS=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_XGRESS=y -CONFIG_NLS=y -CONFIG_NLS_ASCII=y -CONFIG_NODES_SHIFT=4 -CONFIG_NOP_USB_XCEIV=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=4 -CONFIG_NUMA=y -# CONFIG_NUMA_BALANCING is not set -CONFIG_NUMA_EMULATION=y -CONFIG_NVMEM=y -CONFIG_NVMEM_LAYOUTS=y -CONFIG_NVMEM_RASPBERRYPI_OTP=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_CONFIGFS=y -CONFIG_OF_DYNAMIC=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NUMA=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_RESOLVE=y -CONFIG_PADATA=y -CONFIG_PAGE_POOL=y -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PARTITION_PERCPU=y -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_BRCMSTB=y -CONFIG_PCIE_PME=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PER_VMA_LOCK=y -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYLIB=y -CONFIG_PHYLIB_LEDS=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_BCM2835=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_GENERIC_DOMAINS_SLEEP=y -CONFIG_PM_OPP=y -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y -CONFIG_POWER_RESET=y -CONFIG_POWER_SUPPLY=y -CONFIG_PPS=y -CONFIG_PREEMPT_NONE_BUILD=y -CONFIG_PRINTK_TIME=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_PWM=y -CONFIG_PWM_BCM2835=y -CONFIG_PWM_GPIO=y -CONFIG_PWM_SYSFS=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RANDSTRUCT_NONE=y -CONFIG_RAS=y -CONFIG_RASPBERRYPI_FIRMWARE=y -CONFIG_RASPBERRYPI_GPIOMEM=y -CONFIG_RASPBERRYPI_POWER=y -CONFIG_RATIONAL=y -# CONFIG_RAVE_SP_CORE is not set -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RESET_RASPBERRYPI=y -CONFIG_RESET_SIMPLE=y -CONFIG_RFS_ACCEL=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -# CONFIG_RPI_POE_POWER is not set -CONFIG_RPS=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_SCSI=y -CONFIG_SCSI_COMMON=y -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_PROC_FS is not set -CONFIG_SERIAL_8250_BCM2835AUX=y -# CONFIG_SERIAL_8250_DMA is not set -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_NR_UARTS=1 -CONFIG_SERIAL_8250_RUNTIME_UARTS=0 -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -CONFIG_SERIAL_DEV_BUS=y -# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIAL_RPI_FW=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -CONFIG_SOFTIRQ_ON_OWN_STACK=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSE_IRQ=y -CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y -# CONFIG_STRIP_ASM_SYMS is not set -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SWIOTLB=y -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -# CONFIG_TEXTSEARCH is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -# CONFIG_UCLAMP_TASK is not set -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_COMMON=y -CONFIG_USB_DWCOTG=y -CONFIG_USB_GADGET=y -CONFIG_USB_PCI=y -CONFIG_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_UAS=y -# CONFIG_USB_UHCI_HCD is not set -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_PCI=y -CONFIG_USB_XHCI_PLATFORM=y -CONFIG_USE_PERCPU_NUMA_NODE_ID=y -CONFIG_VCHIQ_CDEV=y -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_I2C=y -CONFIG_VMAP_STACK=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZONE_DMA32=y diff --git a/lede/target/linux/bcm27xx/bcm2712/config-6.6 b/lede/target/linux/bcm27xx/bcm2712/config-6.6 deleted file mode 100644 index bd36c40637..0000000000 --- a/lede/target/linux/bcm27xx/bcm2712/config-6.6 +++ /dev/null @@ -1,635 +0,0 @@ -CONFIG_64BIT=y -# CONFIG_AIO is not set -CONFIG_APERTURE_HELPERS=y -CONFIG_ARCH_BCM=y -CONFIG_ARCH_BCM2835=y -CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y -CONFIG_ARCH_BRCMSTB=y -CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y -CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_FORCE_MAX_ORDER=10 -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_STACKWALK=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_WANTS_NO_INSTR=y -CONFIG_ARCH_WANTS_THP_SWAP=y -CONFIG_ARM64=y -CONFIG_ARM64_4K_PAGES=y -CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1286807=y -CONFIG_ARM64_ERRATUM_1463225=y -CONFIG_ARM64_ERRATUM_3194386=y -CONFIG_ARM64_HW_AFDBM=y -CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PTR_AUTH=y -CONFIG_ARM64_PTR_AUTH_KERNEL=y -CONFIG_ARM64_SVE=y -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -CONFIG_ARM_BRCMSTB_AVS_CPUFREQ=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_V2M=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y -# CONFIG_ARM_MHU_V2 is not set -# CONFIG_ARM_PL172_MPMC is not set -CONFIG_ARM_PSCI_FW=y -CONFIG_ARM_RASPBERRYPI_CPUFREQ=y -# CONFIG_ARM_SMMU is not set -# CONFIG_ARM_SMMU_V3 is not set -CONFIG_ARM_TIMER_SP804=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_BCM2708_VCMEM=y -CONFIG_BCM2711_THERMAL=y -CONFIG_BCM2712_IOMMU=y -CONFIG_BCM2712_MIP=y -CONFIG_BCM2835_MBOX=y -CONFIG_BCM2835_POWER=y -CONFIG_BCM2835_SMI=y -CONFIG_BCM2835_SMI_DEV=m -CONFIG_BCM2835_THERMAL=y -CONFIG_BCM2835_VCHIQ=y -# CONFIG_BCM2835_VCHIQ_MMAL is not set -CONFIG_BCM2835_WDT=y -CONFIG_BCM7038_L1_IRQ=y -CONFIG_BCM7120_L2_IRQ=y -CONFIG_BCM7XXX_PHY=y -CONFIG_BCMA=y -CONFIG_BCMASP=y -CONFIG_BCMA_BLOCKIO=y -# CONFIG_BCMA_DEBUG is not set -# CONFIG_BCMA_DRIVER_GMAC_CMN is not set -CONFIG_BCMA_DRIVER_PCI=y -CONFIG_BCMA_FALLBACK_SPROM=y -CONFIG_BCMA_HOST_PCI=y -CONFIG_BCMA_HOST_PCI_POSSIBLE=y -# CONFIG_BCMA_HOST_SOC is not set -CONFIG_BCMGENET=y -CONFIG_BCM_NET_PHYLIB=y -CONFIG_BCM_VCIO=y -# CONFIG_BCM_VC_SM_CMA is not set -CONFIG_BCM_VIDEOCORE=y -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_NVME=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BRCMSTB_DPFE=y -CONFIG_BRCMSTB_L2_IRQ=y -CONFIG_BRCMSTB_MEMC=y -# CONFIG_BRCMSTB_THERMAL is not set -CONFIG_BRCM_CHAR_DRIVERS=y -CONFIG_BRCM_USB_PINMAP=y -CONFIG_BROADCOM_PHY=y -CONFIG_BUFFER_HEAD=y -CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y -CONFIG_CC_HAVE_SHADOW_CALL_STACK=y -CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLK_BCM2711_DVP=y -CONFIG_CLK_BCM2835=y -CONFIG_CLK_RASPBERRYPI=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMA=y -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CMA_AREAS=7 -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=5 -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SYSFS is not set -CONFIG_COMMON_CLK=y -CONFIG_COMMON_CLK_RP1=y -CONFIG_COMMON_CLK_RP1_SDIO=y -CONFIG_COMMON_CLK_XGENE=y -CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 -# CONFIG_COMPAT_32BIT_TIME is not set -CONFIG_CONFIGFS_FS=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_CONTEXT_TRACKING=y -CONFIG_CONTEXT_TRACKING_IDLE=y -CONFIG_CONTIG_ALLOC=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MITIGATIONS=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CRC16=y -CONFIG_CRYPTO_AES_ARM64=y -CONFIG_CRYPTO_AES_ARM64_BS=y -CONFIG_CRYPTO_AES_ARM64_CE=y -CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_CTS=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_GENIV=y -CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_ARM64_CE=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA256_ARM64=y -CONFIG_CRYPTO_SHA2_ARM64_CE=y -CONFIG_CRYPTO_SHA3=y -CONFIG_CRYPTO_SHA3_ARM64=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_SHA512_ARM64=y -CONFIG_CRYPTO_SHA512_ARM64_CE=y -CONFIG_CRYPTO_SM3=y -CONFIG_CRYPTO_SM3_ARM64_CE=y -CONFIG_CRYPTO_SM4=y -CONFIG_CRYPTO_SM4_ARM64_CE=y -CONFIG_CRYPTO_SM4_ARM64_CE_BLK=y -CONFIG_CRYPTO_XTS=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_INFO=y -CONFIG_DIMLIB=y -CONFIG_DMABUF_HEAPS=y -CONFIG_DMABUF_HEAPS_CMA=y -CONFIG_DMABUF_HEAPS_SYSTEM=y -CONFIG_DMADEVICES=y -CONFIG_DMA_BCM2708=y -CONFIG_DMA_BCM2835=y -CONFIG_DMA_CMA=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_ENGINE=y -# CONFIG_DMA_NUMA_CMA is not set -CONFIG_DMA_OF=y -CONFIG_DMA_OPS=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DNOTIFY=y -CONFIG_DTC=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_EXT4_FS=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FB=y -CONFIG_FB_BCM2708=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CORE=y -CONFIG_FB_DEVICE=y -CONFIG_FB_IOMEM_FOPS=y -CONFIG_FB_IOMEM_HELPERS=y -CONFIG_FB_SIMPLE=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -CONFIG_FONT_SUPPORT=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FRAME_POINTER=y -CONFIG_FREEZER=y -CONFIG_FSL_ERRATUM_A008585=y -CONFIG_FS_ENCRYPTION=y -CONFIG_FS_ENCRYPTION_ALGS=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FUNCTION_ALIGNMENT=4 -CONFIG_FUNCTION_ALIGNMENT_4B=y -CONFIG_FWNODE_MDIO=y -CONFIG_FW_CACHE=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_NUMA=y -CONFIG_GENERIC_ARCH_NUMA_EMULATION=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IOREMAP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_INJECTION=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GLOB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_BCM_VIRT=y -CONFIG_GPIO_BRCMSTB=y -CONFIG_GPIO_CDEV=y -# CONFIG_GPIO_FSM is not set -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_RASPBERRYPI_EXP=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HOTPLUG_CORE_SYNC=y -CONFIG_HOTPLUG_CORE_SYNC_DEAD=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HOTPLUG_PCI=y -# CONFIG_HOTPLUG_PCI_CPCI is not set -# CONFIG_HOTPLUG_PCI_PCIE is not set -CONFIG_HOTPLUG_PCI_SHPC=y -CONFIG_HWMON=y -CONFIG_HW_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_IPROC_RNG200=y -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -# CONFIG_I2C_BCM2708 is not set -CONFIG_I2C_BCM2835=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_BRCMSTB=y -CONFIG_I2C_DESIGNWARE_CORE=y -CONFIG_I2C_DESIGNWARE_PLATFORM=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_INPUT=y -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_IOMMUFD is not set -CONFIG_IOMMU_API=y -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set -CONFIG_IOMMU_DEFAULT_DMA_STRICT=y -# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set -CONFIG_IOMMU_DMA=y -CONFIG_IOMMU_IOVA=y -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -# CONFIG_IOMMU_IO_PGTABLE_DART is not set -# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set -CONFIG_IOMMU_SUPPORT=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MSI_IOMMU=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_KEYS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PWM=y -CONFIG_LEDS_TRIGGER_ACTPWR=y -CONFIG_LEDS_TRIGGER_INPUT=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_CLUT224=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_MACB=y -CONFIG_MACB_PCI=y -CONFIG_MACB_USE_HWSTAMP=y -CONFIG_MAC_PARTITION=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1f6 -CONFIG_MAILBOX=y -# CONFIG_MAILBOX_TEST is not set -CONFIG_MDIO_BCM_UNIMAC=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_PLATFORM_DRIVERS=y -CONFIG_MEDIA_PLATFORM_SUPPORT=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_SUPPORT_FILTER=y -CONFIG_MEMORY=y -CONFIG_MEMORY_ISOLATION=y -CONFIG_MFD_CORE=y -CONFIG_MFD_RP1=y -CONFIG_MFD_SYSCON=y -CONFIG_MICROCHIP_PHY=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -# CONFIG_MMC_BCM2835 is not set -CONFIG_MMC_BCM2835_DMA=y -CONFIG_MMC_BCM2835_MMC=y -CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2 -CONFIG_MMC_BCM2835_SDHOST=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=32 -CONFIG_MMC_CQHCI=y -CONFIG_MMC_HSQ=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_BRCMSTB=y -CONFIG_MMC_SDHCI_IO_ACCESSORS=y -CONFIG_MMC_SDHCI_IPROC=y -CONFIG_MMC_SDHCI_OF_DWCMSHC=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMU_LAZY_TLB_REFCOUNT=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y -CONFIG_NEED_SG_DMA_FLAGS=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NET_EGRESS=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_INGRESS=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_XGRESS=y -CONFIG_NLS=y -CONFIG_NLS_ASCII=y -CONFIG_NODES_SHIFT=4 -CONFIG_NOP_USB_XCEIV=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=4 -CONFIG_NUMA=y -# CONFIG_NUMA_BALANCING is not set -CONFIG_NUMA_EMULATION=y -CONFIG_NVMEM=y -CONFIG_NVMEM_LAYOUTS=y -CONFIG_NVMEM_RASPBERRYPI_OTP=y -CONFIG_NVME_CORE=y -# CONFIG_NVME_HWMON is not set -# CONFIG_NVME_MULTIPATH is not set -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_CONFIGFS=y -CONFIG_OF_DYNAMIC=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IOMMU=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NUMA=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_RESOLVE=y -CONFIG_PADATA=y -CONFIG_PAGE_POOL=y -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PARTITION_PERCPU=y -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEAER_INJECT=y -CONFIG_PCIEASPM=y -# CONFIG_PCIEASPM_DEFAULT is not set -# CONFIG_PCIEASPM_PERFORMANCE is not set -CONFIG_PCIEASPM_POWERSAVE=y -# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_BRCMSTB=y -CONFIG_PCIE_DPC=y -CONFIG_PCIE_DW=y -CONFIG_PCIE_DW_HOST=y -CONFIG_PCIE_DW_PLAT=y -CONFIG_PCIE_DW_PLAT_HOST=y -CONFIG_PCIE_MICROCHIP_HOST=y -CONFIG_PCIE_PME=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_ECAM=y -CONFIG_PCI_HOST_COMMON=y -CONFIG_PCI_HOST_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PCI_STUB=y -CONFIG_PER_VMA_LOCK=y -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYLIB=y -CONFIG_PHYLIB_LEDS=y -CONFIG_PHYLINK=y -CONFIG_PHYS_ADDR_T_64BIT=y -# CONFIG_PHY_BRCM_SATA is not set -CONFIG_PHY_BRCM_USB=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_BCM2712=y -CONFIG_PINCTRL_BCM2835=y -CONFIG_PINCTRL_RP1=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_GENERIC_DOMAINS_SLEEP=y -CONFIG_PM_OPP=y -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_GPIO=y -CONFIG_POWER_SUPPLY=y -CONFIG_PPS=y -CONFIG_PREEMPT_NONE_BUILD=y -CONFIG_PRINTK_TIME=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_PWM=y -CONFIG_PWM_BCM2835=y -CONFIG_PWM_BRCMSTB=y -CONFIG_PWM_GPIO=y -CONFIG_PWM_RP1=y -CONFIG_PWM_SYSFS=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RANDSTRUCT_NONE=y -CONFIG_RAS=y -CONFIG_RASPBERRYPI_FIRMWARE=y -CONFIG_RASPBERRYPI_GPIOMEM=y -CONFIG_RASPBERRYPI_POWER=y -CONFIG_RATIONAL=y -# CONFIG_RAVE_SP_CORE is not set -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -CONFIG_RESET_BRCMSTB=y -CONFIG_RESET_BRCMSTB_RESCAL=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RESET_RASPBERRYPI=y -CONFIG_RESET_SIMPLE=y -CONFIG_RFS_ACCEL=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -# CONFIG_RPI_POE_POWER is not set -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_BRCMSTB=y -CONFIG_RTC_DRV_RPI=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_SCSI=y -CONFIG_SCSI_COMMON=y -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_PROC_FS is not set -CONFIG_SENSORS_RASPBERRYPI_HWMON=y -CONFIG_SERIAL_8250_BCM2835AUX=y -CONFIG_SERIAL_8250_BCM7271=y -# CONFIG_SERIAL_8250_DMA is not set -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_NR_UARTS=1 -CONFIG_SERIAL_8250_RUNTIME_UARTS=0 -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -CONFIG_SERIAL_DEV_BUS=y -# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMSC_PHY=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -CONFIG_SOC_BRCMSTB=y -CONFIG_SOC_BUS=y -CONFIG_SOFTIRQ_ON_OWN_STACK=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSE_IRQ=y -CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y -CONFIG_SRAM=y -# CONFIG_STRIP_ASM_SYMS is not set -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SWIOTLB=y -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -# CONFIG_TEXTSEARCH is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -# CONFIG_UCLAMP_TASK is not set -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -# CONFIG_USB_BRCMSTB is not set -CONFIG_USB_COMMON=y -CONFIG_USB_DWC3=y -# CONFIG_USB_DWC3_DUAL_ROLE is not set -# CONFIG_USB_DWC3_GADGET is not set -CONFIG_USB_DWC3_HOST=y -CONFIG_USB_DWCOTG=y -CONFIG_USB_GADGET=y -# CONFIG_USB_HCD_BCMA is not set -CONFIG_USB_PCI=y -CONFIG_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_UAS=y -# CONFIG_USB_UHCI_HCD is not set -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_PCI=y -CONFIG_USB_XHCI_PLATFORM=y -CONFIG_USE_PERCPU_NUMA_NODE_ID=y -CONFIG_VCHIQ_CDEV=y -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_I2C=y -CONFIG_VMAP_STACK=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZONE_DMA32=y diff --git a/lede/target/linux/bcm27xx/config-6.6 b/lede/target/linux/bcm27xx/config-6.6 deleted file mode 100644 index e69dbf5d74..0000000000 --- a/lede/target/linux/bcm27xx/config-6.6 +++ /dev/null @@ -1,49 +0,0 @@ -# CONFIG_BACKLIGHT_RPI is not set -# CONFIG_BCM2712_MIP is not set -# CONFIG_COMMON_CLK_RP1 is not set -# CONFIG_COMMON_CLK_RP1_SDIO is not set -# CONFIG_COMMON_CLK_RP1_SDIO is not set -# CONFIG_DRM_PANEL_ILITEK_ILI9806E is not set -# CONFIG_DRM_PANEL_TPO_Y17P is not set -# CONFIG_DRM_PANEL_WAVESHARE_TOUCHSCREEN is not set -# CONFIG_DRM_RP1_DPI is not set -# CONFIG_DRM_RP1_DSI is not set -# CONFIG_DRM_RP1_VEC is not set -# CONFIG_FB_RPISENSE is not set -# CONFIG_FIRMWARE_RP1 is not set -# CONFIG_GPIO_PWM is not set -# CONFIG_INPUT_RASPBERRYPI_BUTTON is not set -# CONFIG_MBOX_RP1 is not set -# CONFIG_MEDIA_PCI_HAILO is not set -# CONFIG_MFD_PM8921_CORE is not set -# CONFIG_MFD_RASPBERRYPI_POE_HAT is not set -# CONFIG_MFD_RP1 is not set -# CONFIG_MFD_RPISENSE_CORE is not set -# CONFIG_PHY_CADENCE_DP is not set -# CONFIG_PINCTRL_BCM2712 is not set -# CONFIG_PINCTRL_RP1 is not set -# CONFIG_PWM_PIO_RP1 is not set -# CONFIG_PWM_RP1 is not set -# CONFIG_RASPBERRYPI_GPIOMEM is not set -# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_V2 is not set -# CONFIG_RP1_PIO is not set -# CONFIG_SENSORS_RP1_ADC is not set -# CONFIG_SERIAL_RPI_FW is not set -# CONFIG_SND_PIMIDI is not set -# CONFIG_SPI_RP2040_GPIO_BRIDGE is not set -# CONFIG_VIDEO_AD5398 is not set -# CONFIG_VIDEO_ARDUCAM_64MP is not set -# CONFIG_VIDEO_ARDUCAM_PIVARIETY is not set -# CONFIG_VIDEO_BCM2835_UNICAM is not set -# CONFIG_VIDEO_BU64754 is not set -# CONFIG_VIDEO_CADENCE is not set -# CONFIG_VIDEO_CODEC_BCM2835 is not set -# CONFIG_VIDEO_IMX477 is not set -# CONFIG_VIDEO_IMX519 is not set -# CONFIG_VIDEO_IMX708 is not set -# CONFIG_VIDEO_IRS1125 is not set -# CONFIG_VIDEO_ISP_BCM2835 is not set -# CONFIG_VIDEO_OV64A40 is not set -# CONFIG_VIDEO_RASPBERRYPI_PISP_BE is not set -# CONFIG_VIDEO_RP1_CFE is not set -# CONFIG_WS2812_PIO_RP1 is not set diff --git a/lede/target/linux/bcm27xx/image/Makefile b/lede/target/linux/bcm27xx/image/Makefile index 23bc3a35c9..8320855573 100644 --- a/lede/target/linux/bcm27xx/image/Makefile +++ b/lede/target/linux/bcm27xx/image/Makefile @@ -88,7 +88,9 @@ define Device/rpi DEVICE_PACKAGES := \ cypress-firmware-43430-sdio \ brcmfmac-nvram-43430-sdio \ - kmod-brcmfmac wpad-basic-mbedtls + kmod-brcmfmac wpad-basic-mbedtls \ + kmod-i2c-bcm2835 kmod-spi-bcm2835 \ + kmod-spi-bcm2835-aux endef ifeq ($(SUBTARGET),bcm2708) TARGET_DEVICES += rpi @@ -127,7 +129,9 @@ define Device/rpi-2 brcmfmac-nvram-43430-sdio \ cypress-firmware-43455-sdio \ brcmfmac-nvram-43455-sdio \ - kmod-brcmfmac wpad-basic-mbedtls + kmod-brcmfmac wpad-basic-mbedtls \ + kmod-i2c-bcm2835 kmod-spi-bcm2835 \ + kmod-spi-bcm2835-aux IMAGE/sysupgrade.img.gz := boot-common | boot-2708 | boot-2711 | sdcard-img | gzip | append-metadata IMAGE/factory.img.gz := boot-common | boot-2708 | boot-2711 | sdcard-img | gzip endef @@ -161,7 +165,9 @@ define Device/rpi-3 brcmfmac-nvram-43430-sdio \ cypress-firmware-43455-sdio \ brcmfmac-nvram-43455-sdio \ - kmod-brcmfmac wpad-basic-mbedtls + kmod-brcmfmac wpad-basic-mbedtls \ + kmod-i2c-bcm2835 kmod-spi-bcm2835 \ + kmod-spi-bcm2835-aux endef ifeq ($(SUBTARGET),bcm2710) TARGET_DEVICES += rpi-3 @@ -183,6 +189,9 @@ define Device/rpi-4 cypress-firmware-43455-sdio \ brcmfmac-nvram-43455-sdio \ kmod-brcmfmac wpad-basic-mbedtls \ + kmod-i2c-bcm2835 kmod-spi-bcm2835 \ + kmod-spi-bcm2835-aux \ + kmod-i2c-brcmstb \ kmod-usb-net-lan78xx \ kmod-r8169 IMAGE/sysupgrade.img.gz := boot-common | boot-2711 | sdcard-img | gzip | append-metadata @@ -193,14 +202,26 @@ ifeq ($(SUBTARGET),bcm2711) endif define Device/rpi-5 - DEVICE_MODEL := 5 + DEVICE_MODEL := 5/500/CM5 KERNEL_IMG := kernel_2712.img - DEVICE_DTS := broadcom/bcm2712-rpi-5-b - SUPPORTED_DEVICES := raspberrypi,5-model-b + DEVICE_DTS := \ + broadcom/bcm2712-rpi-5-b \ + broadcom/bcm2712-rpi-cm5-cm4io \ + broadcom/bcm2712-rpi-cm5-cm5io \ + broadcom/bcm2712-rpi-cm5l-cm4io \ + broadcom/bcm2712-rpi-cm5l-cm5io \ + broadcom/bcm2712d0-rpi-5-b + SUPPORTED_DEVICES := \ + raspberrypi,500 \ + raspberrypi,5-compute-module \ + raspberrypi,5-model-b DEVICE_PACKAGES := \ cypress-firmware-43455-sdio \ brcmfmac-nvram-43455-sdio \ kmod-brcmfmac wpad-basic-mbedtls \ + kmod-i2c-bcm2835 kmod-spi-bcm2835 \ + kmod-i2c-brcmstb \ + kmod-i2c-designware-platform kmod-spi-dw-mmio \ kmod-hwmon-pwmfan kmod-thermal IMAGE/sysupgrade.img.gz := boot-common | sdcard-img | gzip | append-metadata IMAGE/factory.img.gz := boot-common | sdcard-img | gzip diff --git a/lede/target/linux/bcm27xx/modules/i2c.mk b/lede/target/linux/bcm27xx/modules/i2c.mk index ba266b29f2..0d44f1febc 100644 --- a/lede/target/linux/bcm27xx/modules/i2c.mk +++ b/lede/target/linux/bcm27xx/modules/i2c.mk @@ -16,3 +16,19 @@ define KernelPackage/i2c-bcm2835/description endef $(eval $(call KernelPackage,i2c-bcm2835)) + + +I2C_BRCMSTB_MODULES:=\ + CONFIG_I2C_BRCMSTB:drivers/i2c/busses/i2c-brcmstb + +define KernelPackage/i2c-brcmstb + $(call i2c_defaults,$(I2C_BRCMSTB_MODULES),59) + TITLE:=Broadcom BRCMSTB I2C master controller driver + DEPENDS:=@TARGET_bcm27xx +kmod-i2c-core +endef + +define KernelPackage/i2c-brcmstb/description + This package contains the BRCM Settop/DSL I2C master controller driver +endef + +$(eval $(call KernelPackage,i2c-brcmstb)) diff --git a/lede/target/linux/bcm27xx/patches-6.12/950-0087-hid-Reduce-default-mouse-polling-interval-to-60Hz.patch b/lede/target/linux/bcm27xx/patches-6.12/950-0087-hid-Reduce-default-mouse-polling-interval-to-60Hz.patch index 877c706d0a..875dfdeca6 100644 --- a/lede/target/linux/bcm27xx/patches-6.12/950-0087-hid-Reduce-default-mouse-polling-interval-to-60Hz.patch +++ b/lede/target/linux/bcm27xx/patches-6.12/950-0087-hid-Reduce-default-mouse-polling-interval-to-60Hz.patch @@ -25,7 +25,7 @@ Signed-off-by: Jonathan Bell module_param_named(mousepoll, hid_mousepoll_interval, uint, 0644); MODULE_PARM_DESC(mousepoll, "Polling interval of mice"); -@@ -1114,7 +1114,9 @@ static int usbhid_start(struct hid_devic +@@ -1117,7 +1117,9 @@ static int usbhid_start(struct hid_devic */ switch (hid->collection->usage) { case HID_GD_MOUSE: @@ -36,7 +36,7 @@ Signed-off-by: Jonathan Bell interval = hid_mousepoll_interval; break; case HID_GD_JOYSTICK: -@@ -1126,6 +1128,7 @@ static int usbhid_start(struct hid_devic +@@ -1129,6 +1131,7 @@ static int usbhid_start(struct hid_devic interval = hid_kbpoll_interval; break; } diff --git a/lede/target/linux/bcm27xx/patches-6.12/950-0231-drm-panel-simple-Add-a-timing-for-the-Raspberry-Pi-7.patch b/lede/target/linux/bcm27xx/patches-6.12/950-0231-drm-panel-simple-Add-a-timing-for-the-Raspberry-Pi-7.patch index 442344653a..7145016cc4 100644 --- a/lede/target/linux/bcm27xx/patches-6.12/950-0231-drm-panel-simple-Add-a-timing-for-the-Raspberry-Pi-7.patch +++ b/lede/target/linux/bcm27xx/patches-6.12/950-0231-drm-panel-simple-Add-a-timing-for-the-Raspberry-Pi-7.patch @@ -315,7 +315,7 @@ Signed-off-by: Dave Stevenson ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0); if (ddc) { panel->ddc = of_find_i2c_adapter_by_node(ddc); -@@ -2262,6 +2243,32 @@ static const struct panel_desc friendlya +@@ -2263,6 +2244,32 @@ static const struct panel_desc friendlya }, }; @@ -348,7 +348,7 @@ Signed-off-by: Dave Stevenson static const struct drm_display_mode giantplus_gpg482739qs5_mode = { .clock = 9000, .hdisplay = 480, -@@ -2442,6 +2449,38 @@ static const struct panel_desc innolux_a +@@ -2443,6 +2450,38 @@ static const struct panel_desc innolux_a .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, }; @@ -387,7 +387,7 @@ Signed-off-by: Dave Stevenson static const struct drm_display_mode innolux_at070tn92_mode = { .clock = 33333, .hdisplay = 800, -@@ -3855,6 +3894,31 @@ static const struct panel_desc rocktech_ +@@ -3856,6 +3895,31 @@ static const struct panel_desc rocktech_ .connector_type = DRM_MODE_CONNECTOR_DPI, }; @@ -419,7 +419,7 @@ Signed-off-by: Dave Stevenson static const struct display_timing rocktech_rk070er9427_timing = { .pixelclock = { 26400000, 33300000, 46800000 }, .hactive = { 800, 800, 800 }, -@@ -4799,6 +4863,9 @@ static const struct of_device_id platfor +@@ -4800,6 +4864,9 @@ static const struct of_device_id platfor .compatible = "friendlyarm,hd702e", .data = &friendlyarm_hd702e, }, { @@ -429,7 +429,7 @@ Signed-off-by: Dave Stevenson .compatible = "giantplus,gpg482739qs5", .data = &giantplus_gpg482739qs5 }, { -@@ -4820,6 +4887,9 @@ static const struct of_device_id platfor +@@ -4821,6 +4888,9 @@ static const struct of_device_id platfor .compatible = "innolux,at043tn24", .data = &innolux_at043tn24, }, { @@ -439,7 +439,7 @@ Signed-off-by: Dave Stevenson .compatible = "innolux,at070tn92", .data = &innolux_at070tn92, }, { -@@ -4979,6 +5049,9 @@ static const struct of_device_id platfor +@@ -4980,6 +5050,9 @@ static const struct of_device_id platfor .compatible = "rocktech,rk043fn48h", .data = &rocktech_rk043fn48h, }, { @@ -449,7 +449,7 @@ Signed-off-by: Dave Stevenson .compatible = "rocktech,rk070er9427", .data = &rocktech_rk070er9427, }, { -@@ -5335,6 +5408,9 @@ static const struct panel_desc_dsi osd10 +@@ -5336,6 +5409,9 @@ static const struct panel_desc_dsi osd10 .lanes = 4, }; @@ -459,7 +459,7 @@ Signed-off-by: Dave Stevenson static const struct of_device_id dsi_of_match[] = { { .compatible = "auo,b080uan01", -@@ -5358,20 +5434,137 @@ static const struct of_device_id dsi_of_ +@@ -5359,20 +5435,137 @@ static const struct of_device_id dsi_of_ .compatible = "osddisplays,osd101t2045-53ts", .data = &osd101t2045_53ts }, { diff --git a/lede/target/linux/bcm27xx/patches-6.12/950-0277-mm-page_alloc-cma-introduce-a-customisable-threshold.patch b/lede/target/linux/bcm27xx/patches-6.12/950-0277-mm-page_alloc-cma-introduce-a-customisable-threshold.patch index f9ef8c3067..2c1cb09a6d 100644 --- a/lede/target/linux/bcm27xx/patches-6.12/950-0277-mm-page_alloc-cma-introduce-a-customisable-threshold.patch +++ b/lede/target/linux/bcm27xx/patches-6.12/950-0277-mm-page_alloc-cma-introduce-a-customisable-threshold.patch @@ -48,7 +48,7 @@ Signed-off-by: David Plowman #ifdef CONFIG_HUGETLB_PAGE_SIZE_VARIABLE unsigned int pageblock_order __read_mostly; #endif -@@ -2269,12 +2290,13 @@ __rmqueue(struct zone *zone, unsigned in +@@ -2265,12 +2286,13 @@ __rmqueue(struct zone *zone, unsigned in if (IS_ENABLED(CONFIG_CMA)) { /* * Balance movable allocations between regular and CMA areas by diff --git a/lede/target/linux/bcm27xx/patches-6.12/950-0322-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch b/lede/target/linux/bcm27xx/patches-6.12/950-0322-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch index b68669964d..731e4c71df 100644 --- a/lede/target/linux/bcm27xx/patches-6.12/950-0322-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch +++ b/lede/target/linux/bcm27xx/patches-6.12/950-0322-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch @@ -20,7 +20,7 @@ Signed-off-by: Phil Elwell --- a/net/bluetooth/hci_sync.c +++ b/net/bluetooth/hci_sync.c -@@ -4866,6 +4866,7 @@ static const struct { +@@ -4877,6 +4877,7 @@ static const struct { */ static int hci_dev_setup_sync(struct hci_dev *hdev) { @@ -28,7 +28,7 @@ Signed-off-by: Phil Elwell int ret = 0; bool invalid_bdaddr; size_t i; -@@ -4894,7 +4895,8 @@ static int hci_dev_setup_sync(struct hci +@@ -4905,7 +4906,8 @@ static int hci_dev_setup_sync(struct hci test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks); if (!ret) { if (test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks) && diff --git a/lede/target/linux/bcm27xx/patches-6.12/950-0344-sdhci-Add-SD-Express-hook.patch b/lede/target/linux/bcm27xx/patches-6.12/950-0344-sdhci-Add-SD-Express-hook.patch index 7b843a0c09..287f01ecc3 100644 --- a/lede/target/linux/bcm27xx/patches-6.12/950-0344-sdhci-Add-SD-Express-hook.patch +++ b/lede/target/linux/bcm27xx/patches-6.12/950-0344-sdhci-Add-SD-Express-hook.patch @@ -12,7 +12,7 @@ sdhci: remove PYA0_INTR_BUG quirk. Add quirks to disable some of the higher SDR --- a/drivers/mmc/host/sdhci-of-dwcmshc.c +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c -@@ -1212,7 +1212,11 @@ static const struct dwcmshc_pltfm_data s +@@ -1236,7 +1236,11 @@ static const struct dwcmshc_pltfm_data s .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | diff --git a/lede/target/linux/bcm27xx/patches-6.12/950-0358-mmc-sdhci-of-dwcmshc-define-sdio-timeout-clocks.patch b/lede/target/linux/bcm27xx/patches-6.12/950-0358-mmc-sdhci-of-dwcmshc-define-sdio-timeout-clocks.patch index 2ef84630ca..9cf0c1ad16 100644 --- a/lede/target/linux/bcm27xx/patches-6.12/950-0358-mmc-sdhci-of-dwcmshc-define-sdio-timeout-clocks.patch +++ b/lede/target/linux/bcm27xx/patches-6.12/950-0358-mmc-sdhci-of-dwcmshc-define-sdio-timeout-clocks.patch @@ -22,7 +22,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/mmc/host/sdhci-of-dwcmshc.c +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c -@@ -220,6 +220,7 @@ struct rk35xx_priv { +@@ -221,6 +221,7 @@ struct rk35xx_priv { struct dwcmshc_priv { struct clk *bus_clk; @@ -30,7 +30,7 @@ Signed-off-by: Jonathan Bell int vendor_specific_area1; /* P_VENDOR_SPECIFIC_AREA1 reg */ int vendor_specific_area2; /* P_VENDOR_SPECIFIC_AREA2 reg */ -@@ -288,6 +289,17 @@ static void dwcmshc_adma_write_desc(stru +@@ -289,6 +290,17 @@ static void dwcmshc_adma_write_desc(stru sdhci_adma_write_desc(host, desc, addr, len, cmd); } @@ -48,7 +48,7 @@ Signed-off-by: Jonathan Bell static unsigned int dwcmshc_get_max_clock(struct sdhci_host *host) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); -@@ -1114,10 +1126,11 @@ static int sg2042_init(struct device *de +@@ -1138,10 +1150,11 @@ static int sg2042_init(struct device *de } static const struct sdhci_ops sdhci_dwcmshc_ops = { @@ -61,7 +61,7 @@ Signed-off-by: Jonathan Bell .reset = sdhci_reset, .adma_write_desc = dwcmshc_adma_write_desc, .irq = dwcmshc_cqe_irq_handler, -@@ -1190,8 +1203,10 @@ static const struct sdhci_ops sdhci_dwcm +@@ -1214,8 +1227,10 @@ static const struct sdhci_ops sdhci_dwcm static const struct dwcmshc_pltfm_data sdhci_dwcmshc_pdata = { .pdata = { .ops = &sdhci_dwcmshc_ops, @@ -74,7 +74,7 @@ Signed-off-by: Jonathan Bell }, }; -@@ -1206,6 +1221,15 @@ static const struct dwcmshc_pltfm_data s +@@ -1230,6 +1245,15 @@ static const struct dwcmshc_pltfm_data s }; #endif @@ -90,7 +90,7 @@ Signed-off-by: Jonathan Bell static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk35xx_pdata = { .pdata = { .ops = &sdhci_dwcmshc_rk35xx_ops, -@@ -1317,6 +1341,10 @@ dsbl_cqe_caps: +@@ -1353,6 +1377,10 @@ dsbl_cqe_caps: static const struct of_device_id sdhci_dwcmshc_dt_ids[] = { { @@ -101,7 +101,7 @@ Signed-off-by: Jonathan Bell .compatible = "rockchip,rk3588-dwcmshc", .data = &sdhci_dwcmshc_rk35xx_pdata, }, -@@ -1405,13 +1433,32 @@ static int dwcmshc_probe(struct platform +@@ -1445,13 +1473,32 @@ static int dwcmshc_probe(struct platform priv->bus_clk = devm_clk_get(dev, "bus"); if (!IS_ERR(priv->bus_clk)) clk_prepare_enable(priv->bus_clk); @@ -134,7 +134,7 @@ Signed-off-by: Jonathan Bell priv->vendor_specific_area1 = sdhci_readl(host, DWCMSHC_P_VENDOR_AREA1) & DWCMSHC_AREA1_MASK; -@@ -1471,6 +1518,7 @@ err_rpm: +@@ -1511,6 +1558,7 @@ err_rpm: pm_runtime_put_noidle(dev); err_clk: clk_disable_unprepare(pltfm_host->clk); diff --git a/lede/target/linux/bcm27xx/patches-6.12/950-0379-drivers-iommu-Add-BCM2712-IOMMU.patch b/lede/target/linux/bcm27xx/patches-6.12/950-0379-drivers-iommu-Add-BCM2712-IOMMU.patch index d91c71213a..be3102acdc 100644 --- a/lede/target/linux/bcm27xx/patches-6.12/950-0379-drivers-iommu-Add-BCM2712-IOMMU.patch +++ b/lede/target/linux/bcm27xx/patches-6.12/950-0379-drivers-iommu-Add-BCM2712-IOMMU.patch @@ -55,7 +55,7 @@ Signed-off-by: Ratchanan Srirattanamet --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig -@@ -519,4 +519,11 @@ config SPRD_IOMMU +@@ -518,4 +518,11 @@ config SPRD_IOMMU Say Y here if you want to use the multimedia devices listed above. diff --git a/lede/target/linux/bcm27xx/patches-6.12/950-0502-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch b/lede/target/linux/bcm27xx/patches-6.12/950-0502-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch index 8ec9b4e5ee..f77140b7ba 100644 --- a/lede/target/linux/bcm27xx/patches-6.12/950-0502-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch +++ b/lede/target/linux/bcm27xx/patches-6.12/950-0502-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch @@ -15,7 +15,7 @@ Signed-off-by: Phil Elwell --- a/net/bluetooth/hci_sync.c +++ b/net/bluetooth/hci_sync.c -@@ -4866,7 +4866,8 @@ static const struct { +@@ -4877,7 +4877,8 @@ static const struct { */ static int hci_dev_setup_sync(struct hci_dev *hdev) { diff --git a/lede/target/linux/bcm27xx/patches-6.12/950-0539-firmware-Add-an-RP1-firmware-interface-over-mbox.patch b/lede/target/linux/bcm27xx/patches-6.12/950-0539-firmware-Add-an-RP1-firmware-interface-over-mbox.patch index 8d67f8e3d6..501036fde9 100644 --- a/lede/target/linux/bcm27xx/patches-6.12/950-0539-firmware-Add-an-RP1-firmware-interface-over-mbox.patch +++ b/lede/target/linux/bcm27xx/patches-6.12/950-0539-firmware-Add-an-RP1-firmware-interface-over-mbox.patch @@ -18,7 +18,7 @@ Signed-off-by: Phil Elwell --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig -@@ -120,6 +120,15 @@ config RASPBERRYPI_FIRMWARE +@@ -119,6 +119,15 @@ config RASPBERRYPI_FIRMWARE This option enables support for communicating with the firmware on the Raspberry Pi. diff --git a/lede/target/linux/bcm27xx/patches-6.12/950-0665-drm-vc4-tests-Drop-drm-parameter-for-vc4_find_crtc_f.patch b/lede/target/linux/bcm27xx/patches-6.12/950-0665-drm-vc4-tests-Drop-drm-parameter-for-vc4_find_crtc_f.patch index bf8eb892b7..ad53d18f6b 100644 --- a/lede/target/linux/bcm27xx/patches-6.12/950-0665-drm-vc4-tests-Drop-drm-parameter-for-vc4_find_crtc_f.patch +++ b/lede/target/linux/bcm27xx/patches-6.12/950-0665-drm-vc4-tests-Drop-drm-parameter-for-vc4_find_crtc_f.patch @@ -32,24 +32,24 @@ Signed-off-by: Maxime Ripard KUNIT_ASSERT_EQ(test, hweight32(encoder->possible_crtcs), 1); --- a/drivers/gpu/drm/vc4/tests/vc4_mock_output.c +++ b/drivers/gpu/drm/vc4/tests/vc4_mock_output.c -@@ -77,7 +77,7 @@ int vc4_mock_atomic_add_output(struct ku - encoder = vc4_find_encoder_by_type(drm, type); - KUNIT_ASSERT_NOT_ERR_OR_NULL(test, encoder); +@@ -78,7 +78,7 @@ int vc4_mock_atomic_add_output(struct ku + if (!encoder) + return -ENODEV; - crtc = vc4_find_crtc_for_encoder(test, drm, encoder); + crtc = vc4_find_crtc_for_encoder(test, encoder); - KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc); + if (!crtc) + return -ENODEV; - output = encoder_to_vc4_dummy_output(encoder); -@@ -115,7 +115,7 @@ int vc4_mock_atomic_del_output(struct ku - encoder = vc4_find_encoder_by_type(drm, type); - KUNIT_ASSERT_NOT_ERR_OR_NULL(test, encoder); +@@ -122,7 +122,7 @@ int vc4_mock_atomic_del_output(struct ku + if (!encoder) + return -ENODEV; - crtc = vc4_find_crtc_for_encoder(test, drm, encoder); + crtc = vc4_find_crtc_for_encoder(test, encoder); - KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc); + if (!crtc) + return -ENODEV; - crtc_state = drm_atomic_get_crtc_state(state, crtc); --- a/drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c +++ b/drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c @@ -131,7 +131,7 @@ get_vc4_crtc_state_for_encoder(struct ku diff --git a/lede/target/linux/bcm27xx/patches-6.12/950-0666-drm-vc4-tests-Return-the-allocated-output.patch b/lede/target/linux/bcm27xx/patches-6.12/950-0666-drm-vc4-tests-Return-the-allocated-output.patch index 3afd4d1f60..f0651bdad6 100644 --- a/lede/target/linux/bcm27xx/patches-6.12/950-0666-drm-vc4-tests-Return-the-allocated-output.patch +++ b/lede/target/linux/bcm27xx/patches-6.12/950-0666-drm-vc4-tests-Return-the-allocated-output.patch @@ -49,7 +49,7 @@ Signed-off-by: Maxime Ripard { struct drm_device *drm = state->dev; struct drm_connector_state *conn_state; -@@ -96,7 +97,7 @@ int vc4_mock_atomic_add_output(struct ku +@@ -102,7 +103,7 @@ int vc4_mock_atomic_add_output(struct ku crtc_state->active = true; diff --git a/lede/target/linux/bcm27xx/patches-6.12/950-0947-fixup-mmc-sdhci-of-dwcmshc-define-sdio-timeout-clock.patch b/lede/target/linux/bcm27xx/patches-6.12/950-0947-fixup-mmc-sdhci-of-dwcmshc-define-sdio-timeout-clock.patch index 263b6a7cfb..809ab256f4 100644 --- a/lede/target/linux/bcm27xx/patches-6.12/950-0947-fixup-mmc-sdhci-of-dwcmshc-define-sdio-timeout-clock.patch +++ b/lede/target/linux/bcm27xx/patches-6.12/950-0947-fixup-mmc-sdhci-of-dwcmshc-define-sdio-timeout-clock.patch @@ -19,7 +19,7 @@ Signed-off-by: Phil Elwell --- a/drivers/mmc/host/sdhci-of-dwcmshc.c +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c -@@ -1221,13 +1221,15 @@ static const struct dwcmshc_pltfm_data s +@@ -1245,13 +1245,15 @@ static const struct dwcmshc_pltfm_data s }; #endif diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0003-raspberrypi-firmware-Update-mailbox-commands.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0003-raspberrypi-firmware-Update-mailbox-commands.patch deleted file mode 100644 index 968720054c..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0003-raspberrypi-firmware-Update-mailbox-commands.patch +++ /dev/null @@ -1,102 +0,0 @@ -From e2726f05782135e15537575e95faea46c40a88a2 Mon Sep 17 00:00:00 2001 -From: Dom Cobley -Date: Thu, 7 Apr 2022 18:23:07 +0100 -Subject: [PATCH 0003/1085] raspberrypi-firmware: Update mailbox commands - -Signed-off-by: Dom Cobley ---- - include/soc/bcm2835/raspberrypi-firmware.h | 28 +++++++++++++++++++++- - 1 file changed, 27 insertions(+), 1 deletion(-) - ---- a/include/soc/bcm2835/raspberrypi-firmware.h -+++ b/include/soc/bcm2835/raspberrypi-firmware.h -@@ -36,6 +36,8 @@ struct rpi_firmware_property_tag_header - enum rpi_firmware_property_tag { - RPI_FIRMWARE_PROPERTY_END = 0, - RPI_FIRMWARE_GET_FIRMWARE_REVISION = 0x00000001, -+ RPI_FIRMWARE_GET_FIRMWARE_VARIANT = 0x00000002, -+ RPI_FIRMWARE_GET_FIRMWARE_HASH = 0x00000003, - - RPI_FIRMWARE_SET_CURSOR_INFO = 0x00008010, - RPI_FIRMWARE_SET_CURSOR_STATE = 0x00008011, -@@ -71,6 +73,7 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_GET_DISPMANX_RESOURCE_MEM_HANDLE = 0x00030014, - RPI_FIRMWARE_GET_EDID_BLOCK = 0x00030020, - RPI_FIRMWARE_GET_CUSTOMER_OTP = 0x00030021, -+ RPI_FIRMWARE_GET_EDID_BLOCK_DISPLAY = 0x00030023, - RPI_FIRMWARE_GET_DOMAIN_STATE = 0x00030030, - RPI_FIRMWARE_GET_THROTTLED = 0x00030046, - RPI_FIRMWARE_GET_CLOCK_MEASURED = 0x00030047, -@@ -89,8 +92,11 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_GET_PERIPH_REG = 0x00030045, - RPI_FIRMWARE_SET_PERIPH_REG = 0x00038045, - RPI_FIRMWARE_GET_POE_HAT_VAL = 0x00030049, -- RPI_FIRMWARE_SET_POE_HAT_VAL = 0x00030050, -+ RPI_FIRMWARE_SET_POE_HAT_VAL = 0x00038049, -+ RPI_FIRMWARE_SET_POE_HAT_VAL_OLD = 0x00030050, - RPI_FIRMWARE_NOTIFY_XHCI_RESET = 0x00030058, -+ RPI_FIRMWARE_GET_REBOOT_FLAGS = 0x00030064, -+ RPI_FIRMWARE_SET_REBOOT_FLAGS = 0x00038064, - RPI_FIRMWARE_NOTIFY_DISPLAY_DONE = 0x00030066, - - /* Dispmanx TAGS */ -@@ -105,9 +111,16 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_FRAMEBUFFER_GET_VIRTUAL_OFFSET = 0x00040009, - RPI_FIRMWARE_FRAMEBUFFER_GET_OVERSCAN = 0x0004000a, - RPI_FIRMWARE_FRAMEBUFFER_GET_PALETTE = 0x0004000b, -+ RPI_FIRMWARE_FRAMEBUFFER_GET_LAYER = 0x0004000c, -+ RPI_FIRMWARE_FRAMEBUFFER_GET_TRANSFORM = 0x0004000d, -+ RPI_FIRMWARE_FRAMEBUFFER_GET_VSYNC = 0x0004000e, - RPI_FIRMWARE_FRAMEBUFFER_GET_TOUCHBUF = 0x0004000f, - RPI_FIRMWARE_FRAMEBUFFER_GET_GPIOVIRTBUF = 0x00040010, - RPI_FIRMWARE_FRAMEBUFFER_RELEASE = 0x00048001, -+ RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_ID = 0x00040016, -+ RPI_FIRMWARE_FRAMEBUFFER_SET_DISPLAY_NUM = 0x00048013, -+ RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS = 0x00040013, -+ RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_SETTINGS = 0x00040014, - RPI_FIRMWARE_FRAMEBUFFER_TEST_PHYSICAL_WIDTH_HEIGHT = 0x00044003, - RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_WIDTH_HEIGHT = 0x00044004, - RPI_FIRMWARE_FRAMEBUFFER_TEST_DEPTH = 0x00044005, -@@ -116,22 +129,33 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_OFFSET = 0x00044009, - RPI_FIRMWARE_FRAMEBUFFER_TEST_OVERSCAN = 0x0004400a, - RPI_FIRMWARE_FRAMEBUFFER_TEST_PALETTE = 0x0004400b, -+ RPI_FIRMWARE_FRAMEBUFFER_TEST_LAYER = 0x0004400c, -+ RPI_FIRMWARE_FRAMEBUFFER_TEST_TRANSFORM = 0x0004400d, - RPI_FIRMWARE_FRAMEBUFFER_TEST_VSYNC = 0x0004400e, - RPI_FIRMWARE_FRAMEBUFFER_SET_PHYSICAL_WIDTH_HEIGHT = 0x00048003, - RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_WIDTH_HEIGHT = 0x00048004, - RPI_FIRMWARE_FRAMEBUFFER_SET_DEPTH = 0x00048005, - RPI_FIRMWARE_FRAMEBUFFER_SET_PIXEL_ORDER = 0x00048006, - RPI_FIRMWARE_FRAMEBUFFER_SET_ALPHA_MODE = 0x00048007, -+ RPI_FIRMWARE_FRAMEBUFFER_SET_PITCH = 0x00048008, - RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009, - RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a, - RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b, -+ - RPI_FIRMWARE_FRAMEBUFFER_SET_TOUCHBUF = 0x0004801f, - RPI_FIRMWARE_FRAMEBUFFER_SET_GPIOVIRTBUF = 0x00048020, - RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC = 0x0004800e, -+ RPI_FIRMWARE_FRAMEBUFFER_SET_LAYER = 0x0004800c, -+ RPI_FIRMWARE_FRAMEBUFFER_SET_TRANSFORM = 0x0004800d, - RPI_FIRMWARE_FRAMEBUFFER_SET_BACKLIGHT = 0x0004800f, - - RPI_FIRMWARE_VCHIQ_INIT = 0x00048010, - -+ RPI_FIRMWARE_SET_PLANE = 0x00048015, -+ RPI_FIRMWARE_GET_DISPLAY_TIMING = 0x00040017, -+ RPI_FIRMWARE_SET_TIMING = 0x00048017, -+ RPI_FIRMWARE_GET_DISPLAY_CFG = 0x00040018, -+ RPI_FIRMWARE_SET_DISPLAY_POWER = 0x00048019, - RPI_FIRMWARE_GET_COMMAND_LINE = 0x00050001, - RPI_FIRMWARE_GET_DMA_CHANNELS = 0x00060001, - }; -@@ -155,6 +179,8 @@ enum rpi_firmware_clk_id { - RPI_FIRMWARE_NUM_CLK_ID, - }; - -+#define GET_DISPLAY_SETTINGS_PAYLOAD_SIZE 64 -+ - /** - * struct rpi_firmware_clk_rate_request - Firmware Request for a rate - * @id: ID of the clock being queried diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0004-drm-vc4-Add-FKMS-as-an-acceptable-node-for-dma-range.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0004-drm-vc4-Add-FKMS-as-an-acceptable-node-for-dma-range.patch deleted file mode 100644 index 5434b1d642..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0004-drm-vc4-Add-FKMS-as-an-acceptable-node-for-dma-range.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 719d68c874bde83f2410dc41a34c3ddf6d71bda9 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Tue, 19 May 2020 16:20:30 +0100 -Subject: [PATCH 0004/1085] drm/vc4: Add FKMS as an acceptable node for dma - ranges. - -Under FKMS, the firmware (via FKMS) also requires the VideoCore cache -aliases for image planes, as defined by the dma-ranges under /soc. - -Add rpi-firmware-kms to the list of acceptable nodes to look for -to copy dma config from. - -Signed-off-by: Dave Stevenson ---- - drivers/gpu/drm/vc4/vc4_drv.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/gpu/drm/vc4/vc4_drv.c -+++ b/drivers/gpu/drm/vc4/vc4_drv.c -@@ -276,6 +276,7 @@ static void vc4_component_unbind_all(voi - static const struct of_device_id vc4_dma_range_matches[] = { - { .compatible = "brcm,bcm2711-hvs" }, - { .compatible = "brcm,bcm2835-hvs" }, -+ { .compatible = "raspberrypi,rpi-firmware-kms" }, - { .compatible = "brcm,bcm2835-v3d" }, - { .compatible = "brcm,cygnus-v3d" }, - { .compatible = "brcm,vc4-v3d" }, diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0005-drm-atomic-Don-t-fixup-modes-that-haven-t-been-reset.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0005-drm-atomic-Don-t-fixup-modes-that-haven-t-been-reset.patch deleted file mode 100644 index a27b7144a1..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0005-drm-atomic-Don-t-fixup-modes-that-haven-t-been-reset.patch +++ /dev/null @@ -1,25 +0,0 @@ -From de213e0c7477e4c1be9a80cd9ebf97227ed75dbe Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Thu, 7 Jan 2021 16:30:55 +0000 -Subject: [PATCH 0005/1085] drm/atomic: Don't fixup modes that haven't been - reset - -Signed-off-by: Dave Stevenson ---- - drivers/gpu/drm/drm_atomic_helper.c | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/drivers/gpu/drm/drm_atomic_helper.c -+++ b/drivers/gpu/drm/drm_atomic_helper.c -@@ -443,6 +443,11 @@ mode_fixup(struct drm_atomic_state *stat - new_crtc_state = - drm_atomic_get_new_crtc_state(state, new_conn_state->crtc); - -+ if (!new_crtc_state->mode_changed && -+ !new_crtc_state->connectors_changed) { -+ continue; -+ } -+ - /* - * Each encoder has at most one connector (since we always steal - * it away), so we won't call ->mode_fixup twice. diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0006-drm-vc4-Allow-setting-the-TV-norm-via-module-paramet.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0006-drm-vc4-Allow-setting-the-TV-norm-via-module-paramet.patch deleted file mode 100644 index b2fa8c8f57..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0006-drm-vc4-Allow-setting-the-TV-norm-via-module-paramet.patch +++ /dev/null @@ -1,210 +0,0 @@ -From 4fac21e3a4d37667a86c762064dad5f76c42c235 Mon Sep 17 00:00:00 2001 -From: Mateusz Kwiatkowski -Date: Thu, 15 Jul 2021 01:08:01 +0200 -Subject: [PATCH 0006/1085] drm/vc4: Allow setting the TV norm via module - parameter - -Similar to the ch7006 and nouveau drivers, introduce a "tv_mode" module -parameter that allow setting the TV norm by specifying vc4.tv_norm= on -the kernel command line. - -If that is not specified, try inferring one of the most popular norms -(PAL or NTSC) from the video mode specified on the command line. On -Raspberry Pis, this causes the most common cases of the sdtv_mode -setting in config.txt to be respected. - -Signed-off-by: Mateusz Kwiatkowski ---- - drivers/gpu/drm/vc4/vc4_vec.c | 108 +++++++++++++++++++++++++--------- - 1 file changed, 81 insertions(+), 27 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_vec.c -+++ b/drivers/gpu/drm/vc4/vc4_vec.c -@@ -67,7 +67,7 @@ - #define VEC_CONFIG0_YCDELAY BIT(4) - #define VEC_CONFIG0_RAMPEN BIT(2) - #define VEC_CONFIG0_YCDIS BIT(2) --#define VEC_CONFIG0_STD_MASK GENMASK(1, 0) -+#define VEC_CONFIG0_STD_MASK (VEC_CONFIG0_SECAM_STD | GENMASK(1, 0)) - #define VEC_CONFIG0_NTSC_STD 0 - #define VEC_CONFIG0_PAL_BDGHI_STD 1 - #define VEC_CONFIG0_PAL_M_STD 2 -@@ -186,6 +186,8 @@ - #define VEC_DAC_MISC_DAC_RST_N BIT(0) - - -+static char *vc4_vec_tv_norm; -+ - struct vc4_vec_variant { - u32 dac_config; - }; -@@ -353,6 +355,33 @@ static const struct drm_prop_enum_list l - { VC4_VEC_TV_MODE_SECAM, "SECAM", }, - }; - -+enum drm_connector_tv_mode -+vc4_vec_get_default_mode(struct drm_connector *connector) -+{ -+ if (vc4_vec_tv_norm) { -+ int ret; -+ -+ ret = drm_get_tv_mode_from_name(vc4_vec_tv_norm, strlen(vc4_vec_tv_norm)); -+ if (ret >= 0) -+ return ret; -+ } else if (connector->cmdline_mode.specified && -+ ((connector->cmdline_mode.refresh_specified && -+ (connector->cmdline_mode.refresh == 25 || -+ connector->cmdline_mode.refresh == 50)) || -+ (!connector->cmdline_mode.refresh_specified && -+ (connector->cmdline_mode.yres == 288 || -+ connector->cmdline_mode.yres == 576)))) { -+ /* -+ * no explicitly specified TV norm; use PAL if a mode that -+ * looks like PAL has been specified on the command line -+ */ -+ return DRM_MODE_TV_MODE_PAL; -+ } -+ -+ /* in all other cases, default to NTSC */ -+ return DRM_MODE_TV_MODE_NTSC; -+} -+ - static enum drm_connector_status - vc4_vec_connector_detect(struct drm_connector *connector, bool force) - { -@@ -363,6 +392,10 @@ static void vc4_vec_connector_reset(stru - { - drm_atomic_helper_connector_reset(connector); - drm_atomic_helper_connector_tv_reset(connector); -+ -+ /* preserve TV standard */ -+ if (connector->state) -+ connector->state->tv.mode = vc4_vec_get_default_mode(connector); - } - - static int -@@ -414,48 +447,52 @@ vc4_vec_connector_set_property(struct dr - } - - static int --vc4_vec_connector_get_property(struct drm_connector *connector, -- const struct drm_connector_state *state, -- struct drm_property *property, -- uint64_t *val) -+vc4_vec_generic_tv_mode_to_legacy(enum drm_connector_tv_mode tv_mode) - { -- struct vc4_vec *vec = connector_to_vc4_vec(connector); -- -- if (property != vec->legacy_tv_mode_property) -- return -EINVAL; -- -- switch (state->tv.mode) { -+ switch (tv_mode) { - case DRM_MODE_TV_MODE_NTSC: -- *val = VC4_VEC_TV_MODE_NTSC; -- break; -+ return VC4_VEC_TV_MODE_NTSC; - - case DRM_MODE_TV_MODE_NTSC_443: -- *val = VC4_VEC_TV_MODE_NTSC_443; -- break; -+ return VC4_VEC_TV_MODE_NTSC_443; - - case DRM_MODE_TV_MODE_NTSC_J: -- *val = VC4_VEC_TV_MODE_NTSC_J; -- break; -+ return VC4_VEC_TV_MODE_NTSC_J; - - case DRM_MODE_TV_MODE_PAL: -- *val = VC4_VEC_TV_MODE_PAL; -- break; -+ return VC4_VEC_TV_MODE_PAL; - - case DRM_MODE_TV_MODE_PAL_M: -- *val = VC4_VEC_TV_MODE_PAL_M; -- break; -+ return VC4_VEC_TV_MODE_PAL_M; - - case DRM_MODE_TV_MODE_PAL_N: -- *val = VC4_VEC_TV_MODE_PAL_N; -- break; -+ return VC4_VEC_TV_MODE_PAL_N; - - case DRM_MODE_TV_MODE_SECAM: -- *val = VC4_VEC_TV_MODE_SECAM; -- break; -+ return VC4_VEC_TV_MODE_SECAM; - - default: - return -EINVAL; - } -+} -+ -+static int -+vc4_vec_connector_get_property(struct drm_connector *connector, -+ const struct drm_connector_state *state, -+ struct drm_property *property, -+ uint64_t *val) -+{ -+ struct vc4_vec *vec = connector_to_vc4_vec(connector); -+ enum vc4_vec_tv_mode_id legacy_mode; -+ -+ if (property != vec->legacy_tv_mode_property) -+ return -EINVAL; -+ -+ legacy_mode = vc4_vec_generic_tv_mode_to_legacy(state->tv.mode); -+ if (legacy_mode < 0) -+ return legacy_mode; -+ -+ *val = legacy_mode; - - return 0; - } -@@ -478,6 +515,8 @@ static const struct drm_connector_helper - static int vc4_vec_connector_init(struct drm_device *dev, struct vc4_vec *vec) - { - struct drm_connector *connector = &vec->connector; -+ enum vc4_vec_tv_mode_id legacy_default_mode; -+ enum drm_connector_tv_mode default_mode; - struct drm_property *prop; - int ret; - -@@ -490,9 +529,17 @@ static int vc4_vec_connector_init(struct - - drm_connector_helper_add(connector, &vc4_vec_connector_helper_funcs); - -+ default_mode = vc4_vec_get_default_mode(connector); -+ if (default_mode < 0) -+ return default_mode; -+ - drm_object_attach_property(&connector->base, - dev->mode_config.tv_mode_property, -- DRM_MODE_TV_MODE_NTSC); -+ default_mode); -+ -+ legacy_default_mode = vc4_vec_generic_tv_mode_to_legacy(default_mode); -+ if (legacy_default_mode < 0) -+ return legacy_default_mode; - - prop = drm_property_create_enum(dev, 0, "mode", - legacy_tv_mode_names, -@@ -501,7 +548,7 @@ static int vc4_vec_connector_init(struct - return -ENOMEM; - vec->legacy_tv_mode_property = prop; - -- drm_object_attach_property(&connector->base, prop, VC4_VEC_TV_MODE_NTSC); -+ drm_object_attach_property(&connector->base, prop, legacy_default_mode); - - drm_connector_attach_encoder(connector, &vec->encoder.base); - -@@ -825,3 +872,10 @@ struct platform_driver vc4_vec_driver = - .of_match_table = vc4_vec_dt_match, - }, - }; -+ -+module_param_named(tv_norm, vc4_vec_tv_norm, charp, 0600); -+MODULE_PARM_DESC(tv_norm, "Default TV norm.\n" -+ "\t\tSupported: NTSC, NTSC-J, NTSC-443, PAL, PAL-M, PAL-N,\n" -+ "\t\t\tPAL60, SECAM.\n" -+ "\t\tDefault: PAL if a 50 Hz mode has been set via video=,\n" -+ "\t\t\tNTSC otherwise"); diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0007-drm-vc4-Add-firmware-kms-mode.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0007-drm-vc4-Add-firmware-kms-mode.patch deleted file mode 100644 index 468420bdee..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0007-drm-vc4-Add-firmware-kms-mode.patch +++ /dev/null @@ -1,2554 +0,0 @@ -From 874cf57daa68a80ad2a09476b8ec04ac45c1dc4e Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Mon, 7 Sep 2020 17:32:27 +0100 -Subject: [PATCH 0007/1085] drm/vc4: Add firmware-kms mode - -This is a squash of all firmware-kms related patches from previous -branches, up to and including -"drm/vc4: Set the possible crtcs mask correctly for planes with FKMS" -plus a couple of minor fixups for the 5.9 branch. -Please refer to earlier branches for full history. - -This patch includes work by Eric Anholt, James Hughes, Phil Elwell, -Dave Stevenson, Dom Cobley, and Jonathon Bell. - -Signed-off-by: Dave Stevenson - -drm/vc4: Fixup firmware-kms after "drm/atomic: Pass the full state to CRTC atomic enable/disable" - -Prototype for those calls changed, so amend fkms (which isn't -upstream) to match. - -Signed-off-by: Dave Stevenson - -drm/vc4: Fixup fkms for API change - -Atomic flush and check changed API, so fix up the downstream-only -FKMS driver. - -Signed-off-by: Dave Stevenson - -drm/vc4: Make normalize_zpos conditional on using fkms - -Eric's view was that there was no point in having zpos -support on vc4 as all the planes had the same functionality. - -Can be later squashed into (and fixes): -drm/vc4: Add firmware-kms mode - -Signed-off-by: Dom Cobley - -drm/vc4: FKMS: Change of Broadcast RGB mode needs a mode change - -The Broadcast RGB (aka HDMI limited/full range) property is only -notified to the firmware on mode change, so this needs to be -signalled when set. - -https://github.com/raspberrypi/firmware/issues/1580 - -Signed-off-by: Dave Stevenson - -vc4/drv: Only notify firmware of display done with kms - -fkms driver still wants firmware display to be active - -Signed-off-by: Dom Cobley - -ydrm/vc4: fkms: Fix margin calculations for the right/bottom edges - -The calculations clipped the right/bottom edge of the clipped -range based on the left/top margins. - -https://github.com/raspberrypi/linux/issues/4447 - -Signed-off-by: Dave Stevenson - -drm/vc4: fkms: Use new devm_rpi_firmware_get api - -drm/kms: Add allow_fb_modifiers - -Signed-off-by: Dom Cobley - -drm/vc4: Add async update support for cursor planes - -Now that cursors are implemented as regular planes, all cursor -movements result in atomic updates. As the firmware-kms driver -doesn't support asynchronous updates, these are synchronous, which -limits the update rate to the screen refresh rate. Xorg seems unaware -of this (or at least of the effect of this), because if the mouse is -configured with a higher update rate than the screen then continuous -mouse movement results in an increasing backlog of mouse events - -cue extreme lag. - -Add minimal support for asynchronous updates - limited to cursor -planes - to eliminate the lag. - -See: https://github.com/raspberrypi/linux/pull/4971 - https://github.com/raspberrypi/linux/issues/4988 - -Signed-off-by: Phil Elwell - -drivers/gpu/drm/vc4: Add missing 32-bit RGB formats - -The missing 32-bit per pixel ABGR and various "RGB with an X value" -formats are added. Change sent by Dave Stevenson. - -Signed-off-by: David Plowman - -drm: vc4: Fixup duplicated macro definition in vc4_firmware_kms - -Both vc4_drv.h and vc4_firmware_kms.c had definitions for -to_vc4_crtc. - -Rename the fkms one to make it unique, and drop the magic -define vc4_crtc vc4_kms_crtc -define to_vc4_crtc to_vc4_kms_crtc -that renamed half the variable and function names in a slightly -unexpected way. - -Signed-off-by: Dave Stevenson ---- - drivers/gpu/drm/vc4/Makefile | 1 + - drivers/gpu/drm/vc4/vc4_debugfs.c | 3 +- - drivers/gpu/drm/vc4/vc4_drv.c | 29 +- - drivers/gpu/drm/vc4/vc4_drv.h | 7 + - drivers/gpu/drm/vc4/vc4_firmware_kms.c | 2045 ++++++++++++++++++++++++ - drivers/gpu/drm/vc4/vc4_kms.c | 33 +- - drivers/gpu/drm/vc4/vc_image_types.h | 175 ++ - 7 files changed, 2279 insertions(+), 14 deletions(-) - create mode 100644 drivers/gpu/drm/vc4/vc4_firmware_kms.c - create mode 100644 drivers/gpu/drm/vc4/vc_image_types.h - ---- a/drivers/gpu/drm/vc4/Makefile -+++ b/drivers/gpu/drm/vc4/Makefile -@@ -9,6 +9,7 @@ vc4-y := \ - vc4_dpi.o \ - vc4_dsi.o \ - vc4_fence.o \ -+ vc4_firmware_kms.o \ - vc4_kms.o \ - vc4_gem.o \ - vc4_hdmi.o \ ---- a/drivers/gpu/drm/vc4/vc4_debugfs.c -+++ b/drivers/gpu/drm/vc4/vc4_debugfs.c -@@ -24,7 +24,8 @@ vc4_debugfs_init(struct drm_minor *minor - struct vc4_dev *vc4 = to_vc4_dev(minor->dev); - struct drm_device *drm = &vc4->base; - -- drm_WARN_ON(drm, vc4_hvs_debugfs_init(minor)); -+ if (vc4->hvs) -+ drm_WARN_ON(drm, vc4_hvs_debugfs_init(minor)); - - if (vc4->v3d) { - drm_WARN_ON(drm, vc4_bo_debugfs_init(minor)); ---- a/drivers/gpu/drm/vc4/vc4_drv.c -+++ b/drivers/gpu/drm/vc4/vc4_drv.c -@@ -283,6 +283,18 @@ static const struct of_device_id vc4_dma - {} - }; - -+/* -+ * we need this helper function for determining presence of fkms -+ * before it's been bound -+ */ -+static bool firmware_kms(void) -+{ -+ return of_device_is_available(of_find_compatible_node(NULL, NULL, -+ "raspberrypi,rpi-firmware-kms")) || -+ of_device_is_available(of_find_compatible_node(NULL, NULL, -+ "raspberrypi,rpi-firmware-kms-2711")); -+} -+ - static int vc4_drm_bind(struct device *dev) - { - struct platform_device *pdev = to_platform_device(dev); -@@ -355,7 +367,7 @@ static int vc4_drm_bind(struct device *d - if (ret) - return ret; - -- if (firmware) { -+ if (firmware && !firmware_kms()) { - ret = rpi_firmware_property(firmware, - RPI_FIRMWARE_NOTIFY_DISPLAY_DONE, - NULL, 0); -@@ -373,16 +385,20 @@ static int vc4_drm_bind(struct device *d - if (ret) - return ret; - -- ret = vc4_plane_create_additional_planes(drm); -- if (ret) -- goto unbind_all; -+ if (!vc4->firmware_kms) { -+ ret = vc4_plane_create_additional_planes(drm); -+ if (ret) -+ return ret; -+ } - - ret = vc4_kms_load(drm); - if (ret < 0) - goto unbind_all; - -- drm_for_each_crtc(crtc, drm) -- vc4_crtc_disable_at_boot(crtc); -+ if (!vc4->firmware_kms) { -+ drm_for_each_crtc(crtc, drm) -+ vc4_crtc_disable_at_boot(crtc); -+ } - - ret = drm_dev_register(drm, 0); - if (ret < 0) -@@ -426,6 +442,7 @@ static struct platform_driver *const com - &vc4_dsi_driver, - &vc4_txp_driver, - &vc4_crtc_driver, -+ &vc4_firmware_kms_driver, - &vc4_v3d_driver, - }; - ---- a/drivers/gpu/drm/vc4/vc4_drv.h -+++ b/drivers/gpu/drm/vc4/vc4_drv.h -@@ -87,8 +87,12 @@ struct vc4_dev { - - unsigned int irq; - -+ bool firmware_kms; -+ struct rpi_firmware *firmware; -+ - struct vc4_hvs *hvs; - struct vc4_v3d *v3d; -+ struct vc4_fkms *fkms; - - struct vc4_hang_state *hang_state; - -@@ -964,6 +968,9 @@ extern struct platform_driver vc4_dsi_dr - /* vc4_fence.c */ - extern const struct dma_fence_ops vc4_fence_ops; - -+/* vc4_firmware_kms.c */ -+extern struct platform_driver vc4_firmware_kms_driver; -+ - /* vc4_gem.c */ - int vc4_gem_init(struct drm_device *dev); - int vc4_submit_cl_ioctl(struct drm_device *dev, void *data, ---- /dev/null -+++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c -@@ -0,0 +1,2045 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* -+ * Copyright (C) 2016 Broadcom -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+/** -+ * DOC: VC4 firmware KMS module. -+ * -+ * As a hack to get us from the current closed source driver world -+ * toward a totally open stack, implement KMS on top of the Raspberry -+ * Pi's firmware display stack. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "vc4_drv.h" -+#include "vc4_regs.h" -+#include "vc_image_types.h" -+ -+int fkms_max_refresh_rate = 85; -+module_param(fkms_max_refresh_rate, int, 0644); -+MODULE_PARM_DESC(fkms_max_refresh_rate, "Max supported refresh rate"); -+ -+struct get_display_cfg { -+ u32 max_pixel_clock[2]; //Max pixel clock for each display -+}; -+ -+struct vc4_fkms { -+ struct get_display_cfg cfg; -+ bool bcm2711; -+}; -+ -+#define PLANES_PER_CRTC 8 -+ -+struct set_plane { -+ u8 display; -+ u8 plane_id; -+ u8 vc_image_type; -+ s8 layer; -+ -+ u16 width; -+ u16 height; -+ -+ u16 pitch; -+ u16 vpitch; -+ -+ u32 src_x; /* 16p16 */ -+ u32 src_y; /* 16p16 */ -+ -+ u32 src_w; /* 16p16 */ -+ u32 src_h; /* 16p16 */ -+ -+ s16 dst_x; -+ s16 dst_y; -+ -+ u16 dst_w; -+ u16 dst_h; -+ -+ u8 alpha; -+ u8 num_planes; -+ u8 is_vu; -+ u8 color_encoding; -+ -+ u32 planes[4]; /* DMA address of each plane */ -+ -+ u32 transform; -+}; -+ -+/* Values for the transform field */ -+#define TRANSFORM_NO_ROTATE 0 -+#define TRANSFORM_ROTATE_180 BIT(1) -+#define TRANSFORM_FLIP_HRIZ BIT(16) -+#define TRANSFORM_FLIP_VERT BIT(17) -+ -+struct mailbox_set_plane { -+ struct rpi_firmware_property_tag_header tag; -+ struct set_plane plane; -+}; -+ -+struct mailbox_blank_display { -+ struct rpi_firmware_property_tag_header tag1; -+ u32 display; -+ struct rpi_firmware_property_tag_header tag2; -+ u32 blank; -+}; -+ -+struct mailbox_display_pwr { -+ struct rpi_firmware_property_tag_header tag1; -+ u32 display; -+ u32 state; -+}; -+ -+struct mailbox_get_edid { -+ struct rpi_firmware_property_tag_header tag1; -+ u32 block; -+ u32 display_number; -+ u8 edid[128]; -+}; -+ -+struct set_timings { -+ u8 display; -+ u8 padding; -+ u16 video_id_code; -+ -+ u32 clock; /* in kHz */ -+ -+ u16 hdisplay; -+ u16 hsync_start; -+ -+ u16 hsync_end; -+ u16 htotal; -+ -+ u16 hskew; -+ u16 vdisplay; -+ -+ u16 vsync_start; -+ u16 vsync_end; -+ -+ u16 vtotal; -+ u16 vscan; -+ -+ u16 vrefresh; -+ u16 padding2; -+ -+ u32 flags; -+#define TIMINGS_FLAGS_H_SYNC_POS BIT(0) -+#define TIMINGS_FLAGS_H_SYNC_NEG 0 -+#define TIMINGS_FLAGS_V_SYNC_POS BIT(1) -+#define TIMINGS_FLAGS_V_SYNC_NEG 0 -+#define TIMINGS_FLAGS_INTERLACE BIT(2) -+ -+#define TIMINGS_FLAGS_ASPECT_MASK GENMASK(7, 4) -+#define TIMINGS_FLAGS_ASPECT_NONE (0 << 4) -+#define TIMINGS_FLAGS_ASPECT_4_3 (1 << 4) -+#define TIMINGS_FLAGS_ASPECT_16_9 (2 << 4) -+#define TIMINGS_FLAGS_ASPECT_64_27 (3 << 4) -+#define TIMINGS_FLAGS_ASPECT_256_135 (4 << 4) -+ -+/* Limited range RGB flag. Not set corresponds to full range. */ -+#define TIMINGS_FLAGS_RGB_LIMITED BIT(8) -+/* DVI monitor, therefore disable infoframes. Not set corresponds to HDMI. */ -+#define TIMINGS_FLAGS_DVI BIT(9) -+/* Double clock */ -+#define TIMINGS_FLAGS_DBL_CLK BIT(10) -+}; -+ -+struct mailbox_set_mode { -+ struct rpi_firmware_property_tag_header tag1; -+ struct set_timings timings; -+}; -+ -+static const struct vc_image_format { -+ u32 drm; /* DRM_FORMAT_* */ -+ u32 vc_image; /* VC_IMAGE_* */ -+ u32 is_vu; -+} vc_image_formats[] = { -+ { -+ .drm = DRM_FORMAT_XRGB8888, -+ .vc_image = VC_IMAGE_XRGB8888, -+ }, -+ { -+ .drm = DRM_FORMAT_ARGB8888, -+ .vc_image = VC_IMAGE_ARGB8888, -+ }, -+ { -+ .drm = DRM_FORMAT_XBGR8888, -+ .vc_image = VC_IMAGE_RGBX32, -+ }, -+ { -+ .drm = DRM_FORMAT_ABGR8888, -+ .vc_image = VC_IMAGE_RGBA32, -+ }, -+ { -+ .drm = DRM_FORMAT_RGBX8888, -+ .vc_image = VC_IMAGE_BGRX8888, -+ }, -+ { -+ .drm = DRM_FORMAT_BGRX8888, -+ .vc_image = VC_IMAGE_RGBX8888, -+ }, -+ { -+ .drm = DRM_FORMAT_RGB565, -+ .vc_image = VC_IMAGE_RGB565, -+ }, -+ { -+ .drm = DRM_FORMAT_RGB888, -+ .vc_image = VC_IMAGE_BGR888, -+ }, -+ { -+ .drm = DRM_FORMAT_BGR888, -+ .vc_image = VC_IMAGE_RGB888, -+ }, -+ { -+ .drm = DRM_FORMAT_YUV422, -+ .vc_image = VC_IMAGE_YUV422PLANAR, -+ }, -+ { -+ .drm = DRM_FORMAT_YUV420, -+ .vc_image = VC_IMAGE_YUV420, -+ }, -+ { -+ .drm = DRM_FORMAT_YVU420, -+ .vc_image = VC_IMAGE_YUV420, -+ .is_vu = 1, -+ }, -+ { -+ .drm = DRM_FORMAT_NV12, -+ .vc_image = VC_IMAGE_YUV420SP, -+ }, -+ { -+ .drm = DRM_FORMAT_NV21, -+ .vc_image = VC_IMAGE_YUV420SP, -+ .is_vu = 1, -+ }, -+ { -+ .drm = DRM_FORMAT_P030, -+ .vc_image = VC_IMAGE_YUV10COL, -+ }, -+}; -+ -+static const struct vc_image_format *vc4_get_vc_image_fmt(u32 drm_format) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(vc_image_formats); i++) { -+ if (vc_image_formats[i].drm == drm_format) -+ return &vc_image_formats[i]; -+ } -+ -+ return NULL; -+} -+ -+/* The firmware delivers a vblank interrupt to us through the SMI -+ * hardware, which has only this one register. -+ */ -+#define SMICS 0x0 -+#define SMIDSW0 0x14 -+#define SMIDSW1 0x1C -+#define SMICS_INTERRUPTS (BIT(9) | BIT(10) | BIT(11)) -+ -+/* Flag to denote that the firmware is giving multiple display callbacks */ -+#define SMI_NEW 0xabcd0000 -+ -+struct vc4_fkms_crtc { -+ struct drm_crtc base; -+ struct drm_encoder *encoder; -+ struct drm_connector *connector; -+ void __iomem *regs; -+ -+ struct drm_pending_vblank_event *event; -+ bool vblank_enabled; -+ u32 display_number; -+ u32 display_type; -+}; -+ -+static inline struct vc4_fkms_crtc *to_vc4_fkms_crtc(struct drm_crtc *crtc) -+{ -+ return container_of(crtc, struct vc4_fkms_crtc, base); -+} -+ -+struct vc4_fkms_encoder { -+ struct drm_encoder base; -+ bool hdmi_monitor; -+ bool rgb_range_selectable; -+ int display_num; -+}; -+ -+static inline struct vc4_fkms_encoder * -+to_vc4_fkms_encoder(struct drm_encoder *encoder) -+{ -+ return container_of(encoder, struct vc4_fkms_encoder, base); -+} -+ -+/* "Broadcast RGB" property. -+ * Allows overriding of HDMI full or limited range RGB -+ */ -+#define VC4_BROADCAST_RGB_AUTO 0 -+#define VC4_BROADCAST_RGB_FULL 1 -+#define VC4_BROADCAST_RGB_LIMITED 2 -+ -+/* VC4 FKMS connector KMS struct */ -+struct vc4_fkms_connector { -+ struct drm_connector base; -+ -+ /* Since the connector is attached to just the one encoder, -+ * this is the reference to it so we can do the best_encoder() -+ * hook. -+ */ -+ struct drm_encoder *encoder; -+ struct vc4_dev *vc4_dev; -+ u32 display_number; -+ u32 display_type; -+ -+ struct drm_property *broadcast_rgb_property; -+}; -+ -+static inline struct vc4_fkms_connector * -+to_vc4_fkms_connector(struct drm_connector *connector) -+{ -+ return container_of(connector, struct vc4_fkms_connector, base); -+} -+ -+/* VC4 FKMS connector state */ -+struct vc4_fkms_connector_state { -+ struct drm_connector_state base; -+ -+ int broadcast_rgb; -+}; -+ -+#define to_vc4_fkms_connector_state(x) \ -+ container_of(x, struct vc4_fkms_connector_state, base) -+ -+static u32 vc4_get_display_type(u32 display_number) -+{ -+ const u32 display_types[] = { -+ /* The firmware display (DispmanX) IDs map to specific types in -+ * a fixed manner. -+ */ -+ DRM_MODE_ENCODER_DSI, /* MAIN_LCD - DSI or DPI */ -+ DRM_MODE_ENCODER_DSI, /* AUX_LCD */ -+ DRM_MODE_ENCODER_TMDS, /* HDMI0 */ -+ DRM_MODE_ENCODER_TVDAC, /* VEC */ -+ DRM_MODE_ENCODER_NONE, /* FORCE_LCD */ -+ DRM_MODE_ENCODER_NONE, /* FORCE_TV */ -+ DRM_MODE_ENCODER_NONE, /* FORCE_OTHER */ -+ DRM_MODE_ENCODER_TMDS, /* HDMI1 */ -+ DRM_MODE_ENCODER_NONE, /* FORCE_TV2 */ -+ }; -+ return display_number > ARRAY_SIZE(display_types) - 1 ? -+ DRM_MODE_ENCODER_NONE : display_types[display_number]; -+} -+ -+/* Firmware's structure for making an FB mbox call. */ -+struct fbinfo_s { -+ u32 xres, yres, xres_virtual, yres_virtual; -+ u32 pitch, bpp; -+ u32 xoffset, yoffset; -+ u32 base; -+ u32 screen_size; -+ u16 cmap[256]; -+}; -+ -+struct vc4_fkms_plane { -+ struct drm_plane base; -+ struct fbinfo_s *fbinfo; -+ dma_addr_t fbinfo_bus_addr; -+ u32 pitch; -+ struct mailbox_set_plane mb; -+}; -+ -+static inline struct vc4_fkms_plane *to_vc4_fkms_plane(struct drm_plane *plane) -+{ -+ return (struct vc4_fkms_plane *)plane; -+} -+ -+static int vc4_plane_set_blank(struct drm_plane *plane, bool blank) -+{ -+ struct vc4_dev *vc4 = to_vc4_dev(plane->dev); -+ struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane); -+ struct mailbox_set_plane blank_mb = { -+ .tag = { RPI_FIRMWARE_SET_PLANE, sizeof(struct set_plane), 0 }, -+ .plane = { -+ .display = vc4_plane->mb.plane.display, -+ .plane_id = vc4_plane->mb.plane.plane_id, -+ } -+ }; -+ static const char * const plane_types[] = { -+ "overlay", -+ "primary", -+ "cursor" -+ }; -+ int ret; -+ -+ DRM_DEBUG_ATOMIC("[PLANE:%d:%s] %s plane %s", -+ plane->base.id, plane->name, plane_types[plane->type], -+ blank ? "blank" : "unblank"); -+ -+ if (blank) -+ ret = rpi_firmware_property_list(vc4->firmware, &blank_mb, -+ sizeof(blank_mb)); -+ else -+ ret = rpi_firmware_property_list(vc4->firmware, &vc4_plane->mb, -+ sizeof(vc4_plane->mb)); -+ -+ WARN_ONCE(ret, "%s: firmware call failed. Please update your firmware", -+ __func__); -+ return ret; -+} -+ -+static void vc4_fkms_crtc_get_margins(struct drm_crtc_state *state, -+ unsigned int *left, unsigned int *right, -+ unsigned int *top, unsigned int *bottom) -+{ -+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state); -+ struct drm_connector_state *conn_state; -+ struct drm_connector *conn; -+ int i; -+ -+ *left = vc4_state->margins.left; -+ *right = vc4_state->margins.right; -+ *top = vc4_state->margins.top; -+ *bottom = vc4_state->margins.bottom; -+ -+ /* We have to interate over all new connector states because -+ * vc4_fkms_crtc_get_margins() might be called before -+ * vc4_fkms_crtc_atomic_check() which means margins info in -+ * vc4_crtc_state might be outdated. -+ */ -+ for_each_new_connector_in_state(state->state, conn, conn_state, i) { -+ if (conn_state->crtc != state->crtc) -+ continue; -+ -+ *left = conn_state->tv.margins.left; -+ *right = conn_state->tv.margins.right; -+ *top = conn_state->tv.margins.top; -+ *bottom = conn_state->tv.margins.bottom; -+ break; -+ } -+} -+ -+static int vc4_fkms_margins_adj(struct drm_plane_state *pstate, -+ struct set_plane *plane) -+{ -+ unsigned int left, right, top, bottom; -+ int adjhdisplay, adjvdisplay; -+ struct drm_crtc_state *crtc_state; -+ -+ crtc_state = drm_atomic_get_new_crtc_state(pstate->state, -+ pstate->crtc); -+ -+ vc4_fkms_crtc_get_margins(crtc_state, &left, &right, &top, &bottom); -+ -+ if (!left && !right && !top && !bottom) -+ return 0; -+ -+ if (left + right >= crtc_state->mode.hdisplay || -+ top + bottom >= crtc_state->mode.vdisplay) -+ return -EINVAL; -+ -+ adjhdisplay = crtc_state->mode.hdisplay - (left + right); -+ plane->dst_x = DIV_ROUND_CLOSEST(plane->dst_x * adjhdisplay, -+ (int)crtc_state->mode.hdisplay); -+ plane->dst_x += left; -+ if (plane->dst_x > (int)(crtc_state->mode.hdisplay - right)) -+ plane->dst_x = crtc_state->mode.hdisplay - right; -+ -+ adjvdisplay = crtc_state->mode.vdisplay - (top + bottom); -+ plane->dst_y = DIV_ROUND_CLOSEST(plane->dst_y * adjvdisplay, -+ (int)crtc_state->mode.vdisplay); -+ plane->dst_y += top; -+ if (plane->dst_y > (int)(crtc_state->mode.vdisplay - bottom)) -+ plane->dst_y = crtc_state->mode.vdisplay - bottom; -+ -+ plane->dst_w = DIV_ROUND_CLOSEST(plane->dst_w * adjhdisplay, -+ crtc_state->mode.hdisplay); -+ plane->dst_h = DIV_ROUND_CLOSEST(plane->dst_h * adjvdisplay, -+ crtc_state->mode.vdisplay); -+ -+ if (!plane->dst_w || !plane->dst_h) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static void vc4_plane_atomic_update(struct drm_plane *plane, -+ struct drm_atomic_state *old_state) -+{ -+ struct drm_plane_state *state = plane->state; -+ -+ /* -+ * Do NOT set now, as we haven't checked if the crtc is active or not. -+ * Set from vc4_plane_set_blank instead. -+ * -+ * If the CRTC is on (or going to be on) and we're enabled, -+ * then unblank. Otherwise, stay blank until CRTC enable. -+ */ -+ if (state->crtc->state->active) -+ vc4_plane_set_blank(plane, false); -+} -+ -+static void vc4_plane_atomic_disable(struct drm_plane *plane, -+ struct drm_atomic_state *old_state) -+{ -+ struct drm_plane_state *state = plane->state; -+ struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane); -+ -+ DRM_DEBUG_ATOMIC("[PLANE:%d:%s] plane disable %dx%d@%d +%d,%d\n", -+ plane->base.id, plane->name, -+ state->crtc_w, -+ state->crtc_h, -+ vc4_plane->mb.plane.vc_image_type, -+ state->crtc_x, -+ state->crtc_y); -+ vc4_plane_set_blank(plane, true); -+} -+ -+static bool plane_enabled(struct drm_plane_state *state) -+{ -+ return state->fb && state->crtc; -+} -+ -+static int vc4_plane_to_mb(struct drm_plane *plane, -+ struct mailbox_set_plane *mb, -+ struct drm_plane_state *state) -+{ -+ struct drm_framebuffer *fb = state->fb; -+ struct drm_gem_dma_object *bo = drm_fb_dma_get_gem_obj(fb, 0); -+ const struct drm_format_info *drm_fmt = fb->format; -+ const struct vc_image_format *vc_fmt = -+ vc4_get_vc_image_fmt(drm_fmt->format); -+ int num_planes = fb->format->num_planes; -+ unsigned int rotation; -+ -+ mb->plane.vc_image_type = vc_fmt->vc_image; -+ mb->plane.width = fb->width; -+ mb->plane.height = fb->height; -+ mb->plane.pitch = fb->pitches[0]; -+ mb->plane.src_w = state->src_w; -+ mb->plane.src_h = state->src_h; -+ mb->plane.src_x = state->src_x; -+ mb->plane.src_y = state->src_y; -+ mb->plane.dst_w = state->crtc_w; -+ mb->plane.dst_h = state->crtc_h; -+ mb->plane.dst_x = state->crtc_x; -+ mb->plane.dst_y = state->crtc_y; -+ mb->plane.alpha = state->alpha >> 8; -+ mb->plane.layer = state->normalized_zpos ? -+ state->normalized_zpos : -127; -+ mb->plane.num_planes = num_planes; -+ mb->plane.is_vu = vc_fmt->is_vu; -+ mb->plane.planes[0] = bo->dma_addr + fb->offsets[0]; -+ -+ rotation = drm_rotation_simplify(state->rotation, -+ DRM_MODE_ROTATE_0 | -+ DRM_MODE_REFLECT_X | -+ DRM_MODE_REFLECT_Y); -+ -+ mb->plane.transform = TRANSFORM_NO_ROTATE; -+ if (rotation & DRM_MODE_REFLECT_X) -+ mb->plane.transform |= TRANSFORM_FLIP_HRIZ; -+ if (rotation & DRM_MODE_REFLECT_Y) -+ mb->plane.transform |= TRANSFORM_FLIP_VERT; -+ -+ vc4_fkms_margins_adj(state, &mb->plane); -+ -+ if (num_planes > 1) { -+ /* Assume this must be YUV */ -+ /* Makes assumptions on the stride for the chroma planes as we -+ * can't easily plumb in non-standard pitches. -+ */ -+ mb->plane.planes[1] = bo->dma_addr + fb->offsets[1]; -+ if (num_planes > 2) -+ mb->plane.planes[2] = bo->dma_addr + fb->offsets[2]; -+ else -+ mb->plane.planes[2] = 0; -+ -+ /* Special case the YUV420 with U and V as line interleaved -+ * planes as we have special handling for that case. -+ */ -+ if (num_planes == 3 && -+ (fb->offsets[2] - fb->offsets[1]) == fb->pitches[1]) -+ mb->plane.vc_image_type = VC_IMAGE_YUV420_S; -+ -+ switch (state->color_encoding) { -+ default: -+ case DRM_COLOR_YCBCR_BT601: -+ if (state->color_range == DRM_COLOR_YCBCR_LIMITED_RANGE) -+ mb->plane.color_encoding = -+ VC_IMAGE_YUVINFO_CSC_ITUR_BT601; -+ else -+ mb->plane.color_encoding = -+ VC_IMAGE_YUVINFO_CSC_JPEG_JFIF; -+ break; -+ case DRM_COLOR_YCBCR_BT709: -+ /* Currently no support for a full range BT709 */ -+ mb->plane.color_encoding = -+ VC_IMAGE_YUVINFO_CSC_ITUR_BT709; -+ break; -+ case DRM_COLOR_YCBCR_BT2020: -+ /* Currently no support for a full range BT2020 */ -+ mb->plane.color_encoding = -+ VC_IMAGE_YUVINFO_CSC_REC_2020; -+ break; -+ } -+ } else { -+ mb->plane.planes[1] = 0; -+ mb->plane.planes[2] = 0; -+ } -+ mb->plane.planes[3] = 0; -+ -+ switch (fourcc_mod_broadcom_mod(fb->modifier)) { -+ case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED: -+ switch (mb->plane.vc_image_type) { -+ case VC_IMAGE_XRGB8888: -+ mb->plane.vc_image_type = VC_IMAGE_TF_RGBX32; -+ break; -+ case VC_IMAGE_ARGB8888: -+ mb->plane.vc_image_type = VC_IMAGE_TF_RGBA32; -+ break; -+ case VC_IMAGE_RGB565: -+ mb->plane.vc_image_type = VC_IMAGE_TF_RGB565; -+ break; -+ } -+ break; -+ case DRM_FORMAT_MOD_BROADCOM_SAND128: -+ switch (mb->plane.vc_image_type) { -+ case VC_IMAGE_YUV420SP: -+ mb->plane.vc_image_type = VC_IMAGE_YUV_UV; -+ break; -+ /* VC_IMAGE_YUV10COL could be included in here, but it is only -+ * valid as a SAND128 format, so the table at the top will have -+ * already set the correct format. -+ */ -+ } -+ /* Note that the column pitch is passed across in lines, not -+ * bytes. -+ */ -+ mb->plane.pitch = fourcc_mod_broadcom_param(fb->modifier); -+ break; -+ } -+ -+ DRM_DEBUG_ATOMIC("[PLANE:%d:%s] plane update %dx%d@%d +dst(%d,%d, %d,%d) +src(%d,%d, %d,%d) 0x%08x/%08x/%08x/%d, alpha %u zpos %u\n", -+ plane->base.id, plane->name, -+ mb->plane.width, -+ mb->plane.height, -+ mb->plane.vc_image_type, -+ state->crtc_x, -+ state->crtc_y, -+ state->crtc_w, -+ state->crtc_h, -+ mb->plane.src_x, -+ mb->plane.src_y, -+ mb->plane.src_w, -+ mb->plane.src_h, -+ mb->plane.planes[0], -+ mb->plane.planes[1], -+ mb->plane.planes[2], -+ fb->pitches[0], -+ state->alpha, -+ state->normalized_zpos); -+ -+ return 0; -+} -+ -+static int vc4_plane_atomic_check(struct drm_plane *plane, -+ struct drm_atomic_state *state) -+{ -+ struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, -+ plane); -+ struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane); -+ -+ if (!plane_enabled(new_plane_state)) -+ return 0; -+ -+ return vc4_plane_to_mb(plane, &vc4_plane->mb, new_plane_state); -+} -+ -+static void vc4_plane_atomic_async_update(struct drm_plane *plane, -+ struct drm_atomic_state *state) -+{ -+ struct drm_plane_state *new_plane_state = -+ drm_atomic_get_new_plane_state(state, plane); -+ -+ swap(plane->state->fb, new_plane_state->fb); -+ plane->state->crtc_x = new_plane_state->crtc_x; -+ plane->state->crtc_y = new_plane_state->crtc_y; -+ plane->state->crtc_w = new_plane_state->crtc_w; -+ plane->state->crtc_h = new_plane_state->crtc_h; -+ plane->state->src_x = new_plane_state->src_x; -+ plane->state->src_y = new_plane_state->src_y; -+ plane->state->src_w = new_plane_state->src_w; -+ plane->state->src_h = new_plane_state->src_h; -+ plane->state->alpha = new_plane_state->alpha; -+ plane->state->pixel_blend_mode = new_plane_state->pixel_blend_mode; -+ plane->state->rotation = new_plane_state->rotation; -+ plane->state->zpos = new_plane_state->zpos; -+ plane->state->normalized_zpos = new_plane_state->normalized_zpos; -+ plane->state->color_encoding = new_plane_state->color_encoding; -+ plane->state->color_range = new_plane_state->color_range; -+ plane->state->src = new_plane_state->src; -+ plane->state->dst = new_plane_state->dst; -+ plane->state->visible = new_plane_state->visible; -+ -+ vc4_plane_set_blank(plane, false); -+} -+ -+static int vc4_plane_atomic_async_check(struct drm_plane *plane, -+ struct drm_atomic_state *state) -+{ -+ struct drm_plane_state *new_plane_state = -+ drm_atomic_get_new_plane_state(state, plane); -+ int ret = -EINVAL; -+ -+ if (plane->type == 2 && -+ plane->state->fb && -+ new_plane_state->crtc->state->active) -+ ret = 0; -+ -+ return ret; -+} -+ -+/* Called during init to allocate the plane's atomic state. */ -+static void vc4_plane_reset(struct drm_plane *plane) -+{ -+ struct vc4_plane_state *vc4_state; -+ -+ WARN_ON(plane->state); -+ -+ vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL); -+ if (!vc4_state) -+ return; -+ -+ __drm_atomic_helper_plane_reset(plane, &vc4_state->base); -+} -+ -+static void vc4_plane_destroy(struct drm_plane *plane) -+{ -+ drm_plane_cleanup(plane); -+} -+ -+static bool vc4_fkms_format_mod_supported(struct drm_plane *plane, -+ uint32_t format, -+ uint64_t modifier) -+{ -+ /* Support T_TILING for RGB formats only. */ -+ switch (format) { -+ case DRM_FORMAT_XRGB8888: -+ case DRM_FORMAT_ARGB8888: -+ case DRM_FORMAT_RGB565: -+ switch (modifier) { -+ case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED: -+ case DRM_FORMAT_MOD_LINEAR: -+ return true; -+ default: -+ return false; -+ } -+ case DRM_FORMAT_NV12: -+ switch (fourcc_mod_broadcom_mod(modifier)) { -+ case DRM_FORMAT_MOD_LINEAR: -+ case DRM_FORMAT_MOD_BROADCOM_SAND128: -+ return true; -+ default: -+ return false; -+ } -+ case DRM_FORMAT_P030: -+ switch (fourcc_mod_broadcom_mod(modifier)) { -+ case DRM_FORMAT_MOD_BROADCOM_SAND128: -+ return true; -+ default: -+ return false; -+ } -+ case DRM_FORMAT_NV21: -+ case DRM_FORMAT_RGB888: -+ case DRM_FORMAT_BGR888: -+ case DRM_FORMAT_YUV422: -+ case DRM_FORMAT_YUV420: -+ case DRM_FORMAT_YVU420: -+ default: -+ return (modifier == DRM_FORMAT_MOD_LINEAR); -+ } -+} -+ -+static struct drm_plane_state *vc4_plane_duplicate_state(struct drm_plane *plane) -+{ -+ struct vc4_plane_state *vc4_state; -+ -+ if (WARN_ON(!plane->state)) -+ return NULL; -+ -+ vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL); -+ if (!vc4_state) -+ return NULL; -+ -+ __drm_atomic_helper_plane_duplicate_state(plane, &vc4_state->base); -+ -+ return &vc4_state->base; -+} -+ -+static const struct drm_plane_funcs vc4_plane_funcs = { -+ .update_plane = drm_atomic_helper_update_plane, -+ .disable_plane = drm_atomic_helper_disable_plane, -+ .destroy = vc4_plane_destroy, -+ .set_property = NULL, -+ .reset = vc4_plane_reset, -+ .atomic_duplicate_state = vc4_plane_duplicate_state, -+ .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, -+ .format_mod_supported = vc4_fkms_format_mod_supported, -+}; -+ -+static const struct drm_plane_helper_funcs vc4_plane_helper_funcs = { -+ .prepare_fb = drm_gem_plane_helper_prepare_fb, -+ .cleanup_fb = NULL, -+ .atomic_check = vc4_plane_atomic_check, -+ .atomic_update = vc4_plane_atomic_update, -+ .atomic_disable = vc4_plane_atomic_disable, -+ .atomic_async_check = vc4_plane_atomic_async_check, -+ .atomic_async_update = vc4_plane_atomic_async_update, -+}; -+ -+static struct drm_plane *vc4_fkms_plane_init(struct drm_device *dev, -+ enum drm_plane_type type, -+ u8 display_num, -+ u8 plane_id) -+{ -+ struct drm_plane *plane = NULL; -+ struct vc4_fkms_plane *vc4_plane; -+ u32 formats[ARRAY_SIZE(vc_image_formats)]; -+ unsigned int default_zpos = 0; -+ u32 num_formats = 0; -+ int ret = 0; -+ static const uint64_t modifiers[] = { -+ DRM_FORMAT_MOD_LINEAR, -+ /* VC4_T_TILED should come after linear, because we -+ * would prefer to scan out linear (less bus traffic). -+ */ -+ DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED, -+ DRM_FORMAT_MOD_BROADCOM_SAND128, -+ DRM_FORMAT_MOD_INVALID, -+ }; -+ int i; -+ -+ vc4_plane = devm_kzalloc(dev->dev, sizeof(*vc4_plane), -+ GFP_KERNEL); -+ if (!vc4_plane) { -+ ret = -ENOMEM; -+ goto fail; -+ } -+ -+ for (i = 0; i < ARRAY_SIZE(vc_image_formats); i++) -+ formats[num_formats++] = vc_image_formats[i].drm; -+ -+ plane = &vc4_plane->base; -+ ret = drm_universal_plane_init(dev, plane, 0, -+ &vc4_plane_funcs, -+ formats, num_formats, modifiers, -+ type, NULL); -+ -+ /* FIXME: Do we need to be checking return values from all these calls? -+ */ -+ drm_plane_helper_add(plane, &vc4_plane_helper_funcs); -+ -+ drm_plane_create_alpha_property(plane); -+ drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0, -+ DRM_MODE_ROTATE_0 | -+ DRM_MODE_ROTATE_180 | -+ DRM_MODE_REFLECT_X | -+ DRM_MODE_REFLECT_Y); -+ drm_plane_create_color_properties(plane, -+ BIT(DRM_COLOR_YCBCR_BT601) | -+ BIT(DRM_COLOR_YCBCR_BT709) | -+ BIT(DRM_COLOR_YCBCR_BT2020), -+ BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) | -+ BIT(DRM_COLOR_YCBCR_FULL_RANGE), -+ DRM_COLOR_YCBCR_BT709, -+ DRM_COLOR_YCBCR_LIMITED_RANGE); -+ -+ /* -+ * Default frame buffer setup is with FB on -127, and raspistill etc -+ * tend to drop overlays on layer 2. Cursor plane was on layer +127. -+ * -+ * For F-KMS the mailbox call allows for a s8. -+ * Remap zpos 0 to -127 for the background layer, but leave all the -+ * other layers as requested by KMS. -+ */ -+ switch (type) { -+ default: -+ case DRM_PLANE_TYPE_PRIMARY: -+ default_zpos = 0; -+ break; -+ case DRM_PLANE_TYPE_OVERLAY: -+ default_zpos = 1; -+ break; -+ case DRM_PLANE_TYPE_CURSOR: -+ default_zpos = 2; -+ break; -+ } -+ drm_plane_create_zpos_property(plane, default_zpos, 0, 127); -+ -+ /* Prepare the static elements of the mailbox structure */ -+ vc4_plane->mb.tag.tag = RPI_FIRMWARE_SET_PLANE; -+ vc4_plane->mb.tag.buf_size = sizeof(struct set_plane); -+ vc4_plane->mb.tag.req_resp_size = 0; -+ vc4_plane->mb.plane.display = display_num; -+ vc4_plane->mb.plane.plane_id = plane_id; -+ vc4_plane->mb.plane.layer = default_zpos ? default_zpos : -127; -+ -+ return plane; -+fail: -+ if (plane) -+ vc4_plane_destroy(plane); -+ -+ return ERR_PTR(ret); -+} -+ -+static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc) -+{ -+ struct drm_device *dev = crtc->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(dev); -+ struct vc4_fkms_crtc *vc4_fkms_crtc = to_vc4_fkms_crtc(crtc); -+ struct drm_display_mode *mode = &crtc->state->adjusted_mode; -+ struct vc4_fkms_encoder *vc4_encoder = -+ to_vc4_fkms_encoder(vc4_fkms_crtc->encoder); -+ struct mailbox_set_mode mb = { -+ .tag1 = { RPI_FIRMWARE_SET_TIMING, -+ sizeof(struct set_timings), 0}, -+ }; -+ union hdmi_infoframe frame; -+ int ret; -+ -+ ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, vc4_fkms_crtc->connector, mode); -+ if (ret < 0) { -+ DRM_ERROR("couldn't fill AVI infoframe\n"); -+ return; -+ } -+ -+ DRM_DEBUG_KMS("Setting mode for display num %u mode name %s, clk %d, h(disp %d, start %d, end %d, total %d, skew %d) v(disp %d, start %d, end %d, total %d, scan %d), vrefresh %d, par %u, flags 0x%04x\n", -+ vc4_fkms_crtc->display_number, mode->name, mode->clock, -+ mode->hdisplay, mode->hsync_start, mode->hsync_end, -+ mode->htotal, mode->hskew, mode->vdisplay, -+ mode->vsync_start, mode->vsync_end, mode->vtotal, -+ mode->vscan, drm_mode_vrefresh(mode), -+ mode->picture_aspect_ratio, mode->flags); -+ mb.timings.display = vc4_fkms_crtc->display_number; -+ -+ mb.timings.clock = mode->clock; -+ mb.timings.hdisplay = mode->hdisplay; -+ mb.timings.hsync_start = mode->hsync_start; -+ mb.timings.hsync_end = mode->hsync_end; -+ mb.timings.htotal = mode->htotal; -+ mb.timings.hskew = mode->hskew; -+ mb.timings.vdisplay = mode->vdisplay; -+ mb.timings.vsync_start = mode->vsync_start; -+ mb.timings.vsync_end = mode->vsync_end; -+ mb.timings.vtotal = mode->vtotal; -+ mb.timings.vscan = mode->vscan; -+ mb.timings.vrefresh = drm_mode_vrefresh(mode); -+ mb.timings.flags = 0; -+ if (mode->flags & DRM_MODE_FLAG_PHSYNC) -+ mb.timings.flags |= TIMINGS_FLAGS_H_SYNC_POS; -+ if (mode->flags & DRM_MODE_FLAG_PVSYNC) -+ mb.timings.flags |= TIMINGS_FLAGS_V_SYNC_POS; -+ -+ switch (frame.avi.picture_aspect) { -+ default: -+ case HDMI_PICTURE_ASPECT_NONE: -+ mb.timings.flags |= TIMINGS_FLAGS_ASPECT_NONE; -+ break; -+ case HDMI_PICTURE_ASPECT_4_3: -+ mb.timings.flags |= TIMINGS_FLAGS_ASPECT_4_3; -+ break; -+ case HDMI_PICTURE_ASPECT_16_9: -+ mb.timings.flags |= TIMINGS_FLAGS_ASPECT_16_9; -+ break; -+ case HDMI_PICTURE_ASPECT_64_27: -+ mb.timings.flags |= TIMINGS_FLAGS_ASPECT_64_27; -+ break; -+ case HDMI_PICTURE_ASPECT_256_135: -+ mb.timings.flags |= TIMINGS_FLAGS_ASPECT_256_135; -+ break; -+ } -+ -+ if (mode->flags & DRM_MODE_FLAG_INTERLACE) -+ mb.timings.flags |= TIMINGS_FLAGS_INTERLACE; -+ if (mode->flags & DRM_MODE_FLAG_DBLCLK) -+ mb.timings.flags |= TIMINGS_FLAGS_DBL_CLK; -+ -+ mb.timings.video_id_code = frame.avi.video_code; -+ -+ if (!vc4_encoder->hdmi_monitor) { -+ mb.timings.flags |= TIMINGS_FLAGS_DVI; -+ } else { -+ struct vc4_fkms_connector_state *conn_state = -+ to_vc4_fkms_connector_state(vc4_fkms_crtc->connector->state); -+ -+ if (conn_state->broadcast_rgb == VC4_BROADCAST_RGB_AUTO) { -+ /* See CEA-861-E - 5.1 Default Encoding Parameters */ -+ if (drm_default_rgb_quant_range(mode) == -+ HDMI_QUANTIZATION_RANGE_LIMITED) -+ mb.timings.flags |= TIMINGS_FLAGS_RGB_LIMITED; -+ } else { -+ if (conn_state->broadcast_rgb == -+ VC4_BROADCAST_RGB_LIMITED) -+ mb.timings.flags |= TIMINGS_FLAGS_RGB_LIMITED; -+ -+ /* If not using the default range, then do not provide -+ * a VIC as the HDMI spec requires that we do not -+ * signal the opposite of the defined range in the AVI -+ * infoframe. -+ */ -+ if (!!(mb.timings.flags & TIMINGS_FLAGS_RGB_LIMITED) != -+ (drm_default_rgb_quant_range(mode) == -+ HDMI_QUANTIZATION_RANGE_LIMITED)) -+ mb.timings.video_id_code = 0; -+ } -+ } -+ -+ /* -+ * FIXME: To implement -+ * switch(mode->flag & DRM_MODE_FLAG_3D_MASK) { -+ * case DRM_MODE_FLAG_3D_NONE: -+ * case DRM_MODE_FLAG_3D_FRAME_PACKING: -+ * case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE: -+ * case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE: -+ * case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL: -+ * case DRM_MODE_FLAG_3D_L_DEPTH: -+ * case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH: -+ * case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM: -+ * case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF: -+ * } -+ */ -+ -+ ret = rpi_firmware_property_list(vc4->firmware, &mb, sizeof(mb)); -+} -+ -+static void vc4_crtc_disable(struct drm_crtc *crtc, -+ struct drm_atomic_state *state) -+{ -+ struct drm_device *dev = crtc->dev; -+ struct drm_plane *plane; -+ -+ DRM_DEBUG_KMS("[CRTC:%d] vblanks off.\n", -+ crtc->base.id); -+ drm_crtc_vblank_off(crtc); -+ -+ /* Always turn the planes off on CRTC disable. In DRM, planes -+ * are enabled/disabled through the update/disable hooks -+ * above, and the CRTC enable/disable independently controls -+ * whether anything scans out at all, but the firmware doesn't -+ * give us a CRTC-level control for that. -+ */ -+ -+ drm_atomic_crtc_for_each_plane(plane, crtc) -+ vc4_plane_atomic_disable(plane, state); -+ -+ /* -+ * Make sure we issue a vblank event after disabling the CRTC if -+ * someone was waiting it. -+ */ -+ if (crtc->state->event) { -+ unsigned long flags; -+ -+ spin_lock_irqsave(&dev->event_lock, flags); -+ drm_crtc_send_vblank_event(crtc, crtc->state->event); -+ crtc->state->event = NULL; -+ spin_unlock_irqrestore(&dev->event_lock, flags); -+ } -+} -+ -+static void vc4_crtc_consume_event(struct drm_crtc *crtc) -+{ -+ struct vc4_fkms_crtc *vc4_fkms_crtc = to_vc4_fkms_crtc(crtc); -+ struct drm_device *dev = crtc->dev; -+ unsigned long flags; -+ -+ if (!crtc->state->event) -+ return; -+ -+ crtc->state->event->pipe = drm_crtc_index(crtc); -+ -+ WARN_ON(drm_crtc_vblank_get(crtc) != 0); -+ -+ spin_lock_irqsave(&dev->event_lock, flags); -+ vc4_fkms_crtc->event = crtc->state->event; -+ crtc->state->event = NULL; -+ spin_unlock_irqrestore(&dev->event_lock, flags); -+} -+ -+static void vc4_crtc_enable(struct drm_crtc *crtc, -+ struct drm_atomic_state *state) -+{ -+ struct drm_plane *plane; -+ -+ DRM_DEBUG_KMS("[CRTC:%d] vblanks on.\n", -+ crtc->base.id); -+ drm_crtc_vblank_on(crtc); -+ vc4_crtc_consume_event(crtc); -+ -+ /* Unblank the planes (if they're supposed to be displayed). */ -+ drm_atomic_crtc_for_each_plane(plane, crtc) -+ if (plane->state->fb) -+ vc4_plane_set_blank(plane, plane->state->visible); -+} -+ -+static enum drm_mode_status -+vc4_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) -+{ -+ struct vc4_fkms_crtc *vc4_fkms_crtc = to_vc4_fkms_crtc(crtc); -+ struct drm_device *dev = crtc->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(dev); -+ struct vc4_fkms *fkms = vc4->fkms; -+ -+ /* Do not allow doublescan modes from user space */ -+ if (mode->flags & DRM_MODE_FLAG_DBLSCAN) { -+ DRM_DEBUG_KMS("[CRTC:%d] Doublescan mode rejected.\n", -+ crtc->base.id); -+ return MODE_NO_DBLESCAN; -+ } -+ -+ /* Disable refresh rates > defined threshold (default 85Hz) as limited -+ * gain from them -+ */ -+ if (drm_mode_vrefresh(mode) > fkms_max_refresh_rate) -+ return MODE_BAD_VVALUE; -+ -+ /* Limit the pixel clock based on the HDMI clock limits from the -+ * firmware -+ */ -+ switch (vc4_fkms_crtc->display_number) { -+ case 2: /* HDMI0 */ -+ if (fkms->cfg.max_pixel_clock[0] && -+ mode->clock > fkms->cfg.max_pixel_clock[0]) -+ return MODE_CLOCK_HIGH; -+ break; -+ case 7: /* HDMI1 */ -+ if (fkms->cfg.max_pixel_clock[1] && -+ mode->clock > fkms->cfg.max_pixel_clock[1]) -+ return MODE_CLOCK_HIGH; -+ break; -+ } -+ -+ /* Pi4 can't generate odd horizontal timings on HDMI, so reject modes -+ * that would set them. -+ */ -+ if (fkms->bcm2711 && -+ (vc4_fkms_crtc->display_number == 2 || vc4_fkms_crtc->display_number == 7) && -+ !(mode->flags & DRM_MODE_FLAG_DBLCLK) && -+ ((mode->hdisplay | /* active */ -+ (mode->hsync_start - mode->hdisplay) | /* front porch */ -+ (mode->hsync_end - mode->hsync_start) | /* sync pulse */ -+ (mode->htotal - mode->hsync_end)) & 1)) /* back porch */ { -+ DRM_DEBUG_KMS("[CRTC:%d] Odd timing rejected %u %u %u %u.\n", -+ crtc->base.id, mode->hdisplay, mode->hsync_start, -+ mode->hsync_end, mode->htotal); -+ return MODE_H_ILLEGAL; -+ } -+ -+ return MODE_OK; -+} -+ -+static int vc4_fkms_crtc_atomic_check(struct drm_crtc *crtc, -+ struct drm_atomic_state *state) -+{ -+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, -+ crtc); -+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state); -+ struct drm_connector *conn; -+ struct drm_connector_state *conn_state; -+ int i; -+ -+ DRM_DEBUG_KMS("[CRTC:%d] crtc_atomic_check.\n", crtc->base.id); -+ -+ for_each_new_connector_in_state(crtc_state->state, conn, conn_state, i) { -+ if (conn_state->crtc != crtc) -+ continue; -+ -+ vc4_state->margins.left = conn_state->tv.margins.left; -+ vc4_state->margins.right = conn_state->tv.margins.right; -+ vc4_state->margins.top = conn_state->tv.margins.top; -+ vc4_state->margins.bottom = conn_state->tv.margins.bottom; -+ break; -+ } -+ return 0; -+} -+ -+static void vc4_crtc_atomic_flush(struct drm_crtc *crtc, -+ struct drm_atomic_state *state) -+{ -+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, -+ crtc); -+ -+ DRM_DEBUG_KMS("[CRTC:%d] crtc_atomic_flush.\n", -+ crtc->base.id); -+ if (crtc->state->active && old_state->active && crtc->state->event) -+ vc4_crtc_consume_event(crtc); -+} -+ -+static void vc4_crtc_handle_page_flip(struct vc4_fkms_crtc *vc4_fkms_crtc) -+{ -+ struct drm_crtc *crtc = &vc4_fkms_crtc->base; -+ struct drm_device *dev = crtc->dev; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&dev->event_lock, flags); -+ if (vc4_fkms_crtc->event) { -+ drm_crtc_send_vblank_event(crtc, vc4_fkms_crtc->event); -+ vc4_fkms_crtc->event = NULL; -+ drm_crtc_vblank_put(crtc); -+ } -+ spin_unlock_irqrestore(&dev->event_lock, flags); -+} -+ -+static irqreturn_t vc4_crtc_irq_handler(int irq, void *data) -+{ -+ struct vc4_fkms_crtc **crtc_list = data; -+ int i; -+ u32 stat = readl(crtc_list[0]->regs + SMICS); -+ irqreturn_t ret = IRQ_NONE; -+ u32 chan; -+ -+ if (stat & SMICS_INTERRUPTS) { -+ writel(0, crtc_list[0]->regs + SMICS); -+ -+ chan = readl(crtc_list[0]->regs + SMIDSW0); -+ -+ if ((chan & 0xFFFF0000) != SMI_NEW) { -+ /* Older firmware. Treat the one interrupt as vblank/ -+ * complete for all crtcs. -+ */ -+ for (i = 0; crtc_list[i]; i++) { -+ if (crtc_list[i]->vblank_enabled) -+ drm_crtc_handle_vblank(&crtc_list[i]->base); -+ vc4_crtc_handle_page_flip(crtc_list[i]); -+ } -+ } else { -+ if (chan & 1) { -+ writel(SMI_NEW, crtc_list[0]->regs + SMIDSW0); -+ if (crtc_list[0]->vblank_enabled) -+ drm_crtc_handle_vblank(&crtc_list[0]->base); -+ vc4_crtc_handle_page_flip(crtc_list[0]); -+ } -+ -+ if (crtc_list[1]) { -+ /* Check for the secondary display too */ -+ chan = readl(crtc_list[0]->regs + SMIDSW1); -+ -+ if (chan & 1) { -+ writel(SMI_NEW, crtc_list[0]->regs + SMIDSW1); -+ -+ if (crtc_list[1]->vblank_enabled) -+ drm_crtc_handle_vblank(&crtc_list[1]->base); -+ vc4_crtc_handle_page_flip(crtc_list[1]); -+ } -+ } -+ } -+ -+ ret = IRQ_HANDLED; -+ } -+ -+ return ret; -+} -+ -+static int vc4_fkms_page_flip(struct drm_crtc *crtc, -+ struct drm_framebuffer *fb, -+ struct drm_pending_vblank_event *event, -+ uint32_t flags, -+ struct drm_modeset_acquire_ctx *ctx) -+{ -+ if (flags & DRM_MODE_PAGE_FLIP_ASYNC) { -+ DRM_ERROR("Async flips aren't allowed\n"); -+ return -EINVAL; -+ } -+ -+ return drm_atomic_helper_page_flip(crtc, fb, event, flags, ctx); -+} -+ -+static struct drm_crtc_state * -+vc4_fkms_crtc_duplicate_state(struct drm_crtc *crtc) -+{ -+ struct vc4_crtc_state *vc4_state, *old_vc4_state; -+ -+ vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL); -+ if (!vc4_state) -+ return NULL; -+ -+ old_vc4_state = to_vc4_crtc_state(crtc->state); -+ vc4_state->margins = old_vc4_state->margins; -+ -+ __drm_atomic_helper_crtc_duplicate_state(crtc, &vc4_state->base); -+ return &vc4_state->base; -+} -+ -+static void -+vc4_fkms_crtc_reset(struct drm_crtc *crtc) -+{ -+ if (crtc->state) -+ __drm_atomic_helper_crtc_destroy_state(crtc->state); -+ -+ crtc->state = kzalloc(sizeof(*crtc->state), GFP_KERNEL); -+ if (crtc->state) -+ crtc->state->crtc = crtc; -+} -+ -+static int vc4_fkms_enable_vblank(struct drm_crtc *crtc) -+{ -+ struct vc4_fkms_crtc *vc4_fkms_crtc = to_vc4_fkms_crtc(crtc); -+ -+ DRM_DEBUG_KMS("[CRTC:%d] enable_vblank.\n", -+ crtc->base.id); -+ vc4_fkms_crtc->vblank_enabled = true; -+ -+ return 0; -+} -+ -+static void vc4_fkms_disable_vblank(struct drm_crtc *crtc) -+{ -+ struct vc4_fkms_crtc *vc4_fkms_crtc = to_vc4_fkms_crtc(crtc); -+ -+ DRM_DEBUG_KMS("[CRTC:%d] disable_vblank.\n", -+ crtc->base.id); -+ vc4_fkms_crtc->vblank_enabled = false; -+} -+ -+static const struct drm_crtc_funcs vc4_crtc_funcs = { -+ .set_config = drm_atomic_helper_set_config, -+ .destroy = drm_crtc_cleanup, -+ .page_flip = vc4_fkms_page_flip, -+ .set_property = NULL, -+ .cursor_set = NULL, /* handled by drm_mode_cursor_universal */ -+ .cursor_move = NULL, /* handled by drm_mode_cursor_universal */ -+ .reset = vc4_fkms_crtc_reset, -+ .atomic_duplicate_state = vc4_fkms_crtc_duplicate_state, -+ .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, -+ .enable_vblank = vc4_fkms_enable_vblank, -+ .disable_vblank = vc4_fkms_disable_vblank, -+}; -+ -+static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = { -+ .mode_set_nofb = vc4_crtc_mode_set_nofb, -+ .mode_valid = vc4_crtc_mode_valid, -+ .atomic_check = vc4_fkms_crtc_atomic_check, -+ .atomic_flush = vc4_crtc_atomic_flush, -+ .atomic_enable = vc4_crtc_enable, -+ .atomic_disable = vc4_crtc_disable, -+}; -+ -+static const struct of_device_id vc4_firmware_kms_dt_match[] = { -+ { .compatible = "raspberrypi,rpi-firmware-kms" }, -+ { .compatible = "raspberrypi,rpi-firmware-kms-2711", -+ .data = (void *)1 }, -+ {} -+}; -+ -+static enum drm_connector_status -+vc4_fkms_connector_detect(struct drm_connector *connector, bool force) -+{ -+ DRM_DEBUG_KMS("connector detect.\n"); -+ return connector_status_connected; -+} -+ -+/* Queries the firmware to populate a drm_mode structure for this display */ -+static int vc4_fkms_get_fw_mode(struct vc4_fkms_connector *fkms_connector, -+ struct drm_display_mode *mode) -+{ -+ struct vc4_dev *vc4 = fkms_connector->vc4_dev; -+ struct set_timings timings = { 0 }; -+ int ret; -+ -+ timings.display = fkms_connector->display_number; -+ -+ ret = rpi_firmware_property(vc4->firmware, -+ RPI_FIRMWARE_GET_DISPLAY_TIMING, &timings, -+ sizeof(timings)); -+ if (ret || !timings.clock) -+ /* No mode returned - abort */ -+ return -1; -+ -+ /* Equivalent to DRM_MODE macro. */ -+ memset(mode, 0, sizeof(*mode)); -+ strncpy(mode->name, "FIXED_MODE", sizeof(mode->name)); -+ mode->status = 0; -+ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; -+ mode->clock = timings.clock; -+ mode->hdisplay = timings.hdisplay; -+ mode->hsync_start = timings.hsync_start; -+ mode->hsync_end = timings.hsync_end; -+ mode->htotal = timings.htotal; -+ mode->hskew = 0; -+ mode->vdisplay = timings.vdisplay; -+ mode->vsync_start = timings.vsync_start; -+ mode->vsync_end = timings.vsync_end; -+ mode->vtotal = timings.vtotal; -+ mode->vscan = timings.vscan; -+ -+ if (timings.flags & TIMINGS_FLAGS_H_SYNC_POS) -+ mode->flags |= DRM_MODE_FLAG_PHSYNC; -+ else -+ mode->flags |= DRM_MODE_FLAG_NHSYNC; -+ -+ if (timings.flags & TIMINGS_FLAGS_V_SYNC_POS) -+ mode->flags |= DRM_MODE_FLAG_PVSYNC; -+ else -+ mode->flags |= DRM_MODE_FLAG_NVSYNC; -+ -+ if (timings.flags & TIMINGS_FLAGS_INTERLACE) -+ mode->flags |= DRM_MODE_FLAG_INTERLACE; -+ -+ return 0; -+} -+ -+static int vc4_fkms_get_edid_block(void *data, u8 *buf, unsigned int block, -+ size_t len) -+{ -+ struct vc4_fkms_connector *fkms_connector = -+ (struct vc4_fkms_connector *)data; -+ struct vc4_dev *vc4 = fkms_connector->vc4_dev; -+ struct mailbox_get_edid mb = { -+ .tag1 = { RPI_FIRMWARE_GET_EDID_BLOCK_DISPLAY, -+ 128 + 8, 0 }, -+ .block = block, -+ .display_number = fkms_connector->display_number, -+ }; -+ int ret = 0; -+ -+ ret = rpi_firmware_property_list(vc4->firmware, &mb, sizeof(mb)); -+ -+ if (!ret) -+ memcpy(buf, mb.edid, len); -+ -+ return ret; -+} -+ -+static int vc4_fkms_connector_get_modes(struct drm_connector *connector) -+{ -+ struct vc4_fkms_connector *fkms_connector = -+ to_vc4_fkms_connector(connector); -+ struct drm_encoder *encoder = fkms_connector->encoder; -+ struct vc4_fkms_encoder *vc4_encoder = to_vc4_fkms_encoder(encoder); -+ struct drm_display_mode fw_mode; -+ struct drm_display_mode *mode; -+ struct edid *edid; -+ int num_modes; -+ -+ if (!vc4_fkms_get_fw_mode(fkms_connector, &fw_mode)) { -+ drm_mode_debug_printmodeline(&fw_mode); -+ mode = drm_mode_duplicate(connector->dev, -+ &fw_mode); -+ drm_mode_probed_add(connector, mode); -+ num_modes = 1; /* 1 mode */ -+ } else { -+ edid = drm_do_get_edid(connector, vc4_fkms_get_edid_block, -+ fkms_connector); -+ -+ /* FIXME: Can we do CEC? -+ * cec_s_phys_addr_from_edid(vc4->hdmi->cec_adap, edid); -+ * if (!edid) -+ * return -ENODEV; -+ */ -+ -+ vc4_encoder->hdmi_monitor = drm_detect_hdmi_monitor(edid); -+ -+ drm_connector_update_edid_property(connector, edid); -+ num_modes = drm_add_edid_modes(connector, edid); -+ kfree(edid); -+ } -+ -+ return num_modes; -+} -+ -+/* This is the DSI panel resolution. Use this as a default should the firmware -+ * not respond to our request for the timings. -+ */ -+static const struct drm_display_mode lcd_mode = { -+ DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, -+ 25979400 / 1000, -+ 800, 800 + 1, 800 + 1 + 2, 800 + 1 + 2 + 46, 0, -+ 480, 480 + 7, 480 + 7 + 2, 480 + 7 + 2 + 21, 0, -+ 0) -+}; -+ -+static int vc4_fkms_lcd_connector_get_modes(struct drm_connector *connector) -+{ -+ struct vc4_fkms_connector *fkms_connector = -+ to_vc4_fkms_connector(connector); -+ struct drm_display_mode *mode; -+ struct drm_display_mode fw_mode; -+ -+ if (!vc4_fkms_get_fw_mode(fkms_connector, &fw_mode) && fw_mode.clock) -+ mode = drm_mode_duplicate(connector->dev, -+ &fw_mode); -+ else -+ mode = drm_mode_duplicate(connector->dev, -+ &lcd_mode); -+ -+ if (!mode) { -+ DRM_ERROR("Failed to create a new display mode\n"); -+ return -ENOMEM; -+ } -+ -+ drm_mode_probed_add(connector, mode); -+ -+ /* We have one mode */ -+ return 1; -+} -+ -+static struct drm_encoder * -+vc4_fkms_connector_best_encoder(struct drm_connector *connector) -+{ -+ struct vc4_fkms_connector *fkms_connector = -+ to_vc4_fkms_connector(connector); -+ DRM_DEBUG_KMS("best_connector.\n"); -+ return fkms_connector->encoder; -+} -+ -+static void vc4_fkms_connector_destroy(struct drm_connector *connector) -+{ -+ DRM_DEBUG_KMS("[CONNECTOR:%d] destroy.\n", -+ connector->base.id); -+ drm_connector_unregister(connector); -+ drm_connector_cleanup(connector); -+} -+ -+/** -+ * vc4_connector_duplicate_state - duplicate connector state -+ * @connector: digital connector -+ * -+ * Allocates and returns a copy of the connector state (both common and -+ * digital connector specific) for the specified connector. -+ * -+ * Returns: The newly allocated connector state, or NULL on failure. -+ */ -+struct drm_connector_state * -+vc4_connector_duplicate_state(struct drm_connector *connector) -+{ -+ struct vc4_fkms_connector_state *state; -+ -+ state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL); -+ if (!state) -+ return NULL; -+ -+ __drm_atomic_helper_connector_duplicate_state(connector, &state->base); -+ return &state->base; -+} -+ -+/** -+ * vc4_connector_atomic_get_property - hook for connector->atomic_get_property. -+ * @connector: Connector to get the property for. -+ * @state: Connector state to retrieve the property from. -+ * @property: Property to retrieve. -+ * @val: Return value for the property. -+ * -+ * Returns the atomic property value for a digital connector. -+ */ -+int vc4_connector_atomic_get_property(struct drm_connector *connector, -+ const struct drm_connector_state *state, -+ struct drm_property *property, -+ uint64_t *val) -+{ -+ struct vc4_fkms_connector *fkms_connector = -+ to_vc4_fkms_connector(connector); -+ struct vc4_fkms_connector_state *vc4_conn_state = -+ to_vc4_fkms_connector_state(state); -+ -+ if (property == fkms_connector->broadcast_rgb_property) { -+ *val = vc4_conn_state->broadcast_rgb; -+ } else { -+ DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n", -+ property->base.id, property->name); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+/** -+ * vc4_connector_atomic_set_property - hook for connector->atomic_set_property. -+ * @connector: Connector to set the property for. -+ * @state: Connector state to set the property on. -+ * @property: Property to set. -+ * @val: New value for the property. -+ * -+ * Sets the atomic property value for a digital connector. -+ */ -+int vc4_connector_atomic_set_property(struct drm_connector *connector, -+ struct drm_connector_state *state, -+ struct drm_property *property, -+ uint64_t val) -+{ -+ struct vc4_fkms_connector *fkms_connector = -+ to_vc4_fkms_connector(connector); -+ struct vc4_fkms_connector_state *vc4_conn_state = -+ to_vc4_fkms_connector_state(state); -+ -+ if (property == fkms_connector->broadcast_rgb_property) { -+ vc4_conn_state->broadcast_rgb = val; -+ return 0; -+ } -+ -+ DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n", -+ property->base.id, property->name); -+ return -EINVAL; -+} -+ -+int vc4_connector_atomic_check(struct drm_connector *connector, -+ struct drm_atomic_state *state) -+{ -+ struct drm_connector_state *old_state = -+ drm_atomic_get_old_connector_state(state, connector); -+ struct vc4_fkms_connector_state *vc4_old_state = -+ to_vc4_fkms_connector_state(old_state); -+ struct drm_connector_state *new_state = -+ drm_atomic_get_new_connector_state(state, connector); -+ struct vc4_fkms_connector_state *vc4_new_state = -+ to_vc4_fkms_connector_state(new_state); -+ struct drm_crtc *crtc = new_state->crtc; -+ -+ if (!crtc) -+ return 0; -+ -+ if (vc4_old_state->broadcast_rgb != vc4_new_state->broadcast_rgb) { -+ struct drm_crtc_state *crtc_state; -+ -+ crtc_state = drm_atomic_get_crtc_state(state, crtc); -+ if (IS_ERR(crtc_state)) -+ return PTR_ERR(crtc_state); -+ -+ crtc_state->mode_changed = true; -+ } -+ return 0; -+} -+ -+static void vc4_hdmi_connector_reset(struct drm_connector *connector) -+{ -+ drm_atomic_helper_connector_reset(connector); -+ drm_atomic_helper_connector_tv_margins_reset(connector); -+} -+ -+static const struct drm_connector_funcs vc4_fkms_connector_funcs = { -+ .detect = vc4_fkms_connector_detect, -+ .fill_modes = drm_helper_probe_single_connector_modes, -+ .destroy = vc4_fkms_connector_destroy, -+ .reset = vc4_hdmi_connector_reset, -+ .atomic_duplicate_state = vc4_connector_duplicate_state, -+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, -+ .atomic_get_property = vc4_connector_atomic_get_property, -+ .atomic_set_property = vc4_connector_atomic_set_property, -+}; -+ -+static const struct drm_connector_helper_funcs vc4_fkms_connector_helper_funcs = { -+ .get_modes = vc4_fkms_connector_get_modes, -+ .best_encoder = vc4_fkms_connector_best_encoder, -+ .atomic_check = vc4_connector_atomic_check, -+}; -+ -+static const struct drm_connector_helper_funcs vc4_fkms_lcd_conn_helper_funcs = { -+ .get_modes = vc4_fkms_lcd_connector_get_modes, -+ .best_encoder = vc4_fkms_connector_best_encoder, -+}; -+ -+static const struct drm_prop_enum_list broadcast_rgb_names[] = { -+ { VC4_BROADCAST_RGB_AUTO, "Automatic" }, -+ { VC4_BROADCAST_RGB_FULL, "Full" }, -+ { VC4_BROADCAST_RGB_LIMITED, "Limited 16:235" }, -+}; -+ -+static void -+vc4_attach_broadcast_rgb_property(struct vc4_fkms_connector *fkms_connector) -+{ -+ struct drm_device *dev = fkms_connector->base.dev; -+ struct drm_property *prop; -+ -+ prop = fkms_connector->broadcast_rgb_property; -+ if (!prop) { -+ prop = drm_property_create_enum(dev, DRM_MODE_PROP_ENUM, -+ "Broadcast RGB", -+ broadcast_rgb_names, -+ ARRAY_SIZE(broadcast_rgb_names)); -+ if (!prop) -+ return; -+ -+ fkms_connector->broadcast_rgb_property = prop; -+ } -+ -+ drm_object_attach_property(&fkms_connector->base.base, prop, 0); -+} -+ -+static struct drm_connector * -+vc4_fkms_connector_init(struct drm_device *dev, struct drm_encoder *encoder, -+ u32 display_num) -+{ -+ struct drm_connector *connector = NULL; -+ struct vc4_fkms_connector *fkms_connector; -+ struct vc4_fkms_connector_state *conn_state = NULL; -+ struct vc4_dev *vc4_dev = to_vc4_dev(dev); -+ int ret = 0; -+ -+ DRM_DEBUG_KMS("connector_init, display_num %u\n", display_num); -+ -+ fkms_connector = devm_kzalloc(dev->dev, sizeof(*fkms_connector), -+ GFP_KERNEL); -+ if (!fkms_connector) -+ return ERR_PTR(-ENOMEM); -+ -+ /* -+ * Allocate enough memory to hold vc4_fkms_connector_state, -+ */ -+ conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL); -+ if (!conn_state) { -+ kfree(fkms_connector); -+ return ERR_PTR(-ENOMEM); -+ } -+ -+ connector = &fkms_connector->base; -+ -+ fkms_connector->encoder = encoder; -+ fkms_connector->display_number = display_num; -+ fkms_connector->display_type = vc4_get_display_type(display_num); -+ fkms_connector->vc4_dev = vc4_dev; -+ -+ __drm_atomic_helper_connector_reset(connector, -+ &conn_state->base); -+ -+ if (fkms_connector->display_type == DRM_MODE_ENCODER_DSI) { -+ drm_connector_init(dev, connector, &vc4_fkms_connector_funcs, -+ DRM_MODE_CONNECTOR_DSI); -+ drm_connector_helper_add(connector, -+ &vc4_fkms_lcd_conn_helper_funcs); -+ connector->interlace_allowed = 0; -+ } else if (fkms_connector->display_type == DRM_MODE_ENCODER_TVDAC) { -+ drm_connector_init(dev, connector, &vc4_fkms_connector_funcs, -+ DRM_MODE_CONNECTOR_Composite); -+ drm_connector_helper_add(connector, -+ &vc4_fkms_lcd_conn_helper_funcs); -+ connector->interlace_allowed = 1; -+ } else { -+ drm_connector_init(dev, connector, &vc4_fkms_connector_funcs, -+ DRM_MODE_CONNECTOR_HDMIA); -+ drm_connector_helper_add(connector, -+ &vc4_fkms_connector_helper_funcs); -+ connector->interlace_allowed = 1; -+ } -+ -+ ret = drm_mode_create_tv_margin_properties(dev); -+ if (ret) -+ goto fail; -+ -+ drm_connector_attach_tv_margin_properties(connector); -+ -+ connector->polled = (DRM_CONNECTOR_POLL_CONNECT | -+ DRM_CONNECTOR_POLL_DISCONNECT); -+ -+ connector->doublescan_allowed = 0; -+ -+ vc4_attach_broadcast_rgb_property(fkms_connector); -+ -+ drm_connector_attach_encoder(connector, encoder); -+ -+ return connector; -+ -+ fail: -+ if (connector) -+ vc4_fkms_connector_destroy(connector); -+ -+ return ERR_PTR(ret); -+} -+ -+static void vc4_fkms_encoder_destroy(struct drm_encoder *encoder) -+{ -+ DRM_DEBUG_KMS("Encoder_destroy\n"); -+ drm_encoder_cleanup(encoder); -+} -+ -+static const struct drm_encoder_funcs vc4_fkms_encoder_funcs = { -+ .destroy = vc4_fkms_encoder_destroy, -+}; -+ -+static void vc4_fkms_display_power(struct drm_encoder *encoder, bool power) -+{ -+ struct vc4_fkms_encoder *vc4_encoder = to_vc4_fkms_encoder(encoder); -+ struct vc4_dev *vc4 = to_vc4_dev(encoder->dev); -+ -+ struct mailbox_display_pwr pwr = { -+ .tag1 = {RPI_FIRMWARE_SET_DISPLAY_POWER, 8, 0, }, -+ .display = vc4_encoder->display_num, -+ .state = power ? 1 : 0, -+ }; -+ -+ rpi_firmware_property_list(vc4->firmware, &pwr, sizeof(pwr)); -+} -+ -+static void vc4_fkms_encoder_enable(struct drm_encoder *encoder) -+{ -+ vc4_fkms_display_power(encoder, true); -+ DRM_DEBUG_KMS("Encoder_enable\n"); -+} -+ -+static void vc4_fkms_encoder_disable(struct drm_encoder *encoder) -+{ -+ vc4_fkms_display_power(encoder, false); -+ DRM_DEBUG_KMS("Encoder_disable\n"); -+} -+ -+static const struct drm_encoder_helper_funcs vc4_fkms_encoder_helper_funcs = { -+ .enable = vc4_fkms_encoder_enable, -+ .disable = vc4_fkms_encoder_disable, -+}; -+ -+static int vc4_fkms_create_screen(struct device *dev, struct drm_device *drm, -+ int display_idx, int display_ref, -+ struct vc4_fkms_crtc **ret_crtc) -+{ -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ struct vc4_fkms_crtc *vc4_fkms_crtc; -+ struct vc4_fkms_encoder *vc4_encoder; -+ struct drm_crtc *crtc; -+ struct drm_plane *destroy_plane, *temp; -+ struct mailbox_blank_display blank = { -+ .tag1 = {RPI_FIRMWARE_FRAMEBUFFER_SET_DISPLAY_NUM, 4, 0, }, -+ .display = display_idx, -+ .tag2 = { RPI_FIRMWARE_FRAMEBUFFER_BLANK, 4, 0, }, -+ .blank = 1, -+ }; -+ struct drm_plane *planes[PLANES_PER_CRTC]; -+ int ret, i; -+ -+ vc4_fkms_crtc = devm_kzalloc(dev, sizeof(*vc4_fkms_crtc), GFP_KERNEL); -+ if (!vc4_fkms_crtc) -+ return -ENOMEM; -+ crtc = &vc4_fkms_crtc->base; -+ -+ vc4_fkms_crtc->display_number = display_ref; -+ vc4_fkms_crtc->display_type = vc4_get_display_type(display_ref); -+ -+ /* Blank the firmware provided framebuffer */ -+ rpi_firmware_property_list(vc4->firmware, &blank, sizeof(blank)); -+ -+ for (i = 0; i < PLANES_PER_CRTC; i++) { -+ planes[i] = vc4_fkms_plane_init(drm, -+ (i == 0) ? -+ DRM_PLANE_TYPE_PRIMARY : -+ (i == PLANES_PER_CRTC - 1) ? -+ DRM_PLANE_TYPE_CURSOR : -+ DRM_PLANE_TYPE_OVERLAY, -+ display_ref, -+ i + (display_idx * PLANES_PER_CRTC) -+ ); -+ if (IS_ERR(planes[i])) { -+ dev_err(dev, "failed to construct plane %u\n", i); -+ ret = PTR_ERR(planes[i]); -+ goto err; -+ } -+ } -+ -+ drm_crtc_init_with_planes(drm, crtc, planes[0], -+ planes[PLANES_PER_CRTC - 1], &vc4_crtc_funcs, -+ NULL); -+ drm_crtc_helper_add(crtc, &vc4_crtc_helper_funcs); -+ -+ /* Update the possible_crtcs mask for the overlay plane(s) */ -+ for (i = 1; i < (PLANES_PER_CRTC - 1); i++) -+ planes[i]->possible_crtcs = drm_crtc_mask(crtc); -+ -+ vc4_encoder = devm_kzalloc(dev, sizeof(*vc4_encoder), GFP_KERNEL); -+ if (!vc4_encoder) -+ return -ENOMEM; -+ vc4_fkms_crtc->encoder = &vc4_encoder->base; -+ -+ vc4_encoder->display_num = display_ref; -+ vc4_encoder->base.possible_crtcs |= drm_crtc_mask(crtc); -+ -+ drm_encoder_init(drm, &vc4_encoder->base, &vc4_fkms_encoder_funcs, -+ vc4_fkms_crtc->display_type, NULL); -+ drm_encoder_helper_add(&vc4_encoder->base, -+ &vc4_fkms_encoder_helper_funcs); -+ -+ vc4_fkms_crtc->connector = vc4_fkms_connector_init(drm, &vc4_encoder->base, -+ display_ref); -+ if (IS_ERR(vc4_fkms_crtc->connector)) { -+ ret = PTR_ERR(vc4_fkms_crtc->connector); -+ goto err_destroy_encoder; -+ } -+ -+ *ret_crtc = vc4_fkms_crtc; -+ -+ return 0; -+ -+err_destroy_encoder: -+ vc4_fkms_encoder_destroy(vc4_fkms_crtc->encoder); -+ list_for_each_entry_safe(destroy_plane, temp, -+ &drm->mode_config.plane_list, head) { -+ if (destroy_plane->possible_crtcs == 1 << drm_crtc_index(crtc)) -+ destroy_plane->funcs->destroy(destroy_plane); -+ } -+err: -+ return ret; -+} -+ -+static int vc4_fkms_bind(struct device *dev, struct device *master, void *data) -+{ -+ struct platform_device *pdev = to_platform_device(dev); -+ struct drm_device *drm = dev_get_drvdata(master); -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ struct device_node *firmware_node; -+ const struct of_device_id *match; -+ struct vc4_fkms_crtc **crtc_list; -+ u32 num_displays, display_num; -+ struct vc4_fkms *fkms; -+ int ret; -+ u32 display_id; -+ -+ vc4->firmware_kms = true; -+ -+ fkms = devm_kzalloc(dev, sizeof(*fkms), GFP_KERNEL); -+ if (!fkms) -+ return -ENOMEM; -+ -+ match = of_match_device(vc4_firmware_kms_dt_match, dev); -+ if (!match) -+ return -ENODEV; -+ if (match->data) -+ fkms->bcm2711 = true; -+ -+ firmware_node = of_parse_phandle(dev->of_node, "brcm,firmware", 0); -+ vc4->firmware = devm_rpi_firmware_get(&pdev->dev, firmware_node); -+ if (!vc4->firmware) { -+ DRM_DEBUG("Failed to get Raspberry Pi firmware reference.\n"); -+ return -EPROBE_DEFER; -+ } -+ of_node_put(firmware_node); -+ -+ ret = rpi_firmware_property(vc4->firmware, -+ RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS, -+ &num_displays, sizeof(u32)); -+ -+ /* If we fail to get the number of displays, then -+ * assume old firmware that doesn't have the mailbox call, so just -+ * set one display -+ */ -+ if (ret) { -+ num_displays = 1; -+ DRM_WARN("Unable to determine number of displays - assuming 1\n"); -+ ret = 0; -+ } -+ -+ ret = rpi_firmware_property(vc4->firmware, -+ RPI_FIRMWARE_GET_DISPLAY_CFG, -+ &fkms->cfg, sizeof(fkms->cfg)); -+ -+ if (ret) -+ return -EINVAL; -+ /* The firmware works in Hz. This will be compared against kHz, so div -+ * 1000 now rather than multiple times later. -+ */ -+ fkms->cfg.max_pixel_clock[0] /= 1000; -+ fkms->cfg.max_pixel_clock[1] /= 1000; -+ -+ /* Allocate a list, with space for a NULL on the end */ -+ crtc_list = devm_kzalloc(dev, sizeof(crtc_list) * (num_displays + 1), -+ GFP_KERNEL); -+ if (!crtc_list) -+ return -ENOMEM; -+ -+ for (display_num = 0; display_num < num_displays; display_num++) { -+ display_id = display_num; -+ ret = rpi_firmware_property(vc4->firmware, -+ RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_ID, -+ &display_id, sizeof(display_id)); -+ /* FIXME: Determine the correct error handling here. -+ * Should we fail to create the one "screen" but keep the -+ * others, or fail the whole thing? -+ */ -+ if (ret) -+ DRM_ERROR("Failed to get display id %u\n", display_num); -+ -+ ret = vc4_fkms_create_screen(dev, drm, display_num, display_id, -+ &crtc_list[display_num]); -+ if (ret) -+ DRM_ERROR("Oh dear, failed to create display %u\n", -+ display_num); -+ } -+ -+ if (num_displays > 0) { -+ /* Map the SMI interrupt reg */ -+ crtc_list[0]->regs = vc4_ioremap_regs(pdev, 0); -+ if (IS_ERR(crtc_list[0]->regs)) -+ DRM_ERROR("Oh dear, failed to map registers\n"); -+ -+ writel(0, crtc_list[0]->regs + SMICS); -+ ret = devm_request_irq(dev, platform_get_irq(pdev, 0), -+ vc4_crtc_irq_handler, 0, -+ "vc4 firmware kms", crtc_list); -+ if (ret) -+ DRM_ERROR("Oh dear, failed to register IRQ\n"); -+ } else { -+ DRM_WARN("No displays found. Consider forcing hotplug if HDMI is attached\n"); -+ } -+ -+ vc4->fkms = fkms; -+ -+ platform_set_drvdata(pdev, crtc_list); -+ -+ return 0; -+} -+ -+static void vc4_fkms_unbind(struct device *dev, struct device *master, -+ void *data) -+{ -+ struct platform_device *pdev = to_platform_device(dev); -+ struct vc4_fkms_crtc **crtc_list = dev_get_drvdata(dev); -+ int i; -+ -+ for (i = 0; crtc_list[i]; i++) { -+ vc4_fkms_connector_destroy(crtc_list[i]->connector); -+ vc4_fkms_encoder_destroy(crtc_list[i]->encoder); -+ drm_crtc_cleanup(&crtc_list[i]->base); -+ } -+ -+ platform_set_drvdata(pdev, NULL); -+} -+ -+static const struct component_ops vc4_fkms_ops = { -+ .bind = vc4_fkms_bind, -+ .unbind = vc4_fkms_unbind, -+}; -+ -+static int vc4_fkms_probe(struct platform_device *pdev) -+{ -+ return component_add(&pdev->dev, &vc4_fkms_ops); -+} -+ -+static int vc4_fkms_remove(struct platform_device *pdev) -+{ -+ component_del(&pdev->dev, &vc4_fkms_ops); -+ return 0; -+} -+ -+struct platform_driver vc4_firmware_kms_driver = { -+ .probe = vc4_fkms_probe, -+ .remove = vc4_fkms_remove, -+ .driver = { -+ .name = "vc4_firmware_kms", -+ .of_match_table = vc4_firmware_kms_dt_match, -+ }, -+}; ---- a/drivers/gpu/drm/vc4/vc4_kms.c -+++ b/drivers/gpu/drm/vc4/vc4_kms.c -@@ -138,6 +138,9 @@ vc4_ctm_commit(struct vc4_dev *vc4, stru - struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(vc4->ctm_manager.state); - struct drm_color_ctm *ctm = ctm_state->ctm; - -+ if (vc4->firmware_kms) -+ return; -+ - if (ctm_state->fifo) { - HVS_WRITE(SCALER_OLEDCOEF2, - VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[0]), -@@ -343,7 +346,7 @@ static void vc4_atomic_commit_tail(struc - for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { - struct vc4_crtc_state *vc4_crtc_state; - -- if (!new_crtc_state->commit) -+ if (!new_crtc_state->commit || vc4->firmware_kms) - continue; - - vc4_crtc_state = to_vc4_crtc_state(new_crtc_state); -@@ -369,7 +372,7 @@ static void vc4_atomic_commit_tail(struc - old_hvs_state->fifo_state[channel].pending_commit = NULL; - } - -- if (vc4->is_vc5) { -+ if (vc4->is_vc5 && !vc4->firmware_kms) { - unsigned long state_rate = max(old_hvs_state->core_clock_rate, - new_hvs_state->core_clock_rate); - unsigned long core_rate = clamp_t(unsigned long, state_rate, -@@ -388,10 +391,12 @@ static void vc4_atomic_commit_tail(struc - - vc4_ctm_commit(vc4, state); - -- if (vc4->is_vc5) -- vc5_hvs_pv_muxing_commit(vc4, state); -- else -- vc4_hvs_pv_muxing_commit(vc4, state); -+ if (!vc4->firmware_kms) { -+ if (vc4->is_vc5) -+ vc5_hvs_pv_muxing_commit(vc4, state); -+ else -+ vc4_hvs_pv_muxing_commit(vc4, state); -+ } - - drm_atomic_helper_commit_planes(dev, state, - DRM_PLANE_COMMIT_ACTIVE_ONLY); -@@ -406,7 +411,7 @@ static void vc4_atomic_commit_tail(struc - - drm_atomic_helper_cleanup_planes(dev, state); - -- if (vc4->is_vc5) { -+ if (vc4->is_vc5 && !vc4->firmware_kms) { - unsigned long core_rate = min_t(unsigned long, - hvs->max_core_rate, - new_hvs_state->core_clock_rate); -@@ -426,11 +431,21 @@ static void vc4_atomic_commit_tail(struc - - static int vc4_atomic_commit_setup(struct drm_atomic_state *state) - { -+ struct drm_device *dev = state->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(dev); - struct drm_crtc_state *crtc_state; - struct vc4_hvs_state *hvs_state; - struct drm_crtc *crtc; - unsigned int i; - -+ /* We know for sure we don't want an async update here. Set -+ * state->legacy_cursor_update to false to prevent -+ * drm_atomic_helper_setup_commit() from auto-completing -+ * commit->flip_done. -+ */ -+ if (!vc4->firmware_kms) -+ state->legacy_cursor_update = false; -+ - hvs_state = vc4_hvs_get_new_global_state(state); - if (WARN_ON(IS_ERR(hvs_state))) - return PTR_ERR(hvs_state); -@@ -799,6 +814,7 @@ static int cmp_vc4_crtc_hvs_output(const - static int vc4_pv_muxing_atomic_check(struct drm_device *dev, - struct drm_atomic_state *state) - { -+ struct vc4_dev *vc4 = to_vc4_dev(state->dev); - struct vc4_hvs_state *hvs_new_state; - struct drm_crtc **sorted_crtcs; - struct drm_crtc *crtc; -@@ -806,6 +822,9 @@ static int vc4_pv_muxing_atomic_check(st - unsigned int i; - int ret; - -+ if (vc4->firmware_kms) -+ return 0; -+ - hvs_new_state = vc4_hvs_get_global_state(state); - if (IS_ERR(hvs_new_state)) - return PTR_ERR(hvs_new_state); ---- /dev/null -+++ b/drivers/gpu/drm/vc4/vc_image_types.h -@@ -0,0 +1,175 @@ -+ -+/* -+ * Copyright (c) 2012, Broadcom Europe Ltd -+ * -+ * Values taken from vc_image_types.h released by Broadcom at -+ * https://github.com/raspberrypi/userland/blob/master/interface/vctypes/vc_image_types.h -+ * and vc_image_structs.h at -+ * https://github.com/raspberrypi/userland/blob/master/interface/vctypes/vc_image_structs.h -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+enum { -+ VC_IMAGE_MIN = 0, //bounds for error checking -+ -+ VC_IMAGE_RGB565 = 1, -+ VC_IMAGE_1BPP, -+ VC_IMAGE_YUV420, -+ VC_IMAGE_48BPP, -+ VC_IMAGE_RGB888, -+ VC_IMAGE_8BPP, -+ /* 4bpp palettised image */ -+ VC_IMAGE_4BPP, -+ /* A separated format of 16 colour/light shorts followed by 16 z -+ * values -+ */ -+ VC_IMAGE_3D32, -+ /* 16 colours followed by 16 z values */ -+ VC_IMAGE_3D32B, -+ /* A separated format of 16 material/colour/light shorts followed by -+ * 16 z values -+ */ -+ VC_IMAGE_3D32MAT, -+ /* 32 bit format containing 18 bits of 6.6.6 RGB, 9 bits per short */ -+ VC_IMAGE_RGB2X9, -+ /* 32-bit format holding 18 bits of 6.6.6 RGB */ -+ VC_IMAGE_RGB666, -+ /* 4bpp palettised image with embedded palette */ -+ VC_IMAGE_PAL4_OBSOLETE, -+ /* 8bpp palettised image with embedded palette */ -+ VC_IMAGE_PAL8_OBSOLETE, -+ /* RGB888 with an alpha byte after each pixel */ -+ VC_IMAGE_RGBA32, -+ /* a line of Y (32-byte padded), a line of U (16-byte padded), and a -+ * line of V (16-byte padded) -+ */ -+ VC_IMAGE_YUV422, -+ /* RGB565 with a transparent patch */ -+ VC_IMAGE_RGBA565, -+ /* Compressed (4444) version of RGBA32 */ -+ VC_IMAGE_RGBA16, -+ /* VCIII codec format */ -+ VC_IMAGE_YUV_UV, -+ /* VCIII T-format RGBA8888 */ -+ VC_IMAGE_TF_RGBA32, -+ /* VCIII T-format RGBx8888 */ -+ VC_IMAGE_TF_RGBX32, -+ /* VCIII T-format float */ -+ VC_IMAGE_TF_FLOAT, -+ /* VCIII T-format RGBA4444 */ -+ VC_IMAGE_TF_RGBA16, -+ /* VCIII T-format RGB5551 */ -+ VC_IMAGE_TF_RGBA5551, -+ /* VCIII T-format RGB565 */ -+ VC_IMAGE_TF_RGB565, -+ /* VCIII T-format 8-bit luma and 8-bit alpha */ -+ VC_IMAGE_TF_YA88, -+ /* VCIII T-format 8 bit generic sample */ -+ VC_IMAGE_TF_BYTE, -+ /* VCIII T-format 8-bit palette */ -+ VC_IMAGE_TF_PAL8, -+ /* VCIII T-format 4-bit palette */ -+ VC_IMAGE_TF_PAL4, -+ /* VCIII T-format Ericsson Texture Compressed */ -+ VC_IMAGE_TF_ETC1, -+ /* RGB888 with R & B swapped */ -+ VC_IMAGE_BGR888, -+ /* RGB888 with R & B swapped, but with no pitch, i.e. no padding after -+ * each row of pixels -+ */ -+ VC_IMAGE_BGR888_NP, -+ /* Bayer image, extra defines which variant is being used */ -+ VC_IMAGE_BAYER, -+ /* General wrapper for codec images e.g. JPEG from camera */ -+ VC_IMAGE_CODEC, -+ /* VCIII codec format */ -+ VC_IMAGE_YUV_UV32, -+ /* VCIII T-format 8-bit luma */ -+ VC_IMAGE_TF_Y8, -+ /* VCIII T-format 8-bit alpha */ -+ VC_IMAGE_TF_A8, -+ /* VCIII T-format 16-bit generic sample */ -+ VC_IMAGE_TF_SHORT, -+ /* VCIII T-format 1bpp black/white */ -+ VC_IMAGE_TF_1BPP, -+ VC_IMAGE_OPENGL, -+ /* VCIII-B0 HVS YUV 4:4:4 interleaved samples */ -+ VC_IMAGE_YUV444I, -+ /* Y, U, & V planes separately (VC_IMAGE_YUV422 has them interleaved on -+ * a per line basis) -+ */ -+ VC_IMAGE_YUV422PLANAR, -+ /* 32bpp with 8bit alpha at MS byte, with R, G, B (LS byte) */ -+ VC_IMAGE_ARGB8888, -+ /* 32bpp with 8bit unused at MS byte, with R, G, B (LS byte) */ -+ VC_IMAGE_XRGB8888, -+ -+ /* interleaved 8 bit samples of Y, U, Y, V (4 flavours) */ -+ VC_IMAGE_YUV422YUYV, -+ VC_IMAGE_YUV422YVYU, -+ VC_IMAGE_YUV422UYVY, -+ VC_IMAGE_YUV422VYUY, -+ -+ /* 32bpp like RGBA32 but with unused alpha */ -+ VC_IMAGE_RGBX32, -+ /* 32bpp, corresponding to RGBA with unused alpha */ -+ VC_IMAGE_RGBX8888, -+ /* 32bpp, corresponding to BGRA with unused alpha */ -+ VC_IMAGE_BGRX8888, -+ -+ /* Y as a plane, then UV byte interleaved in plane with same pitch, -+ * half height -+ */ -+ VC_IMAGE_YUV420SP, -+ -+ /* Y, U, & V planes separately 4:4:4 */ -+ VC_IMAGE_YUV444PLANAR, -+ -+ /* T-format 8-bit U - same as TF_Y8 buf from U plane */ -+ VC_IMAGE_TF_U8, -+ /* T-format 8-bit U - same as TF_Y8 buf from V plane */ -+ VC_IMAGE_TF_V8, -+ -+ /* YUV4:2:0 planar, 16bit values */ -+ VC_IMAGE_YUV420_16, -+ /* YUV4:2:0 codec format, 16bit values */ -+ VC_IMAGE_YUV_UV_16, -+ /* YUV4:2:0 with U,V in side-by-side format */ -+ VC_IMAGE_YUV420_S, -+ /* 10-bit YUV 420 column image format */ -+ VC_IMAGE_YUV10COL, -+ /* 32-bpp, 10-bit R/G/B, 2-bit Alpha */ -+ VC_IMAGE_RGBA1010102, -+ -+ VC_IMAGE_MAX, /* bounds for error checking */ -+ VC_IMAGE_FORCE_ENUM_16BIT = 0xffff, -+}; -+ -+enum { -+ /* Unknown or unset - defaults to BT601 interstitial */ -+ VC_IMAGE_YUVINFO_UNSPECIFIED = 0, -+ -+ /* colour-space conversions data [4 bits] */ -+ -+ /* ITU-R BT.601-5 [SDTV] (compatible with VideoCore-II) */ -+ VC_IMAGE_YUVINFO_CSC_ITUR_BT601 = 1, -+ /* ITU-R BT.709-3 [HDTV] */ -+ VC_IMAGE_YUVINFO_CSC_ITUR_BT709 = 2, -+ /* JPEG JFIF */ -+ VC_IMAGE_YUVINFO_CSC_JPEG_JFIF = 3, -+ /* Title 47 Code of Federal Regulations (2003) 73.682 (a) (20) */ -+ VC_IMAGE_YUVINFO_CSC_FCC = 4, -+ /* Society of Motion Picture and Television Engineers 240M (1999) */ -+ VC_IMAGE_YUVINFO_CSC_SMPTE_240M = 5, -+ /* ITU-R BT.470-2 System M */ -+ VC_IMAGE_YUVINFO_CSC_ITUR_BT470_2_M = 6, -+ /* ITU-R BT.470-2 System B,G */ -+ VC_IMAGE_YUVINFO_CSC_ITUR_BT470_2_BG = 7, -+ /* JPEG JFIF, but with 16..255 luma */ -+ VC_IMAGE_YUVINFO_CSC_JPEG_JFIF_Y16_255 = 8, -+ /* Rec 2020 */ -+ VC_IMAGE_YUVINFO_CSC_REC_2020 = 9, -+}; diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0008-drm-vc4-Add-support-for-gamma-on-BCM2711.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0008-drm-vc4-Add-support-for-gamma-on-BCM2711.patch deleted file mode 100644 index 10a09eb2c0..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0008-drm-vc4-Add-support-for-gamma-on-BCM2711.patch +++ /dev/null @@ -1,276 +0,0 @@ -From efed9f6403c125e56b9852b81f81632e85feb2eb Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Tue, 27 Apr 2021 14:24:21 +0200 -Subject: [PATCH 0008/1085] drm/vc4: Add support for gamma on BCM2711 - -BCM2711 changes from a 256 entry lookup table to a 16 point -piecewise linear function as the pipeline bitdepth has increased -to make a LUT unwieldy. - -Implement a simple conversion from a 256 entry LUT that userspace -is likely to expect to 16 evenly spread points in the PWL. This -could be improved with curve fitting at a later date. - -Co-developed-by: Juerg Haefliger -Signed-off-by: Juerg Haefliger -Signed-off-by: Dave Stevenson -Signed-off-by: Maxime Ripard ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 35 ++++++++++--- - drivers/gpu/drm/vc4/vc4_drv.h | 28 +++++++++-- - drivers/gpu/drm/vc4/vc4_hvs.c | 89 ++++++++++++++++++++++++++++++++-- - drivers/gpu/drm/vc4/vc4_regs.h | 22 +++++++++ - 4 files changed, 162 insertions(+), 12 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -1340,19 +1340,42 @@ int __vc4_crtc_init(struct drm_device *d - - if (!vc4->is_vc5) { - drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r)); -+ } else { -+ /* This is a lie for hvs5 which uses a 16 point PWL, but it -+ * allows for something smarter than just 16 linearly spaced -+ * segments. Conversion is done in vc5_hvs_update_gamma_lut. -+ */ -+ drm_mode_crtc_set_gamma_size(crtc, 256); -+ } - -- drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size); -+ drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size); - -+ if (!vc4->is_vc5) { - /* We support CTM, but only for one CRTC at a time. It's therefore - * implemented as private driver state in vc4_kms, not here. - */ - drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size); -- } - -- for (i = 0; i < crtc->gamma_size; i++) { -- vc4_crtc->lut_r[i] = i; -- vc4_crtc->lut_g[i] = i; -- vc4_crtc->lut_b[i] = i; -+ /* Initialize the VC4 gamma LUTs */ -+ for (i = 0; i < crtc->gamma_size; i++) { -+ vc4_crtc->lut_r[i] = i; -+ vc4_crtc->lut_g[i] = i; -+ vc4_crtc->lut_b[i] = i; -+ } -+ } else { -+ /* Initialize the VC5 gamma PWL entries. Assume 12-bit pipeline, -+ * evenly spread over full range. -+ */ -+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++) { -+ vc4_crtc->pwl_r[i] = -+ VC5_HVS_SET_GAMMA_ENTRY(i << 8, i << 12, 1 << 8); -+ vc4_crtc->pwl_g[i] = -+ VC5_HVS_SET_GAMMA_ENTRY(i << 8, i << 12, 1 << 8); -+ vc4_crtc->pwl_b[i] = -+ VC5_HVS_SET_GAMMA_ENTRY(i << 8, i << 12, 1 << 8); -+ vc4_crtc->pwl_a[i] = -+ VC5_HVS_SET_GAMMA_ENTRY(i << 8, i << 12, 1 << 8); -+ } - } - - return 0; ---- a/drivers/gpu/drm/vc4/vc4_drv.h -+++ b/drivers/gpu/drm/vc4/vc4_drv.h -@@ -22,6 +22,7 @@ - #include - - #include "uapi/drm/vc4_drm.h" -+#include "vc4_regs.h" - - struct drm_device; - struct drm_gem_object; -@@ -495,6 +496,17 @@ struct drm_encoder *vc4_find_encoder_by_ - return NULL; - } - -+struct vc5_gamma_entry { -+ u32 x_c_terms; -+ u32 grad_term; -+}; -+ -+#define VC5_HVS_SET_GAMMA_ENTRY(x, c, g) (struct vc5_gamma_entry){ \ -+ .x_c_terms = VC4_SET_FIELD((x), SCALER5_DSPGAMMA_OFF_X) | \ -+ VC4_SET_FIELD((c), SCALER5_DSPGAMMA_OFF_C), \ -+ .grad_term = (g) \ -+} -+ - struct vc4_crtc_data { - const char *name; - -@@ -539,9 +551,19 @@ struct vc4_crtc { - /* Timestamp at start of vblank irq - unaffected by lock delays. */ - ktime_t t_vblank; - -- u8 lut_r[256]; -- u8 lut_g[256]; -- u8 lut_b[256]; -+ union { -+ struct { /* VC4 gamma LUT */ -+ u8 lut_r[256]; -+ u8 lut_g[256]; -+ u8 lut_b[256]; -+ }; -+ struct { /* VC5 gamma PWL entries */ -+ struct vc5_gamma_entry pwl_r[SCALER5_DSPGAMMA_NUM_POINTS]; -+ struct vc5_gamma_entry pwl_g[SCALER5_DSPGAMMA_NUM_POINTS]; -+ struct vc5_gamma_entry pwl_b[SCALER5_DSPGAMMA_NUM_POINTS]; -+ struct vc5_gamma_entry pwl_a[SCALER5_DSPGAMMA_NUM_POINTS]; -+ }; -+ }; - - struct drm_pending_vblank_event *event; - ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -248,7 +248,8 @@ static void vc4_hvs_lut_load(struct vc4_ - static void vc4_hvs_update_gamma_lut(struct vc4_hvs *hvs, - struct vc4_crtc *vc4_crtc) - { -- struct drm_crtc_state *crtc_state = vc4_crtc->base.state; -+ struct drm_crtc *crtc = &vc4_crtc->base; -+ struct drm_crtc_state *crtc_state = crtc->state; - struct drm_color_lut *lut = crtc_state->gamma_lut->data; - u32 length = drm_color_lut_size(crtc_state->gamma_lut); - u32 i; -@@ -262,6 +263,81 @@ static void vc4_hvs_update_gamma_lut(str - vc4_hvs_lut_load(hvs, vc4_crtc); - } - -+static void vc5_hvs_write_gamma_entry(struct vc4_hvs *hvs, -+ u32 offset, -+ struct vc5_gamma_entry *gamma) -+{ -+ HVS_WRITE(offset, gamma->x_c_terms); -+ HVS_WRITE(offset + 4, gamma->grad_term); -+} -+ -+static void vc5_hvs_lut_load(struct vc4_hvs *hvs, -+ struct vc4_crtc *vc4_crtc) -+{ -+ struct drm_crtc *crtc = &vc4_crtc->base; -+ struct drm_crtc_state *crtc_state = crtc->state; -+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state); -+ u32 i; -+ u32 offset = SCALER5_DSPGAMMA_START + -+ vc4_state->assigned_channel * SCALER5_DSPGAMMA_CHAN_OFFSET; -+ -+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8) -+ vc5_hvs_write_gamma_entry(hvs, offset, &vc4_crtc->pwl_r[i]); -+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8) -+ vc5_hvs_write_gamma_entry(hvs, offset, &vc4_crtc->pwl_g[i]); -+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8) -+ vc5_hvs_write_gamma_entry(hvs, offset, &vc4_crtc->pwl_b[i]); -+ -+ if (vc4_state->assigned_channel == 2) { -+ /* Alpha only valid on channel 2 */ -+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8) -+ vc5_hvs_write_gamma_entry(hvs, offset, &vc4_crtc->pwl_a[i]); -+ } -+} -+ -+static void vc5_hvs_update_gamma_lut(struct vc4_hvs *hvs, -+ struct vc4_crtc *vc4_crtc) -+{ -+ struct drm_crtc *crtc = &vc4_crtc->base; -+ struct drm_color_lut *lut = crtc->state->gamma_lut->data; -+ unsigned int step, i; -+ u32 start, end; -+ -+#define VC5_HVS_UPDATE_GAMMA_ENTRY_FROM_LUT(pwl, chan) \ -+ start = drm_color_lut_extract(lut[i * step].chan, 12); \ -+ end = drm_color_lut_extract(lut[(i + 1) * step - 1].chan, 12); \ -+ \ -+ /* Negative gradients not permitted by the hardware, so \ -+ * flatten such points out. \ -+ */ \ -+ if (end < start) \ -+ end = start; \ -+ \ -+ /* Assume 12bit pipeline. \ -+ * X evenly spread over full range (12 bit). \ -+ * C as U12.4 format. \ -+ * Gradient as U4.8 format. \ -+ */ \ -+ vc4_crtc->pwl[i] = \ -+ VC5_HVS_SET_GAMMA_ENTRY(i << 8, start << 4, \ -+ ((end - start) << 4) / (step - 1)) -+ -+ /* HVS5 has a 16 point piecewise linear function for each colour -+ * channel (including alpha on channel 2) on each display channel. -+ * -+ * Currently take a crude subsample of the gamma LUT, but this could -+ * be improved to implement curve fitting. -+ */ -+ step = crtc->gamma_size / SCALER5_DSPGAMMA_NUM_POINTS; -+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++) { -+ VC5_HVS_UPDATE_GAMMA_ENTRY_FROM_LUT(pwl_r, red); -+ VC5_HVS_UPDATE_GAMMA_ENTRY_FROM_LUT(pwl_g, green); -+ VC5_HVS_UPDATE_GAMMA_ENTRY_FROM_LUT(pwl_b, blue); -+ } -+ -+ vc5_hvs_lut_load(hvs, vc4_crtc); -+} -+ - u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo) - { - struct drm_device *drm = &hvs->vc4->base; -@@ -405,7 +481,10 @@ static int vc4_hvs_init_channel(struct v - /* Reload the LUT, since the SRAMs would have been disabled if - * all CRTCs had SCALER_DISPBKGND_GAMMA unset at once. - */ -- vc4_hvs_lut_load(hvs, vc4_crtc); -+ if (!vc4->is_vc5) -+ vc4_hvs_lut_load(hvs, vc4_crtc); -+ else -+ vc5_hvs_lut_load(hvs, vc4_crtc); - - drm_dev_exit(idx); - -@@ -649,7 +728,11 @@ void vc4_hvs_atomic_flush(struct drm_crt - u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(channel)); - - if (crtc->state->gamma_lut) { -- vc4_hvs_update_gamma_lut(hvs, vc4_crtc); -+ if (!vc4->is_vc5) -+ vc4_hvs_update_gamma_lut(hvs, vc4_crtc); -+ else -+ vc5_hvs_update_gamma_lut(hvs, vc4_crtc); -+ - dispbkgndx |= SCALER_DISPBKGND_GAMMA; - } else { - /* Unsetting DISPBKGND_GAMMA skips the gamma lut step ---- a/drivers/gpu/drm/vc4/vc4_regs.h -+++ b/drivers/gpu/drm/vc4/vc4_regs.h -@@ -512,6 +512,28 @@ - #define SCALER_DLIST_START 0x00002000 - #define SCALER_DLIST_SIZE 0x00004000 - -+/* Gamma PWL for each channel. 16 points for each of 4 colour channels (alpha -+ * only on channel 2). 8 bytes per entry, offsets first, then gradient: -+ * Y = GRAD * X + C -+ * -+ * Values for X and C are left justified, and vary depending on the width of -+ * the HVS channel: -+ * 8-bit pipeline: X uses [31:24], C is U8.8 format, and GRAD is U4.8. -+ * 12-bit pipeline: X uses [31:20], C is U12.4 format, and GRAD is U4.8. -+ * -+ * The 3 HVS channels start at 0x400 offsets (ie chan 1 starts at 0x2400, and -+ * chan 2 at 0x2800). -+ */ -+#define SCALER5_DSPGAMMA_NUM_POINTS 16 -+#define SCALER5_DSPGAMMA_START 0x00002000 -+#define SCALER5_DSPGAMMA_CHAN_OFFSET 0x400 -+# define SCALER5_DSPGAMMA_OFF_X_MASK VC4_MASK(31, 20) -+# define SCALER5_DSPGAMMA_OFF_X_SHIFT 20 -+# define SCALER5_DSPGAMMA_OFF_C_MASK VC4_MASK(15, 0) -+# define SCALER5_DSPGAMMA_OFF_C_SHIFT 0 -+# define SCALER5_DSPGAMMA_GRAD_MASK VC4_MASK(11, 0) -+# define SCALER5_DSPGAMMA_GRAD_SHIFT 0 -+ - #define SCALER5_DLIST_START 0x00004000 - - # define VC4_HDMI_SW_RESET_FORMAT_DETECT BIT(1) diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0009-drm-vc4-Add-debugfs-node-that-dumps-the-vc5-gamma-PW.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0009-drm-vc4-Add-debugfs-node-that-dumps-the-vc5-gamma-PW.patch deleted file mode 100644 index 863ad82432..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0009-drm-vc4-Add-debugfs-node-that-dumps-the-vc5-gamma-PW.patch +++ /dev/null @@ -1,122 +0,0 @@ -From 3931aecb383046dab3f43a4530fe527f7c50a4d5 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Wed, 28 Apr 2021 12:32:10 +0200 -Subject: [PATCH 0009/1085] drm/vc4: Add debugfs node that dumps the vc5 gamma - PWL entries - -This helps with debugging the conversion from a 256 point gamma LUT to -16 point PWL entries as used by the BCM2711. - -Co-developed-by: Juerg Haefliger -Signed-off-by: Juerg Haefliger -Signed-off-by: Dave Stevenson -Signed-off-by: Maxime Ripard ---- - drivers/gpu/drm/vc4/vc4_hvs.c | 85 ++++++++++++++++++++++++++++++++++- - 1 file changed, 84 insertions(+), 1 deletion(-) - ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -145,6 +145,85 @@ static int vc4_hvs_debugfs_dlist(struct - return 0; - } - -+static int vc5_hvs_debugfs_gamma(struct seq_file *m, void *data) -+{ -+ struct drm_info_node *node = m->private; -+ struct drm_device *dev = node->minor->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(dev); -+ struct vc4_hvs *hvs = vc4->hvs; -+ struct drm_printer p = drm_seq_file_printer(m); -+ unsigned int i, chan; -+ u32 dispstat, dispbkgndx; -+ -+ for (chan = 0; chan < SCALER_CHANNELS_COUNT; chan++) { -+ u32 x_c, grad; -+ u32 offset = SCALER5_DSPGAMMA_START + -+ chan * SCALER5_DSPGAMMA_CHAN_OFFSET; -+ -+ dispstat = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTATX(chan)), -+ SCALER_DISPSTATX_MODE); -+ if (dispstat == SCALER_DISPSTATX_MODE_DISABLED || -+ dispstat == SCALER_DISPSTATX_MODE_EOF) { -+ drm_printf(&p, "HVS channel %u: Channel disabled\n", chan); -+ continue; -+ } -+ -+ dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(chan)); -+ if (!(dispbkgndx & SCALER_DISPBKGND_GAMMA)) { -+ drm_printf(&p, "HVS channel %u: Gamma disabled\n", chan); -+ continue; -+ } -+ -+ drm_printf(&p, "HVS channel %u:\n", chan); -+ drm_printf(&p, " red:\n"); -+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8) { -+ x_c = HVS_READ(offset); -+ grad = HVS_READ(offset + 4); -+ drm_printf(&p, " %08x %08x - x %u, c %u, grad %u\n", -+ x_c, grad, -+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_X), -+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_C), -+ grad); -+ } -+ drm_printf(&p, " green:\n"); -+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8) { -+ x_c = HVS_READ(offset); -+ grad = HVS_READ(offset + 4); -+ drm_printf(&p, " %08x %08x - x %u, c %u, grad %u\n", -+ x_c, grad, -+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_X), -+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_C), -+ grad); -+ } -+ drm_printf(&p, " blue:\n"); -+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8) { -+ x_c = HVS_READ(offset); -+ grad = HVS_READ(offset + 4); -+ drm_printf(&p, " %08x %08x - x %u, c %u, grad %u\n", -+ x_c, grad, -+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_X), -+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_C), -+ grad); -+ } -+ -+ /* Alpha only valid on channel 2 */ -+ if (chan != 2) -+ continue; -+ -+ drm_printf(&p, " alpha:\n"); -+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8) { -+ x_c = HVS_READ(offset); -+ grad = HVS_READ(offset + 4); -+ drm_printf(&p, " %08x %08x - x %u, c %u, grad %u\n", -+ x_c, grad, -+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_X), -+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_C), -+ grad); -+ } -+ } -+ return 0; -+} -+ - /* The filter kernel is composed of dwords each containing 3 9-bit - * signed integers packed next to each other. - */ -@@ -854,11 +933,15 @@ int vc4_hvs_debugfs_init(struct drm_mino - if (!vc4->hvs) - return -ENODEV; - -- if (!vc4->is_vc5) -+ if (!vc4->is_vc5) { - debugfs_create_bool("hvs_load_tracker", S_IRUGO | S_IWUSR, - minor->debugfs_root, - &vc4->load_tracker_enabled); - -+ drm_debugfs_add_file(drm, "hvs_gamma", vc5_hvs_debugfs_gamma, -+ NULL); -+ } -+ - drm_debugfs_add_file(drm, "hvs_dlists", vc4_hvs_debugfs_dlist, NULL); - - drm_debugfs_add_file(drm, "hvs_underrun", vc4_hvs_debugfs_underrun, NULL); diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0010-drm-vc4-hvs-Force-modeset-on-gamma-lut-change.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0010-drm-vc4-hvs-Force-modeset-on-gamma-lut-change.patch deleted file mode 100644 index b8847230af..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0010-drm-vc4-hvs-Force-modeset-on-gamma-lut-change.patch +++ /dev/null @@ -1,105 +0,0 @@ -From 50a879cfdb87baad4edb50f7b443177a592998ed Mon Sep 17 00:00:00 2001 -From: Maxime Ripard -Date: Mon, 14 Jun 2021 15:28:30 +0200 -Subject: [PATCH 0010/1085] drm/vc4: hvs: Force modeset on gamma lut change - -The HVS Gamma block can only be updated when idle, so we need to disable -the HVS channel when the gamma property is set in an atomic commit. - -Since the pixelvalve cannot have its assigned channel halted without -stalling unless it's disabled as well, in our case that means forcing a -full disable / enable cycle on the pipeline. - -Signed-off-by: Maxime Ripard ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 17 +++++++++++++++++ - drivers/gpu/drm/vc4/vc4_drv.h | 3 +++ - drivers/gpu/drm/vc4/vc4_hvs.c | 32 +++++++++++++++++++++++++++++++- - 3 files changed, 51 insertions(+), 1 deletion(-) - ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -303,6 +303,23 @@ struct drm_encoder *vc4_get_crtc_encoder - return NULL; - } - -+#define drm_for_each_connector_mask(connector, dev, connector_mask) \ -+ list_for_each_entry((connector), &(dev)->mode_config.connector_list, head) \ -+ for_each_if ((connector_mask) & drm_connector_mask(connector)) -+ -+struct drm_connector *vc4_get_crtc_connector(struct drm_crtc *crtc, -+ struct drm_crtc_state *state) -+{ -+ struct drm_connector *connector; -+ -+ WARN_ON(hweight32(state->connector_mask) > 1); -+ -+ drm_for_each_connector_mask(connector, crtc->dev, state->connector_mask) -+ return connector; -+ -+ return NULL; -+} -+ - static void vc4_crtc_pixelvalve_reset(struct drm_crtc *crtc) - { - struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); ---- a/drivers/gpu/drm/vc4/vc4_drv.h -+++ b/drivers/gpu/drm/vc4/vc4_drv.h -@@ -614,6 +614,9 @@ vc4_crtc_to_vc4_pv_data(const struct vc4 - return container_of_const(data, struct vc4_pv_data, base); - } - -+struct drm_connector *vc4_get_crtc_connector(struct drm_crtc *crtc, -+ struct drm_crtc_state *state); -+ - struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc, - struct drm_crtc_state *state); - ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -599,6 +599,36 @@ out: - drm_dev_exit(idx); - } - -+static int vc4_hvs_gamma_check(struct drm_crtc *crtc, -+ struct drm_atomic_state *state) -+{ -+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); -+ struct drm_connector_state *conn_state; -+ struct drm_connector *connector; -+ struct drm_device *dev = crtc->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(dev); -+ -+ if (!vc4->is_vc5) -+ return 0; -+ -+ if (!crtc_state->color_mgmt_changed) -+ return 0; -+ -+ connector = vc4_get_crtc_connector(crtc, crtc_state); -+ if (!connector) -+ return -EINVAL; -+ -+ if (!(connector->connector_type == DRM_MODE_CONNECTOR_HDMIA)) -+ return 0; -+ -+ conn_state = drm_atomic_get_connector_state(state, connector); -+ if (!conn_state) -+ return -EINVAL; -+ -+ crtc_state->mode_changed = true; -+ return 0; -+} -+ - int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state) - { - struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); -@@ -629,7 +659,7 @@ int vc4_hvs_atomic_check(struct drm_crtc - if (ret) - return ret; - -- return 0; -+ return vc4_hvs_gamma_check(crtc, state); - } - - static void vc4_hvs_install_dlist(struct drm_crtc *crtc) diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0012-drm-vc4-Make-VEC-progressive-modes-readily-accessibl.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0012-drm-vc4-Make-VEC-progressive-modes-readily-accessibl.patch deleted file mode 100644 index 0169ffee96..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0012-drm-vc4-Make-VEC-progressive-modes-readily-accessibl.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 2f04da8b66d1124c4cf9c1fd9733821801a01a5d Mon Sep 17 00:00:00 2001 -From: Mateusz Kwiatkowski -Date: Thu, 15 Jul 2021 01:08:11 +0200 -Subject: [PATCH 0012/1085] drm/vc4: Make VEC progressive modes readily - accessible - -Add predefined modelines for the 240p (NTSC) and 288p (PAL) progressive -modes, and report them through vc4_vec_connector_get_modes(). - -Signed-off-by: Mateusz Kwiatkowski ---- - drivers/gpu/drm/vc4/vc4_vec.c | 36 ++++++++++++++++++++++++++++++++++- - 1 file changed, 35 insertions(+), 1 deletion(-) - ---- a/drivers/gpu/drm/vc4/vc4_vec.c -+++ b/drivers/gpu/drm/vc4/vc4_vec.c -@@ -273,6 +273,18 @@ static const struct debugfs_reg32 vec_re - VC4_REG32(VEC_DAC_MISC), - }; - -+static const struct drm_display_mode drm_mode_240p = { -+ DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, -+ 720, 720 + 14, 720 + 14 + 64, 720 + 14 + 64 + 60, 0, -+ 240, 240 + 3, 240 + 3 + 3, 262, 0, 0) -+}; -+ -+static const struct drm_display_mode drm_mode_288p = { -+ DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, -+ 720, 720 + 20, 720 + 20 + 64, 720 + 20 + 64 + 60, 0, -+ 288, 288 + 2, 288 + 2 + 3, 312, 0, 0) -+}; -+ - static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = { - { - .mode = DRM_MODE_TV_MODE_NTSC, -@@ -507,9 +519,31 @@ static const struct drm_connector_funcs - .atomic_set_property = vc4_vec_connector_set_property, - }; - -+static int vc4_vec_connector_get_modes(struct drm_connector *connector) -+{ -+ struct drm_display_mode *mode; -+ int count = drm_connector_helper_tv_get_modes(connector); -+ -+ mode = drm_mode_duplicate(connector->dev, &drm_mode_240p); -+ if (!mode) -+ return -ENOMEM; -+ -+ drm_mode_probed_add(connector, mode); -+ count++; -+ -+ mode = drm_mode_duplicate(connector->dev, &drm_mode_288p); -+ if (!mode) -+ return -ENOMEM; -+ -+ drm_mode_probed_add(connector, mode); -+ count++; -+ -+ return count; -+} -+ - static const struct drm_connector_helper_funcs vc4_vec_connector_helper_funcs = { - .atomic_check = drm_atomic_helper_connector_tv_check, -- .get_modes = drm_connector_helper_tv_get_modes, -+ .get_modes = vc4_vec_connector_get_modes, - }; - - static int vc4_vec_connector_init(struct drm_device *dev, struct vc4_vec *vec) diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0013-drm-Check-whether-the-gamma-lut-has-changed-before-u.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0013-drm-Check-whether-the-gamma-lut-has-changed-before-u.patch deleted file mode 100644 index a5307a1487..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0013-drm-Check-whether-the-gamma-lut-has-changed-before-u.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 8101479299dec8b984ee1cef2224d67c8ae9921f Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Tue, 2 Nov 2021 16:01:36 +0000 -Subject: [PATCH 0013/1085] drm: Check whether the gamma lut has changed before - updating - -drm_crtc_legacy_gamma_set updates the gamma_lut blob unconditionally, -which leads to unnecessary reprogramming of hardware. - -Check whether the blob contents has actually changed before -signalling that it has been updated. - -Signed-off-by: Dave Stevenson ---- - drivers/gpu/drm/drm_color_mgmt.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/drivers/gpu/drm/drm_color_mgmt.c -+++ b/drivers/gpu/drm/drm_color_mgmt.c -@@ -330,7 +330,9 @@ static int drm_crtc_legacy_gamma_set(str - replaced = drm_property_replace_blob(&crtc_state->degamma_lut, - use_gamma_lut ? NULL : blob); - replaced |= drm_property_replace_blob(&crtc_state->ctm, NULL); -- replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, -+ if (!crtc_state->gamma_lut || !crtc_state->gamma_lut->data || -+ memcmp(crtc_state->gamma_lut->data, blob_data, blob->length)) -+ replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, - use_gamma_lut ? blob : NULL); - crtc_state->color_mgmt_changed |= replaced; - diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0014-drm-vc4-Enable-gamma-block-only-when-required.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0014-drm-vc4-Enable-gamma-block-only-when-required.patch deleted file mode 100644 index 061b37797d..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0014-drm-vc4-Enable-gamma-block-only-when-required.patch +++ /dev/null @@ -1,66 +0,0 @@ -From c0e4a6b67c9e9c1be98e9e83708b04ca7ed34989 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Mon, 8 Nov 2021 17:32:45 +0000 -Subject: [PATCH 0014/1085] drm/vc4: Enable gamma block only when required. - -With HVS5 the gamma block is now only reprogrammed with -a disable/enable. Loading the table from vc4_hvs_init_channel -(called from vc4_hvs_atomic_enable) appears to be at an -invalid point in time and so isn't applied. - -Switch to enabling and disabling the gamma table instead. This -isn't safe if the pipeline is running, but it isn't now. -For HVS4 it is safe to enable and disable dynamically, so -adopt that approach there too. - -Signed-off-by: Dave Stevenson ---- - drivers/gpu/drm/vc4/vc4_hvs.c | 22 ++++++++++++++++------ - 1 file changed, 16 insertions(+), 6 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -553,8 +553,11 @@ static int vc4_hvs_init_channel(struct v - dispbkgndx &= ~SCALER_DISPBKGND_GAMMA; - dispbkgndx &= ~SCALER_DISPBKGND_INTERLACE; - -+ if (crtc->state->gamma_lut) -+ /* Enable gamma on if required */ -+ dispbkgndx |= SCALER_DISPBKGND_GAMMA; -+ - HVS_WRITE(SCALER_DISPBKGNDX(chan), dispbkgndx | -- ((!vc4->is_vc5) ? SCALER_DISPBKGND_GAMMA : 0) | - (interlace ? SCALER_DISPBKGND_INTERLACE : 0)); - - /* Reload the LUT, since the SRAMs would have been disabled if -@@ -837,18 +840,25 @@ void vc4_hvs_atomic_flush(struct drm_crt - u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(channel)); - - if (crtc->state->gamma_lut) { -- if (!vc4->is_vc5) -+ if (!vc4->is_vc5) { - vc4_hvs_update_gamma_lut(hvs, vc4_crtc); -- else -+ dispbkgndx |= SCALER_DISPBKGND_GAMMA; -+ } else { - vc5_hvs_update_gamma_lut(hvs, vc4_crtc); -- -- dispbkgndx |= SCALER_DISPBKGND_GAMMA; -+ } - } else { - /* Unsetting DISPBKGND_GAMMA skips the gamma lut step - * in hardware, which is the same as a linear lut that - * DRM expects us to use in absence of a user lut. -+ * -+ * Do NOT change state dynamically for hvs5 as it -+ * inserts a delay in the pipeline that will cause -+ * stalls if enabled/disabled whilst running. The other -+ * should already be disabling/enabling the pipeline -+ * when gamma changes. - */ -- dispbkgndx &= ~SCALER_DISPBKGND_GAMMA; -+ if (!vc4->is_vc5) -+ dispbkgndx &= ~SCALER_DISPBKGND_GAMMA; - } - HVS_WRITE(SCALER_DISPBKGNDX(channel), dispbkgndx); - } diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0015-drm-vc4-Only-add-gamma-properties-once.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0015-drm-vc4-Only-add-gamma-properties-once.patch deleted file mode 100644 index bff05a6ff2..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0015-drm-vc4-Only-add-gamma-properties-once.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 57ec5c418588c6dd23a4ce7d0f0cb76667ec155f Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Mon, 8 Nov 2021 18:25:49 +0000 -Subject: [PATCH 0015/1085] drm/vc4: Only add gamma properties once. - -Two calls were made to drm_crtc_enable_color_mgmt to add gamma -and CTM, however they were both set to add the gamma properties, -so they ended up added twice. - -Fixes: 766cc6b1f7fc "drm/vc4: Add CTM support" -Signed-off-by: Dave Stevenson ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -1371,7 +1371,7 @@ int __vc4_crtc_init(struct drm_device *d - /* We support CTM, but only for one CRTC at a time. It's therefore - * implemented as private driver state in vc4_kms, not here. - */ -- drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size); -+ drm_crtc_enable_color_mgmt(crtc, 0, true, 0); - - /* Initialize the VC4 gamma LUTs */ - for (i = 0; i < crtc->gamma_size; i++) { diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0016-drm-vc4-Validate-the-size-of-the-gamma_lut.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0016-drm-vc4-Validate-the-size-of-the-gamma_lut.patch deleted file mode 100644 index 7280b6e30c..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0016-drm-vc4-Validate-the-size-of-the-gamma_lut.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 67157d16a97a0dc896d5a70245ba8f9f360112c8 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Wed, 10 Nov 2021 16:36:12 +0000 -Subject: [PATCH 0016/1085] drm/vc4: Validate the size of the gamma_lut - -Add a check to vc4_hvs_gamma_check to ensure a new non-empty -gamma LUT is of the correct length before accepting it. - -Signed-off-by: Dave Stevenson ---- - drivers/gpu/drm/vc4/vc4_hvs.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -617,6 +617,16 @@ static int vc4_hvs_gamma_check(struct dr - if (!crtc_state->color_mgmt_changed) - return 0; - -+ if (crtc_state->gamma_lut) { -+ unsigned int len = drm_color_lut_size(crtc_state->gamma_lut); -+ -+ if (len != crtc->gamma_size) { -+ DRM_DEBUG_KMS("Invalid LUT size; got %u, expected %u\n", -+ len, crtc->gamma_size); -+ return -EINVAL; -+ } -+ } -+ - connector = vc4_get_crtc_connector(crtc, crtc_state); - if (!connector) - return -EINVAL; diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0017-drm-vc4-Disable-Gamma-control-on-HVS5-due-to-issues-.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0017-drm-vc4-Disable-Gamma-control-on-HVS5-due-to-issues-.patch deleted file mode 100644 index 2f432cb427..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0017-drm-vc4-Disable-Gamma-control-on-HVS5-due-to-issues-.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 1a8c3424507c67088915f2136edfba381c2fa4b9 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Thu, 13 Jan 2022 11:30:42 +0000 -Subject: [PATCH 0017/1085] drm/vc4: Disable Gamma control on HVS5 due to - issues writing the table - -Still under investigation, but the conditions under which the HVS -will accept values written to the gamma PWL are not straightforward. - -Disable gamma on HVS5 again until it can be resolved to avoid -gamma being enabled with an incorrect table. - -Signed-off-by: Dave Stevenson ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 8 +------- - 1 file changed, 1 insertion(+), 7 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -1357,15 +1357,9 @@ int __vc4_crtc_init(struct drm_device *d - - if (!vc4->is_vc5) { - drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r)); -- } else { -- /* This is a lie for hvs5 which uses a 16 point PWL, but it -- * allows for something smarter than just 16 linearly spaced -- * segments. Conversion is done in vc5_hvs_update_gamma_lut. -- */ -- drm_mode_crtc_set_gamma_size(crtc, 256); -+ drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size); - } - -- drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size); - - if (!vc4->is_vc5) { - /* We support CTM, but only for one CRTC at a time. It's therefore diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0018-drm-dsi-Document-the-meaning-and-spec-references-for.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0018-drm-dsi-Document-the-meaning-and-spec-references-for.patch deleted file mode 100644 index 6b785f6af1..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0018-drm-dsi-Document-the-meaning-and-spec-references-for.patch +++ /dev/null @@ -1,76 +0,0 @@ -From cfd0ecb25ac9aecd0e6401d951a41988b7672776 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Fri, 17 Dec 2021 13:36:52 +0000 -Subject: [PATCH 0018/1085] drm/dsi: Document the meaning and spec references - for MIPI_DSI_MODE_* - -The MIPI_DSI_MODE_* flags have fairly terse descriptions and no reference -to the DSI specification as to their exact meaning. Usage has therefore -been rather fluid. - -Extend the descriptions and provide references to the part of the -MIPI DSI specification regarding what they mean. - -Signed-off-by: Dave Stevenson ---- - include/drm/drm_mipi_dsi.h | 38 ++++++++++++++++++++++++++------------ - 1 file changed, 26 insertions(+), 12 deletions(-) - ---- a/include/drm/drm_mipi_dsi.h -+++ b/include/drm/drm_mipi_dsi.h -@@ -113,29 +113,43 @@ struct mipi_dsi_host *of_find_mipi_dsi_h - - /* DSI mode flags */ - --/* video mode */ -+/* Video mode display. -+ * Not set denotes a command mode display. -+ */ - #define MIPI_DSI_MODE_VIDEO BIT(0) --/* video burst mode */ -+/* Video burst mode. -+ * Link frequency to be configured via platform configuration. -+ * This should always be set in conjunction with MIPI_DSI_MODE_VIDEO. -+ * (DSI spec V1.1 8.11.4) -+ */ - #define MIPI_DSI_MODE_VIDEO_BURST BIT(1) --/* video pulse mode */ -+/* Video pulse mode. -+ * Not set denotes sync event mode. (DSI spec V1.1 8.11.2) -+ */ - #define MIPI_DSI_MODE_VIDEO_SYNC_PULSE BIT(2) --/* enable auto vertical count mode */ -+/* Enable auto vertical count mode */ - #define MIPI_DSI_MODE_VIDEO_AUTO_VERT BIT(3) --/* enable hsync-end packets in vsync-pulse and v-porch area */ -+/* Enable hsync-end packets in vsync-pulse and v-porch area */ - #define MIPI_DSI_MODE_VIDEO_HSE BIT(4) --/* disable hfront-porch area */ -+/* Transmit NULL packets or LP mode during hfront-porch area. -+ * Not set denotes sending a blanking packet instead. (DSI spec V1.1 8.11.1) -+ */ - #define MIPI_DSI_MODE_VIDEO_NO_HFP BIT(5) --/* disable hback-porch area */ -+/* Transmit NULL packets or LP mode during hback-porch area. -+ * Not set denotes sending a blanking packet instead. (DSI spec V1.1 8.11.1) -+ */ - #define MIPI_DSI_MODE_VIDEO_NO_HBP BIT(6) --/* disable hsync-active area */ -+/* Transmit NULL packets or LP mode during hsync-active area. -+ * Not set denotes sending a blanking packet instead. (DSI spec V1.1 8.11.1) -+ */ - #define MIPI_DSI_MODE_VIDEO_NO_HSA BIT(7) --/* flush display FIFO on vsync pulse */ -+/* Flush display FIFO on vsync pulse */ - #define MIPI_DSI_MODE_VSYNC_FLUSH BIT(8) --/* disable EoT packets in HS mode */ -+/* Disable EoT packets in HS mode. (DSI spec V1.1 8.1) */ - #define MIPI_DSI_MODE_NO_EOT_PACKET BIT(9) --/* device supports non-continuous clock behavior (DSI spec 5.6.1) */ -+/* Device supports non-continuous clock behavior (DSI spec V1.1 5.6.1) */ - #define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10) --/* transmit data in low power */ -+/* Transmit data in low power */ - #define MIPI_DSI_MODE_LPM BIT(11) - /* transmit data ending at the same time for all lanes within one hsync */ - #define MIPI_DSI_HS_PKT_END_ALIGNED BIT(12) diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0019-drm-bridge-tc358762-Ignore-EPROBE_DEFER-when-logging.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0019-drm-bridge-tc358762-Ignore-EPROBE_DEFER-when-logging.patch deleted file mode 100644 index e02ab86177..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0019-drm-bridge-tc358762-Ignore-EPROBE_DEFER-when-logging.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 00e306d9dd4855b6a6da682b934bbc513e7cbcd5 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Thu, 20 Jan 2022 17:29:36 +0000 -Subject: [PATCH 0019/1085] drm/bridge: tc358762: Ignore EPROBE_DEFER when - logging errors - -mipi_dsi_attach can fail due to resources not being available -yet, therefore do not log error messages should they occur. - -Signed-off-by: Dave Stevenson ---- - drivers/gpu/drm/bridge/tc358762.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/gpu/drm/bridge/tc358762.c -+++ b/drivers/gpu/drm/bridge/tc358762.c -@@ -294,7 +294,7 @@ static int tc358762_probe(struct mipi_ds - ret = mipi_dsi_attach(dsi); - if (ret < 0) { - drm_bridge_remove(&ctx->bridge); -- dev_err(dev, "failed to attach dsi\n"); -+ dev_err_probe(dev, ret, "failed to attach dsi\n"); - } - - return ret; diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0020-vc4-drm-vc4_plane-Keep-fractional-source-coords-insi.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0020-vc4-drm-vc4_plane-Keep-fractional-source-coords-insi.patch deleted file mode 100644 index 17dd4433e1..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0020-vc4-drm-vc4_plane-Keep-fractional-source-coords-insi.patch +++ /dev/null @@ -1,212 +0,0 @@ -From 1e18d70635d275e4c6a9ac63fa79a461ed50eac2 Mon Sep 17 00:00:00 2001 -From: Dom Cobley -Date: Mon, 14 Mar 2022 17:56:10 +0000 -Subject: [PATCH 0020/1085] vc4/drm: vc4_plane: Keep fractional source coords - inside state - -Signed-off-by: Dom Cobley ---- - drivers/gpu/drm/vc4/vc4_drv.h | 2 +- - drivers/gpu/drm/vc4/vc4_plane.c | 68 ++++++++++++++++----------------- - 2 files changed, 34 insertions(+), 36 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_drv.h -+++ b/drivers/gpu/drm/vc4/vc4_drv.h -@@ -409,7 +409,7 @@ struct vc4_plane_state { - - /* Clipped coordinates of the plane on the display. */ - int crtc_x, crtc_y, crtc_w, crtc_h; -- /* Clipped area being scanned from in the FB. */ -+ /* Clipped area being scanned from in the FB in u16.16 format */ - u32 src_x, src_y; - - u32 src_w[2], src_h[2]; ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -251,9 +251,9 @@ static const struct hvs_format *vc4_get_ - - static enum vc4_scaling_mode vc4_get_scaling_mode(u32 src, u32 dst) - { -- if (dst == src) -+ if (dst == src >> 16) - return VC4_SCALING_NONE; -- if (3 * dst >= 2 * src) -+ if (3 * dst >= 2 * (src >> 16)) - return VC4_SCALING_PPF; - else - return VC4_SCALING_TPZ; -@@ -462,15 +462,10 @@ static int vc4_plane_setup_clipping_and_ - vc4_state->offsets[i] = bo->dma_addr + fb->offsets[i]; - } - -- /* -- * We don't support subpixel source positioning for scaling, -- * but fractional coordinates can be generated by clipping -- * so just round for now -- */ -- vc4_state->src_x = DIV_ROUND_CLOSEST(state->src.x1, 1 << 16); -- vc4_state->src_y = DIV_ROUND_CLOSEST(state->src.y1, 1 << 16); -- vc4_state->src_w[0] = DIV_ROUND_CLOSEST(state->src.x2, 1 << 16) - vc4_state->src_x; -- vc4_state->src_h[0] = DIV_ROUND_CLOSEST(state->src.y2, 1 << 16) - vc4_state->src_y; -+ vc4_state->src_x = state->src.x1; -+ vc4_state->src_y = state->src.y1; -+ vc4_state->src_w[0] = state->src.x2 - vc4_state->src_x; -+ vc4_state->src_h[0] = state->src.y2 - vc4_state->src_y; - - vc4_state->crtc_x = state->dst.x1; - vc4_state->crtc_y = state->dst.y1; -@@ -523,7 +518,7 @@ static void vc4_write_tpz(struct vc4_pla - { - u32 scale, recip; - -- scale = (1 << 16) * src / dst; -+ scale = src / dst; - - /* The specs note that while the reciprocal would be defined - * as (1<<32)/scale, ~0 is close enough. -@@ -569,7 +564,7 @@ static u32 vc4_lbm_size(struct drm_plane - if (vc4_state->x_scaling[0] == VC4_SCALING_TPZ) - pix_per_line = vc4_state->crtc_w; - else -- pix_per_line = vc4_state->src_w[0]; -+ pix_per_line = vc4_state->src_w[0] >> 16; - - if (!vc4_state->is_yuv) { - if (vc4_state->y_scaling[0] == VC4_SCALING_TPZ) -@@ -660,7 +655,8 @@ static void vc4_plane_calc_load(struct d - for (i = 0; i < fb->format->num_planes; i++) { - /* Even if the bandwidth/plane required for a single frame is - * -- * vc4_state->src_w[i] * vc4_state->src_h[i] * cpp * vrefresh -+ * (vc4_state->src_w[i] >> 16) * (vc4_state->src_h[i] >> 16) * -+ * cpp * vrefresh - * - * when downscaling, we have to read more pixels per line in - * the time frame reserved for a single line, so the bandwidth -@@ -669,11 +665,11 @@ static void vc4_plane_calc_load(struct d - * load by this number. We're likely over-estimating the read - * demand, but that's better than under-estimating it. - */ -- vscale_factor = DIV_ROUND_UP(vc4_state->src_h[i], -+ vscale_factor = DIV_ROUND_UP(vc4_state->src_h[i] >> 16, - vc4_state->crtc_h); -- vc4_state->membus_load += vc4_state->src_w[i] * -- vc4_state->src_h[i] * vscale_factor * -- fb->format->cpp[i]; -+ vc4_state->membus_load += (vc4_state->src_w[i] >> 16) * -+ (vc4_state->src_h[i] >> 16) * -+ vscale_factor * fb->format->cpp[i]; - vc4_state->hvs_load += vc4_state->crtc_h * vc4_state->crtc_w; - } - -@@ -826,7 +822,8 @@ static int vc4_plane_mode_set(struct drm - bool mix_plane_alpha; - bool covers_screen; - u32 scl0, scl1, pitch0; -- u32 tiling, src_y; -+ u32 tiling, src_x, src_y; -+ u32 width, height; - u32 hvs_format = format->hvs; - unsigned int rotation; - int ret, i; -@@ -838,6 +835,9 @@ static int vc4_plane_mode_set(struct drm - if (ret) - return ret; - -+ width = vc4_state->src_w[0] >> 16; -+ height = vc4_state->src_h[0] >> 16; -+ - /* SCL1 is used for Cb/Cr scaling of planar formats. For RGB - * and 4:4:4, scl1 should be set to scl0 so both channels of - * the scaler do the same thing. For YUV, the Y plane needs -@@ -858,9 +858,11 @@ static int vc4_plane_mode_set(struct drm - DRM_MODE_REFLECT_Y); - - /* We must point to the last line when Y reflection is enabled. */ -- src_y = vc4_state->src_y; -+ src_y = vc4_state->src_y >> 16; - if (rotation & DRM_MODE_REFLECT_Y) -- src_y += vc4_state->src_h[0] - 1; -+ src_y += height - 1; -+ -+ src_x = vc4_state->src_x >> 16; - - switch (base_format_mod) { - case DRM_FORMAT_MOD_LINEAR: -@@ -875,7 +877,7 @@ static int vc4_plane_mode_set(struct drm - (i ? v_subsample : 1) * - fb->pitches[i]; - -- vc4_state->offsets[i] += vc4_state->src_x / -+ vc4_state->offsets[i] += src_x / - (i ? h_subsample : 1) * - fb->format->cpp[i]; - } -@@ -898,7 +900,7 @@ static int vc4_plane_mode_set(struct drm - * pitch * tile_h == tile_size * tiles_per_row - */ - u32 tiles_w = fb->pitches[0] >> (tile_size_shift - tile_h_shift); -- u32 tiles_l = vc4_state->src_x >> tile_w_shift; -+ u32 tiles_l = src_x >> tile_w_shift; - u32 tiles_r = tiles_w - tiles_l; - u32 tiles_t = src_y >> tile_h_shift; - /* Intra-tile offsets, which modify the base address (the -@@ -908,7 +910,7 @@ static int vc4_plane_mode_set(struct drm - u32 tile_y = (src_y >> 4) & 1; - u32 subtile_y = (src_y >> 2) & 3; - u32 utile_y = src_y & 3; -- u32 x_off = vc4_state->src_x & tile_w_mask; -+ u32 x_off = src_x & tile_w_mask; - u32 y_off = src_y & tile_h_mask; - - /* When Y reflection is requested we must set the -@@ -1004,7 +1006,7 @@ static int vc4_plane_mode_set(struct drm - * of the 12-pixels in that 128-bit word is the - * first pixel to be used - */ -- u32 remaining_pixels = vc4_state->src_x % 96; -+ u32 remaining_pixels = src_x % 96; - u32 aligned = remaining_pixels / 12; - u32 last_bits = remaining_pixels % 12; - -@@ -1026,12 +1028,12 @@ static int vc4_plane_mode_set(struct drm - return -EINVAL; - } - pix_per_tile = tile_w / fb->format->cpp[0]; -- x_off = (vc4_state->src_x % pix_per_tile) / -+ x_off = (src_x % pix_per_tile) / - (i ? h_subsample : 1) * - fb->format->cpp[i]; - } - -- tile = vc4_state->src_x / pix_per_tile; -+ tile = src_x / pix_per_tile; - - vc4_state->offsets[i] += param * tile_w * tile; - vc4_state->offsets[i] += src_y / -@@ -1092,10 +1094,8 @@ static int vc4_plane_mode_set(struct drm - vc4_dlist_write(vc4_state, - (mix_plane_alpha ? SCALER_POS2_ALPHA_MIX : 0) | - vc4_hvs4_get_alpha_blend_mode(state) | -- VC4_SET_FIELD(vc4_state->src_w[0], -- SCALER_POS2_WIDTH) | -- VC4_SET_FIELD(vc4_state->src_h[0], -- SCALER_POS2_HEIGHT)); -+ VC4_SET_FIELD(width, SCALER_POS2_WIDTH) | -+ VC4_SET_FIELD(height, SCALER_POS2_HEIGHT)); - - /* Position Word 3: Context. Written by the HVS. */ - vc4_dlist_write(vc4_state, 0xc0c0c0c0); -@@ -1148,10 +1148,8 @@ static int vc4_plane_mode_set(struct drm - /* Position Word 2: Source Image Size */ - vc4_state->pos2_offset = vc4_state->dlist_count; - vc4_dlist_write(vc4_state, -- VC4_SET_FIELD(vc4_state->src_w[0], -- SCALER5_POS2_WIDTH) | -- VC4_SET_FIELD(vc4_state->src_h[0], -- SCALER5_POS2_HEIGHT)); -+ VC4_SET_FIELD(width, SCALER5_POS2_WIDTH) | -+ VC4_SET_FIELD(height, SCALER5_POS2_HEIGHT)); - - /* Position Word 3: Context. Written by the HVS. */ - vc4_dlist_write(vc4_state, 0xc0c0c0c0); diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0021-vc4-drm-Handle-fractional-coordinates-using-the-phas.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0021-vc4-drm-Handle-fractional-coordinates-using-the-phas.patch deleted file mode 100644 index 6b16937ade..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0021-vc4-drm-Handle-fractional-coordinates-using-the-phas.patch +++ /dev/null @@ -1,105 +0,0 @@ -From 082526e9709190ec5e035266a33a7a4858ad7a79 Mon Sep 17 00:00:00 2001 -From: Dom Cobley -Date: Fri, 9 Apr 2021 15:00:40 +0100 -Subject: [PATCH 0021/1085] vc4/drm: Handle fractional coordinates using the - phase field - -Signed-off-by: Dom Cobley ---- - drivers/gpu/drm/vc4/vc4_plane.c | 61 ++++++++++++++++++++++++++++++--- - 1 file changed, 56 insertions(+), 5 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -532,14 +532,47 @@ static void vc4_write_tpz(struct vc4_pla - VC4_SET_FIELD(recip, SCALER_TPZ1_RECIP)); - } - --static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst) -+/* phase magnitude bits */ -+#define PHASE_BITS 6 -+ -+static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst, u32 xy, int channel) - { -- u32 scale = (1 << 16) * src / dst; -+ u32 scale = src / dst; -+ s32 offset, offset2; -+ s32 phase; -+ -+ /* Start the phase at 1/2 pixel from the 1st pixel at src_x. -+ 1/4 pixel for YUV. */ -+ if (channel) { -+ /* the phase is relative to scale_src->x, so shift it for display list's x value */ -+ offset = (xy & 0x1ffff) >> (16 - PHASE_BITS) >> 1; -+ offset += -(1 << PHASE_BITS >> 2); -+ } else { -+ /* the phase is relative to scale_src->x, so shift it for display list's x value */ -+ offset = (xy & 0xffff) >> (16 - PHASE_BITS); -+ offset += -(1 << PHASE_BITS >> 1); -+ -+ /* This is a kludge to make sure the scaling factors are consitent with YUV's luma scaling. -+ we lose 1bit precision because of this. */ -+ scale &= ~1; -+ } -+ -+ /* There may be a also small error introduced by precision of scale. -+ Add half of that as a compromise */ -+ offset2 = src - dst * scale; -+ offset2 >>= 16 - PHASE_BITS; -+ phase = offset + (offset2 >> 1); -+ -+ /* Ensure +ve values don't touch the sign bit, then truncate negative values */ -+ if (phase >= 1 << PHASE_BITS) -+ phase = (1 << PHASE_BITS) - 1; -+ -+ phase &= SCALER_PPF_IPHASE_MASK; - - vc4_dlist_write(vc4_state, - SCALER_PPF_AGC | - VC4_SET_FIELD(scale, SCALER_PPF_SCALE) | -- VC4_SET_FIELD(0, SCALER_PPF_IPHASE)); -+ VC4_SET_FIELD(phase, SCALER_PPF_IPHASE)); - } - - static u32 vc4_lbm_size(struct drm_plane_state *state) -@@ -598,13 +631,13 @@ static void vc4_write_scaling_parameters - /* Ch0 H-PPF Word 0: Scaling Parameters */ - if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) { - vc4_write_ppf(vc4_state, -- vc4_state->src_w[channel], vc4_state->crtc_w); -+ vc4_state->src_w[channel], vc4_state->crtc_w, vc4_state->src_x, channel); - } - - /* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */ - if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) { - vc4_write_ppf(vc4_state, -- vc4_state->src_h[channel], vc4_state->crtc_h); -+ vc4_state->src_h[channel], vc4_state->crtc_h, vc4_state->src_y, channel); - vc4_dlist_write(vc4_state, 0xc0c0c0c0); - } - -@@ -1052,6 +1085,24 @@ static int vc4_plane_mode_set(struct drm - return -EINVAL; - } - -+ /* fetch an extra pixel if we don't actually line up with the left edge. */ -+ if ((vc4_state->src_x & 0xffff) && vc4_state->src_x < (state->fb->width << 16)) -+ width++; -+ -+ /* same for the right side */ -+ if (((vc4_state->src_x + vc4_state->src_w[0]) & 0xffff) && -+ vc4_state->src_x + vc4_state->src_w[0] < (state->fb->width << 16)) -+ width++; -+ -+ /* now for the top */ -+ if ((vc4_state->src_y & 0xffff) && vc4_state->src_y < (state->fb->height << 16)) -+ height++; -+ -+ /* and the bottom */ -+ if (((vc4_state->src_y + vc4_state->src_h[0]) & 0xffff) && -+ vc4_state->src_y + vc4_state->src_h[0] < (state->fb->height << 16)) -+ height++; -+ - /* Don't waste cycles mixing with plane alpha if the set alpha - * is opaque or there is no per-pixel alpha information. - * In any case we use the alpha property value as the fixed alpha. diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0022-drm-Add-chroma-siting-properties.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0022-drm-Add-chroma-siting-properties.patch deleted file mode 100644 index 56c3b2b286..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0022-drm-Add-chroma-siting-properties.patch +++ /dev/null @@ -1,170 +0,0 @@ -From ab6920df43e7b33afb5aa0552c61f8485e1a60da Mon Sep 17 00:00:00 2001 -From: Dom Cobley -Date: Wed, 26 Jan 2022 15:58:13 +0000 -Subject: [PATCH 0022/1085] drm: Add chroma siting properties - -Signed-off-by: Dom Cobley ---- - drivers/gpu/drm/drm_atomic_state_helper.c | 14 +++++++++ - drivers/gpu/drm/drm_atomic_uapi.c | 8 +++++ - drivers/gpu/drm/drm_color_mgmt.c | 36 +++++++++++++++++++++++ - include/drm/drm_color_mgmt.h | 3 ++ - include/drm/drm_plane.h | 36 +++++++++++++++++++++++ - 5 files changed, 97 insertions(+) - ---- a/drivers/gpu/drm/drm_atomic_state_helper.c -+++ b/drivers/gpu/drm/drm_atomic_state_helper.c -@@ -267,6 +267,20 @@ void __drm_atomic_helper_plane_state_res - plane_state->color_range = val; - } - -+ if (plane->chroma_siting_h_property) { -+ if (!drm_object_property_get_default_value(&plane->base, -+ plane->chroma_siting_h_property, -+ &val)) -+ plane_state->chroma_siting_h = val; -+ } -+ -+ if (plane->chroma_siting_v_property) { -+ if (!drm_object_property_get_default_value(&plane->base, -+ plane->chroma_siting_v_property, -+ &val)) -+ plane_state->chroma_siting_v = val; -+ } -+ - if (plane->zpos_property) { - if (!drm_object_property_get_default_value(&plane->base, - plane->zpos_property, ---- a/drivers/gpu/drm/drm_atomic_uapi.c -+++ b/drivers/gpu/drm/drm_atomic_uapi.c -@@ -580,6 +580,10 @@ static int drm_atomic_plane_set_property - state->color_encoding = val; - } else if (property == plane->color_range_property) { - state->color_range = val; -+ } else if (property == plane->chroma_siting_h_property) { -+ state->chroma_siting_h = val; -+ } else if (property == plane->chroma_siting_v_property) { -+ state->chroma_siting_v = val; - } else if (property == config->prop_fb_damage_clips) { - ret = drm_atomic_replace_property_blob_from_id(dev, - &state->fb_damage_clips, -@@ -646,6 +650,10 @@ drm_atomic_plane_get_property(struct drm - *val = state->color_encoding; - } else if (property == plane->color_range_property) { - *val = state->color_range; -+ } else if (property == plane->chroma_siting_h_property) { -+ *val = state->chroma_siting_h; -+ } else if (property == plane->chroma_siting_v_property) { -+ *val = state->chroma_siting_v; - } else if (property == config->prop_fb_damage_clips) { - *val = (state->fb_damage_clips) ? - state->fb_damage_clips->base.id : 0; ---- a/drivers/gpu/drm/drm_color_mgmt.c -+++ b/drivers/gpu/drm/drm_color_mgmt.c -@@ -591,6 +591,42 @@ int drm_plane_create_color_properties(st - EXPORT_SYMBOL(drm_plane_create_color_properties); - - /** -+ * drm_plane_create_chroma_siting_properties - chroma siting related plane properties -+ * @plane: plane object -+ * -+ * Create and attach plane specific CHROMA_SITING -+ * properties to @plane. -+ */ -+int drm_plane_create_chroma_siting_properties(struct drm_plane *plane, -+ int32_t default_chroma_siting_h, -+ int32_t default_chroma_siting_v) -+{ -+ struct drm_device *dev = plane->dev; -+ struct drm_property *prop; -+ -+ prop = drm_property_create_range(dev, 0, "CHROMA_SITING_H", -+ 0, 1<<16); -+ if (!prop) -+ return -ENOMEM; -+ plane->chroma_siting_h_property = prop; -+ drm_object_attach_property(&plane->base, prop, default_chroma_siting_h); -+ -+ prop = drm_property_create_range(dev, 0, "CHROMA_SITING_V", -+ 0, 1<<16); -+ if (!prop) -+ return -ENOMEM; -+ plane->chroma_siting_v_property = prop; -+ drm_object_attach_property(&plane->base, prop, default_chroma_siting_v); -+ -+ if (plane->state) { -+ plane->state->chroma_siting_h = default_chroma_siting_h; -+ plane->state->chroma_siting_v = default_chroma_siting_v; -+ } -+ return 0; -+} -+EXPORT_SYMBOL(drm_plane_create_chroma_siting_properties); -+ -+/** - * drm_color_lut_check - check validity of lookup table - * @lut: property blob containing LUT to check - * @tests: bitmask of tests to run ---- a/include/drm/drm_color_mgmt.h -+++ b/include/drm/drm_color_mgmt.h -@@ -94,6 +94,9 @@ int drm_plane_create_color_properties(st - enum drm_color_encoding default_encoding, - enum drm_color_range default_range); - -+int drm_plane_create_chroma_siting_properties(struct drm_plane *plane, -+ int32_t default_chroma_siting_h, int32_t default_chroma_siting_v); -+ - /** - * enum drm_color_lut_tests - hw-specific LUT tests to perform - * ---- a/include/drm/drm_plane.h -+++ b/include/drm/drm_plane.h -@@ -178,6 +178,24 @@ struct drm_plane_state { - enum drm_color_range color_range; - - /** -+ * @chroma_siting_h: -+ * -+ * Location of chroma samples horizontally compared to luma -+ * 0 means chroma is sited with left luma -+ * 0x8000 is interstitial. 0x10000 is sited with right luma -+ */ -+ int32_t chroma_siting_h; -+ -+ /** -+ * @chroma_siting_v: -+ * -+ * Location of chroma samples vertically compared to luma -+ * 0 means chroma is sited with top luma -+ * 0x8000 is interstitial. 0x10000 is sited with bottom luma -+ */ -+ int32_t chroma_siting_v; -+ -+ /** - * @fb_damage_clips: - * - * Blob representing damage (area in plane framebuffer that changed -@@ -758,6 +776,24 @@ struct drm_plane { - * scaling. - */ - struct drm_property *scaling_filter_property; -+ -+ /** -+ * @chroma_siting_h_property: -+ * -+ * Optional "CHROMA_SITING_H" property for specifying -+ * chroma siting for YUV formats. -+ * See drm_plane_create_chroma_siting_properties(). -+ */ -+ struct drm_property *chroma_siting_h_property; -+ -+ /** -+ * @chroma_siting_v_property: -+ * -+ * Optional "CHROMA_SITING_V" property for specifying -+ * chroma siting for YUV formats. -+ * See drm_plane_create_chroma_siting_properties(). -+ */ -+ struct drm_property *chroma_siting_v_property; - }; - - #define obj_to_plane(x) container_of(x, struct drm_plane, base) diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0023-vc4-drm-plane-Make-use-of-chroma-siting-parameter.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0023-vc4-drm-plane-Make-use-of-chroma-siting-parameter.patch deleted file mode 100644 index 774ee39a61..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0023-vc4-drm-plane-Make-use-of-chroma-siting-parameter.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 58d65d7d1c7b86291acaddea1606d884d5736ff0 Mon Sep 17 00:00:00 2001 -From: Dom Cobley -Date: Thu, 27 Jan 2022 15:32:04 +0000 -Subject: [PATCH 0023/1085] vc4/drm:plane: Make use of chroma siting parameter - -Signed-off-by: Dom Cobley ---- - drivers/gpu/drm/vc4/vc4_plane.c | 13 +++++++++---- - 1 file changed, 9 insertions(+), 4 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -535,17 +535,18 @@ static void vc4_write_tpz(struct vc4_pla - /* phase magnitude bits */ - #define PHASE_BITS 6 - --static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst, u32 xy, int channel) -+static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst, u32 xy, int channel, int chroma_offset) - { - u32 scale = src / dst; - s32 offset, offset2; - s32 phase; - - /* Start the phase at 1/2 pixel from the 1st pixel at src_x. -- 1/4 pixel for YUV. */ -+ 1/4 pixel for YUV, plus the offset for chroma siting */ - if (channel) { - /* the phase is relative to scale_src->x, so shift it for display list's x value */ - offset = (xy & 0x1ffff) >> (16 - PHASE_BITS) >> 1; -+ offset -= chroma_offset >> (17 - PHASE_BITS); - offset += -(1 << PHASE_BITS >> 2); - } else { - /* the phase is relative to scale_src->x, so shift it for display list's x value */ -@@ -631,13 +632,15 @@ static void vc4_write_scaling_parameters - /* Ch0 H-PPF Word 0: Scaling Parameters */ - if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) { - vc4_write_ppf(vc4_state, -- vc4_state->src_w[channel], vc4_state->crtc_w, vc4_state->src_x, channel); -+ vc4_state->src_w[channel], vc4_state->crtc_w, vc4_state->src_x, channel, -+ state->chroma_siting_h); - } - - /* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */ - if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) { - vc4_write_ppf(vc4_state, -- vc4_state->src_h[channel], vc4_state->crtc_h, vc4_state->src_y, channel); -+ vc4_state->src_h[channel], vc4_state->crtc_h, vc4_state->src_y, channel, -+ state->chroma_siting_v); - vc4_dlist_write(vc4_state, 0xc0c0c0c0); - } - -@@ -1718,6 +1721,8 @@ struct drm_plane *vc4_plane_init(struct - DRM_COLOR_YCBCR_BT709, - DRM_COLOR_YCBCR_LIMITED_RANGE); - -+ drm_plane_create_chroma_siting_properties(plane, 0, 0); -+ - if (type == DRM_PLANE_TYPE_PRIMARY) - drm_plane_create_zpos_immutable_property(plane, 0); - diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0024-drm-vc4-Force-trigger-of-dlist-update-on-margins-cha.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0024-drm-vc4-Force-trigger-of-dlist-update-on-margins-cha.patch deleted file mode 100644 index 06cb709498..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0024-drm-vc4-Force-trigger-of-dlist-update-on-margins-cha.patch +++ /dev/null @@ -1,58 +0,0 @@ -From c12bd0136e9772e955b5637185415d413d8d5b5c Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Fri, 1 Apr 2022 11:31:38 +0100 -Subject: [PATCH 0024/1085] drm/vc4: Force trigger of dlist update on margins - change - -When the margins are changed, the dlist needs to be regenerated -with the changed updated dest regions for each of the planes. - -Setting the zpos_changed flag is sufficient to trigger that -without doing a full modeset, therefore set it should the -margins be changed. - -Signed-off-by: Dave Stevenson ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 14 ++++++++++---- - drivers/gpu/drm/vc4/vc4_drv.h | 7 +------ - 2 files changed, 11 insertions(+), 10 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -752,10 +752,16 @@ int vc4_crtc_atomic_check(struct drm_crt - if (conn_state->crtc != crtc) - continue; - -- vc4_state->margins.left = conn_state->tv.margins.left; -- vc4_state->margins.right = conn_state->tv.margins.right; -- vc4_state->margins.top = conn_state->tv.margins.top; -- vc4_state->margins.bottom = conn_state->tv.margins.bottom; -+ if (memcmp(&vc4_state->margins, &conn_state->tv.margins, -+ sizeof(vc4_state->margins))) { -+ memcpy(&vc4_state->margins, &conn_state->tv.margins, -+ sizeof(vc4_state->margins)); -+ -+ /* Need to force the dlist entries for all planes to be -+ * updated so that the dest rectangles are changed. -+ */ -+ crtc_state->zpos_changed = true; -+ } - break; - } - ---- a/drivers/gpu/drm/vc4/vc4_drv.h -+++ b/drivers/gpu/drm/vc4/vc4_drv.h -@@ -627,12 +627,7 @@ struct vc4_crtc_state { - bool txp_armed; - unsigned int assigned_channel; - -- struct { -- unsigned int left; -- unsigned int right; -- unsigned int top; -- unsigned int bottom; -- } margins; -+ struct drm_connector_tv_margins margins; - - unsigned long hvs_load; - diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0025-drm-atomic-helpers-remove-legacy_cursor_update-hacks.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0025-drm-atomic-helpers-remove-legacy_cursor_update-hacks.patch deleted file mode 100644 index a0981c9c0d..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0025-drm-atomic-helpers-remove-legacy_cursor_update-hacks.patch +++ /dev/null @@ -1,122 +0,0 @@ -From 268e65023226cc59363dd9c9d9ad56a11588f4c3 Mon Sep 17 00:00:00 2001 -From: Daniel Vetter -Date: Fri, 23 Oct 2020 14:39:23 +0200 -Subject: [PATCH 0025/1085] drm/atomic-helpers: remove legacy_cursor_update - hacks -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The stuff never really worked, and leads to lots of fun because it -out-of-order frees atomic states. Which upsets KASAN, among other -things. - -For async updates we now have a more solid solution with the -->atomic_async_check and ->atomic_async_commit hooks. Support for that -for msm and vc4 landed. nouveau and i915 have their own commit -routines, doing something similar. - -For everyone else it's probably better to remove the use-after-free -bug, and encourage folks to use the async support instead. The -affected drivers which register a legacy cursor plane and don't either -use the new async stuff or their own commit routine are: amdgpu, -atmel, mediatek, qxl, rockchip, sti, sun4i, tegra, virtio, and vmwgfx. - -Inspired by an amdgpu bug report. - -v2: Drop RFC, I think with amdgpu converted over to use -atomic_async_check/commit done in - -commit 674e78acae0dfb4beb56132e41cbae5b60f7d662 -Author: Nicholas Kazlauskas -Date: Wed Dec 5 14:59:07 2018 -0500 - - drm/amd/display: Add fast path for cursor plane updates - -we don't have any driver anymore where we have userspace expecting -solid legacy cursor support _and_ they are using the atomic helpers in -their fully glory. So we can retire this. - -v3: Paper over msm and i915 regression. The complete_all is the only -thing missing afaict. - -v4: Rebased on recent kernel, added extra link for vc4 bug. - -Link: https://bugzilla.kernel.org/show_bug.cgi?id=199425 -Link: https://lore.kernel.org/all/20220221134155.125447-9-maxime@cerno.tech/ -Cc: mikita.lipski@amd.com -Cc: Michel Dänzer -Cc: harry.wentland@amd.com -Cc: Rob Clark -Cc: "Kazlauskas, Nicholas" -Tested-by: Maxime Ripard -Signed-off-by: Daniel Vetter -Signed-off-by: Maxime Ripard ---- - drivers/gpu/drm/drm_atomic_helper.c | 13 ------------- - drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++++++ - drivers/gpu/drm/msm/msm_atomic.c | 2 ++ - 3 files changed, 15 insertions(+), 13 deletions(-) - ---- a/drivers/gpu/drm/drm_atomic_helper.c -+++ b/drivers/gpu/drm/drm_atomic_helper.c -@@ -1653,13 +1653,6 @@ drm_atomic_helper_wait_for_vblanks(struc - int i, ret; - unsigned int crtc_mask = 0; - -- /* -- * Legacy cursor ioctls are completely unsynced, and userspace -- * relies on that (by doing tons of cursor updates). -- */ -- if (old_state->legacy_cursor_update) -- return; -- - for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { - if (!new_crtc_state->active) - continue; -@@ -2309,12 +2302,6 @@ int drm_atomic_helper_setup_commit(struc - complete_all(&commit->flip_done); - continue; - } -- -- /* Legacy cursor updates are fully unsynced. */ -- if (state->legacy_cursor_update) { -- complete_all(&commit->flip_done); -- continue; -- } - - if (!new_crtc_state->event) { - commit->event = kzalloc(sizeof(*commit->event), ---- a/drivers/gpu/drm/i915/display/intel_display.c -+++ b/drivers/gpu/drm/i915/display/intel_display.c -@@ -7297,6 +7297,19 @@ int intel_atomic_commit(struct drm_devic - state->base.legacy_cursor_update = false; - } - -+ /* -+ * FIXME: Cut over to (async) commit helpers instead of hand-rolling -+ * everything. -+ */ -+ if (state->base.legacy_cursor_update) { -+ struct intel_crtc_state *new_crtc_state; -+ struct intel_crtc *crtc; -+ int i; -+ -+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) -+ complete_all(&new_crtc_state->uapi.commit->flip_done); -+ } -+ - ret = intel_atomic_prepare_commit(state); - if (ret) { - drm_dbg_atomic(&dev_priv->drm, ---- a/drivers/gpu/drm/msm/msm_atomic.c -+++ b/drivers/gpu/drm/msm/msm_atomic.c -@@ -242,6 +242,8 @@ void msm_atomic_commit_tail(struct drm_a - /* async updates are limited to single-crtc updates: */ - WARN_ON(crtc_mask != drm_crtc_mask(async_crtc)); - -+ complete_all(&async_crtc->state->commit->flip_done); -+ - /* - * Start timer if we don't already have an update pending - * on this crtc: diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0026-drm-atomic-If-margins-are-updated-update-all-planes.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0026-drm-atomic-If-margins-are-updated-update-all-planes.patch deleted file mode 100644 index 90e39a8949..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0026-drm-atomic-If-margins-are-updated-update-all-planes.patch +++ /dev/null @@ -1,60 +0,0 @@ -From f6d8271436e2589629ed6f3a8a85c3bde53353d6 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Fri, 1 Apr 2022 17:10:37 +0100 -Subject: [PATCH 0026/1085] drm/atomic: If margins are updated, update all - planes. - -Margins may be implemented by scaling the planes, but as there -is no way of intercepting the set_property for a standard property, -and all planes are checked in drm_atomic_check_only before the -connectors, there's now way to add the planes into the state -from the driver. - -If the margin properties change, add all corresponding planes to -the state. - -Signed-off-by: Dave Stevenson ---- - drivers/gpu/drm/drm_atomic_uapi.c | 11 +++++++++++ - 1 file changed, 11 insertions(+) - ---- a/drivers/gpu/drm/drm_atomic_uapi.c -+++ b/drivers/gpu/drm/drm_atomic_uapi.c -@@ -701,6 +701,7 @@ static int drm_atomic_connector_set_prop - { - struct drm_device *dev = connector->dev; - struct drm_mode_config *config = &dev->mode_config; -+ bool margins_updated = false; - bool replaced = false; - int ret; - -@@ -729,12 +730,16 @@ static int drm_atomic_connector_set_prop - state->tv.subconnector = val; - } else if (property == config->tv_left_margin_property) { - state->tv.margins.left = val; -+ margins_updated = true; - } else if (property == config->tv_right_margin_property) { - state->tv.margins.right = val; -+ margins_updated = true; - } else if (property == config->tv_top_margin_property) { - state->tv.margins.top = val; -+ margins_updated = true; - } else if (property == config->tv_bottom_margin_property) { - state->tv.margins.bottom = val; -+ margins_updated = true; - } else if (property == config->legacy_tv_mode_property) { - state->tv.legacy_mode = val; - } else if (property == config->tv_mode_property) { -@@ -817,6 +822,12 @@ static int drm_atomic_connector_set_prop - return -EINVAL; - } - -+ if (margins_updated && state->crtc) { -+ ret = drm_atomic_add_affected_planes(state->state, state->crtc); -+ -+ return ret; -+ } -+ - return 0; - } - diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0027-drm-vc4-hvs-Skip-DebugFS-Registration-for-FKMS.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0027-drm-vc4-hvs-Skip-DebugFS-Registration-for-FKMS.patch deleted file mode 100644 index fb8abd20ca..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0027-drm-vc4-hvs-Skip-DebugFS-Registration-for-FKMS.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 8bfb80d65ef2ee6434517f5224d895c8f8eb57e6 Mon Sep 17 00:00:00 2001 -From: Maxime Ripard -Date: Mon, 11 Jul 2022 10:38:25 +0200 -Subject: [PATCH 0027/1085] drm/vc4: hvs: Skip DebugFS Registration for FKMS - -FKMS doesn't have an HVS and it's expected. Return from the debugfs init -function immediately if we're running with fkms. - -Signed-off-by: Maxime Ripard ---- - drivers/gpu/drm/vc4/vc4_hvs.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -980,6 +980,9 @@ int vc4_hvs_debugfs_init(struct drm_mino - struct vc4_dev *vc4 = to_vc4_dev(drm); - struct vc4_hvs *hvs = vc4->hvs; - -+ if (vc4->firmware_kms) -+ return 0; -+ - if (!vc4->hvs) - return -ENODEV; - diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0028-drm-vc4_hdmi-Allow-hotplug-detect-to-be-forced.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0028-drm-vc4_hdmi-Allow-hotplug-detect-to-be-forced.patch deleted file mode 100644 index 5785fbf667..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0028-drm-vc4_hdmi-Allow-hotplug-detect-to-be-forced.patch +++ /dev/null @@ -1,58 +0,0 @@ -From b67f05e1c4b2027b4950661b118c91850e747ee7 Mon Sep 17 00:00:00 2001 -From: Dom Cobley -Date: Wed, 1 Jun 2022 15:43:51 +0100 -Subject: [PATCH 0028/1085] drm/vc4_hdmi: Allow hotplug detect to be forced - -See: https://forum.libreelec.tv/thread/24783-tv-avr-turns-back-on-right-after-turning-them-off - -While the kernel provides a :D flag for assuming device is connected, -it doesn't stop this function from being called and generating a cec_phys_addr_invalidate -message when hotplug is deasserted. - -That message provokes a flurry of CEC messages which for many users results in the TV -switching back on again and it's very hard to get it to stay switched off. - -It seems to only occur with an AVR and TV connected but has been observed across a -number of manufacturers. - -The issue started with https://github.com/raspberrypi/linux/pull/4371 -and this provides an optional way of getting back the old behaviour - -Signed-off-by: Dom Cobley ---- - drivers/gpu/drm/vc4/vc4_hdmi.c | 10 +++++++++- - 1 file changed, 9 insertions(+), 1 deletion(-) - ---- a/drivers/gpu/drm/vc4/vc4_hdmi.c -+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -41,6 +41,8 @@ - #include - #include - #include -+#include -+#include - #include - #include - #include -@@ -109,6 +111,10 @@ - - #define HDMI_14_MAX_TMDS_CLK (340 * 1000 * 1000) - -+/* bit field to force hotplug detection. bit0 = HDMI0 */ -+static int force_hotplug = 0; -+module_param(force_hotplug, int, 0644); -+ - static const char * const output_format_str[] = { - [VC4_HDMI_OUTPUT_RGB] = "RGB", - [VC4_HDMI_OUTPUT_YUV420] = "YUV 4:2:0", -@@ -482,7 +488,9 @@ static int vc4_hdmi_connector_detect_ctx - return connector_status_unknown; - } - -- if (vc4_hdmi->hpd_gpio) { -+ if (force_hotplug & BIT(vc4_hdmi->encoder.type - VC4_ENCODER_TYPE_HDMI0)) -+ status = connector_status_connected; -+ else if (vc4_hdmi->hpd_gpio) { - if (gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio)) - status = connector_status_connected; - } else { diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0030-drm-vc4-hvs-Defer-dlist-slots-deallocation.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0030-drm-vc4-hvs-Defer-dlist-slots-deallocation.patch deleted file mode 100644 index 0d05286863..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0030-drm-vc4-hvs-Defer-dlist-slots-deallocation.patch +++ /dev/null @@ -1,401 +0,0 @@ -From bd8bb0ed9c5908f84502ee76a152370291727eef Mon Sep 17 00:00:00 2001 -From: Maxime Ripard -Date: Thu, 16 Dec 2021 14:54:54 +0100 -Subject: [PATCH 0030/1085] drm/vc4: hvs: Defer dlist slots deallocation - -During normal operations, the cursor position update is done through an -asynchronous plane update, which on the vc4 driver basically just -modifies the right dlist word to move the plane to the new coordinates. - -However, when we have the overscan margins setup, we fall back to a -regular commit when we are next to the edges. And since that commit -happens to be on a cursor plane, it's considered a legacy cursor update -by KMS. - -The main difference it makes is that it won't wait for its completion -(ie, next vblank) before returning. This means if we have multiple -commits happening in rapid succession, we can have several of them -happening before the next vblank. - -In parallel, our dlist allocation is tied to a CRTC state, and each time -we do a commit we end up with a new CRTC state, with the previous one -being freed. This means that we free our previous dlist entry (but don't -clear it though) every time a new one is being committed. - -Now, if we were to have two commits happening before the next vblank, we -could end up freeing reusing the same dlist entries before the next -vblank. - -Indeed, we would start from an initial state taking, for example, the -dlist entries 10 to 20, then start a commit taking the entries 20 to 30 -and setting the dlist pointer to 20, and freeing the dlist entries 10 to -20. However, since we haven't reach vblank yet, the HVS is still using -the entries 10 to 20. - -If we were to make a new commit now, chances are the allocator are going -to give the 10 to 20 entries back, and we would change their content to -match the new state. If vblank hasn't happened yet, we just corrupted -the active dlist entries. - -A first attempt to solve this was made by creating an intermediate dlist -buffer to store the current (ie, as of the last commit) dlist content, -that we would update each time the HVS is done with a frame. However, if -the interrupt handler missed the vblank window, we would end up copying -our intermediate dlist to the hardware one during the composition, -essentially creating the same issue. - -Since making sure that our interrupt handler runs within a fixed, -constrained, time window would require to make Linux a real-time kernel, -this seems a bit out of scope. - -Instead, we can work around our original issue by keeping the dlist -slots allocation longer. That way, we won't reuse a dlist slot while -it's still in flight. In order to achieve this, instead of freeing the -dlist slot when its associated CRTC state is destroyed, we'll queue it -in a list. - -A naive implementation would free the buffers in that queue when we get -our end of frame interrupt. However, there's still a race since, just -like in the shadow dlist case, we don't control when the handler for -that interrupt is going to run. Thus, we can end up with a commit adding -an old dlist allocation to our queue during the window between our -actual interrupt and when our handler will run. And since that buffer is -still being used for the composition of the current frame, we can't free -it right away, exposing us to the original bug. - -Fortunately for us, the hardware provides a frame counter that is -increased each time the first line of a frame is being generated. -Associating the frame counter the image is supposed to go away to the -allocation, and then only deallocate buffers that have a counter below -or equal to the one we see when the deallocation code should prevent the -above race from occuring. - -Signed-off-by: Maxime Ripard ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 10 +- - drivers/gpu/drm/vc4/vc4_drv.h | 15 ++- - drivers/gpu/drm/vc4/vc4_hvs.c | 184 ++++++++++++++++++++++++++++++--- - 3 files changed, 186 insertions(+), 23 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -1097,14 +1097,8 @@ void vc4_crtc_destroy_state(struct drm_c - struct vc4_dev *vc4 = to_vc4_dev(crtc->dev); - struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state); - -- if (drm_mm_node_allocated(&vc4_state->mm)) { -- unsigned long flags; -- -- spin_lock_irqsave(&vc4->hvs->mm_lock, flags); -- drm_mm_remove_node(&vc4_state->mm); -- spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags); -- -- } -+ vc4_hvs_mark_dlist_entry_stale(vc4->hvs, vc4_state->mm); -+ vc4_state->mm = NULL; - - drm_atomic_helper_crtc_destroy_state(crtc, state); - } ---- a/drivers/gpu/drm/vc4/vc4_drv.h -+++ b/drivers/gpu/drm/vc4/vc4_drv.h -@@ -333,6 +333,9 @@ struct vc4_hvs { - struct drm_mm lbm_mm; - spinlock_t mm_lock; - -+ struct list_head stale_dlist_entries; -+ struct work_struct free_dlist_work; -+ - struct drm_mm_node mitchell_netravali_filter; - - struct debugfs_regset32 regset; -@@ -620,10 +623,16 @@ struct drm_connector *vc4_get_crtc_conne - struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc, - struct drm_crtc_state *state); - -+struct vc4_hvs_dlist_allocation { -+ struct list_head node; -+ struct drm_mm_node mm_node; -+ unsigned int channel; -+ u8 target_frame_count; -+}; -+ - struct vc4_crtc_state { - struct drm_crtc_state base; -- /* Dlist area for this CRTC configuration. */ -- struct drm_mm_node mm; -+ struct vc4_hvs_dlist_allocation *mm; - bool txp_armed; - unsigned int assigned_channel; - -@@ -1033,6 +1042,8 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v - void vc4_hvs_stop_channel(struct vc4_hvs *hvs, unsigned int output); - int vc4_hvs_get_fifo_from_output(struct vc4_hvs *hvs, unsigned int output); - u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo); -+void vc4_hvs_mark_dlist_entry_stale(struct vc4_hvs *hvs, -+ struct vc4_hvs_dlist_allocation *alloc); - int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state); - void vc4_hvs_atomic_begin(struct drm_crtc *crtc, struct drm_atomic_state *state); - void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state); ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -417,6 +417,152 @@ static void vc5_hvs_update_gamma_lut(str - vc5_hvs_lut_load(hvs, vc4_crtc); - } - -+static void vc4_hvs_irq_enable_eof(const struct vc4_hvs *hvs, -+ unsigned int channel) -+{ -+ struct vc4_dev *vc4 = hvs->vc4; -+ u32 irq_mask = vc4->is_vc5 ? -+ SCALER5_DISPCTRL_DSPEIEOF(channel) : -+ SCALER_DISPCTRL_DSPEIEOF(channel); -+ -+ HVS_WRITE(SCALER_DISPCTRL, -+ HVS_READ(SCALER_DISPCTRL) | irq_mask); -+} -+ -+static void vc4_hvs_irq_clear_eof(const struct vc4_hvs *hvs, -+ unsigned int channel) -+{ -+ struct vc4_dev *vc4 = hvs->vc4; -+ u32 irq_mask = vc4->is_vc5 ? -+ SCALER5_DISPCTRL_DSPEIEOF(channel) : -+ SCALER_DISPCTRL_DSPEIEOF(channel); -+ -+ HVS_WRITE(SCALER_DISPCTRL, -+ HVS_READ(SCALER_DISPCTRL) & ~irq_mask); -+} -+ -+static struct vc4_hvs_dlist_allocation * -+vc4_hvs_alloc_dlist_entry(struct vc4_hvs *hvs, -+ unsigned int channel, -+ size_t dlist_count) -+{ -+ struct vc4_hvs_dlist_allocation *alloc; -+ unsigned long flags; -+ int ret; -+ -+ if (channel == VC4_HVS_CHANNEL_DISABLED) -+ return NULL; -+ -+ alloc = kzalloc(sizeof(*alloc), GFP_KERNEL); -+ if (!alloc) -+ return ERR_PTR(-ENOMEM); -+ -+ spin_lock_irqsave(&hvs->mm_lock, flags); -+ ret = drm_mm_insert_node(&hvs->dlist_mm, &alloc->mm_node, -+ dlist_count); -+ spin_unlock_irqrestore(&hvs->mm_lock, flags); -+ if (ret) -+ return ERR_PTR(ret); -+ -+ alloc->channel = channel; -+ -+ return alloc; -+} -+ -+void vc4_hvs_mark_dlist_entry_stale(struct vc4_hvs *hvs, -+ struct vc4_hvs_dlist_allocation *alloc) -+{ -+ unsigned long flags; -+ u8 frcnt; -+ -+ if (!alloc) -+ return; -+ -+ if (!drm_mm_node_allocated(&alloc->mm_node)) -+ return; -+ -+ frcnt = vc4_hvs_get_fifo_frame_count(hvs, alloc->channel); -+ alloc->target_frame_count = (frcnt + 1) & ((1 << 6) - 1); -+ -+ spin_lock_irqsave(&hvs->mm_lock, flags); -+ -+ list_add_tail(&alloc->node, &hvs->stale_dlist_entries); -+ -+ HVS_WRITE(SCALER_DISPSTAT, SCALER_DISPSTAT_EOF(alloc->channel)); -+ vc4_hvs_irq_enable_eof(hvs, alloc->channel); -+ -+ spin_unlock_irqrestore(&hvs->mm_lock, flags); -+} -+ -+static void vc4_hvs_schedule_dlist_sweep(struct vc4_hvs *hvs, -+ unsigned int channel) -+{ -+ unsigned long flags; -+ -+ spin_lock_irqsave(&hvs->mm_lock, flags); -+ -+ if (!list_empty(&hvs->stale_dlist_entries)) -+ queue_work(system_unbound_wq, &hvs->free_dlist_work); -+ -+ vc4_hvs_irq_clear_eof(hvs, channel); -+ -+ spin_unlock_irqrestore(&hvs->mm_lock, flags); -+} -+ -+/* -+ * Frame counts are essentially sequence numbers over 6 bits, and we -+ * thus can use sequence number arithmetic and follow the RFC1982 to -+ * implement proper comparison between them. -+ */ -+static bool vc4_hvs_frcnt_lte(u8 cnt1, u8 cnt2) -+{ -+ return (s8)((cnt1 << 2) - (cnt2 << 2)) <= 0; -+} -+ -+/* -+ * Some atomic commits (legacy cursor updates, mostly) will not wait for -+ * the next vblank and will just return once the commit has been pushed -+ * to the hardware. -+ * -+ * On the hardware side, our HVS stores the planes parameters in its -+ * context RAM, and will use part of the RAM to store data during the -+ * frame rendering. -+ * -+ * This interacts badly if we get multiple commits before the next -+ * vblank since we could end up overwriting the DLIST entries used by -+ * previous commits if our dlist allocation reuses that entry. In such a -+ * case, we would overwrite the data currently being used by the -+ * hardware, resulting in a corrupted frame. -+ * -+ * In order to work around this, we'll queue the dlist entries in a list -+ * once the associated CRTC state is destroyed. The HVS only allows us -+ * to know which entry is being active, but not which one are no longer -+ * being used, so in order to avoid freeing entries that are still used -+ * by the hardware we add a guesstimate of the frame count where our -+ * entry will no longer be used, and thus will only free those entries -+ * when we will have reached that frame count. -+ */ -+static void vc4_hvs_dlist_free_work(struct work_struct *work) -+{ -+ struct vc4_hvs *hvs = container_of(work, struct vc4_hvs, free_dlist_work); -+ struct vc4_hvs_dlist_allocation *cur, *next; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&hvs->mm_lock, flags); -+ list_for_each_entry_safe(cur, next, &hvs->stale_dlist_entries, node) { -+ u8 frcnt; -+ -+ frcnt = vc4_hvs_get_fifo_frame_count(hvs, cur->channel); -+ if (!vc4_hvs_frcnt_lte(cur->target_frame_count, frcnt)) -+ continue; -+ -+ list_del(&cur->node); -+ drm_mm_remove_node(&cur->mm_node); -+ kfree(cur); -+ } -+ spin_unlock_irqrestore(&hvs->mm_lock, flags); -+} -+ - u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo) - { - struct drm_device *drm = &hvs->vc4->base; -@@ -646,13 +792,12 @@ int vc4_hvs_atomic_check(struct drm_crtc - { - struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); - struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state); -+ struct vc4_hvs_dlist_allocation *alloc; - struct drm_device *dev = crtc->dev; - struct vc4_dev *vc4 = to_vc4_dev(dev); - struct drm_plane *plane; -- unsigned long flags; - const struct drm_plane_state *plane_state; - u32 dlist_count = 0; -- int ret; - - /* The pixelvalve can only feed one encoder (and encoders are - * 1:1 with connectors.) -@@ -665,12 +810,11 @@ int vc4_hvs_atomic_check(struct drm_crtc - - dlist_count++; /* Account for SCALER_CTL0_END. */ - -- spin_lock_irqsave(&vc4->hvs->mm_lock, flags); -- ret = drm_mm_insert_node(&vc4->hvs->dlist_mm, &vc4_state->mm, -- dlist_count); -- spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags); -- if (ret) -- return ret; -+ alloc = vc4_hvs_alloc_dlist_entry(vc4->hvs, vc4_state->assigned_channel, dlist_count); -+ if (IS_ERR(alloc)) -+ return PTR_ERR(alloc); -+ -+ vc4_state->mm = alloc; - - return vc4_hvs_gamma_check(crtc, state); - } -@@ -686,8 +830,9 @@ static void vc4_hvs_install_dlist(struct - if (!drm_dev_enter(dev, &idx)) - return; - -+ WARN_ON(!vc4_state->mm); - HVS_WRITE(SCALER_DISPLISTX(vc4_state->assigned_channel), -- vc4_state->mm.start); -+ vc4_state->mm->mm_node.start); - - drm_dev_exit(idx); - } -@@ -714,8 +859,10 @@ static void vc4_hvs_update_dlist(struct - spin_unlock_irqrestore(&dev->event_lock, flags); - } - -+ WARN_ON(!vc4_state->mm); -+ - spin_lock_irqsave(&vc4_crtc->irq_lock, flags); -- vc4_crtc->current_dlist = vc4_state->mm.start; -+ vc4_crtc->current_dlist = vc4_state->mm->mm_node.start; - spin_unlock_irqrestore(&vc4_crtc->irq_lock, flags); - } - -@@ -772,8 +919,7 @@ void vc4_hvs_atomic_flush(struct drm_crt - struct vc4_plane_state *vc4_plane_state; - bool debug_dump_regs = false; - bool enable_bg_fill = false; -- u32 __iomem *dlist_start = vc4->hvs->dlist + vc4_state->mm.start; -- u32 __iomem *dlist_next = dlist_start; -+ u32 __iomem *dlist_start, *dlist_next; - unsigned int zpos = 0; - bool found = false; - int idx; -@@ -791,6 +937,9 @@ void vc4_hvs_atomic_flush(struct drm_crt - vc4_hvs_dump_state(hvs); - } - -+ dlist_start = vc4->hvs->dlist + vc4_state->mm->mm_node.start; -+ dlist_next = dlist_start; -+ - /* Copy all the active planes' dlist contents to the hardware dlist. */ - do { - found = false; -@@ -824,7 +973,8 @@ void vc4_hvs_atomic_flush(struct drm_crt - writel(SCALER_CTL0_END, dlist_next); - dlist_next++; - -- WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size); -+ WARN_ON(!vc4_state->mm); -+ WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm->mm_node.size); - - if (enable_bg_fill) - /* This sets a black background color fill, as is the case -@@ -964,6 +1114,11 @@ static irqreturn_t vc4_hvs_irq_handler(i - - irqret = IRQ_HANDLED; - } -+ -+ if (status & SCALER_DISPSTAT_EOF(channel)) { -+ vc4_hvs_schedule_dlist_sweep(hvs, channel); -+ irqret = IRQ_HANDLED; -+ } - } - - /* Clear every per-channel interrupt flag. */ -@@ -1018,6 +1173,9 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v - - spin_lock_init(&hvs->mm_lock); - -+ INIT_LIST_HEAD(&hvs->stale_dlist_entries); -+ INIT_WORK(&hvs->free_dlist_work, vc4_hvs_dlist_free_work); -+ - /* Set up the HVS display list memory manager. We never - * overwrite the setup from the bootloader (just 128b out of - * our 16K), since we don't want to scramble the screen when diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0031-drm-vc4-hvs-Initialize-the-dlist-allocation-list-ent.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0031-drm-vc4-hvs-Initialize-the-dlist-allocation-list-ent.patch deleted file mode 100644 index 2fd7aa573d..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0031-drm-vc4-hvs-Initialize-the-dlist-allocation-list-ent.patch +++ /dev/null @@ -1,30 +0,0 @@ -From bc1c5829ecc698e41379f461f1fd7e8d600b879f Mon Sep 17 00:00:00 2001 -From: Maxime Ripard -Date: Wed, 25 Jan 2023 12:38:37 +0100 -Subject: [PATCH 0031/1085] drm/vc4: hvs: Initialize the dlist allocation list - entry - -The vc4_hvs_dlist_allocation structure has a list that we don't -initialize when we allocate a new instance. - -This makes any call reading the list structure (such as list_empty) fail -with a NULL pointer dereference. - -Let's make sure our list is always initialized. - -Signed-off-by: Maxime Ripard ---- - drivers/gpu/drm/vc4/vc4_hvs.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -457,6 +457,8 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs - if (!alloc) - return ERR_PTR(-ENOMEM); - -+ INIT_LIST_HEAD(&alloc->node); -+ - spin_lock_irqsave(&hvs->mm_lock, flags); - ret = drm_mm_insert_node(&hvs->dlist_mm, &alloc->mm_node, - dlist_count); diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0032-drm-vc4-hvs-Move-the-dlist-allocation-destruction-to.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0032-drm-vc4-hvs-Move-the-dlist-allocation-destruction-to.patch deleted file mode 100644 index 07fb255e66..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0032-drm-vc4-hvs-Move-the-dlist-allocation-destruction-to.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 9e2b5f6b8d74b18c96521c3e9ddd3f7fc75d917f Mon Sep 17 00:00:00 2001 -From: Maxime Ripard -Date: Wed, 25 Jan 2023 12:54:36 +0100 -Subject: [PATCH 0032/1085] drm/vc4: hvs: Move the dlist allocation destruction - to a function - -We'll need to destroy a dlist allocation in multiple code paths, so -let's move it to a separate function. - -Signed-off-by: Maxime Ripard ---- - drivers/gpu/drm/vc4/vc4_hvs.c | 16 +++++++++++++--- - 1 file changed, 13 insertions(+), 3 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -471,6 +471,18 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs - return alloc; - } - -+static void vc4_hvs_free_dlist_entry_locked(struct vc4_hvs *hvs, -+ struct vc4_hvs_dlist_allocation *alloc) -+{ -+ lockdep_assert_held(&hvs->mm_lock); -+ -+ if (!list_empty(&alloc->node)) -+ list_del(&alloc->node); -+ -+ drm_mm_remove_node(&alloc->mm_node); -+ kfree(alloc); -+} -+ - void vc4_hvs_mark_dlist_entry_stale(struct vc4_hvs *hvs, - struct vc4_hvs_dlist_allocation *alloc) - { -@@ -558,9 +570,7 @@ static void vc4_hvs_dlist_free_work(stru - if (!vc4_hvs_frcnt_lte(cur->target_frame_count, frcnt)) - continue; - -- list_del(&cur->node); -- drm_mm_remove_node(&cur->mm_node); -- kfree(cur); -+ vc4_hvs_free_dlist_entry_locked(hvs, cur); - } - spin_unlock_irqrestore(&hvs->mm_lock, flags); - } diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0033-drm-vc4-hvs-Destroy-dlist-allocations-immediately-wh.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0033-drm-vc4-hvs-Destroy-dlist-allocations-immediately-wh.patch deleted file mode 100644 index ecfabf63b9..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0033-drm-vc4-hvs-Destroy-dlist-allocations-immediately-wh.patch +++ /dev/null @@ -1,48 +0,0 @@ -From e546f85606dcf2cdff94ff32a0756e2541bccb05 Mon Sep 17 00:00:00 2001 -From: Maxime Ripard -Date: Wed, 25 Jan 2023 13:05:26 +0100 -Subject: [PATCH 0033/1085] drm/vc4: hvs: Destroy dlist allocations immediately - when running a test - -When running a kunit test, the driver runs with a mock device. As such, -any attempt to read or write to a hardware register will fail the -current test immediately. - -The dlist allocation management recently introduced will read the -current frame count from the HVS to defer its destruction until a -subsequent frame has been output. This obviously involves a register -read that fails the Kunit tests. - -Change the destruction deferral function to destroy the allocation -immediately if we run under kunit. This is essentially harmless since -the main reason for that deferall is to prevent any access to the -hardware dlist while a frame described by that list is rendered. On our -mock driver, we have neither a hardware dlist nor a rendering, so it -doesn't matter. - -Signed-off-by: Maxime Ripard ---- - drivers/gpu/drm/vc4/vc4_hvs.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -495,6 +495,18 @@ void vc4_hvs_mark_dlist_entry_stale(stru - if (!drm_mm_node_allocated(&alloc->mm_node)) - return; - -+ /* -+ * Kunit tests run with a mock device and we consider any hardware -+ * access a test failure. Let's free the dlist allocation right away if -+ * we're running under kunit, we won't risk a dlist corruption anyway. -+ */ -+ if (kunit_get_current_test()) { -+ spin_lock_irqsave(&hvs->mm_lock, flags); -+ vc4_hvs_free_dlist_entry_locked(hvs, alloc); -+ spin_unlock_irqrestore(&hvs->mm_lock, flags); -+ return; -+ } -+ - frcnt = vc4_hvs_get_fifo_frame_count(hvs, alloc->channel); - alloc->target_frame_count = (frcnt + 1) & ((1 << 6) - 1); - diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0034-drm-vc4_plane-Add-support-for-YUV444-formats.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0034-drm-vc4_plane-Add-support-for-YUV444-formats.patch deleted file mode 100644 index b7c2fa3589..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0034-drm-vc4_plane-Add-support-for-YUV444-formats.patch +++ /dev/null @@ -1,53 +0,0 @@ -From fb2081692fb040f6260e008272c9f6cb155c9a77 Mon Sep 17 00:00:00 2001 -From: Dom Cobley -Date: Tue, 31 Jan 2023 15:14:32 +0000 -Subject: [PATCH 0034/1085] drm/vc4_plane: Add support for YUV444 formats - -Support displaying DRM_FORMAT_YUV444 and DRM_FORMAT_YVU444 formats. -Tested with kmstest and kodi. e.g. - -kmstest -r 1920x1080@60 -f 400x300-YU24 - -Note: without the shift of width, only half the chroma is fetched, -resulting in correct left half of image and corrupt colours on right half. - -The increase in width shouldn't affect fetching of Y data, -as the hardware will clamp at dest width. - -Signed-off-by: Dom Cobley ---- - drivers/gpu/drm/vc4/vc4_plane.c | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -110,6 +110,18 @@ static const struct hvs_format { - .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB, - }, - { -+ .drm = DRM_FORMAT_YUV444, -+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE, -+ .pixel_order = HVS_PIXEL_ORDER_XYCBCR, -+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR, -+ }, -+ { -+ .drm = DRM_FORMAT_YVU444, -+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE, -+ .pixel_order = HVS_PIXEL_ORDER_XYCRCB, -+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB, -+ }, -+ { - .drm = DRM_FORMAT_YUV420, - .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE, - .pixel_order = HVS_PIXEL_ORDER_XYCBCR, -@@ -1106,6 +1118,10 @@ static int vc4_plane_mode_set(struct drm - vc4_state->src_y + vc4_state->src_h[0] < (state->fb->height << 16)) - height++; - -+ /* for YUV444 hardware wants double the width, otherwise it doesn't fetch full width of chroma */ -+ if (format->drm == DRM_FORMAT_YUV444 || format->drm == DRM_FORMAT_YVU444) -+ width <<= 1; -+ - /* Don't waste cycles mixing with plane alpha if the set alpha - * is opaque or there is no per-pixel alpha information. - * In any case we use the alpha property value as the fixed alpha. diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0035-drm-vc4-Calculate-bpc-based-on-max_requested_bpc.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0035-drm-vc4-Calculate-bpc-based-on-max_requested_bpc.patch deleted file mode 100644 index fbaa2619aa..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0035-drm-vc4-Calculate-bpc-based-on-max_requested_bpc.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 57fe034a5020aca4a7d1558b21c31737c2abc15e Mon Sep 17 00:00:00 2001 -From: Matthias Reichl -Date: Sat, 14 Jan 2023 16:24:39 +0100 -Subject: [PATCH 0035/1085] drm/vc4: Calculate bpc based on max_requested_bpc - -This aligns vc4 with Intel, AMD and Synopsis drivers and fixes max bpc -connector property not working as expected on monitors with YCbCr 4:2:2 -support but not deep color support. - -max_bpc in connector state is clamped at max_bpc from display info and -the latter only takes deep color modes into account so it will always -be 8, even if the display can do 4:2:2 12-bit output. - -Signed-off-by: Matthias Reichl ---- - drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/gpu/drm/vc4/vc4_hdmi.c -+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -2136,7 +2136,7 @@ vc4_hdmi_encoder_compute_config(const st - { - struct drm_device *dev = vc4_hdmi->connector.dev; - struct drm_connector_state *conn_state = &vc4_state->base; -- unsigned int max_bpc = clamp_t(unsigned int, conn_state->max_bpc, 8, 12); -+ unsigned int max_bpc = clamp_t(unsigned int, conn_state->max_requested_bpc, 8, 12); - unsigned int bpc; - int ret; - diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0036-drm-vc4-Set-AXI-panic-modes-for-the-HVS.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0036-drm-vc4-Set-AXI-panic-modes-for-the-HVS.patch deleted file mode 100644 index 3ecea01fcd..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0036-drm-vc4-Set-AXI-panic-modes-for-the-HVS.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 78a1315a44243385c57289a2c30f3b25de87b603 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Thu, 11 Aug 2022 13:59:34 +0100 -Subject: [PATCH 0036/1085] drm/vc4: Set AXI panic modes for the HVS - -The HVS can change AXI request mode based on how full the COB -FIFOs are. -Until now the vc4 driver has been relying on the firmware to -have set these to sensible values. - -With HVS channel 2 now being used for live video, change the -panic mode for all channels to be explicitly set by the driver, -and the same for all channels. - -Signed-off-by: Dave Stevenson ---- - drivers/gpu/drm/vc4/vc4_hvs.c | 11 +++++++++++ - 1 file changed, 11 insertions(+) - ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -1379,6 +1379,17 @@ static int vc4_hvs_bind(struct device *d - dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC1); - dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC2); - -+ /* Set AXI panic mode. -+ * VC4 panics when < 2 lines in FIFO. -+ * VC5 panics when less than 1 line in the FIFO. -+ */ -+ dispctrl &= ~(SCALER_DISPCTRL_PANIC0_MASK | -+ SCALER_DISPCTRL_PANIC1_MASK | -+ SCALER_DISPCTRL_PANIC2_MASK); -+ dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC0); -+ dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC1); -+ dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC2); -+ - HVS_WRITE(SCALER_DISPCTRL, dispctrl); - - /* Recompute Composite Output Buffer (COB) allocations for the displays diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0037-drm-vc4-drop-unnecessary-and-harmful-HDMI-RGB-format.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0037-drm-vc4-drop-unnecessary-and-harmful-HDMI-RGB-format.patch deleted file mode 100644 index 18b5b63b54..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0037-drm-vc4-drop-unnecessary-and-harmful-HDMI-RGB-format.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 4b89e6e55f5c04f836b92ffbeef7c4c8a545adfd Mon Sep 17 00:00:00 2001 -From: Matthias Reichl -Date: Sat, 11 Mar 2023 22:41:17 +0100 -Subject: [PATCH 0037/1085] drm/vc4: drop unnecessary and harmful HDMI RGB - format check - -RGB is a mandatory format for all DVI and HDMI monitors so there's -no need to check for presence of the DRM_COLOR_FORMAT_RGB444 bit in -color_formats. - -More importantly this checks breaks working around EDID issues with -eg video=HDMI-A-1:1024x768D or drm.edid_firmware=edid/1024x768.bin -as the RGB444 bit is only set when a valid EDID with digital bit set in -the input byte is present - which isn't the case when no EDID can be -read from the display device at all or with the in-built kernel EDIDs, -which mimic analog (VGA) displays without the digital bit set. - -So drop the check, if we output video on the HDMI connector we can -assume that the display can accept 8bit RGB. - -Signed-off-by: Matthias Reichl ---- - drivers/gpu/drm/vc4/vc4_hdmi.c | 3 --- - 1 file changed, 3 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_hdmi.c -+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -1962,9 +1962,6 @@ vc4_hdmi_sink_supports_format_bpc(const - case VC4_HDMI_OUTPUT_RGB: - drm_dbg(dev, "RGB Format, checking the constraints.\n"); - -- if (!(info->color_formats & DRM_COLOR_FORMAT_RGB444)) -- return false; -- - if (bpc == 10 && !(info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30)) { - drm_dbg(dev, "10 BPC but sink doesn't support Deep Color 30.\n"); - return false; diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0038-drm-vc4-Limit-max_bpc-to-8-on-Pi0-3.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0038-drm-vc4-Limit-max_bpc-to-8-on-Pi0-3.patch deleted file mode 100644 index b3b1c3d9e4..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0038-drm-vc4-Limit-max_bpc-to-8-on-Pi0-3.patch +++ /dev/null @@ -1,37 +0,0 @@ -From accb4b40a97c432b8a83f6fedf12b015aebb711d Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Mon, 24 Apr 2023 18:32:45 +0100 -Subject: [PATCH 0038/1085] drm/vc4: Limit max_bpc to 8 on Pi0-3 - -Pi 0-3 have no deep colour support and only 24bpp output, -so max_bpc should remain as 8. - -Signed-off-by: Dave Stevenson ---- - drivers/gpu/drm/vc4/vc4_hdmi.c | 7 +++++-- - 1 file changed, 5 insertions(+), 2 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_hdmi.c -+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -766,7 +766,6 @@ static int vc4_hdmi_connector_init(struc - - drm_connector_attach_colorspace_property(connector); - drm_connector_attach_tv_margin_properties(connector); -- drm_connector_attach_max_bpc_property(connector, 8, 12); - - connector->polled = (DRM_CONNECTOR_POLL_CONNECT | - DRM_CONNECTOR_POLL_DISCONNECT); -@@ -775,8 +774,12 @@ static int vc4_hdmi_connector_init(struc - connector->doublescan_allowed = 0; - connector->stereo_allowed = 1; - -- if (vc4_hdmi->variant->supports_hdr) -+ if (vc4_hdmi->variant->supports_hdr) { -+ drm_connector_attach_max_bpc_property(connector, 8, 12); - drm_connector_attach_hdr_output_metadata_property(connector); -+ } else { -+ drm_connector_attach_max_bpc_property(connector, 8, 8); -+ } - - vc4_hdmi_attach_broadcast_rgb_property(dev, vc4_hdmi); - diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0039-arm64-setup-Fix-build-warning.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0039-arm64-setup-Fix-build-warning.patch deleted file mode 100644 index 75e552a7ef..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0039-arm64-setup-Fix-build-warning.patch +++ /dev/null @@ -1,24 +0,0 @@ -From e51e9120a35d0b1600e4337e6ecbd020c074af80 Mon Sep 17 00:00:00 2001 -From: Maxime Ripard -Date: Mon, 6 Jun 2022 11:02:16 +0200 -Subject: [PATCH 0039/1085] arm64: setup: Fix build warning - -Signed-off-by: Maxime Ripard ---- - arch/arm64/kernel/setup.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/arch/arm64/kernel/setup.c -+++ b/arch/arm64/kernel/setup.c -@@ -229,9 +229,9 @@ static void __init request_standard_reso - size_t res_size; - - kernel_code.start = __pa_symbol(_stext); -- kernel_code.end = __pa_symbol(__init_begin - 1); -+ kernel_code.end = __pa_symbol(__init_begin) - 1; - kernel_data.start = __pa_symbol(_sdata); -- kernel_data.end = __pa_symbol(_end - 1); -+ kernel_data.end = __pa_symbol(_end) - 1; - insert_resource(&iomem_resource, &kernel_code); - insert_resource(&iomem_resource, &kernel_data); - diff --git a/lede/target/linux/bcm27xx/patches-6.6/950-0040-BCM2708-Add-core-Device-Tree-support.patch b/lede/target/linux/bcm27xx/patches-6.6/950-0040-BCM2708-Add-core-Device-Tree-support.patch deleted file mode 100644 index 3d1e2b2ede..0000000000 --- a/lede/target/linux/bcm27xx/patches-6.6/950-0040-BCM2708-Add-core-Device-Tree-support.patch +++ /dev/null @@ -1,38613 +0,0 @@ -From d060fc0b45684ad90d12d81e08680f03fc44e305 Mon Sep 17 00:00:00 2001 -From: notro -Date: Wed, 9 Jul 2014 14:46:08 +0200 -Subject: [PATCH 0040/1085] BCM2708: Add core Device Tree support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Add the bare minimum needed to boot BCM2708 from a Device Tree. - -Signed-off-by: Noralf Tronnes - -BCM2708: DT: change 'axi' nodename to 'soc' - -Change DT node named 'axi' to 'soc' so it matches ARCH_BCM2835. -The VC4 bootloader fills in certain properties in the 'axi' subtree, -but since this is part of an upstreaming effort, the name is changed. - -Signed-off-by: Noralf Tronnes notro@tronnes.org - -BCM2708_DT: Correct length of the peripheral space - -Use dts-dirs feature for overlays. - -The kernel makefiles have a dts-dirs target that is for vendor subdirectories. - -Using this fixes the install_dtbs target, which previously did not install the overlays. - -BCM270X_DT: configure I2S DMA channels - -Signed-off-by: Matthias Reichl - -BCM270X_DT: switch to bcm2835-i2s - -I2S soundcard drivers with proper devicetree support (i.e. not linking -to the cpu_dai/platform via name but to cpu/platform via of_node) -will work out of the box without any modifications. - -When the kernel is compiled without devicetree support the platform -code will instantiate the bcm2708-i2s driver and I2S soundcard drivers -will link to it via name, as before. - -Signed-off-by: Matthias Reichl - -SDIO-overlay: add poll_once-boolean parameter - -Add paramter to toggle sdio-device-polling -done every second or once at boot-time. - -Signed-off-by: Patrick Boettcher - -BCM270X_DT: Make mmc overlay compatible with current firmware - -The original DT overlay logic followed a merge-then-patch procedure, -i.e. parameters are applied to the loaded overlay before the overlay -is merged into the base DTB. This sequence has been changed to -patch-then-merge, in order to support parameterised node names, and -to protect against bad overlays. As a result, overrides (parameters) -must only target labels in the overlay, but the overlay can obviously target nodes in the base DTB. - -mmc-overlay.dts (that switches back to the original mmc sdcard -driver) is the only overlay violating that rule, and this patch -fixes it. - -bcm270x_dt: Use the sdhost MMC controller by default - -The "mmc" overlay reverts to using the other controller. - -squash: Add cprman to dt - -BCM270X_DT: Use clk_core for I2C interfaces - -BCM270X_DT: Use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi - -The mainline Device Tree files are quite close to downstream now. -Let's use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi as base files -for our dts files. - -Mainline dts files are based on these files: - - bcm2835-rpi.dtsi - bcm2835.dtsi bcm2836.dtsi - bcm283x.dtsi - -Current downstream are based on these: - - bcm2708.dtsi bcm2709.dtsi bcm2710.dtsi - bcm2708_common.dtsi - -This patch introduces this dependency: - - bcm2708.dtsi bcm2709.dtsi - bcm2708-rpi.dtsi - bcm270x.dtsi - bcm2835.dtsi bcm2836.dtsi - bcm283x.dtsi - -And: - bcm2710.dtsi - bcm2708-rpi.dtsi - bcm270x.dtsi - bcm283x.dtsi - -bcm270x.dtsi contains the downstream bcm283x.dtsi diff. -bcm2708-rpi.dtsi is the downstream version of bcm2835-rpi.dtsi. - -Other changes: -- The led node has moved from /soc/leds to /leds. This is not a problem - since the label is used to reference it. -- The clk_osc reg property changes from 6 to 3. -- The gpu nodes has their interrupt property set in the base file. -- the clocks label does not point to the /clocks node anymore, but - points to the cprman node. This is not a problem since the overlays - that use the clock node refer to it directly: target-path = "/clocks"; -- some nodes now have 2 labels since mainline and downstream differs in - this respect: cprman/clocks, spi0/spi, gpu/vc4. -- some nodes doesn't have an explicit status = "okay" since they're not - disabled in the base file: watchdog and random. -- gpiomem doesn't need an explicit status = "okay". -- bcm2708-rpi-cm.dts got the hpd-gpios property from bcm2708_common.dtsi, - it's now set directly in that file. -- bcm2709-rpi-2-b.dts has the timer node moved from /soc/timer to /timer. -- Removed clock-frequency property on the bcm{2709,2710}.dtsi timer nodes. - -Signed-off-by: Noralf Trønnes - -BCM270X_DT: Use raspberrypi-power to turn on USB power - -Use the raspberrypi-power driver to turn on USB power. - -Signed-off-by: Noralf Trønnes - -BCM270X_DT: Add a .dtbo target, use for overlays - -Change the filenames and extensions to keep the pre-DDT style of -overlay (-overlay.dtb) distinct from new ones that use a -different style of local fixups (.dtbo), and to match other -platforms. - -The RPi firmware uses the DDTK trailer atom to choose which type of -overlay to use for each kernel. - -Signed-off-by: Phil Elwell - -BCM270X_DT: Don't generate "linux,phandle" props - -The EPAPR standard says to use "phandle" properties to store phandles, -rather than the deprecated "linux,phandle" version. By default, dtc -generates both, but adding "-H epapr" causes it to only generate -"phandle"s, saving some space and clutter. - -Signed-off-by: Phil Elwell - -BCM270X_DT: Add overlay for enc28j60 on SPI2 - -Works on SPI2 for compute module - -BCM270X_DT: Add midi-uart0 overlay - -MIDI requires 31.25kbaud, a baudrate unsupported by Linux. The -midi-uart0 overlay configures uart0 (ttyAMA0) to use a fake clock -so that requesting 38.4kbaud actually gets 31.25kbaud. - -Signed-off-by: Phil Elwell - -BCM270X_DT: Add i2c-sensor overlay - -The i2c-sensor overlay is a container for various pressure and -temperature sensors, currently bmp085 and bmp280. The standalone -bmp085_i2c-sensor overlay is now deprecated. - -Signed-off-by: Phil Elwell - -BCM270X_DT: overlays/*-overlay.dtb -> overlays/*.dtbo (#1752) - -We now create overlays as .dtbo files. - -build: support for .dtbo files for dtb overlays - -Kernel 4.4.6+ on RaspberryPi support .dtbo files for overlays, instead of .dtb. -Patch the kernel, which has faulty rules to generate .dtbo the way yocto does - -Signed-off-by: Herve Jourdain -Signed-off-by: Khem Raj - -BCM270X: Drop position requirement for CMA in VC4 overlay. - -No longer necessary since 2aefcd576195a739a7a256099571c9c4a401005f, -and will probably let peeople that want to choose a larger CMA -allocation (particularly on pi0/1). - -Signed-off-by: Eric Anholt - -BCM270X_DT: RPi Device Tree tidy - -Use the upstream sdhost node, add thermal-zones, and factor out some -common elements. - -Signed-off-by: Phil Elwell - -kbuild: Silence unhelpful DTC warnings - -Signed-off-by: Phil Elwell - -BCM270X_DT: DT build rules no longer arch-specific - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/Makefile | 5 + - arch/arm/boot/dts/broadcom/Makefile | 35 + - .../boot/dts/broadcom/bcm2708-rpi-b-plus.dts | 208 + - .../boot/dts/broadcom/bcm2708-rpi-b-rev1.dts | 220 + - arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts | 195 + - .../arm/boot/dts/broadcom/bcm2708-rpi-bt.dtsi | 38 + - arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts | 171 + - .../arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi | 27 + - .../boot/dts/broadcom/bcm2708-rpi-zero-w.dts | 254 + - .../boot/dts/broadcom/bcm2708-rpi-zero.dts | 189 + - arch/arm/boot/dts/broadcom/bcm2708-rpi.dtsi | 40 + - arch/arm/boot/dts/broadcom/bcm2708.dtsi | 19 + - .../arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts | 202 + - .../arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts | 220 + - arch/arm/boot/dts/broadcom/bcm2709-rpi.dtsi | 8 + - arch/arm/boot/dts/broadcom/bcm2709.dtsi | 29 + - arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi | 180 + - arch/arm/boot/dts/broadcom/bcm270x.dtsi | 294 + - .../arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts | 202 + - .../dts/broadcom/bcm2710-rpi-3-b-plus.dts | 297 + - .../arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts | 299 ++ - .../arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts | 220 + - .../dts/broadcom/bcm2710-rpi-zero-2-w.dts | 272 + - .../boot/dts/broadcom/bcm2710-rpi-zero-2.dts | 1 + - arch/arm/boot/dts/broadcom/bcm2710.dtsi | 32 + - .../arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts | 177 +- - .../arm/boot/dts/broadcom/bcm2711-rpi-400.dts | 41 + - .../arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts | 443 ++ - .../boot/dts/broadcom/bcm2711-rpi-cm4s.dts | 295 + - .../arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi | 534 ++ - arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi | 13 + - .../arm/boot/dts/broadcom/bcm271x-rpi-bt.dtsi | 38 + - .../dts/broadcom/bcm283x-rpi-csi0-2lane.dtsi | 4 + - .../dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi | 4 + - .../dts/broadcom/bcm283x-rpi-csi1-4lane.dtsi | 4 + - .../broadcom/bcm283x-rpi-i2c0mux_0_28.dtsi | 4 + - .../broadcom/bcm283x-rpi-i2c0mux_0_44.dtsi | 4 + - arch/arm/boot/dts/overlays/Makefile | 295 + - arch/arm/boot/dts/overlays/README | 4779 +++++++++++++++++ - .../arm/boot/dts/overlays/act-led-overlay.dts | 28 + - .../dts/overlays/adafruit-st7735r-overlay.dts | 83 + - .../boot/dts/overlays/adafruit18-overlay.dts | 55 + - .../dts/overlays/adau1977-adc-overlay.dts | 40 + - .../dts/overlays/adau7002-simple-overlay.dts | 52 + - .../arm/boot/dts/overlays/ads1015-overlay.dts | 98 + - .../arm/boot/dts/overlays/ads1115-overlay.dts | 103 + - .../arm/boot/dts/overlays/ads7846-overlay.dts | 89 + - .../boot/dts/overlays/adv7282m-overlay.dts | 73 + - .../boot/dts/overlays/adv728x-m-overlay.dts | 37 + - .../overlays/akkordion-iqdacplus-overlay.dts | 49 + - .../allo-boss-dac-pcm512x-audio-overlay.dts | 59 + - .../overlays/allo-boss2-dac-audio-overlay.dts | 57 + - .../dts/overlays/allo-digione-overlay.dts | 44 + - .../allo-katana-dac-audio-overlay.dts | 58 + - .../allo-piano-dac-pcm512x-audio-overlay.dts | 54 + - ...o-piano-dac-plus-pcm512x-audio-overlay.dts | 57 + - arch/arm/boot/dts/overlays/anyspi-overlay.dts | 205 + - .../boot/dts/overlays/apds9960-overlay.dts | 55 + - .../boot/dts/overlays/applepi-dac-overlay.dts | 57 + - .../dts/overlays/arducam-64mp-overlay.dts | 91 + - arch/arm/boot/dts/overlays/arducam-64mp.dtsi | 34 + - .../overlays/arducam-pivariety-overlay.dts | 94 + - .../boot/dts/overlays/at86rf233-overlay.dts | 57 + - .../overlays/audioinjector-addons-overlay.dts | 60 + - .../audioinjector-bare-i2s-overlay.dts | 50 + - ...dioinjector-isolated-soundcard-overlay.dts | 55 + - .../overlays/audioinjector-ultra-overlay.dts | 71 + - .../audioinjector-wm8731-audio-overlay.dts | 39 + - .../dts/overlays/audiosense-pi-overlay.dts | 82 + - .../boot/dts/overlays/audremap-overlay.dts | 38 + - .../boot/dts/overlays/balena-fin-overlay.dts | 125 + - .../dts/overlays/camera-mux-2port-overlay.dts | 505 ++ - .../dts/overlays/camera-mux-4port-overlay.dts | 876 +++ - .../arm/boot/dts/overlays/cap1106-overlay.dts | 52 + - .../boot/dts/overlays/chipdip-dac-overlay.dts | 46 + - .../dts/overlays/cirrus-wm5102-overlay.dts | 172 + - .../dts/overlays/cm-swap-i2c0-overlay.dts | 27 + - arch/arm/boot/dts/overlays/cma-overlay.dts | 36 + - .../crystalfontz-cfa050_pi_m-overlay.dts | 124 + - .../dts/overlays/cutiepi-panel-overlay.dts | 117 + - .../boot/dts/overlays/dacberry400-overlay.dts | 71 + - arch/arm/boot/dts/overlays/dht11-overlay.dts | 48 + - .../dts/overlays/dionaudio-kiwi-overlay.dts | 39 + - .../dts/overlays/dionaudio-loco-overlay.dts | 39 + - .../overlays/dionaudio-loco-v2-overlay.dts | 49 + - .../boot/dts/overlays/disable-bt-overlay.dts | 59 + - .../dts/overlays/disable-emmc2-overlay.dts | 13 + - .../dts/overlays/disable-wifi-overlay.dts | 20 + - arch/arm/boot/dts/overlays/dpi18-overlay.dts | 39 + - .../boot/dts/overlays/dpi18cpadhi-overlay.dts | 26 + - arch/arm/boot/dts/overlays/dpi24-overlay.dts | 39 + - arch/arm/boot/dts/overlays/draws-overlay.dts | 208 + - .../arm/boot/dts/overlays/dwc-otg-overlay.dts | 14 + - arch/arm/boot/dts/overlays/dwc2-overlay.dts | 26 + - .../boot/dts/overlays/edt-ft5406-overlay.dts | 46 + - arch/arm/boot/dts/overlays/edt-ft5406.dtsi | 54 + - .../boot/dts/overlays/enc28j60-overlay.dts | 53 + - .../dts/overlays/enc28j60-spi2-overlay.dts | 47 + - .../arm/boot/dts/overlays/exc3000-overlay.dts | 48 + - arch/arm/boot/dts/overlays/fbtft-overlay.dts | 611 +++ - .../boot/dts/overlays/fe-pi-audio-overlay.dts | 70 + - .../boot/dts/overlays/fsm-demo-overlay.dts | 104 + - arch/arm/boot/dts/overlays/gc9a01-overlay.dts | 151 + - .../boot/dts/overlays/ghost-amp-overlay.dts | 145 + - arch/arm/boot/dts/overlays/goodix-overlay.dts | 46 + - .../googlevoicehat-soundcard-overlay.dts | 49 + - .../dts/overlays/gpio-charger-overlay.dts | 42 + - .../boot/dts/overlays/gpio-fan-overlay.dts | 89 + - .../boot/dts/overlays/gpio-hog-overlay.dts | 27 + - .../arm/boot/dts/overlays/gpio-ir-overlay.dts | 49 + - .../boot/dts/overlays/gpio-ir-tx-overlay.dts | 36 + - .../boot/dts/overlays/gpio-key-overlay.dts | 48 + - .../boot/dts/overlays/gpio-led-overlay.dts | 97 + - .../overlays/gpio-no-bank0-irq-overlay.dts | 14 + - .../boot/dts/overlays/gpio-no-irq-overlay.dts | 14 + - .../dts/overlays/gpio-poweroff-overlay.dts | 39 + - .../dts/overlays/gpio-shutdown-overlay.dts | 86 + - .../boot/dts/overlays/hd44780-lcd-overlay.dts | 46 + - .../hdmi-backlight-hwhack-gpio-overlay.dts | 47 + - .../dts/overlays/hifiberry-amp-overlay.dts | 39 + - .../dts/overlays/hifiberry-amp100-overlay.dts | 64 + - .../dts/overlays/hifiberry-amp3-overlay.dts | 57 + - .../dts/overlays/hifiberry-dac-overlay.dts | 34 + - .../overlays/hifiberry-dacplus-overlay.dts | 65 + - .../overlays/hifiberry-dacplusadc-overlay.dts | 72 + - .../hifiberry-dacplusadcpro-overlay.dts | 70 + - .../overlays/hifiberry-dacplusdsp-overlay.dts | 34 + - .../overlays/hifiberry-dacplushd-overlay.dts | 94 + - .../dts/overlays/hifiberry-digi-overlay.dts | 41 + - .../overlays/hifiberry-digi-pro-overlay.dts | 43 + - .../boot/dts/overlays/highperi-overlay.dts | 63 + - arch/arm/boot/dts/overlays/hy28a-overlay.dts | 93 + - .../boot/dts/overlays/hy28b-2017-overlay.dts | 152 + - arch/arm/boot/dts/overlays/hy28b-overlay.dts | 148 + - .../boot/dts/overlays/i-sabre-q2m-overlay.dts | 39 + - .../boot/dts/overlays/i2c-bcm2708-overlay.dts | 13 + - .../arm/boot/dts/overlays/i2c-fan-overlay.dts | 108 + - .../boot/dts/overlays/i2c-gpio-overlay.dts | 47 + - .../arm/boot/dts/overlays/i2c-mux-overlay.dts | 173 + - .../dts/overlays/i2c-pwm-pca9685a-overlay.dts | 61 + - .../arm/boot/dts/overlays/i2c-rtc-common.dtsi | 353 ++ - .../dts/overlays/i2c-rtc-gpio-overlay.dts | 31 + - .../arm/boot/dts/overlays/i2c-rtc-overlay.dts | 42 + - .../boot/dts/overlays/i2c-sensor-common.dtsi | 562 ++ - .../boot/dts/overlays/i2c-sensor-overlay.dts | 42 + - arch/arm/boot/dts/overlays/i2c0-overlay.dts | 83 + - arch/arm/boot/dts/overlays/i2c1-overlay.dts | 44 + - arch/arm/boot/dts/overlays/i2c3-overlay.dts | 34 + - arch/arm/boot/dts/overlays/i2c4-overlay.dts | 34 + - arch/arm/boot/dts/overlays/i2c5-overlay.dts | 34 + - arch/arm/boot/dts/overlays/i2c6-overlay.dts | 34 + - .../arm/boot/dts/overlays/i2s-dac-overlay.dts | 34 + - .../dts/overlays/i2s-gpio28-31-overlay.dts | 18 + - .../boot/dts/overlays/ilitek251x-overlay.dts | 45 + - arch/arm/boot/dts/overlays/imx219-overlay.dts | 89 + - arch/arm/boot/dts/overlays/imx219.dtsi | 27 + - arch/arm/boot/dts/overlays/imx258-overlay.dts | 131 + - arch/arm/boot/dts/overlays/imx258.dtsi | 27 + - arch/arm/boot/dts/overlays/imx290-overlay.dts | 32 + - .../boot/dts/overlays/imx290_327-overlay.dtsi | 112 + - arch/arm/boot/dts/overlays/imx290_327.dtsi | 24 + - arch/arm/boot/dts/overlays/imx296-overlay.dts | 104 + - arch/arm/boot/dts/overlays/imx327-overlay.dts | 33 + - arch/arm/boot/dts/overlays/imx378-overlay.dts | 10 + - arch/arm/boot/dts/overlays/imx462-overlay.dts | 39 + - arch/arm/boot/dts/overlays/imx477-overlay.dts | 10 + - .../boot/dts/overlays/imx477_378-overlay.dtsi | 83 + - arch/arm/boot/dts/overlays/imx477_378.dtsi | 24 + - arch/arm/boot/dts/overlays/imx519-overlay.dts | 93 + - arch/arm/boot/dts/overlays/imx519.dtsi | 34 + - arch/arm/boot/dts/overlays/imx708-overlay.dts | 105 + - arch/arm/boot/dts/overlays/imx708.dtsi | 35 + - .../dts/overlays/iqaudio-codec-overlay.dts | 42 + - .../boot/dts/overlays/iqaudio-dac-overlay.dts | 46 + - .../dts/overlays/iqaudio-dacplus-overlay.dts | 49 + - .../iqaudio-digi-wm8804-audio-overlay.dts | 47 + - arch/arm/boot/dts/overlays/iqs550-overlay.dts | 59 + - .../arm/boot/dts/overlays/irs1125-overlay.dts | 90 + - .../dts/overlays/jedec-spi-nor-overlay.dts | 136 + - .../dts/overlays/justboom-both-overlay.dts | 65 + - .../dts/overlays/justboom-dac-overlay.dts | 46 + - .../dts/overlays/justboom-digi-overlay.dts | 41 + - .../arm/boot/dts/overlays/ltc294x-overlay.dts | 86 + - .../boot/dts/overlays/max98357a-overlay.dts | 84 + - .../boot/dts/overlays/maxtherm-overlay.dts | 186 + - .../boot/dts/overlays/mbed-dac-overlay.dts | 64 + - .../boot/dts/overlays/mcp23017-overlay.dts | 69 + - .../boot/dts/overlays/mcp23s17-overlay.dts | 732 +++ - .../dts/overlays/mcp2515-can0-overlay.dts | 73 + - .../dts/overlays/mcp2515-can1-overlay.dts | 73 + - .../arm/boot/dts/overlays/mcp2515-overlay.dts | 156 + - .../boot/dts/overlays/mcp251xfd-overlay.dts | 226 + - .../arm/boot/dts/overlays/mcp3008-overlay.dts | 205 + - .../arm/boot/dts/overlays/mcp3202-overlay.dts | 205 + - .../arm/boot/dts/overlays/mcp342x-overlay.dts | 164 + - .../dts/overlays/media-center-overlay.dts | 86 + - .../boot/dts/overlays/merus-amp-overlay.dts | 59 + - .../boot/dts/overlays/midi-uart0-overlay.dts | 36 + - .../boot/dts/overlays/midi-uart1-overlay.dts | 43 + - .../boot/dts/overlays/midi-uart2-overlay.dts | 37 + - .../boot/dts/overlays/midi-uart3-overlay.dts | 38 + - .../boot/dts/overlays/midi-uart4-overlay.dts | 38 + - .../boot/dts/overlays/midi-uart5-overlay.dts | 38 + - .../boot/dts/overlays/minipitft13-overlay.dts | 70 + - .../boot/dts/overlays/miniuart-bt-overlay.dts | 83 + - .../dts/overlays/mipi-dbi-spi-overlay.dts | 175 + - .../boot/dts/overlays/mlx90640-overlay.dts | 22 + - arch/arm/boot/dts/overlays/mmc-overlay.dts | 46 + - .../arm/boot/dts/overlays/mpu6050-overlay.dts | 29 + - .../arm/boot/dts/overlays/mz61581-overlay.dts | 117 + - arch/arm/boot/dts/overlays/ov2311-overlay.dts | 77 + - arch/arm/boot/dts/overlays/ov2311.dtsi | 26 + - arch/arm/boot/dts/overlays/ov5647-overlay.dts | 92 + - arch/arm/boot/dts/overlays/ov5647.dtsi | 25 + - arch/arm/boot/dts/overlays/ov7251-overlay.dts | 77 + - arch/arm/boot/dts/overlays/ov7251.dtsi | 28 + - arch/arm/boot/dts/overlays/ov9281-overlay.dts | 78 + - arch/arm/boot/dts/overlays/ov9281.dtsi | 27 + - arch/arm/boot/dts/overlays/overlay_map.dts | 223 + - .../arm/boot/dts/overlays/papirus-overlay.dts | 84 + - .../arm/boot/dts/overlays/pca953x-overlay.dts | 240 + - .../arm/boot/dts/overlays/pcf857x-overlay.dts | 32 + - .../dts/overlays/pcie-32bit-dma-overlay.dts | 38 + - arch/arm/boot/dts/overlays/pibell-overlay.dts | 81 + - .../dts/overlays/pifacedigital-overlay.dts | 144 + - .../arm/boot/dts/overlays/pifi-40-overlay.dts | 50 + - .../boot/dts/overlays/pifi-dac-hd-overlay.dts | 49 + - .../dts/overlays/pifi-dac-zero-overlay.dts | 49 + - .../dts/overlays/pifi-mini-210-overlay.dts | 42 + - arch/arm/boot/dts/overlays/piglow-overlay.dts | 97 + - .../boot/dts/overlays/piscreen-overlay.dts | 106 + - .../boot/dts/overlays/piscreen2r-overlay.dts | 106 + - .../arm/boot/dts/overlays/pisound-overlay.dts | 116 + - .../arm/boot/dts/overlays/pitft22-overlay.dts | 69 + - .../overlays/pitft28-capacitive-overlay.dts | 91 + - .../overlays/pitft28-resistive-overlay.dts | 120 + - .../overlays/pitft35-resistive-overlay.dts | 121 + - .../boot/dts/overlays/pps-gpio-overlay.dts | 39 + - .../boot/dts/overlays/proto-codec-overlay.dts | 39 + - .../boot/dts/overlays/pwm-2chan-overlay.dts | 49 + - .../boot/dts/overlays/pwm-ir-tx-overlay.dts | 40 + - arch/arm/boot/dts/overlays/pwm-overlay.dts | 45 + - arch/arm/boot/dts/overlays/pwm1-overlay.dts | 60 + - .../arm/boot/dts/overlays/qca7000-overlay.dts | 55 + - .../dts/overlays/qca7000-uart0-overlay.dts | 46 + - .../arm/boot/dts/overlays/ramoops-overlay.dts | 25 + - .../boot/dts/overlays/ramoops-pi4-overlay.dts | 25 + - .../dts/overlays/rotary-encoder-overlay.dts | 59 + - .../dts/overlays/rpi-backlight-overlay.dts | 21 + - .../dts/overlays/rpi-codeczero-overlay.dts | 9 + - .../boot/dts/overlays/rpi-dacplus-overlay.dts | 17 + - .../boot/dts/overlays/rpi-dacpro-overlay.dts | 17 + - .../dts/overlays/rpi-digiampplus-overlay.dts | 17 + - .../boot/dts/overlays/rpi-ft5406-overlay.dts | 25 + - .../arm/boot/dts/overlays/rpi-poe-overlay.dts | 154 + - .../dts/overlays/rpi-poe-plus-overlay.dts | 49 + - .../boot/dts/overlays/rpi-sense-overlay.dts | 47 + - .../dts/overlays/rpi-sense-v2-overlay.dts | 47 + - arch/arm/boot/dts/overlays/rpi-tv-overlay.dts | 34 + - .../rra-digidac1-wm8741-audio-overlay.dts | 49 + - .../boot/dts/overlays/sainsmart18-overlay.dts | 52 + - .../dts/overlays/sc16is750-i2c-overlay.dts | 43 + - .../dts/overlays/sc16is752-i2c-overlay.dts | 43 + - .../dts/overlays/sc16is752-spi0-overlay.dts | 49 + - .../dts/overlays/sc16is752-spi1-overlay.dts | 67 + - arch/arm/boot/dts/overlays/sdhost-overlay.dts | 38 + - arch/arm/boot/dts/overlays/sdio-overlay.dts | 77 + - .../overlays/seeed-can-fd-hat-v1-overlay.dts | 138 + - .../overlays/seeed-can-fd-hat-v2-overlay.dts | 117 + - .../boot/dts/overlays/sh1106-spi-overlay.dts | 84 + - .../boot/dts/overlays/si446x-spi0-overlay.dts | 53 + - .../arm/boot/dts/overlays/smi-dev-overlay.dts | 20 + - .../boot/dts/overlays/smi-nand-overlay.dts | 66 + - arch/arm/boot/dts/overlays/smi-overlay.dts | 37 + - .../dts/overlays/spi-gpio35-39-overlay.dts | 31 + - .../dts/overlays/spi-gpio40-45-overlay.dts | 36 + - .../arm/boot/dts/overlays/spi-rtc-overlay.dts | 75 + - .../boot/dts/overlays/spi0-0cs-overlay.dts | 39 + - .../boot/dts/overlays/spi0-1cs-overlay.dts | 42 + - .../boot/dts/overlays/spi0-2cs-overlay.dts | 37 + - .../boot/dts/overlays/spi1-1cs-overlay.dts | 57 + - .../boot/dts/overlays/spi1-2cs-overlay.dts | 69 + - .../boot/dts/overlays/spi1-3cs-overlay.dts | 81 + - .../boot/dts/overlays/spi2-1cs-overlay.dts | 57 + - .../boot/dts/overlays/spi2-2cs-overlay.dts | 69 + - .../boot/dts/overlays/spi2-3cs-overlay.dts | 81 + - .../boot/dts/overlays/spi3-1cs-overlay.dts | 42 + - .../boot/dts/overlays/spi3-2cs-overlay.dts | 54 + - .../boot/dts/overlays/spi4-1cs-overlay.dts | 42 + - .../boot/dts/overlays/spi4-2cs-overlay.dts | 54 + - .../boot/dts/overlays/spi5-1cs-overlay.dts | 42 + - .../boot/dts/overlays/spi5-2cs-overlay.dts | 54 + - .../boot/dts/overlays/spi6-1cs-overlay.dts | 42 + - .../boot/dts/overlays/spi6-2cs-overlay.dts | 54 + - .../arm/boot/dts/overlays/ssd1306-overlay.dts | 36 + - .../boot/dts/overlays/ssd1306-spi-overlay.dts | 85 + - .../boot/dts/overlays/ssd1331-spi-overlay.dts | 83 + - .../boot/dts/overlays/ssd1351-spi-overlay.dts | 83 + - .../dts/overlays/superaudioboard-overlay.dts | 73 + - arch/arm/boot/dts/overlays/sx150x-overlay.dts | 1706 ++++++ - .../dts/overlays/tc358743-audio-overlay.dts | 52 + - .../boot/dts/overlays/tc358743-overlay.dts | 109 + - .../boot/dts/overlays/tinylcd35-overlay.dts | 222 + - .../boot/dts/overlays/tpm-slb9670-overlay.dts | 44 + - .../boot/dts/overlays/tpm-slb9673-overlay.dts | 50 + - arch/arm/boot/dts/overlays/uart0-overlay.dts | 32 + - arch/arm/boot/dts/overlays/uart1-overlay.dts | 38 + - arch/arm/boot/dts/overlays/uart2-overlay.dts | 25 + - arch/arm/boot/dts/overlays/uart3-overlay.dts | 25 + - arch/arm/boot/dts/overlays/uart4-overlay.dts | 25 + - arch/arm/boot/dts/overlays/uart5-overlay.dts | 25 + - arch/arm/boot/dts/overlays/udrc-overlay.dts | 128 + - .../dts/overlays/ugreen-dabboard-overlay.dts | 49 + - .../boot/dts/overlays/upstream-overlay.dts | 101 + - .../dts/overlays/upstream-pi4-overlay.dts | 137 + - .../dts/overlays/vc4-fkms-v3d-overlay.dts | 40 + - .../dts/overlays/vc4-fkms-v3d-pi4-overlay.dts | 44 + - .../overlays/vc4-kms-dpi-generic-overlay.dts | 81 + - .../dts/overlays/vc4-kms-dpi-hyperpixel.dtsi | 94 + - .../vc4-kms-dpi-hyperpixel2r-overlay.dts | 114 + - .../vc4-kms-dpi-hyperpixel4-overlay.dts | 57 + - .../vc4-kms-dpi-hyperpixel4sq-overlay.dts | 36 + - .../overlays/vc4-kms-dpi-panel-overlay.dts | 69 + - arch/arm/boot/dts/overlays/vc4-kms-dpi.dtsi | 111 + - .../overlays/vc4-kms-dsi-7inch-overlay.dts | 118 + - .../vc4-kms-dsi-lt070me05000-overlay.dts | 69 + - .../vc4-kms-dsi-lt070me05000-v2-overlay.dts | 64 + - .../vc4-kms-dsi-waveshare-panel-overlay.dts | 123 + - .../overlays/vc4-kms-kippah-7inch-overlay.dts | 26 + - .../boot/dts/overlays/vc4-kms-v3d-overlay.dts | 124 + - .../dts/overlays/vc4-kms-v3d-pi4-overlay.dts | 200 + - .../dts/overlays/vc4-kms-vga666-overlay.dts | 100 + - arch/arm/boot/dts/overlays/vga666-overlay.dts | 30 + - arch/arm/boot/dts/overlays/vl805-overlay.dts | 18 + - .../arm/boot/dts/overlays/w1-gpio-overlay.dts | 40 + - .../dts/overlays/w1-gpio-pullup-overlay.dts | 42 + - arch/arm/boot/dts/overlays/w5500-overlay.dts | 63 + - .../overlays/watterott-display-overlay.dts | 150 + - .../waveshare-can-fd-hat-mode-a-overlay.dts | 140 + - .../waveshare-can-fd-hat-mode-b-overlay.dts | 103 + - .../arm/boot/dts/overlays/wittypi-overlay.dts | 44 + - .../dts/overlays/wm8960-soundcard-overlay.dts | 82 + - arch/arm64/boot/dts/Makefile | 2 + - arch/arm64/boot/dts/broadcom/Makefile | 14 + - .../boot/dts/broadcom/bcm2710-rpi-2-b.dts | 1 + - .../dts/broadcom/bcm2710-rpi-3-b-plus.dts | 1 + - .../boot/dts/broadcom/bcm2710-rpi-3-b.dts | 1 + - .../boot/dts/broadcom/bcm2710-rpi-cm3.dts | 1 + - .../dts/broadcom/bcm2710-rpi-zero-2-w.dts | 1 + - .../boot/dts/broadcom/bcm2710-rpi-zero-2.dts | 1 + - .../boot/dts/broadcom/bcm2711-rpi-cm4.dts | 1 + - .../boot/dts/broadcom/bcm2711-rpi-cm4s.dts | 1 + - arch/arm64/boot/dts/overlays | 1 + - include/dt-bindings/gpio/gpio-fsm.h | 21 + - scripts/Makefile.dtbinst | 5 +- - scripts/Makefile.lib | 13 + - 358 files changed, 35486 insertions(+), 5 deletions(-) - create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-b-plus.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-b-rev1.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-bt.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-zero-w.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-zero.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm2708.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2709-rpi.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm2709.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm270x.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2710.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts - create mode 100644 arch/arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm271x-rpi-bt.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm283x-rpi-csi0-2lane.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-4lane.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_28.dtsi - create mode 100644 arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_44.dtsi - create mode 100644 arch/arm/boot/dts/overlays/Makefile - create mode 100644 arch/arm/boot/dts/overlays/README - create mode 100644 arch/arm/boot/dts/overlays/act-led-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/adafruit-st7735r-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/adafruit18-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/ads1115-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/ads7846-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/adv7282m-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/adv728x-m-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/allo-digione-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts - create mode 100755 arch/arm/boot/dts/overlays/anyspi-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/apds9960-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/applepi-dac-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/arducam-64mp-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/arducam-64mp.dtsi - create mode 100644 arch/arm/boot/dts/overlays/arducam-pivariety-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/at86rf233-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/audioinjector-bare-i2s-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/audremap-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/balena-fin-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/camera-mux-2port-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/camera-mux-4port-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/cap1106-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/cirrus-wm5102-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/cm-swap-i2c0-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/cma-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/crystalfontz-cfa050_pi_m-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/cutiepi-panel-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/dacberry400-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/dht11-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/dionaudio-kiwi-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/disable-bt-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/disable-emmc2-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/disable-wifi-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/dpi18-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/dpi18cpadhi-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/dpi24-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/draws-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/dwc-otg-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/dwc2-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts - create mode 100644 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arch/arm/boot/dts/overlays/vc4-kms-dpi-hyperpixel.dtsi - create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dpi-hyperpixel2r-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dpi-hyperpixel4-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dpi-hyperpixel4sq-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dpi-panel-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dpi.dtsi - create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dsi-7inch-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-v2-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dsi-waveshare-panel-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-pi4-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-vga666-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/vga666-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/vl805-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/w5500-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/watterott-display-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/waveshare-can-fd-hat-mode-a-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/waveshare-can-fd-hat-mode-b-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/wittypi-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts - create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts - create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts - create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts - create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts - create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts - create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-zero-2.dts - create mode 100644 arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4.dts - create mode 100644 arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4s.dts - create mode 120000 arch/arm64/boot/dts/overlays - create mode 100644 include/dt-bindings/gpio/gpio-fsm.h - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index efe38eb25301..a2a407fb5b28 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -39,3 +39,8 @@ subdir-y += unisoc - subdir-y += vt8500 - subdir-y += xen - subdir-y += xilinx -+ -+targets += dtbs dtbs_install -+targets += $(dtb-y) -+ -+subdir-y += overlays -diff --git a/arch/arm/boot/dts/broadcom/Makefile b/arch/arm/boot/dts/broadcom/Makefile -index 7099d9560033..4af351c7f7b2 100644 ---- a/arch/arm/boot/dts/broadcom/Makefile -+++ b/arch/arm/boot/dts/broadcom/Makefile -@@ -35,6 +35,41 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ - bcm2711-rpi-cm4-io.dtb \ - bcm2835-rpi-zero.dtb \ - bcm2835-rpi-zero-w.dtb -+ -+DTC_FLAGS_bcm2708-rpi-b := -@ -+DTC_FLAGS_bcm2708-rpi-b-rev1 := -@ -+DTC_FLAGS_bcm2708-rpi-b-plus := -@ -+DTC_FLAGS_bcm2708-rpi-cm := -@ -+DTC_FLAGS_bcm2708-rpi-zero := -@ -+DTC_FLAGS_bcm2708-rpi-zero-w := -@ -+DTC_FLAGS_bcm2710-rpi-zero-2 := -@ -+DTC_FLAGS_bcm2710-rpi-zero-2-w := -@ -+DTC_FLAGS_bcm2709-rpi-2-b := -@ -+DTC_FLAGS_bcm2710-rpi-2-b := -@ -+DTC_FLAGS_bcm2710-rpi-3-b := -@ -+DTC_FLAGS_bcm2710-rpi-3-b-plus := -@ -+DTC_FLAGS_bcm2709-rpi-cm2 := -@ -+DTC_FLAGS_bcm2710-rpi-cm3 := -@ -+DTC_FLAGS_bcm2711-rpi-cm4 := -@ -+DTC_FLAGS_bcm2711-rpi-cm4s := -@ -+dtb-$(CONFIG_ARCH_BCM2835) += \ -+ bcm2708-rpi-b.dtb \ -+ bcm2708-rpi-b-rev1.dtb \ -+ bcm2708-rpi-b-plus.dtb \ -+ bcm2708-rpi-cm.dtb \ -+ bcm2708-rpi-zero.dtb \ -+ bcm2708-rpi-zero-w.dtb \ -+ bcm2710-rpi-zero-2.dtb \ -+ bcm2710-rpi-zero-2-w.dtb \ -+ bcm2709-rpi-2-b.dtb \ -+ bcm2710-rpi-2-b.dtb \ -+ bcm2710-rpi-3-b.dtb \ -+ bcm2710-rpi-3-b-plus.dtb \ -+ bcm2709-rpi-cm2.dtb \ -+ bcm2710-rpi-cm3.dtb \ -+ bcm2711-rpi-cm4.dtb \ -+ bcm2711-rpi-cm4s.dtb -+ - dtb-$(CONFIG_ARCH_BCMBCA) += \ - bcm947622.dtb \ - bcm963138.dtb \ -diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-plus.dts b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-plus.dts -new file mode 100644 -index 000000000000..b317e83b7efe ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-plus.dts -@@ -0,0 +1,208 @@ -+/dts-v1/; -+ -+#include "bcm2708.dtsi" -+#include "bcm2708-rpi.dtsi" -+#include "bcm283x-rpi-smsc9514.dtsi" -+#include "bcm283x-rpi-csi1-2lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_28.dtsi" -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+/ { -+ compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; -+ model = "Raspberry Pi Model B+"; -+}; -+ -+&gpio { -+ /* -+ * Taken from Raspberry-Pi-B-Plus-V1.2-Schematics.pdf -+ * RPI-BPLUS sheet 1 -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "ID_SDA", -+ "ID_SCL", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "GPIO5", -+ "GPIO6", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "GPIO12", -+ "GPIO13", -+ /* Serial port */ -+ "TXD0", -+ "RXD0", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "SDA0", -+ "SCL0", -+ "NC", /* GPIO30 */ -+ "LAN_RUN", /* GPIO31 */ -+ "CAM_GPIO1", /* GPIO32 */ -+ "NC", /* GPIO33 */ -+ "NC", /* GPIO34 */ -+ "PWR_LOW_N", /* GPIO35 */ -+ "NC", /* GPIO36 */ -+ "NC", /* GPIO37 */ -+ "USB_LIMIT", /* GPIO38 */ -+ "NC", /* GPIO39 */ -+ "PWM0_OUT", /* GPIO40 */ -+ "CAM_GPIO0", /* GPIO41 */ -+ "NC", /* GPIO42 */ -+ "NC", /* GPIO43 */ -+ "ETH_CLK", /* GPIO44 */ -+ "PWM1_OUT", /* GPIO45 */ -+ "HDMI_HPD_N", -+ "STATUS_LED", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins = <40 45>; -+ brcm,function = <4>; -+ brcm,pull = <0>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&led_act { -+ gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ linux,default-trigger = "mmc0"; -+}; -+ -+&leds { -+ led_pwr: led-pwr { -+ label = "PWR"; -+ gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ linux,default-trigger = "input"; -+ }; -+}; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+&cam1_reg { -+ gpio = <&gpio 41 GPIO_ACTIVE_HIGH>; -+}; -+ -+cam0_reg: &cam_dummy_reg { -+}; -+ -+i2c_arm: &i2c1 { -+}; -+ -+i2c_vc: &i2c0 { -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ -+ pwr_led_gpio = <&led_pwr>,"gpios:4"; -+ pwr_led_activelow = <&led_pwr>,"gpios:8"; -+ pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-rev1.dts b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-rev1.dts -new file mode 100644 -index 000000000000..228fd470b619 ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-rev1.dts -@@ -0,0 +1,220 @@ -+/dts-v1/; -+ -+#include "bcm2708.dtsi" -+#include "bcm2708-rpi.dtsi" -+#include "bcm283x-rpi-smsc9512.dtsi" -+#include "bcm283x-rpi-csi1-2lane.dtsi" -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+/ { -+ compatible = "raspberrypi,model-b", "brcm,bcm2835"; -+ model = "Raspberry Pi Model B"; -+}; -+ -+&gpio { -+ /* -+ * Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf -+ * RPI00021 sheet 02 -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "SDA0", -+ "SCL0", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "CAM_GPIO1", -+ "LAN_RUN", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "NC", /* GPIO12 */ -+ "NC", /* GPIO13 */ -+ /* Serial port */ -+ "TXD0", -+ "RXD0", -+ "STATUS_LED_N", -+ "GPIO17", -+ "GPIO18", -+ "NC", /* GPIO19 */ -+ "NC", /* GPIO20 */ -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "NC", /* GPIO26 */ -+ "CAM_GPIO0", -+ /* Binary number representing build/revision */ -+ "CONFIG0", -+ "CONFIG1", -+ "CONFIG2", -+ "CONFIG3", -+ "NC", /* GPIO32 */ -+ "NC", /* GPIO33 */ -+ "NC", /* GPIO34 */ -+ "NC", /* GPIO35 */ -+ "NC", /* GPIO36 */ -+ "NC", /* GPIO37 */ -+ "NC", /* GPIO38 */ -+ "NC", /* GPIO39 */ -+ "PWM0_OUT", -+ "NC", /* GPIO41 */ -+ "NC", /* GPIO42 */ -+ "NC", /* GPIO43 */ -+ "NC", /* GPIO44 */ -+ "PWM1_OUT", -+ "HDMI_HPD_P", -+ "SD_CARD_DET", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <28 29 30 31>; -+ brcm,function = <6>; /* alt2 */ -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins = <40 45>; -+ brcm,function = <4>; -+ brcm,pull = <0>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+/delete-node/ &i2c0mux; -+ -+i2c0: &i2c0if { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c0_pins>; -+ clock-frequency = <100000>; -+}; -+ -+i2c_csi_dsi: &i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+/ { -+ aliases { -+ i2c0 = &i2c0; -+ }; -+ -+ /* Provide an i2c0mux label to avoid undefined symbols in overlays */ -+ i2c0mux: i2c0mux { -+ }; -+ -+ __overrides__ { -+ i2c0 = <&i2c0>, "status"; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&led_act { -+ gpios = <&gpio 16 GPIO_ACTIVE_LOW>; -+ default-state = "off"; -+ linux,default-trigger = "mmc0"; -+}; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+&cam1_reg { -+ gpio = <&gpio 27 GPIO_ACTIVE_HIGH>; -+}; -+ -+cam0_reg: &cam_dummy_reg { -+}; -+ -+i2c_arm: &i2c0 { -+}; -+ -+i2c_vc: &i2c1 { -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ -+ i2c = <&i2c0>,"status"; -+ i2c_arm = <&i2c0>,"status"; -+ i2c_vc = <&i2c1>,"status"; -+ i2c_baudrate = <&i2c0>,"clock-frequency:0"; -+ i2c_arm_baudrate = <&i2c0>,"clock-frequency:0"; -+ i2c_vc_baudrate = <&i2c1>,"clock-frequency:0"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts -new file mode 100644 -index 000000000000..1df74d5aa73c ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts -@@ -0,0 +1,195 @@ -+/dts-v1/; -+ -+#include "bcm2708.dtsi" -+#include "bcm2708-rpi.dtsi" -+#include "bcm283x-rpi-smsc9512.dtsi" -+#include "bcm283x-rpi-csi1-2lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_28.dtsi" -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+/ { -+ compatible = "raspberrypi,model-b", "brcm,bcm2835"; -+ model = "Raspberry Pi Model B"; -+}; -+ -+&gpio { -+ /* -+ * Taken from Raspberry-Pi-Rev-2.0-Model-AB-Schematics.pdf -+ * RPI00022 sheet 02 -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "SDA0", -+ "SCL0", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "CAM_GPIO1", -+ "LAN_RUN", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "NC", /* GPIO12 */ -+ "NC", /* GPIO13 */ -+ /* Serial port */ -+ "TXD0", -+ "RXD0", -+ "STATUS_LED_N", -+ "GPIO17", -+ "GPIO18", -+ "NC", /* GPIO19 */ -+ "NC", /* GPIO20 */ -+ "CAM_GPIO0", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "NC", /* GPIO26 */ -+ "GPIO27", -+ "GPIO28", -+ "GPIO29", -+ "GPIO30", -+ "GPIO31", -+ "NC", /* GPIO32 */ -+ "NC", /* GPIO33 */ -+ "NC", /* GPIO34 */ -+ "NC", /* GPIO35 */ -+ "NC", /* GPIO36 */ -+ "NC", /* GPIO37 */ -+ "NC", /* GPIO38 */ -+ "NC", /* GPIO39 */ -+ "PWM0_OUT", -+ "NC", /* GPIO41 */ -+ "NC", /* GPIO42 */ -+ "NC", /* GPIO43 */ -+ "NC", /* GPIO44 */ -+ "PWM1_OUT", -+ "HDMI_HPD_P", -+ "SD_CARD_DET", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <28 29 30 31>; -+ brcm,function = <6>; /* alt2 */ -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins = <40 45>; -+ brcm,function = <4>; -+ brcm,pull = <0>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&led_act { -+ gpios = <&gpio 16 GPIO_ACTIVE_LOW>; -+ default-state = "off"; -+ linux,default-trigger = "mmc0"; -+}; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+&cam1_reg { -+ gpio = <&gpio 21 GPIO_ACTIVE_HIGH>; -+}; -+ -+cam0_reg: &cam_dummy_reg { -+}; -+ -+i2c_arm: &i2c1 { -+}; -+ -+i2c_vc: &i2c0 { -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-bt.dtsi b/arch/arm/boot/dts/broadcom/bcm2708-rpi-bt.dtsi -new file mode 100644 -index 000000000000..98555528adae ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-bt.dtsi -@@ -0,0 +1,38 @@ -+// SPDX-License-Identifier: GPL-2.0 -+ -+&uart0 { -+ bt: bluetooth { -+ compatible = "brcm,bcm43438-bt"; -+ max-speed = <3000000>; -+ shutdown-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>; -+ local-bd-address = [ 00 00 00 00 00 00 ]; -+ fallback-bd-address; // Don't override a valid address -+ status = "okay"; -+ }; -+}; -+ -+&uart1 { -+ minibt: bluetooth { -+ compatible = "brcm,bcm43438-bt"; -+ max-speed = <230400>; -+ shutdown-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>; -+ local-bd-address = [ 00 00 00 00 00 00 ]; -+ fallback-bd-address; // Don't override a valid address -+ status = "disabled"; -+ }; -+}; -+ -+/ { -+ aliases { -+ bluetooth = &bt; -+ }; -+ -+ __overrides__ { -+ bdaddr = <&bt>,"local-bd-address[", -+ <&bt>,"fallback-bd-address?=0", -+ <&minibt>,"local-bd-address[", -+ <&minibt>,"fallback-bd-address?=0"; -+ krnbt = <&bt>,"status"; -+ krnbt_baudrate = <&bt>,"max-speed:0", <&minibt>,"max-speed:0"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts b/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts -new file mode 100644 -index 000000000000..6f7fea058aba ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts -@@ -0,0 +1,171 @@ -+/dts-v1/; -+ -+#include "bcm2708-rpi-cm.dtsi" -+#include "bcm283x-rpi-csi0-2lane.dtsi" -+#include "bcm283x-rpi-csi1-4lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_28.dtsi" -+ -+/ { -+ compatible = "raspberrypi,compute-module", "brcm,bcm2835"; -+ model = "Raspberry Pi Compute Module"; -+}; -+ -+&cam1_reg { -+ gpio = <&gpio 3 GPIO_ACTIVE_HIGH>; -+ status = "disabled"; -+}; -+ -+cam0_reg: &cam0_regulator { -+ gpio = <&gpio 31 GPIO_ACTIVE_HIGH>; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&gpio { -+ /* -+ * This is based on the official GPU firmware DT blob. -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "GPIO0", -+ "GPIO1", -+ "GPIO2", -+ "GPIO3", -+ "GPIO4", -+ "GPIO5", -+ "GPIO6", -+ "GPIO7", -+ "GPIO8", -+ "GPIO9", -+ "GPIO10", -+ "GPIO11", -+ "GPIO12", -+ "GPIO13", -+ "GPIO14", -+ "GPIO15", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "GPIO28", -+ "GPIO29", -+ "GPIO30", -+ "GPIO31", -+ "GPIO32", -+ "GPIO33", -+ "GPIO34", -+ "GPIO35", -+ "GPIO36", -+ "GPIO37", -+ "GPIO38", -+ "GPIO39", -+ "GPIO40", -+ "GPIO41", -+ "GPIO42", -+ "GPIO43", -+ "GPIO44", -+ "GPIO45", -+ "HDMI_HPD_N", -+ /* Also used as ACT LED */ -+ "EMMC_EN_N", -+ /* Used by eMMC */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins; -+ brcm,function; -+ }; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi b/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi -new file mode 100644 -index 000000000000..10fd4475dd5e ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi -@@ -0,0 +1,27 @@ -+#include "bcm2708.dtsi" -+#include "bcm2708-rpi.dtsi" -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+&led_act { -+ gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ linux,default-trigger = "mmc0"; -+}; -+ -+i2c_arm: &i2c1 { -+}; -+ -+i2c_vc: &i2c0 { -+}; -+ -+/ { -+ __overrides__ { -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ cam0_reg = <&cam0_reg>,"status"; -+ cam0_reg_gpio = <&cam0_reg>,"gpio:4"; -+ cam1_reg = <&cam1_reg>,"status"; -+ cam1_reg_gpio = <&cam1_reg>,"gpio:4"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero-w.dts b/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero-w.dts -new file mode 100644 -index 000000000000..4266caf1016c ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero-w.dts -@@ -0,0 +1,254 @@ -+/dts-v1/; -+ -+#include "bcm2708.dtsi" -+#include "bcm2708-rpi.dtsi" -+#include "bcm283x-rpi-csi1-2lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_28.dtsi" -+#include "bcm2708-rpi-bt.dtsi" -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+/ { -+ compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; -+ model = "Raspberry Pi Zero W"; -+ -+ chosen { -+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0"; -+ }; -+ -+ aliases { -+ serial0 = &uart1; -+ serial1 = &uart0; -+ mmc1 = &mmcnr; -+ }; -+}; -+ -+&gpio { -+ /* -+ * This is based on the official GPU firmware DT blob. -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "ID_SDA", -+ "ID_SCL", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "GPIO5", -+ "GPIO6", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "GPIO12", -+ "GPIO13", -+ /* Serial port */ -+ "TXD1", -+ "RXD1", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "SDA0", -+ "SCL0", -+ /* Used by BT module */ -+ "CTS0", -+ "RTS0", -+ "TXD0", -+ "RXD0", -+ /* Used by Wifi */ -+ "SD1_CLK", -+ "SD1_CMD", -+ "SD1_DATA0", -+ "SD1_DATA1", -+ "SD1_DATA2", -+ "SD1_DATA3", -+ "CAM_GPIO1", /* GPIO40 */ -+ "WL_ON", /* GPIO41 */ -+ "NC", /* GPIO42 */ -+ "WIFI_CLK", /* GPIO43 */ -+ "CAM_GPIO0", /* GPIO44 */ -+ "BT_ON", /* GPIO45 */ -+ "HDMI_HPD_N", -+ "STATUS_LED_N", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ sdio_pins: sdio_pins { -+ brcm,pins = <34 35 36 37 38 39>; -+ brcm,function = <7>; /* ALT3 = SD1 */ -+ brcm,pull = <0 2 2 2 2 2>; -+ }; -+ -+ bt_pins: bt_pins { -+ brcm,pins = <43>; -+ brcm,function = <4>; /* alt0:GPCLK2 */ -+ brcm,pull = <0>; /* none */ -+ }; -+ -+ uart0_pins: uart0_pins { -+ brcm,pins = <30 31 32 33>; -+ brcm,function = <7>; /* alt3=UART0 */ -+ brcm,pull = <2 0 0 2>; /* up none none up */ -+ }; -+ -+ uart1_pins: uart1_pins { -+ brcm,pins; -+ brcm,function; -+ brcm,pull; -+ }; -+ -+ uart1_bt_pins: uart1_bt_pins { -+ brcm,pins = <32 33 30 31>; -+ brcm,function = ; /* alt5=UART1 */ -+ brcm,pull = <0 2 2 0>; -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins = <>; -+ brcm,function = <>; -+ }; -+}; -+ -+&mmcnr { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio_pins>; -+ bus-width = <4>; -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ brcmf: wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ }; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_pins &bt_pins>; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>; -+ status = "okay"; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&led_act { -+ gpios = <&gpio 47 GPIO_ACTIVE_LOW>; -+ default-state = "off"; -+ linux,default-trigger = "actpwr"; -+}; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+&cam1_reg { -+ gpio = <&gpio 44 GPIO_ACTIVE_HIGH>; -+}; -+ -+cam0_reg: &cam_dummy_reg { -+}; -+ -+i2c_arm: &i2c1 {}; -+i2c_vc: &i2c0 {}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero.dts b/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero.dts -new file mode 100644 -index 000000000000..3069f58221ff ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero.dts -@@ -0,0 +1,189 @@ -+/dts-v1/; -+ -+#include "bcm2708.dtsi" -+#include "bcm2708-rpi.dtsi" -+#include "bcm283x-rpi-csi1-2lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_28.dtsi" -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+/ { -+ compatible = "raspberrypi,model-zero", "brcm,bcm2835"; -+ model = "Raspberry Pi Zero"; -+}; -+ -+&gpio { -+ /* -+ * This is based on the official GPU firmware DT blob. -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "ID_SDA", -+ "ID_SCL", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "GPIO5", -+ "GPIO6", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "GPIO12", -+ "GPIO13", -+ /* Serial port */ -+ "TXD0", -+ "RXD0", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "SDA0", -+ "SCL0", -+ "NC", /* GPIO30 */ -+ "NC", /* GPIO31 */ -+ "CAM_GPIO1", /* GPIO32 */ -+ "NC", /* GPIO33 */ -+ "NC", /* GPIO34 */ -+ "NC", /* GPIO35 */ -+ "NC", /* GPIO36 */ -+ "NC", /* GPIO37 */ -+ "NC", /* GPIO38 */ -+ "NC", /* GPIO39 */ -+ "NC", /* GPIO40 */ -+ "CAM_GPIO0", /* GPIO41 */ -+ "NC", /* GPIO42 */ -+ "NC", /* GPIO43 */ -+ "NC", /* GPIO44 */ -+ "NC", /* GPIO45 */ -+ "HDMI_HPD_N", -+ "STATUS_LED_N", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins = <>; -+ brcm,function = <>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&led_act { -+ gpios = <&gpio 47 GPIO_ACTIVE_LOW>; -+ default-state = "off"; -+ linux,default-trigger = "actpwr"; -+}; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+&cam1_reg { -+ gpio = <&gpio 41 GPIO_ACTIVE_HIGH>; -+}; -+ -+cam0_reg: &cam_dummy_reg { -+}; -+ -+i2c_arm: &i2c1 {}; -+i2c_vc: &i2c0 {}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm2708-rpi.dtsi -new file mode 100644 -index 000000000000..f774eda1ae55 ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi.dtsi -@@ -0,0 +1,40 @@ -+/* Downstream modifications common to bcm2835, bcm2836, bcm2837 */ -+ -+#define i2c0 i2c0mux -+#include "bcm2835-rpi.dtsi" -+#undef i2c0 -+#include "bcm270x-rpi.dtsi" -+ -+/ { -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0>; -+ }; -+ -+ aliases { -+ i2c2 = &i2c2; -+ }; -+ -+ __overrides__ { -+ hdmi = <&hdmi>,"status"; -+ i2c2_iknowwhatimdoing = <&i2c2>,"status"; -+ i2c2_baudrate = <&i2c2>,"clock-frequency:0"; -+ sd = <&sdhost>,"status"; -+ sd_poll_once = <&sdhost>,"non-removable?"; -+ }; -+}; -+ -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_gpio48>; -+ status = "okay"; -+}; -+ -+&hdmi { -+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>; -+ status = "disabled"; -+}; -+ -+&i2c2 { -+ status = "disabled"; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2708.dtsi b/arch/arm/boot/dts/broadcom/bcm2708.dtsi -new file mode 100644 -index 000000000000..fdc7f2423bbe ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2708.dtsi -@@ -0,0 +1,19 @@ -+#define i2c0 i2c0if -+#include "bcm2835.dtsi" -+#undef i2c0 -+#include "bcm270x.dtsi" -+ -+/ { -+ __overrides__ { -+ arm_freq; -+ }; -+}; -+ -+&soc { -+ dma-ranges = <0x80000000 0x00000000 0x20000000>, -+ <0x7e000000 0x20000000 0x02000000>; -+}; -+ -+&vc4 { -+ status = "disabled"; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts b/arch/arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts -new file mode 100644 -index 000000000000..c3e1b1be0140 ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts -@@ -0,0 +1,202 @@ -+/dts-v1/; -+ -+#include "bcm2709.dtsi" -+#include "bcm2709-rpi.dtsi" -+#include "bcm283x-rpi-smsc9514.dtsi" -+#include "bcm283x-rpi-csi1-2lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_28.dtsi" -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+/ { -+ compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; -+ model = "Raspberry Pi 2 Model B"; -+}; -+ -+&gpio { -+ /* -+ * Taken from rpi_SCH_2b_1p2_reduced.pdf and -+ * the official GPU firmware DT blob. -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "ID_SDA", -+ "ID_SCL", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "GPIO5", -+ "GPIO6", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "GPIO12", -+ "GPIO13", -+ /* Serial port */ -+ "TXD0", -+ "RXD0", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "SDA0", -+ "SCL0", -+ "NC", /* GPIO30 */ -+ "LAN_RUN", -+ "CAM_GPIO1", -+ "NC", /* GPIO33 */ -+ "NC", /* GPIO34 */ -+ "PWR_LOW_N", -+ "NC", /* GPIO36 */ -+ "NC", /* GPIO37 */ -+ "USB_LIMIT", -+ "NC", /* GPIO39 */ -+ "PWM0_OUT", -+ "CAM_GPIO0", -+ "SMPS_SCL", -+ "SMPS_SDA", -+ "ETH_CLK", -+ "PWM1_OUT", -+ "HDMI_HPD_N", -+ "STATUS_LED", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins = <40 45>; -+ brcm,function = <4>; -+ brcm,pull = <0>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&led_act { -+ gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ linux,default-trigger = "mmc0"; -+}; -+ -+&leds { -+ led_pwr: led-pwr { -+ label = "PWR"; -+ gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ linux,default-trigger = "input"; -+ }; -+}; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+&cam1_reg { -+ gpio = <&gpio 41 GPIO_ACTIVE_HIGH>; -+}; -+ -+cam0_reg: &cam_dummy_reg { -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ -+ pwr_led_gpio = <&led_pwr>,"gpios:4"; -+ pwr_led_activelow = <&led_pwr>,"gpios:8"; -+ pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts b/arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts -new file mode 100644 -index 000000000000..78881c522eba ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts -@@ -0,0 +1,220 @@ -+/dts-v1/; -+ -+#include "bcm2709.dtsi" -+#include "bcm2709-rpi.dtsi" -+#include "bcm283x-rpi-csi0-2lane.dtsi" -+#include "bcm283x-rpi-csi1-4lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_28.dtsi" -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+/ { -+ compatible = "raspberrypi,2-compute-module", "brcm,bcm2836"; -+ model = "Raspberry Pi Compute Module 2"; -+}; -+ -+&cam1_reg { -+ gpio = <&gpio 2 GPIO_ACTIVE_HIGH>; -+ status = "disabled"; -+}; -+ -+cam0_reg: &cam0_regulator { -+ gpio = <&gpio 30 GPIO_ACTIVE_HIGH>; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&gpio { -+ /* -+ * This is based on the official GPU firmware DT blob. -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "GPIO0", -+ "GPIO1", -+ "GPIO2", -+ "GPIO3", -+ "GPIO4", -+ "GPIO5", -+ "GPIO6", -+ "GPIO7", -+ "GPIO8", -+ "GPIO9", -+ "GPIO10", -+ "GPIO11", -+ "GPIO12", -+ "GPIO13", -+ "GPIO14", -+ "GPIO15", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "GPIO28", -+ "GPIO29", -+ "GPIO30", -+ "GPIO31", -+ "GPIO32", -+ "GPIO33", -+ "GPIO34", -+ "GPIO35", -+ "GPIO36", -+ "GPIO37", -+ "GPIO38", -+ "GPIO39", -+ "GPIO40", -+ "GPIO41", -+ "GPIO42", -+ "GPIO43", -+ "GPIO44", -+ "GPIO45", -+ "SMPS_SCL", -+ "SMPS_SDA", -+ /* Used by eMMC */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins; -+ brcm,function; -+ }; -+}; -+ -+&soc { -+ virtgpio: virtgpio { -+ compatible = "brcm,bcm2835-virtgpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ firmware = <&firmware>; -+ status = "okay"; -+ }; -+ -+}; -+ -+&firmware { -+ expgpio: expgpio { -+ compatible = "raspberrypi,firmware-gpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ gpio-line-names = "HDMI_HPD_N", -+ "EMMC_EN_N", -+ "NC", -+ "NC", -+ "NC", -+ "NC", -+ "NC", -+ "NC"; -+ status = "okay"; -+ }; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&led_act { -+ gpios = <&virtgpio 0 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ linux,default-trigger = "mmc0"; -+}; -+ -+&hdmi { -+ hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ cam0_reg = <&cam0_reg>,"status"; -+ cam0_reg_gpio = <&cam0_reg>,"gpio:4"; -+ cam1_reg = <&cam1_reg>,"status"; -+ cam1_reg_gpio = <&cam1_reg>,"gpio:4"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2709-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm2709-rpi.dtsi -new file mode 100644 -index 000000000000..7335e7fbcb71 ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2709-rpi.dtsi -@@ -0,0 +1,8 @@ -+#include "bcm2708-rpi.dtsi" -+ -+&vchiq { -+ compatible = "brcm,bcm2836-vchiq", "brcm,bcm2835-vchiq"; -+}; -+ -+i2c_arm: &i2c1 {}; -+i2c_vc: &i2c0 {}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2709.dtsi b/arch/arm/boot/dts/broadcom/bcm2709.dtsi -new file mode 100644 -index 000000000000..868f65f922ff ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2709.dtsi -@@ -0,0 +1,29 @@ -+#define i2c0 i2c0if -+#include "bcm2836.dtsi" -+#undef i2c0 -+#include "bcm270x.dtsi" -+ -+/ { -+ soc { -+ ranges = <0x7e000000 0x3f000000 0x01000000>, -+ <0x40000000 0x40000000 0x00040000>; -+ -+ dma-ranges = <0xc0000000 0x00000000 0x3f000000>, -+ <0x7e000000 0x3f000000 0x01000000>; -+ }; -+ -+ __overrides__ { -+ arm_freq = <&v7_cpu0>, "clock-frequency:0", -+ <&v7_cpu1>, "clock-frequency:0", -+ <&v7_cpu2>, "clock-frequency:0", -+ <&v7_cpu3>, "clock-frequency:0"; -+ }; -+}; -+ -+&system_timer { -+ status = "disabled"; -+}; -+ -+&vc4 { -+ status = "disabled"; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi -new file mode 100644 -index 000000000000..be53604cb951 ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi -@@ -0,0 +1,180 @@ -+/* Downstream modifications to bcm2835-rpi.dtsi */ -+ -+/ { -+ aliases { -+ aux = &aux; -+ sound = &sound; -+ soc = &soc; -+ dma = &dma; -+ intc = &intc; -+ watchdog = &watchdog; -+ random = &random; -+ mailbox = &mailbox; -+ gpio = &gpio; -+ uart0 = &uart0; -+ uart1 = &uart1; -+ sdhost = &sdhost; -+ mmc = &mmc; -+ mmc1 = &mmc; -+ mmc0 = &sdhost; -+ i2s = &i2s; -+ i2c0 = &i2c0; -+ i2c1 = &i2c1; -+ i2c10 = &i2c_csi_dsi; -+ i2c = &i2c_arm; -+ spi0 = &spi0; -+ spi1 = &spi1; -+ spi2 = &spi2; -+ usb = &usb; -+ leds = &leds; -+ fb = &fb; -+ thermal = &thermal; -+ axiperf = &axiperf; -+ }; -+ -+ /* Define these notional regulators for use by overlays */ -+ vdd_3v3_reg: fixedregulator_3v3 { -+ compatible = "regulator-fixed"; -+ regulator-always-on; -+ regulator-max-microvolt = <3300000>; -+ regulator-min-microvolt = <3300000>; -+ regulator-name = "3v3"; -+ }; -+ -+ vdd_5v0_reg: fixedregulator_5v0 { -+ compatible = "regulator-fixed"; -+ regulator-always-on; -+ regulator-max-microvolt = <5000000>; -+ regulator-min-microvolt = <5000000>; -+ regulator-name = "5v0"; -+ }; -+ -+ soc { -+ gpiomem { -+ compatible = "brcm,bcm2835-gpiomem"; -+ reg = <0x7e200000 0x1000>; -+ }; -+ -+ fb: fb { -+ compatible = "brcm,bcm2708-fb"; -+ firmware = <&firmware>; -+ status = "okay"; -+ }; -+ -+ /* External sound card */ -+ sound: sound { -+ status = "disabled"; -+ }; -+ }; -+ -+ __overrides__ { -+ cache_line_size; -+ -+ uart0 = <&uart0>,"status"; -+ uart1 = <&uart1>,"status"; -+ i2s = <&i2s>,"status"; -+ spi = <&spi0>,"status"; -+ i2c0 = <&i2c0if>,"status",<&i2c0mux>,"status"; -+ i2c1 = <&i2c1>,"status"; -+ i2c = <&i2c1>,"status"; -+ i2c_arm = <&i2c1>,"status"; -+ i2c_vc = <&i2c0if>,"status",<&i2c0mux>,"status"; -+ i2c0_baudrate = <&i2c0if>,"clock-frequency:0"; -+ i2c1_baudrate = <&i2c1>,"clock-frequency:0"; -+ i2c_baudrate = <&i2c1>,"clock-frequency:0"; -+ i2c_arm_baudrate = <&i2c1>,"clock-frequency:0"; -+ i2c_vc_baudrate = <&i2c0if>,"clock-frequency:0"; -+ -+ watchdog = <&watchdog>,"status"; -+ random = <&random>,"status"; -+ sd_overclock = <&sdhost>,"brcm,overclock-50:0"; -+ sd_force_pio = <&sdhost>,"brcm,force-pio?"; -+ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; -+ sd_debug = <&sdhost>,"brcm,debug"; -+ sdio_overclock = <&mmc>,"brcm,overclock-50:0", -+ <&mmcnr>,"brcm,overclock-50:0"; -+ axiperf = <&axiperf>,"status"; -+ }; -+}; -+ -+&uart0 { -+ skip-init; -+}; -+ -+&uart1 { -+ skip-init; -+}; -+ -+&txp { -+ status = "disabled"; -+}; -+ -+&i2c0if { -+ status = "disabled"; -+}; -+ -+&i2c0mux { -+ pinctrl-names = "i2c0", "i2c_csi_dsi"; -+ /delete-property/ clock-frequency; -+ status = "disabled"; -+}; -+ -+&i2c1 { -+ status = "disabled"; -+}; -+ -+&clocks { -+ firmware = <&firmware>; -+}; -+ -+&sdhci { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emmc_gpio48>; -+ bus-width = <4>; -+}; -+ -+&cpu_thermal { -+ // Add some labels -+ thermal_trips: trips { -+ cpu-crit { -+ // Raise upstream limit of 90C -+ temperature = <110000>; -+ }; -+ }; -+ cooling_maps: cooling-maps { -+ }; -+}; -+ -+&vec { -+ clocks = <&firmware_clocks 15>; -+ status = "disabled"; -+}; -+ -+&firmware { -+#ifndef BCM2711 -+ firmware_clocks: clocks { -+ compatible = "raspberrypi,firmware-clocks"; -+ #clock-cells = <1>; -+ }; -+#endif -+ -+ vcio: vcio { -+ compatible = "raspberrypi,vcio"; -+ }; -+}; -+ -+&vc4 { -+ raspberrypi,firmware = <&firmware>; -+}; -+ -+#ifndef BCM2711 -+ -+&hdmi { -+ reg-names = "hdmi", -+ "hd"; -+ clocks = <&firmware_clocks 9>, -+ <&firmware_clocks 13>; -+ dmas = <&dma (17|(1<<27)|(1<<24))>; -+}; -+ -+#endif -diff --git a/arch/arm/boot/dts/broadcom/bcm270x.dtsi b/arch/arm/boot/dts/broadcom/bcm270x.dtsi -new file mode 100644 -index 000000000000..c318080eb883 ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm270x.dtsi -@@ -0,0 +1,294 @@ -+/* Downstream bcm283x.dtsi diff */ -+#include -+ -+/ { -+ chosen: chosen { -+ // Disable audio by default -+ bootargs = "coherent_pool=1M snd_bcm2835.enable_headphones=0"; -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ soc: soc { -+ watchdog: watchdog@7e100000 { -+ /* Add label */ -+ }; -+ -+ random: rng@7e104000 { -+ /* Add label */ -+ }; -+ -+ spi0: spi@7e204000 { -+ /* Add label */ -+ }; -+ -+#ifndef BCM2711 -+ pixelvalve0: pixelvalve@7e206000 { -+ /* Add label */ -+ status = "disabled"; -+ }; -+ -+ pixelvalve1: pixelvalve@7e207000 { -+ /* Add label */ -+ status = "disabled"; -+ }; -+#endif -+ -+ /delete-node/ mmc@7e300000; -+ -+ sdhci: mmc: mmc@7e300000 { -+ compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci"; -+ reg = <0x7e300000 0x100>; -+ interrupts = <2 30>; -+ clocks = <&clocks BCM2835_CLOCK_EMMC>; -+ dmas = <&dma 11>; -+ dma-names = "rx-tx"; -+ brcm,overclock-50 = <0>; -+ status = "disabled"; -+ }; -+ -+ /* A clone of mmc but with non-removable set */ -+ mmcnr: mmcnr@7e300000 { -+ compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci"; -+ reg = <0x7e300000 0x100>; -+ interrupts = <2 30>; -+ clocks = <&clocks BCM2835_CLOCK_EMMC>; -+ dmas = <&dma 11>; -+ dma-names = "rx-tx"; -+ brcm,overclock-50 = <0>; -+ non-removable; -+ status = "disabled"; -+ }; -+ -+ hvs: hvs@7e400000 { -+ /* Add label */ -+ status = "disabled"; -+ }; -+ -+ firmwarekms: firmwarekms@7e600000 { -+ compatible = "raspberrypi,rpi-firmware-kms"; -+ /* SMI interrupt reg */ -+ reg = <0x7e600000 0x100>; -+ interrupts = <2 16>; -+ brcm,firmware = <&firmware>; -+ status = "disabled"; -+ }; -+ -+ smi: smi@7e600000 { -+ compatible = "brcm,bcm2835-smi"; -+ reg = <0x7e600000 0x100>; -+ interrupts = <2 16>; -+ clocks = <&clocks BCM2835_CLOCK_SMI>; -+ assigned-clocks = <&clocks BCM2835_CLOCK_SMI>; -+ assigned-clock-rates = <125000000>; -+ dmas = <&dma 4>; -+ dma-names = "rx-tx"; -+ status = "disabled"; -+ }; -+ -+ csi0: csi@7e800000 { -+ compatible = "brcm,bcm2835-unicam"; -+ reg = <0x7e800000 0x800>, -+ <0x7e802000 0x4>; -+ interrupts = <2 6>; -+ clocks = <&clocks BCM2835_CLOCK_CAM0>, -+ <&firmware_clocks 4>; -+ clock-names = "lp", "vpu"; -+ power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ #clock-cells = <1>; -+ status = "disabled"; -+ }; -+ -+ csi1: csi@7e801000 { -+ compatible = "brcm,bcm2835-unicam"; -+ reg = <0x7e801000 0x800>, -+ <0x7e802004 0x4>; -+ interrupts = <2 7>; -+ clocks = <&clocks BCM2835_CLOCK_CAM1>, -+ <&firmware_clocks 4>; -+ clock-names = "lp", "vpu"; -+ power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ #clock-cells = <1>; -+ status = "disabled"; -+ }; -+ -+#ifndef BCM2711 -+ pixelvalve2: pixelvalve@7e807000 { -+ /* Add label */ -+ status = "disabled"; -+ }; -+#endif -+ -+ hdmi@7e902000 { /* hdmi */ -+ status = "disabled"; -+ }; -+ -+ usb@7e980000 { /* usb */ -+ compatible = "brcm,bcm2708-usb"; -+ reg = <0x7e980000 0x10000>, -+ <0x7e006000 0x1000>; -+ interrupt-names = "usb", -+ "soft"; -+ interrupts = <1 9>, -+ <2 0>; -+ }; -+ -+#ifndef BCM2711 -+ v3d@7ec00000 { /* vd3 */ -+ compatible = "brcm,vc4-v3d"; -+ power-domains = <&power RPI_POWER_DOMAIN_V3D>; -+ status = "disabled"; -+ }; -+#endif -+ -+ axiperf: axiperf { -+ compatible = "brcm,bcm2835-axiperf"; -+ reg = <0x7e009800 0x100>, -+ <0x7ee08000 0x100>; -+ firmware = <&firmware>; -+ status = "disabled"; -+ }; -+ -+ i2c0mux: i2c0mux { -+ compatible = "i2c-mux-pinctrl"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ i2c-parent = <&i2c0if>; -+ -+ status = "disabled"; -+ -+ i2c0: i2c@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2c_csi_dsi: i2c@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ }; -+ }; -+ -+ cam1_reg: cam1_regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "cam1-reg"; -+ enable-active-high; -+ /* Needs to be enabled, as removing a regulator is very unsafe */ -+ status = "okay"; -+ }; -+ -+ cam1_clk: cam1_clk { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ cam0_regulator: cam0_regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "cam0-reg"; -+ enable-active-high; -+ status = "disabled"; -+ }; -+ -+ cam0_clk: cam0_clk { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ cam_dummy_reg: cam_dummy_reg { -+ compatible = "regulator-fixed"; -+ regulator-name = "cam-dummy-reg"; -+ status = "okay"; -+ }; -+ -+ __overrides__ { -+ cam0-pwdn-ctrl; -+ cam0-pwdn; -+ cam0-led-ctrl; -+ cam0-led; -+ }; -+}; -+ -+&gpio { -+ interrupts = <2 17>, <2 18>; -+ -+ dpi_18bit_cpadhi_gpio0: dpi_18bit_cpadhi_gpio0 { -+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 -+ 12 13 14 15 16 17 -+ 20 21 22 23 24 25>; -+ brcm,function = ; -+ brcm,pull = <0>; /* no pull */ -+ }; -+ dpi_18bit_cpadhi_gpio2: dpi_18bit_cpadhi_gpio2 { -+ brcm,pins = <2 3 4 5 6 7 8 9 -+ 12 13 14 15 16 17 -+ 20 21 22 23 24 25>; -+ brcm,function = ; -+ }; -+ dpi_18bit_gpio0: dpi_18bit_gpio0 { -+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 -+ 12 13 14 15 16 17 18 19 -+ 20 21>; -+ brcm,function = ; -+ }; -+ dpi_18bit_gpio2: dpi_18bit_gpio2 { -+ brcm,pins = <2 3 4 5 6 7 8 9 10 11 -+ 12 13 14 15 16 17 18 19 -+ 20 21>; -+ brcm,function = ; -+ }; -+ dpi_16bit_gpio0: dpi_16bit_gpio0 { -+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 -+ 12 13 14 15 16 17 18 19>; -+ brcm,function = ; -+ }; -+ dpi_16bit_gpio2: dpi_16bit_gpio2 { -+ brcm,pins = <2 3 4 5 6 7 8 9 10 11 -+ 12 13 14 15 16 17 18 19>; -+ brcm,function = ; -+ }; -+ dpi_16bit_cpadhi_gpio0: dpi_16bit_cpadhi_gpio0 { -+ brcm,pins = <0 1 2 3 4 5 6 7 8 -+ 12 13 14 15 16 17 -+ 20 21 22 23 24>; -+ brcm,function = ; -+ }; -+ dpi_16bit_cpadhi_gpio2: dpi_16bit_cpadhi_gpio2 { -+ brcm,pins = <2 3 4 5 6 7 8 -+ 12 13 14 15 16 17 -+ 20 21 22 23 24>; -+ brcm,function = ; -+ }; -+}; -+ -+&uart0 { -+ /* Enable CTS bug workaround */ -+ cts-event-workaround; -+}; -+ -+&i2s { -+ #sound-dai-cells = <0>; -+ dmas = <&dma 2>, <&dma 3>; -+ dma-names = "tx", "rx"; -+}; -+ -+&sdhost { -+ dmas = <&dma (13|(1<<29))>; -+ dma-names = "rx-tx"; -+ bus-width = <4>; -+ brcm,overclock-50 = <0>; -+ brcm,pio-limit = <1>; -+ firmware = <&firmware>; -+}; -+ -+&spi0 { -+ dmas = <&dma 6>, <&dma 7>; -+ dma-names = "tx", "rx"; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts b/arch/arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts -new file mode 100644 -index 000000000000..3c89b4446aca ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts -@@ -0,0 +1,202 @@ -+/dts-v1/; -+ -+#include "bcm2710.dtsi" -+#include "bcm2709-rpi.dtsi" -+#include "bcm283x-rpi-smsc9514.dtsi" -+#include "bcm283x-rpi-csi1-2lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_28.dtsi" -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+/ { -+ compatible = "raspberrypi,2-model-b-rev2", "brcm,bcm2837"; -+ model = "Raspberry Pi 2 Model B rev 1.2"; -+}; -+ -+&gpio { -+ /* -+ * Taken from rpi_SCH_2b_1p2_reduced.pdf and -+ * the official GPU firmware DT blob. -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "ID_SDA", -+ "ID_SCL", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "GPIO5", -+ "GPIO6", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "GPIO12", -+ "GPIO13", -+ /* Serial port */ -+ "TXD0", -+ "RXD0", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "SDA0", -+ "SCL0", -+ "NC", /* GPIO30 */ -+ "LAN_RUN", -+ "CAM_GPIO1", -+ "NC", /* GPIO33 */ -+ "NC", /* GPIO34 */ -+ "PWR_LOW_N", -+ "NC", /* GPIO36 */ -+ "NC", /* GPIO37 */ -+ "USB_LIMIT", -+ "NC", /* GPIO39 */ -+ "PWM0_OUT", -+ "CAM_GPIO0", -+ "SMPS_SCL", -+ "SMPS_SDA", -+ "ETH_CLK", -+ "PWM1_OUT", -+ "HDMI_HPD_N", -+ "STATUS_LED", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins = <40 45>; -+ brcm,function = <4>; -+ brcm,pull = <0>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&led_act { -+ gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ linux,default-trigger = "mmc0"; -+}; -+ -+&leds { -+ led_pwr: led-pwr { -+ label = "PWR"; -+ gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ linux,default-trigger = "input"; -+ }; -+}; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+&cam1_reg { -+ gpio = <&gpio 41 GPIO_ACTIVE_HIGH>; -+}; -+ -+cam0_reg: &cam_dummy_reg { -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ -+ pwr_led_gpio = <&led_pwr>,"gpios:4"; -+ pwr_led_activelow = <&led_pwr>,"gpios:8"; -+ pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts b/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts -new file mode 100644 -index 000000000000..818804dc2f49 ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts -@@ -0,0 +1,297 @@ -+/dts-v1/; -+ -+#include "bcm2710.dtsi" -+#include "bcm2709-rpi.dtsi" -+#include "bcm283x-rpi-lan7515.dtsi" -+#include "bcm283x-rpi-csi1-2lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_44.dtsi" -+#include "bcm271x-rpi-bt.dtsi" -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+/ { -+ compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837"; -+ model = "Raspberry Pi 3 Model B+"; -+ -+ chosen { -+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0"; -+ }; -+ -+ aliases { -+ serial0 = &uart1; -+ serial1 = &uart0; -+ mmc1 = &mmcnr; -+ }; -+}; -+ -+&gpio { -+ /* -+ * Taken from rpi_SCH_3bplus_1p0_reduced.pdf and -+ * the official GPU firmware DT blob. -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "ID_SDA", -+ "ID_SCL", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "GPIO5", -+ "GPIO6", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "GPIO12", -+ "GPIO13", -+ /* Serial port */ -+ "TXD1", -+ "RXD1", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "HDMI_HPD_N", -+ "STATUS_LED_G", -+ /* Used by BT module */ -+ "CTS0", -+ "RTS0", -+ "TXD0", -+ "RXD0", -+ /* Used by Wifi */ -+ "SD1_CLK", -+ "SD1_CMD", -+ "SD1_DATA0", -+ "SD1_DATA1", -+ "SD1_DATA2", -+ "SD1_DATA3", -+ "PWM0_OUT", -+ "PWM1_OUT", -+ "ETH_CLK", -+ "WIFI_CLK", -+ "SDA0", -+ "SCL0", -+ "SMPS_SCL", -+ "SMPS_SDA", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ sdio_pins: sdio_pins { -+ brcm,pins = <34 35 36 37 38 39>; -+ brcm,function = <7>; // alt3 = SD1 -+ brcm,pull = <0 2 2 2 2 2>; -+ }; -+ -+ bt_pins: bt_pins { -+ brcm,pins = <43>; -+ brcm,function = <4>; /* alt0:GPCLK2 */ -+ brcm,pull = <0>; -+ }; -+ -+ uart0_pins: uart0_pins { -+ brcm,pins = <32 33>; -+ brcm,function = <7>; /* alt3=UART0 */ -+ brcm,pull = <0 2>; -+ }; -+ -+ uart1_pins: uart1_pins { -+ brcm,pins; -+ brcm,function; -+ brcm,pull; -+ }; -+ -+ uart1_bt_pins: uart1_bt_pins { -+ brcm,pins = <32 33 30 31>; -+ brcm,function = ; /* alt5=UART1 */ -+ brcm,pull = <0 2 2 0>; -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins = <40 41>; -+ brcm,function = <4>; -+ brcm,pull = <0>; -+ }; -+}; -+ -+&mmcnr { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio_pins>; -+ bus-width = <4>; -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ brcmf: wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ }; -+}; -+ -+&firmware { -+ expgpio: expgpio { -+ compatible = "raspberrypi,firmware-gpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ gpio-line-names = "BT_ON", -+ "WL_ON", -+ "PWR_LED_R", -+ "LAN_RUN", -+ "NC", -+ "CAM_GPIO0", -+ "CAM_GPIO1", -+ "NC"; -+ status = "okay"; -+ }; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_pins &bt_pins>; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>; -+ status = "okay"; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&led_act { -+ gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ linux,default-trigger = "mmc0"; -+}; -+ -+&leds { -+ led_pwr: led-pwr { -+ label = "PWR"; -+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; -+ default-state = "off"; -+ linux,default-trigger = "default-on"; -+ }; -+}; -+ -+&hdmi { -+ hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+ð_phy { -+ microchip,eee-enabled; -+ microchip,tx-lpi-timer = <600>; /* non-aggressive*/ -+ microchip,downshift-after = <2>; -+}; -+ -+&cam1_reg { -+ gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>; -+}; -+ -+cam0_reg: &cam_dummy_reg { -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ -+ pwr_led_gpio = <&led_pwr>,"gpios:4"; -+ pwr_led_activelow = <&led_pwr>,"gpios:8"; -+ pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; -+ -+ eee = <ð_phy>,"microchip,eee-enabled?"; -+ tx_lpi_timer = <ð_phy>,"microchip,tx-lpi-timer:0"; -+ eth_led0 = <ð_phy>,"microchip,led-modes:0"; -+ eth_led1 = <ð_phy>,"microchip,led-modes:4"; -+ eth_downshift_after = <ð_phy>,"microchip,downshift-after:0"; -+ eth_max_speed = <ð_phy>,"max-speed:0"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts b/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts -new file mode 100644 -index 000000000000..14bb3be1fc87 ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts -@@ -0,0 +1,299 @@ -+/dts-v1/; -+ -+#include "bcm2710.dtsi" -+#include "bcm2709-rpi.dtsi" -+#include "bcm283x-rpi-smsc9514.dtsi" -+#include "bcm283x-rpi-csi1-2lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_44.dtsi" -+#include "bcm271x-rpi-bt.dtsi" -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+/ { -+ compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; -+ model = "Raspberry Pi 3 Model B"; -+ -+ chosen { -+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0"; -+ }; -+ -+ aliases { -+ serial0 = &uart1; -+ serial1 = &uart0; -+ mmc1 = &mmcnr; -+ }; -+}; -+ -+&gpio { -+ /* -+ * Taken from rpi_SCH_3b_1p2_reduced.pdf and -+ * the official GPU firmware DT blob. -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "ID_SDA", -+ "ID_SCL", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "GPIO5", -+ "GPIO6", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "GPIO12", -+ "GPIO13", -+ /* Serial port */ -+ "TXD1", -+ "RXD1", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "NC", /* GPIO 28 */ -+ "LAN_RUN_BOOT", -+ /* Used by BT module */ -+ "CTS0", -+ "RTS0", -+ "TXD0", -+ "RXD0", -+ /* Used by Wifi */ -+ "SD1_CLK", -+ "SD1_CMD", -+ "SD1_DATA0", -+ "SD1_DATA1", -+ "SD1_DATA2", -+ "SD1_DATA3", -+ "PWM0_OUT", -+ "PWM1_OUT", -+ "ETH_CLK", -+ "WIFI_CLK", -+ "SDA0", -+ "SCL0", -+ "SMPS_SCL", -+ "SMPS_SDA", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ sdio_pins: sdio_pins { -+ brcm,pins = <34 35 36 37 38 39>; -+ brcm,function = <7>; // alt3 = SD1 -+ brcm,pull = <0 2 2 2 2 2>; -+ }; -+ -+ bt_pins: bt_pins { -+ brcm,pins = <43>; -+ brcm,function = <4>; /* alt0:GPCLK2 */ -+ brcm,pull = <0>; -+ }; -+ -+ uart0_pins: uart0_pins { -+ brcm,pins = <32 33>; -+ brcm,function = <7>; /* alt3=UART0 */ -+ brcm,pull = <0 2>; -+ }; -+ -+ uart1_pins: uart1_pins { -+ brcm,pins; -+ brcm,function; -+ brcm,pull; -+ }; -+ -+ uart1_bt_pins: uart1_bt_pins { -+ brcm,pins = <32 33>; -+ brcm,function = ; /* alt5=UART1 */ -+ brcm,pull = <0 2>; -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins = <40 41>; -+ brcm,function = <4>; -+ brcm,pull = <0>; -+ }; -+}; -+ -+&mmcnr { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio_pins>; -+ bus-width = <4>; -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ brcmf: wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ }; -+}; -+ -+&soc { -+ virtgpio: virtgpio { -+ compatible = "brcm,bcm2835-virtgpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ firmware = <&firmware>; -+ status = "okay"; -+ }; -+ -+}; -+ -+&firmware { -+ expgpio: expgpio { -+ compatible = "raspberrypi,firmware-gpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ gpio-line-names = "BT_ON", -+ "WL_ON", -+ "STATUS_LED", -+ "LAN_RUN", -+ "HDMI_HPD_N", -+ "CAM_GPIO0", -+ "CAM_GPIO1", -+ "PWR_LOW_N"; -+ status = "okay"; -+ }; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_pins &bt_pins>; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>; -+ status = "okay"; -+}; -+ -+&bt { -+ max-speed = <921600>; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&led_act { -+ gpios = <&virtgpio 0 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ linux,default-trigger = "mmc0"; -+}; -+ -+&leds { -+ led_pwr: led-pwr { -+ label = "PWR"; -+ gpios = <&expgpio 7 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ linux,default-trigger = "input"; -+ }; -+}; -+ -+&hdmi { -+ hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+&cam1_reg { -+ gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>; -+}; -+ -+cam0_reg: &cam_dummy_reg { -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ -+ pwr_led_gpio = <&led_pwr>,"gpios:4"; -+ pwr_led_activelow = <&led_pwr>,"gpios:8"; -+ pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts b/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts -new file mode 100644 -index 000000000000..5cb73424e3fa ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts -@@ -0,0 +1,220 @@ -+/dts-v1/; -+ -+#include "bcm2710.dtsi" -+#include "bcm2709-rpi.dtsi" -+#include "bcm283x-rpi-csi0-2lane.dtsi" -+#include "bcm283x-rpi-csi1-4lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_28.dtsi" -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+/ { -+ compatible = "raspberrypi,3-compute-module", "brcm,bcm2837"; -+ model = "Raspberry Pi Compute Module 3"; -+}; -+ -+&cam1_reg { -+ gpio = <&gpio 3 GPIO_ACTIVE_HIGH>; -+ status = "disabled"; -+}; -+ -+cam0_reg: &cam0_regulator { -+ gpio = <&gpio 31 GPIO_ACTIVE_HIGH>; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&gpio { -+ /* -+ * This is based on the official GPU firmware DT blob. -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "GPIO0", -+ "GPIO1", -+ "GPIO2", -+ "GPIO3", -+ "GPIO4", -+ "GPIO5", -+ "GPIO6", -+ "GPIO7", -+ "GPIO8", -+ "GPIO9", -+ "GPIO10", -+ "GPIO11", -+ "GPIO12", -+ "GPIO13", -+ "GPIO14", -+ "GPIO15", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "GPIO28", -+ "GPIO29", -+ "GPIO30", -+ "GPIO31", -+ "GPIO32", -+ "GPIO33", -+ "GPIO34", -+ "GPIO35", -+ "GPIO36", -+ "GPIO37", -+ "GPIO38", -+ "GPIO39", -+ "GPIO40", -+ "GPIO41", -+ "GPIO42", -+ "GPIO43", -+ "GPIO44", -+ "GPIO45", -+ "SMPS_SCL", -+ "SMPS_SDA", -+ /* Used by eMMC */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins; -+ brcm,function; -+ }; -+}; -+ -+&soc { -+ virtgpio: virtgpio { -+ compatible = "brcm,bcm2835-virtgpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ firmware = <&firmware>; -+ status = "okay"; -+ }; -+ -+}; -+ -+&firmware { -+ expgpio: expgpio { -+ compatible = "raspberrypi,firmware-gpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ gpio-line-names = "HDMI_HPD_N", -+ "EMMC_EN_N", -+ "NC", -+ "NC", -+ "NC", -+ "NC", -+ "NC", -+ "NC"; -+ status = "okay"; -+ }; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&led_act { -+ gpios = <&virtgpio 0 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ linux,default-trigger = "mmc0"; -+}; -+ -+&hdmi { -+ hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ cam0_reg = <&cam0_reg>,"status"; -+ cam0_reg_gpio = <&cam0_reg>,"gpio:4"; -+ cam1_reg = <&cam1_reg>,"status"; -+ cam1_reg_gpio = <&cam1_reg>,"gpio:4"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts b/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts -new file mode 100644 -index 000000000000..8cf0f45d3950 ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts -@@ -0,0 +1,272 @@ -+/dts-v1/; -+ -+#include "bcm2710.dtsi" -+#include "bcm2709-rpi.dtsi" -+#include "bcm283x-rpi-csi1-2lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_44.dtsi" -+#include "bcm2708-rpi-bt.dtsi" -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+/ { -+ compatible = "raspberrypi,model-zero-2-w", "brcm,bcm2837"; -+ model = "Raspberry Pi Zero 2 W"; -+ -+ chosen { -+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0"; -+ }; -+ -+ aliases { -+ serial0 = &uart1; -+ serial1 = &uart0; -+ mmc1 = &mmcnr; -+ }; -+}; -+ -+&gpio { -+ /* -+ * This is based on the official GPU firmware DT blob. -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "ID_SDA", -+ "ID_SCL", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "GPIO5", -+ "GPIO6", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "GPIO12", -+ "GPIO13", -+ /* Serial port */ -+ "TXD1", -+ "RXD1", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "HDMI_HPD_N", -+ "STATUS_LED_N", -+ /* Used by BT module */ -+ "CTS0", -+ "RTS0", -+ "TXD0", -+ "RXD0", -+ /* Used by Wifi */ -+ "SD1_CLK", -+ "SD1_CMD", -+ "SD1_DATA0", -+ "SD1_DATA1", -+ "SD1_DATA2", -+ "SD1_DATA3", -+ "CAM_GPIO1", /* GPIO40 */ -+ "WL_ON", /* GPIO41 */ -+ "BT_ON", /* GPIO42 */ -+ "WIFI_CLK", /* GPIO43 */ -+ "SDA0", /* GPIO44 */ -+ "SCL0", /* GPIO45 */ -+ "SMPS_SCL", /* GPIO46 */ -+ "SMPS_SDA", /* GPIO47 */ -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ sdio_pins: sdio_pins { -+ brcm,pins = <34 35 36 37 38 39>; -+ brcm,function = <7>; // alt3 = SD1 -+ brcm,pull = <0 2 2 2 2 2>; -+ }; -+ -+ bt_pins: bt_pins { -+ brcm,pins = <43>; -+ brcm,function = <4>; /* alt0:GPCLK2 */ -+ brcm,pull = <0>; -+ }; -+ -+ uart0_pins: uart0_pins { -+ brcm,pins = <30 31 32 33>; -+ brcm,function = <7>; /* alt3=UART0 */ -+ brcm,pull = <2 0 0 2>; /* up none none up */ -+ }; -+ -+ uart1_pins: uart1_pins { -+ brcm,pins; -+ brcm,function; -+ brcm,pull; -+ }; -+ -+ uart1_bt_pins: uart1_bt_pins { -+ brcm,pins = <32 33 30 31>; -+ brcm,function = ; /* alt5=UART1 */ -+ brcm,pull = <0 2 2 0>; -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins = <>; -+ brcm,function = <>; -+ }; -+}; -+ -+&mmcnr { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio_pins>; -+ bus-width = <4>; -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ brcmf: wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ -+ firmwares { -+ fw_43436p { -+ chipid = <43430>; -+ revmask = <4>; -+ fw_base = "brcm/brcmfmac43436-sdio"; -+ }; -+ fw_43436s { -+ chipid = <43430>; -+ revmask = <2>; -+ fw_base = "brcm/brcmfmac43436s-sdio"; -+ }; -+ }; -+ }; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_pins &bt_pins>; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>; -+ status = "okay"; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&led_act { -+ gpios = <&gpio 29 GPIO_ACTIVE_LOW>; -+ default-state = "off"; -+ linux,default-trigger = "actpwr"; -+}; -+ -+&hdmi { -+ hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+&bt { -+ shutdown-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; -+}; -+ -+&minibt { -+ shutdown-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; -+}; -+ -+&cam1_reg { -+ gpio = <&gpio 40 GPIO_ACTIVE_HIGH>; -+}; -+ -+cam0_reg: &cam_dummy_reg { -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2.dts b/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2.dts -new file mode 100644 -index 000000000000..daa12bd30d6b ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2.dts -@@ -0,0 +1 @@ -+#include "bcm2710-rpi-zero-2-w.dts" -diff --git a/arch/arm/boot/dts/broadcom/bcm2710.dtsi b/arch/arm/boot/dts/broadcom/bcm2710.dtsi -new file mode 100644 -index 000000000000..bdcdbb51fab8 ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2710.dtsi -@@ -0,0 +1,32 @@ -+#define i2c0 i2c0if -+#include "bcm2837.dtsi" -+#undef i2c0 -+#include "bcm270x.dtsi" -+ -+/ { -+ compatible = "brcm,bcm2837", "brcm,bcm2836"; -+ -+ arm-pmu { -+ compatible = "arm,cortex-a53-pmu", "arm,cortex-a7-pmu"; -+ }; -+ -+ soc { -+ dma-ranges = <0xc0000000 0x00000000 0x3f000000>, -+ <0x7e000000 0x3f000000 0x01000000>; -+ }; -+ -+ __overrides__ { -+ arm_freq = <&cpu0>, "clock-frequency:0", -+ <&cpu1>, "clock-frequency:0", -+ <&cpu2>, "clock-frequency:0", -+ <&cpu3>, "clock-frequency:0"; -+ }; -+}; -+ -+&system_timer { -+ status = "disabled"; -+}; -+ -+&vc4 { -+ status = "disabled"; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts -index d5f8823230db..e3ce216d0c22 100644 ---- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts -+++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts -@@ -1,10 +1,16 @@ - // SPDX-License-Identifier: GPL-2.0 - /dts-v1/; -+#define BCM2711 -+#define i2c0 i2c0if - #include "bcm2711.dtsi" -+#include "bcm283x-rpi-wifi-bt.dtsi" -+#undef i2c0 -+#include "bcm270x.dtsi" -+#define i2c0 i2c0mux - #include "bcm2711-rpi.dtsi" -+#undef i2c0 - #include "bcm283x-rpi-led-deprecated.dtsi" --#include "bcm283x-rpi-usb-peripheral.dtsi" --#include "bcm283x-rpi-wifi-bt.dtsi" -+//#include "bcm283x-rpi-usb-peripheral.dtsi" - - / { - compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; -@@ -60,7 +66,7 @@ &expgpio { - "VDD_SD_IO_SEL", - "CAM_GPIO", /* 5 */ - "SD_PWR_ON", -- ""; -+ "SD_OC_N"; - }; - - &gpio { -@@ -241,3 +247,168 @@ &vec { - &wifi_pwrseq { - reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; - }; -+ -+// ============================================= -+// Downstream rpi- changes -+ -+#include "bcm271x-rpi-bt.dtsi" -+ -+/ { -+ soc { -+ /delete-node/ pixelvalve@7e807000; -+ /delete-node/ hdmi@7e902000; -+ }; -+}; -+ -+#include "bcm2711-rpi-ds.dtsi" -+#include "bcm283x-rpi-csi1-2lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_44.dtsi" -+ -+/ { -+ chosen { -+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0"; -+ }; -+ -+ /delete-node/ wifi-pwrseq; -+}; -+ -+&mmcnr { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio_pins>; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-0 = <&uart0_pins &bt_pins>; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-0 = <&uart1_pins>; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&gpio { -+ bt_pins: bt_pins { -+ brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0 -+ // to fool pinctrl -+ brcm,function = <0>; -+ brcm,pull = <2>; -+ }; -+ -+ uart0_pins: uart0_pins { -+ brcm,pins = <32 33>; -+ brcm,function = ; -+ brcm,pull = <0 2>; -+ }; -+ -+ uart1_pins: uart1_pins { -+ brcm,pins; -+ brcm,function; -+ brcm,pull; -+ }; -+ -+ uart1_bt_pins: uart1_bt_pins { -+ brcm,pins = <32 33 30 31>; -+ brcm,function = ; /* alt5=UART1 */ -+ brcm,pull = <0 2 2 0>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+// ============================================= -+// Board specific stuff here -+ -+&sdhost { -+ status = "disabled"; -+}; -+ -+&phy1 { -+ led-modes = <0x00 0x08>; /* link/activity link */ -+}; -+ -+&gpio { -+ audio_pins: audio_pins { -+ brcm,pins = <40 41>; -+ brcm,function = <4>; -+ brcm,pull = <0>; -+ }; -+}; -+ -+&led_act { -+ default-state = "off"; -+ linux,default-trigger = "mmc0"; -+}; -+ -+&led_pwr { -+ default-state = "off"; -+}; -+ -+&pwm1 { -+ status = "disabled"; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+&cam1_reg { -+ gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>; -+}; -+ -+cam0_reg: &cam_dummy_reg { -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ -+ pwr_led_gpio = <&led_pwr>,"gpios:4"; -+ pwr_led_activelow = <&led_pwr>,"gpios:8"; -+ pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; -+ -+ eth_led0 = <&phy1>,"led-modes:0"; -+ eth_led1 = <&phy1>,"led-modes:4"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts -index 5a2869a18bd5..de36357cd73f 100644 ---- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts -+++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts -@@ -41,3 +41,44 @@ &led_pwr { - &pm { - /delete-property/ system-power-controller; - }; -+ -+// ============================================= -+// Downstream rpi- changes -+ -+&audio_pins { -+ brcm,pins = <>; -+ brcm,function = <>; -+}; -+ -+// Declare the LED but leave it disabled, in case a user wants to map it -+// to a GPIO on the header -+&led_act { -+ default-state = "off"; -+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; -+ status = "disabled"; -+}; -+ -+&led_pwr { -+ default-state = "off"; -+}; -+ -+&cam1_reg { -+ /delete-property/ gpio; -+}; -+ -+cam0_reg: &cam_dummy_reg { -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4", -+ <&led_act>,"status=okay"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ pwr_led_gpio = <&led_pwr>,"gpios:4"; -+ pwr_led_activelow = <&led_pwr>,"gpios:8"; -+ pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts -new file mode 100644 -index 000000000000..3df663553f5a ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts -@@ -0,0 +1,443 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/dts-v1/; -+#define BCM2711 -+#define i2c0 i2c0if -+#include "bcm2711.dtsi" -+#include "bcm283x-rpi-wifi-bt.dtsi" -+#undef i2c0 -+#include "bcm270x.dtsi" -+#define i2c0 i2c0mux -+#include "bcm2711-rpi.dtsi" -+#undef i2c0 -+#include "bcm283x-rpi-led-deprecated.dtsi" -+//#include "bcm283x-rpi-usb-peripheral.dtsi" -+ -+/ { -+ compatible = "raspberrypi,4-compute-module", "brcm,bcm2711"; -+ model = "Raspberry Pi Compute Module 4"; -+ -+ chosen { -+ /* 8250 auxiliary UART instead of pl011 */ -+ stdout-path = "serial1:115200n8"; -+ }; -+ -+ sd_io_1v8_reg: sd_io_1v8_reg { -+ compatible = "regulator-gpio"; -+ regulator-name = "vdd-sd-io"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-settling-time-us = <5000>; -+ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; -+ states = <1800000 0x1>, -+ <3300000 0x0>; -+ status = "okay"; -+ }; -+ -+ sd_vcc_reg: sd_vcc_reg { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-sd"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ enable-active-high; -+ gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>; -+ }; -+}; -+ -+&bt { -+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; -+}; -+ -+&ddc0 { -+ status = "okay"; -+}; -+ -+&ddc1 { -+ status = "okay"; -+}; -+ -+&expgpio { -+ gpio-line-names = "BT_ON", -+ "WL_ON", -+ "PWR_LED_OFF", -+ "ANT1", -+ "VDD_SD_IO_SEL", -+ "CAM_GPIO", -+ "SD_PWR_ON", -+ "ANT2"; -+ -+ ant1: ant1 { -+ gpio-hog; -+ gpios = <3 GPIO_ACTIVE_HIGH>; -+ output-high; -+ }; -+ -+ ant2: ant2 { -+ gpio-hog; -+ gpios = <7 GPIO_ACTIVE_HIGH>; -+ output-low; -+ }; -+}; -+ -+&gpio { -+ /* -+ * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and -+ * the official GPU firmware DT blob. -+ * -+ * Legend: -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "ID_SDA", -+ "ID_SCL", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "GPIO5", -+ "GPIO6", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "GPIO12", -+ "GPIO13", -+ /* Serial port */ -+ "TXD1", -+ "RXD1", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "RGMII_MDIO", -+ "RGMIO_MDC", -+ /* Used by BT module */ -+ "CTS0", -+ "RTS0", -+ "TXD0", -+ "RXD0", -+ /* Used by Wifi */ -+ "SD1_CLK", -+ "SD1_CMD", -+ "SD1_DATA0", -+ "SD1_DATA1", -+ "SD1_DATA2", -+ "SD1_DATA3", -+ /* Shared with SPI flash */ -+ "PWM0_MISO", -+ "PWM1_MOSI", -+ "STATUS_LED_G_CLK", -+ "SPIFLASH_CE_N", -+ "SDA0", -+ "SCL0", -+ "RGMII_RXCLK", -+ "RGMII_RXCTL", -+ "RGMII_RXD0", -+ "RGMII_RXD1", -+ "RGMII_RXD2", -+ "RGMII_RXD3", -+ "RGMII_TXCLK", -+ "RGMII_TXCTL", -+ "RGMII_TXD0", -+ "RGMII_TXD1", -+ "RGMII_TXD2", -+ "RGMII_TXD3"; -+}; -+ -+&hdmi0 { -+ status = "okay"; -+}; -+ -+&hdmi1 { -+ status = "okay"; -+}; -+ -+&led_act { -+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; -+}; -+ -+&leds { -+ led_pwr: led-pwr { -+ label = "PWR"; -+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; -+ default-state = "keep"; -+ linux,default-trigger = "default-on"; -+ }; -+}; -+ -+&pixelvalve0 { -+ status = "okay"; -+}; -+ -+&pixelvalve1 { -+ status = "okay"; -+}; -+ -+&pixelvalve2 { -+ status = "okay"; -+}; -+ -+&pixelvalve4 { -+ status = "okay"; -+}; -+ -+&pwm1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; -+ status = "okay"; -+}; -+ -+/* EMMC2 is used to drive the EMMC card */ -+&emmc2 { -+ bus-width = <8>; -+ vqmmc-supply = <&sd_io_1v8_reg>; -+ vmmc-supply = <&sd_vcc_reg>; -+ broken-cd; -+ status = "okay"; -+}; -+ -+&genet { -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-rxid"; -+ status = "okay"; -+}; -+ -+&genet_mdio { -+ phy1: ethernet-phy@0 { -+ /* No PHY interrupt */ -+ reg = <0x0>; -+ }; -+}; -+ -+&pcie0 { -+ pci@0,0 { -+ device_type = "pci"; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ ranges; -+ -+ reg = <0 0 0 0 0>; -+ }; -+}; -+ -+/* uart0 communicates with the BT module */ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; -+ uart-has-rtscts; -+}; -+ -+/* uart1 is mapped to the pin header */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_gpio14>; -+ status = "okay"; -+}; -+ -+&vc4 { -+ status = "okay"; -+}; -+ -+&vec { -+ status = "disabled"; -+}; -+ -+&wifi_pwrseq { -+ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; -+}; -+ -+// ============================================= -+// Downstream rpi- changes -+ -+#include "bcm271x-rpi-bt.dtsi" -+ -+/ { -+ soc { -+ /delete-node/ pixelvalve@7e807000; -+ /delete-node/ hdmi@7e902000; -+ }; -+}; -+ -+#include "bcm2711-rpi-ds.dtsi" -+#include "bcm283x-rpi-csi0-2lane.dtsi" -+#include "bcm283x-rpi-csi1-4lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_44.dtsi" -+ -+/ { -+ chosen { -+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0"; -+ }; -+ -+ /delete-node/ wifi-pwrseq; -+}; -+ -+&mmcnr { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio_pins>; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-0 = <&uart0_pins &bt_pins>; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-0 = <&uart1_pins>; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&gpio { -+ bt_pins: bt_pins { -+ brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0 -+ // to fool pinctrl -+ brcm,function = <0>; -+ brcm,pull = <2>; -+ }; -+ -+ uart0_pins: uart0_pins { -+ brcm,pins = <32 33>; -+ brcm,function = ; -+ brcm,pull = <0 2>; -+ }; -+ -+ uart1_pins: uart1_pins { -+ brcm,pins; -+ brcm,function; -+ brcm,pull; -+ }; -+ -+ uart1_bt_pins: uart1_bt_pins { -+ brcm,pins = <32 33 30 31>; -+ brcm,function = ; /* alt5=UART1 */ -+ brcm,pull = <0 2 2 0>; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+// ============================================= -+// Board specific stuff here -+ -+&pcie0 { -+ brcm,enable-l1ss; -+}; -+ -+&sdhost { -+ status = "disabled"; -+}; -+ -+&phy1 { -+ led-modes = <0x00 0x08>; /* link/activity link */ -+}; -+ -+&gpio { -+ audio_pins: audio_pins { -+ brcm,pins = <>; -+ brcm,function = <>; -+ }; -+}; -+ -+&led_act { -+ default-state = "off"; -+ linux,default-trigger = "mmc0"; -+}; -+ -+&led_pwr { -+ default-state = "off"; -+}; -+ -+&pwm1 { -+ status = "disabled"; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+cam0_reg: &cam1_reg { -+ gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>; -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ -+ pwr_led_gpio = <&led_pwr>,"gpios:4"; -+ pwr_led_activelow = <&led_pwr>,"gpios:8"; -+ pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; -+ -+ eth_led0 = <&phy1>,"led-modes:0"; -+ eth_led1 = <&phy1>,"led-modes:4"; -+ -+ ant1 = <&ant1>,"output-high?=on", -+ <&ant1>, "output-low?=off", -+ <&ant2>, "output-high?=off", -+ <&ant2>, "output-low?=on"; -+ ant2 = <&ant1>,"output-high?=off", -+ <&ant1>, "output-low?=on", -+ <&ant2>, "output-high?=on", -+ <&ant2>, "output-low?=off"; -+ noant = <&ant1>,"output-high?=off", -+ <&ant1>, "output-low?=on", -+ <&ant2>, "output-high?=off", -+ <&ant2>, "output-low?=on"; -+ -+ cam0_reg = <&cam0_reg>,"status"; -+ cam0_reg_gpio = <&cam0_reg>,"gpio:4", -+ <&cam0_reg>,"gpio:0=", <&gpio>; -+ cam1_reg = <&cam1_reg>,"status"; -+ cam1_reg_gpio = <&cam1_reg>,"gpio:4", -+ <&cam1_reg>,"gpio:0=", <&gpio>; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts -new file mode 100644 -index 000000000000..c51ba974adca ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts -@@ -0,0 +1,295 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/dts-v1/; -+#define BCM2711 -+#define i2c0 i2c0if -+#include "bcm2711.dtsi" -+//#include "bcm283x-rpi-wifi-bt.dtsi" -+#undef i2c0 -+#include "bcm270x.dtsi" -+#define i2c0 i2c0mux -+#include "bcm2711-rpi.dtsi" -+#undef i2c0 -+#include "bcm283x-rpi-led-deprecated.dtsi" -+ -+/ { -+ compatible = "raspberrypi,4-compute-module-s", "brcm,bcm2711"; -+ model = "Raspberry Pi Compute Module 4S"; -+}; -+ -+&ddc0 { -+ status = "okay"; -+}; -+ -+&gpio { -+ /* -+ * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and -+ * the official GPU firmware DT blob. -+ * -+ * Legend: -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "ID_SDA", -+ "ID_SCL", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "GPIO5", -+ "GPIO6", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "GPIO12", -+ "GPIO13", -+ /* Serial port */ -+ "TXD1", -+ "RXD1", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "GPIO28", -+ "GPIO29", -+ "GPIO30", -+ "GPIO31", -+ "GPIO32", -+ "GPIO33", -+ "GPIO34", -+ "GPIO35", -+ "GPIO36", -+ "GPIO37", -+ "GPIO38", -+ "GPIO39", -+ "PWM0_MISO", -+ "PWM1_MOSI", -+ "GPIO42", -+ "GPIO43", -+ "GPIO44", -+ "GPIO45"; -+}; -+ -+&hdmi0 { -+ status = "okay"; -+}; -+ -+&led_act { -+ gpios = <&virtgpio 0 GPIO_ACTIVE_HIGH>; -+}; -+ -+&pixelvalve0 { -+ status = "okay"; -+}; -+ -+&pixelvalve1 { -+ status = "okay"; -+}; -+ -+&pixelvalve2 { -+ status = "okay"; -+}; -+ -+&pixelvalve4 { -+ status = "okay"; -+}; -+ -+&pwm1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; -+ status = "okay"; -+}; -+ -+/* EMMC2 is used to drive the EMMC card */ -+&emmc2 { -+ bus-width = <8>; -+ broken-cd; -+ status = "okay"; -+}; -+ -+&pcie0 { -+ status = "disabled"; -+}; -+ -+&vchiq { -+ interrupts = ; -+}; -+ -+&vc4 { -+ status = "okay"; -+}; -+ -+&vec { -+ status = "disabled"; -+}; -+ -+// ============================================= -+// Downstream rpi- changes -+ -+#include "bcm2711-rpi-ds.dtsi" -+ -+/ { -+ soc { -+ /delete-node/ pixelvalve@7e807000; -+ /delete-node/ hdmi@7e902000; -+ -+ virtgpio: virtgpio { -+ compatible = "brcm,bcm2835-virtgpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ firmware = <&firmware>; -+ status = "okay"; -+ }; -+ }; -+}; -+ -+#include "bcm283x-rpi-csi0-2lane.dtsi" -+#include "bcm283x-rpi-csi1-4lane.dtsi" -+#include "bcm283x-rpi-i2c0mux_0_28.dtsi" -+ -+/ { -+ chosen { -+ bootargs = "coherent_pool=1M snd_bcm2835.enable_headphones=0"; -+ }; -+ -+ aliases { -+ serial0 = &uart0; -+ serial1 = &uart1; -+ /delete-property/ i2c20; -+ /delete-property/ i2c21; -+ }; -+ -+ /delete-node/ wifi-pwrseq; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_pins>; -+ status = "okay"; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&gpio { -+ uart0_pins: uart0_pins { -+ brcm,pins; -+ brcm,function; -+ brcm,pull; -+ }; -+}; -+ -+&i2c0if { -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+// ============================================= -+// Board specific stuff here -+ -+/* Enable USB in OTG-aware mode */ -+&usb { -+ compatible = "brcm,bcm2835-usb"; -+ dr_mode = "otg"; -+ g-np-tx-fifo-size = <32>; -+ g-rx-fifo-size = <558>; -+ g-tx-fifo-size = <512 512 512 512 512 256 256>; -+ status = "okay"; -+}; -+ -+&sdhost { -+ status = "disabled"; -+}; -+ -+&gpio { -+ audio_pins: audio_pins { -+ brcm,pins = <>; -+ brcm,function = <>; -+ }; -+}; -+ -+/* Permanently disable HDMI1 */ -+&hdmi1 { -+ compatible = "disabled"; -+}; -+ -+/* Permanently disable DDC1 */ -+&ddc1 { -+ compatible = "disabled"; -+}; -+ -+&led_act { -+ default-state = "off"; -+ linux,default-trigger = "mmc0"; -+}; -+ -+&pwm1 { -+ status = "disabled"; -+}; -+ -+&vchiq { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+&cam1_reg { -+ gpio = <&gpio 3 GPIO_ACTIVE_HIGH>; -+ status = "disabled"; -+}; -+ -+cam0_reg: &cam0_regulator { -+ gpio = <&gpio 31 GPIO_ACTIVE_HIGH>; -+ status = "disabled"; -+}; -+ -+/ { -+ __overrides__ { -+ audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; -+ -+ act_led_gpio = <&led_act>,"gpios:4"; -+ act_led_activelow = <&led_act>,"gpios:8"; -+ act_led_trigger = <&led_act>,"linux,default-trigger"; -+ -+ cam0_reg = <&cam0_reg>,"status"; -+ cam0_reg_gpio = <&cam0_reg>,"gpio:4"; -+ cam1_reg = <&cam1_reg>,"status"; -+ cam1_reg_gpio = <&cam1_reg>,"gpio:4"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi b/arch/arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi -new file mode 100644 -index 000000000000..968db6362989 ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi -@@ -0,0 +1,534 @@ -+// SPDX-License-Identifier: GPL-2.0 -+#include "bcm270x-rpi.dtsi" -+ -+/ { -+ chosen: chosen { -+ }; -+ -+ __overrides__ { -+ arm_freq; -+ eee = <&chosen>,"bootargs{on='',off='genet.eee=N'}"; -+ hdmi = <&hdmi0>,"status", -+ <&hdmi1>,"status"; -+ pcie = <&pcie0>,"status"; -+ sd = <&emmc2>,"status"; -+ -+ sd_poll_once = <&emmc2>, "non-removable?"; -+ spi_dma4 = <&spi0>, "dmas:0=", <&dma40>, -+ <&spi0>, "dmas:8=", <&dma40>; -+ i2s_dma4 = <&i2s>, "dmas:0=", <&dma40>, -+ <&i2s>, "dmas:8=", <&dma40>; -+ }; -+ -+ scb: scb { -+ /* Add a label */ -+ }; -+ -+ soc: soc { -+ /* Add a label */ -+ }; -+ -+ arm-pmu { -+ compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3", "arm,cortex-a7-pmu"; -+ -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ aliases { -+ uart2 = &uart2; -+ uart3 = &uart3; -+ uart4 = &uart4; -+ uart5 = &uart5; -+ serial0 = &uart1; -+ serial1 = &uart0; -+ serial2 = &uart2; -+ serial3 = &uart3; -+ serial4 = &uart4; -+ serial5 = &uart5; -+ mmc0 = &emmc2; -+ mmc1 = &mmcnr; -+ mmc2 = &sdhost; -+ i2c3 = &i2c3; -+ i2c4 = &i2c4; -+ i2c5 = &i2c5; -+ i2c6 = &i2c6; -+ i2c20 = &ddc0; -+ i2c21 = &ddc1; -+ spi3 = &spi3; -+ spi4 = &spi4; -+ spi5 = &spi5; -+ spi6 = &spi6; -+ /delete-property/ intc; -+ }; -+ -+ /* -+ * Add a node with a dma-ranges value that exists only to be found -+ * by of_dma_get_max_cpu_address, and hence limit the DMA zone. -+ */ -+ zone_dma { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ dma-ranges = <0x0 0x0 0x0 0x40000000>; -+ }; -+}; -+ -+&vc4 { -+ raspberrypi,firmware = <&firmware>; -+}; -+ -+&cma { -+ /* Limit cma to the lower 768MB to allow room for HIGHMEM on 32-bit */ -+ alloc-ranges = <0x0 0x00000000 0x30000000>; -+}; -+ -+&soc { -+ /* Add the physical <-> DMA mapping for the I/O space */ -+ dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>, -+ <0x7c000000 0x0 0xfc000000 0x03800000>; -+}; -+ -+&scb { -+ #size-cells = <2>; -+ -+ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x0 0x03800000>, -+ <0x0 0x40000000 0x0 0xff800000 0x0 0x00800000>, -+ <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>, -+ <0x0 0x00000000 0x0 0x00000000 0x0 0xfc000000>; -+ dma-ranges = <0x4 0x7c000000 0x0 0xfc000000 0x0 0x03800000>, -+ <0x0 0x00000000 0x0 0x00000000 0x4 0x00000000>; -+ -+ dma40: dma@7e007b00 { -+ compatible = "brcm,bcm2711-dma"; -+ reg = <0x0 0x7e007b00 0x0 0x400>; -+ interrupts = -+ , /* dma4 11 */ -+ , /* dma4 12 */ -+ , /* dma4 13 */ -+ ; /* dma4 14 */ -+ interrupt-names = "dma11", -+ "dma12", -+ "dma13", -+ "dma14"; -+ #dma-cells = <1>; -+ brcm,dma-channel-mask = <0x7800>; -+ }; -+ -+ xhci: xhci@7e9c0000 { -+ compatible = "generic-xhci"; -+ status = "disabled"; -+ reg = <0x0 0x7e9c0000 0x0 0x100000>; -+ interrupts = ; -+ power-domains = <&power RPI_POWER_DOMAIN_USB>; -+ }; -+ -+ codec@7eb10000 { -+ compatible = "raspberrypi,rpivid-vid-decoder"; -+ reg = <0x0 0x7eb10000 0x0 0x1000>, /* INTC */ -+ <0x0 0x7eb00000 0x0 0x10000>; /* HEVC */ -+ reg-names = "intc", -+ "hevc"; -+ interrupts = ; -+ -+ clocks = <&firmware_clocks 11>; -+ clock-names = "hevc"; -+ }; -+}; -+ -+&pcie0 { -+ reg = <0x0 0x7d500000 0x0 0x9310>; -+ ranges = <0x02000000 0x0 0xc0000000 0x6 0x00000000 -+ 0x0 0x40000000>; -+}; -+ -+&genet { -+ reg = <0x0 0x7d580000 0x0 0x10000>; -+}; -+ -+&dma40 { -+ /* The VPU firmware uses DMA channel 11 for VCHIQ */ -+ brcm,dma-channel-mask = <0x7000>; -+}; -+ -+&vchiq { -+ compatible = "brcm,bcm2711-vchiq"; -+}; -+ -+&firmwarekms { -+ compatible = "raspberrypi,rpi-firmware-kms-2711"; -+ interrupts = ; -+}; -+ -+&smi { -+ interrupts = ; -+}; -+ -+&mmc { -+ interrupts = ; -+}; -+ -+&mmcnr { -+ interrupts = ; -+}; -+ -+&csi0 { -+ interrupts = ; -+}; -+ -+&csi1 { -+ interrupts = ; -+}; -+ -+&random { -+ compatible = "brcm,bcm2711-rng200"; -+ status = "okay"; -+}; -+ -+&usb { -+ /* Enable the FIQ support */ -+ reg = <0x7e980000 0x10000>, -+ <0x7e00b200 0x200>; -+ interrupts = , -+ ; -+ status = "disabled"; -+}; -+ -+&gpio { -+ interrupts = , -+ ; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = ; -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = ; -+ }; -+ -+ spi3_pins: spi3_pins { -+ brcm,pins = <1 2 3>; -+ brcm,function = ; -+ }; -+ -+ spi3_cs_pins: spi3_cs_pins { -+ brcm,pins = <0 24>; -+ brcm,function = ; -+ }; -+ -+ spi4_pins: spi4_pins { -+ brcm,pins = <5 6 7>; -+ brcm,function = ; -+ }; -+ -+ spi4_cs_pins: spi4_cs_pins { -+ brcm,pins = <4 25>; -+ brcm,function = ; -+ }; -+ -+ spi5_pins: spi5_pins { -+ brcm,pins = <13 14 15>; -+ brcm,function = ; -+ }; -+ -+ spi5_cs_pins: spi5_cs_pins { -+ brcm,pins = <12 26>; -+ brcm,function = ; -+ }; -+ -+ spi6_pins: spi6_pins { -+ brcm,pins = <19 20 21>; -+ brcm,function = ; -+ }; -+ -+ spi6_cs_pins: spi6_cs_pins { -+ brcm,pins = <18 27>; -+ brcm,function = ; -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = ; -+ brcm,pull = ; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = ; -+ brcm,pull = ; -+ }; -+ -+ i2c3_pins: i2c3 { -+ brcm,pins = <4 5>; -+ brcm,function = ; -+ brcm,pull = ; -+ }; -+ -+ i2c4_pins: i2c4 { -+ brcm,pins = <8 9>; -+ brcm,function = ; -+ brcm,pull = ; -+ }; -+ -+ i2c5_pins: i2c5 { -+ brcm,pins = <12 13>; -+ brcm,function = ; -+ brcm,pull = ; -+ }; -+ -+ i2c6_pins: i2c6 { -+ brcm,pins = <22 23>; -+ brcm,function = ; -+ brcm,pull = ; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = ; -+ }; -+ -+ sdio_pins: sdio_pins { -+ brcm,pins = <34 35 36 37 38 39>; -+ brcm,function = ; // alt3 = SD1 -+ brcm,pull = <0 2 2 2 2 2>; -+ }; -+ -+ uart2_pins: uart2_pins { -+ brcm,pins = <0 1>; -+ brcm,function = ; -+ brcm,pull = <0 2>; -+ }; -+ -+ uart3_pins: uart3_pins { -+ brcm,pins = <4 5>; -+ brcm,function = ; -+ brcm,pull = <0 2>; -+ }; -+ -+ uart4_pins: uart4_pins { -+ brcm,pins = <8 9>; -+ brcm,function = ; -+ brcm,pull = <0 2>; -+ }; -+ -+ uart5_pins: uart5_pins { -+ brcm,pins = <12 13>; -+ brcm,function = ; -+ brcm,pull = <0 2>; -+ }; -+}; -+ -+&emmc2 { -+ mmc-ddr-3_3v; -+}; -+ -+&vc4 { -+ status = "disabled"; -+}; -+ -+&pixelvalve0 { -+ status = "disabled"; -+}; -+ -+&pixelvalve1 { -+ status = "disabled"; -+}; -+ -+&pixelvalve2 { -+ status = "disabled"; -+}; -+ -+&pixelvalve3 { -+ status = "disabled"; -+}; -+ -+&pixelvalve4 { -+ status = "disabled"; -+}; -+ -+&hdmi0 { -+ reg = <0x7ef00700 0x300>, -+ <0x7ef00300 0x200>, -+ <0x7ef00f00 0x80>, -+ <0x7ef00f80 0x80>, -+ <0x7ef01b00 0x200>, -+ <0x7ef01f00 0x400>, -+ <0x7ef00200 0x80>, -+ <0x7ef04300 0x100>, -+ <0x7ef20000 0x100>, -+ <0x7ef00100 0x30>; -+ reg-names = "hdmi", -+ "dvp", -+ "phy", -+ "rm", -+ "packet", -+ "metadata", -+ "csc", -+ "cec", -+ "hd", -+ "intr2"; -+ clocks = <&firmware_clocks 13>, -+ <&firmware_clocks 14>, -+ <&dvp 0>, -+ <&clk_27MHz>; -+ dmas = <&dma40 (10|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; -+ status = "disabled"; -+}; -+ -+&ddc0 { -+ status = "disabled"; -+}; -+ -+&hdmi1 { -+ reg = <0x7ef05700 0x300>, -+ <0x7ef05300 0x200>, -+ <0x7ef05f00 0x80>, -+ <0x7ef05f80 0x80>, -+ <0x7ef06b00 0x200>, -+ <0x7ef06f00 0x400>, -+ <0x7ef00280 0x80>, -+ <0x7ef09300 0x100>, -+ <0x7ef20000 0x100>, -+ <0x7ef00100 0x30>; -+ reg-names = "hdmi", -+ "dvp", -+ "phy", -+ "rm", -+ "packet", -+ "metadata", -+ "csc", -+ "cec", -+ "hd", -+ "intr2"; -+ clocks = <&firmware_clocks 13>, -+ <&firmware_clocks 14>, -+ <&dvp 1>, -+ <&clk_27MHz>; -+ dmas = <&dma40 (17|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; -+ status = "disabled"; -+}; -+ -+&ddc1 { -+ status = "disabled"; -+}; -+ -+&dvp { -+ status = "disabled"; -+}; -+ -+&vec { -+ clocks = <&firmware_clocks 15>; -+}; -+ -+&aon_intr { -+ interrupts = ; -+ status = "disabled"; -+}; -+ -+&system_timer { -+ status = "disabled"; -+}; -+ -+&i2c0 { -+ /delete-property/ compatible; -+ /delete-property/ interrupts; -+}; -+ -+&i2c0if { -+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -+ interrupts = ; -+}; -+ -+i2c_arm: &i2c1 {}; -+i2c_vc: &i2c0 {}; -+ -+&i2c3 { -+ pinctrl-0 = <&i2c3_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&i2c4 { -+ pinctrl-0 = <&i2c4_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&i2c5 { -+ pinctrl-0 = <&i2c5_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&i2c6 { -+ pinctrl-0 = <&i2c6_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&spi3 { -+ pinctrl-0 = <&spi3_pins &spi3_cs_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&spi4 { -+ pinctrl-0 = <&spi4_pins &spi4_cs_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&spi5 { -+ pinctrl-0 = <&spi5_pins &spi5_cs_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&spi6 { -+ pinctrl-0 = <&spi6_pins &spi6_cs_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&uart2 { -+ pinctrl-0 = <&uart2_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&uart3 { -+ pinctrl-0 = <&uart3_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&uart4 { -+ pinctrl-0 = <&uart4_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&uart5 { -+ pinctrl-0 = <&uart5_pins>; -+ pinctrl-names = "default"; -+}; -+ -+/delete-node/ &v3d; -+ -+/ { -+ v3dbus: v3dbus { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <2>; -+ ranges = <0x7c500000 0x0 0xfc500000 0x0 0x03300000>, -+ <0x40000000 0x0 0xff800000 0x0 0x00800000>; -+ dma-ranges = <0x00000000 0x0 0x00000000 0x4 0x00000000>; -+ -+ v3d: v3d@7ec04000 { -+ compatible = "brcm,2711-v3d"; -+ reg = -+ <0x7ec00000 0x0 0x4000>, -+ <0x7ec04000 0x0 0x4000>; -+ reg-names = "hub", "core0"; -+ -+ power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; -+ resets = <&pm BCM2835_RESET_V3D>; -+ clocks = <&firmware_clocks 5>; -+ clocks-names = "v3d"; -+ interrupts = ; -+ status = "disabled"; -+ }; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi -index 98817a6675b9..7b9e946db985 100644 ---- a/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi -+++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi -@@ -15,6 +15,7 @@ aliases { - ethernet0 = &genet; - pcie0 = &pcie0; - blconfig = &blconfig; -+ blpubkey = &blpubkey; - }; - }; - -@@ -67,6 +68,18 @@ blconfig: nvram@0 { - no-map; - status = "disabled"; - }; -+ /* -+ * RPi4 will copy the binary public key blob (if present) from the bootloader -+ * into memory for use by the OS. -+ */ -+ blpubkey: nvram@1 { -+ compatible = "raspberrypi,bootloader-public-key", "nvmem-rmem"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ reg = <0x0 0x0 0x0>; -+ no-map; -+ status = "disabled"; -+ }; - }; - - &v3d { -diff --git a/arch/arm/boot/dts/broadcom/bcm271x-rpi-bt.dtsi b/arch/arm/boot/dts/broadcom/bcm271x-rpi-bt.dtsi -new file mode 100644 -index 000000000000..400efdc5f03c ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm271x-rpi-bt.dtsi -@@ -0,0 +1,38 @@ -+// SPDX-License-Identifier: GPL-2.0 -+ -+&uart0 { -+ bt: bluetooth { -+ compatible = "brcm,bcm43438-bt"; -+ max-speed = <3000000>; -+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; -+ local-bd-address = [ 00 00 00 00 00 00 ]; -+ fallback-bd-address; // Don't override a valid address -+ status = "okay"; -+ }; -+}; -+ -+&uart1 { -+ minibt: bluetooth { -+ compatible = "brcm,bcm43438-bt"; -+ max-speed = <230400>; -+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; -+ local-bd-address = [ 00 00 00 00 00 00 ]; -+ fallback-bd-address; // Don't override a valid address -+ status = "disabled"; -+ }; -+}; -+ -+/ { -+ aliases { -+ bluetooth = &bt; -+ }; -+ -+ __overrides__ { -+ bdaddr = <&bt>,"local-bd-address[", -+ <&bt>,"fallback-bd-address?=0", -+ <&minibt>,"local-bd-address[", -+ <&minibt>,"fallback-bd-address?=0"; -+ krnbt = <&bt>,"status"; -+ krnbt_baudrate = <&bt>,"max-speed:0", <&minibt>,"max-speed:0"; -+ }; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi0-2lane.dtsi b/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi0-2lane.dtsi -new file mode 100644 -index 000000000000..6e4ce8622b47 ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi0-2lane.dtsi -@@ -0,0 +1,4 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+&csi0 { -+ brcm,num-data-lanes = <2>; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi b/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi -new file mode 100644 -index 000000000000..6938f4daacdc ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi -@@ -0,0 +1,4 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+&csi1 { -+ brcm,num-data-lanes = <2>; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-4lane.dtsi b/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-4lane.dtsi -new file mode 100644 -index 000000000000..b37037437bee ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-4lane.dtsi -@@ -0,0 +1,4 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+&csi1 { -+ brcm,num-data-lanes = <4>; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_28.dtsi b/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_28.dtsi -new file mode 100644 -index 000000000000..38f0074bce3f ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_28.dtsi -@@ -0,0 +1,4 @@ -+&i2c0mux { -+ pinctrl-0 = <&i2c0_gpio0>; -+ pinctrl-1 = <&i2c0_gpio28>; -+}; -diff --git a/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_44.dtsi b/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_44.dtsi -new file mode 100644 -index 000000000000..119946d878db ---- /dev/null -+++ b/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_44.dtsi -@@ -0,0 +1,4 @@ -+&i2c0mux { -+ pinctrl-0 = <&i2c0_gpio0>; -+ pinctrl-1 = <&i2c0_gpio44>; -+}; -diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile -new file mode 100644 -index 000000000000..b4fbefe77316 ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -0,0 +1,295 @@ -+# Overlays for the Raspberry Pi platform -+ -+dtb-$(CONFIG_ARCH_BCM2835) += overlay_map.dtb -+ -+dtbo-$(CONFIG_ARCH_BCM2835) += \ -+ act-led.dtbo \ -+ adafruit-st7735r.dtbo \ -+ adafruit18.dtbo \ -+ adau1977-adc.dtbo \ -+ adau7002-simple.dtbo \ -+ ads1015.dtbo \ -+ ads1115.dtbo \ -+ ads7846.dtbo \ -+ adv7282m.dtbo \ -+ adv728x-m.dtbo \ -+ akkordion-iqdacplus.dtbo \ -+ allo-boss-dac-pcm512x-audio.dtbo \ -+ allo-boss2-dac-audio.dtbo \ -+ allo-digione.dtbo \ -+ allo-katana-dac-audio.dtbo \ -+ allo-piano-dac-pcm512x-audio.dtbo \ -+ allo-piano-dac-plus-pcm512x-audio.dtbo \ -+ anyspi.dtbo \ -+ apds9960.dtbo \ -+ applepi-dac.dtbo \ -+ arducam-64mp.dtbo \ -+ arducam-pivariety.dtbo \ -+ at86rf233.dtbo \ -+ audioinjector-addons.dtbo \ -+ audioinjector-bare-i2s.dtbo \ -+ audioinjector-isolated-soundcard.dtbo \ -+ audioinjector-ultra.dtbo \ -+ audioinjector-wm8731-audio.dtbo \ -+ audiosense-pi.dtbo \ -+ audremap.dtbo \ -+ balena-fin.dtbo \ -+ camera-mux-2port.dtbo \ -+ camera-mux-4port.dtbo \ -+ cap1106.dtbo \ -+ chipdip-dac.dtbo \ -+ cirrus-wm5102.dtbo \ -+ cm-swap-i2c0.dtbo \ -+ cma.dtbo \ -+ crystalfontz-cfa050_pi_m.dtbo \ -+ cutiepi-panel.dtbo \ -+ dacberry400.dtbo \ -+ dht11.dtbo \ -+ dionaudio-kiwi.dtbo \ -+ dionaudio-loco.dtbo \ -+ dionaudio-loco-v2.dtbo \ -+ disable-bt.dtbo \ -+ disable-emmc2.dtbo \ -+ disable-wifi.dtbo \ -+ dpi18.dtbo \ -+ dpi18cpadhi.dtbo \ -+ dpi24.dtbo \ -+ draws.dtbo \ -+ dwc-otg.dtbo \ -+ dwc2.dtbo \ -+ edt-ft5406.dtbo \ -+ enc28j60.dtbo \ -+ enc28j60-spi2.dtbo \ -+ exc3000.dtbo \ -+ fbtft.dtbo \ -+ fe-pi-audio.dtbo \ -+ fsm-demo.dtbo \ -+ gc9a01.dtbo \ -+ ghost-amp.dtbo \ -+ goodix.dtbo \ -+ googlevoicehat-soundcard.dtbo \ -+ gpio-charger.dtbo \ -+ gpio-fan.dtbo \ -+ gpio-hog.dtbo \ -+ gpio-ir.dtbo \ -+ gpio-ir-tx.dtbo \ -+ gpio-key.dtbo \ -+ gpio-led.dtbo \ -+ gpio-no-bank0-irq.dtbo \ -+ gpio-no-irq.dtbo \ -+ gpio-poweroff.dtbo \ -+ gpio-shutdown.dtbo \ -+ hd44780-lcd.dtbo \ -+ hdmi-backlight-hwhack-gpio.dtbo \ -+ hifiberry-amp.dtbo \ -+ hifiberry-amp100.dtbo \ -+ hifiberry-amp3.dtbo \ -+ hifiberry-dac.dtbo \ -+ hifiberry-dacplus.dtbo \ -+ hifiberry-dacplusadc.dtbo \ -+ hifiberry-dacplusadcpro.dtbo \ -+ hifiberry-dacplusdsp.dtbo \ -+ hifiberry-dacplushd.dtbo \ -+ hifiberry-digi.dtbo \ -+ hifiberry-digi-pro.dtbo \ -+ highperi.dtbo \ -+ hy28a.dtbo \ -+ hy28b.dtbo \ -+ hy28b-2017.dtbo \ -+ i-sabre-q2m.dtbo \ -+ i2c-bcm2708.dtbo \ -+ i2c-fan.dtbo \ -+ i2c-gpio.dtbo \ -+ i2c-mux.dtbo \ -+ i2c-pwm-pca9685a.dtbo \ -+ i2c-rtc.dtbo \ -+ i2c-rtc-gpio.dtbo \ -+ i2c-sensor.dtbo \ -+ i2c0.dtbo \ -+ i2c1.dtbo \ -+ i2c3.dtbo \ -+ i2c4.dtbo \ -+ i2c5.dtbo \ -+ i2c6.dtbo \ -+ i2s-dac.dtbo \ -+ i2s-gpio28-31.dtbo \ -+ ilitek251x.dtbo \ -+ imx219.dtbo \ -+ imx258.dtbo \ -+ imx290.dtbo \ -+ imx296.dtbo \ -+ imx327.dtbo \ -+ imx378.dtbo \ -+ imx462.dtbo \ -+ imx477.dtbo \ -+ imx519.dtbo \ -+ imx708.dtbo \ -+ iqaudio-codec.dtbo \ -+ iqaudio-dac.dtbo \ -+ iqaudio-dacplus.dtbo \ -+ iqaudio-digi-wm8804-audio.dtbo \ -+ iqs550.dtbo \ -+ irs1125.dtbo \ -+ jedec-spi-nor.dtbo \ -+ justboom-both.dtbo \ -+ justboom-dac.dtbo \ -+ justboom-digi.dtbo \ -+ ltc294x.dtbo \ -+ max98357a.dtbo \ -+ maxtherm.dtbo \ -+ mbed-dac.dtbo \ -+ mcp23017.dtbo \ -+ mcp23s17.dtbo \ -+ mcp2515.dtbo \ -+ mcp2515-can0.dtbo \ -+ mcp2515-can1.dtbo \ -+ mcp251xfd.dtbo \ -+ mcp3008.dtbo \ -+ mcp3202.dtbo \ -+ mcp342x.dtbo \ -+ media-center.dtbo \ -+ merus-amp.dtbo \ -+ midi-uart0.dtbo \ -+ midi-uart1.dtbo \ -+ midi-uart2.dtbo \ -+ midi-uart3.dtbo \ -+ midi-uart4.dtbo \ -+ midi-uart5.dtbo \ -+ minipitft13.dtbo \ -+ miniuart-bt.dtbo \ -+ mipi-dbi-spi.dtbo \ -+ mlx90640.dtbo \ -+ mmc.dtbo \ -+ mpu6050.dtbo \ -+ mz61581.dtbo \ -+ ov2311.dtbo \ -+ ov5647.dtbo \ -+ ov7251.dtbo \ -+ ov9281.dtbo \ -+ papirus.dtbo \ -+ pca953x.dtbo \ -+ pcf857x.dtbo \ -+ pcie-32bit-dma.dtbo \ -+ pibell.dtbo \ -+ pifacedigital.dtbo \ -+ pifi-40.dtbo \ -+ pifi-dac-hd.dtbo \ -+ pifi-dac-zero.dtbo \ -+ pifi-mini-210.dtbo \ -+ piglow.dtbo \ -+ piscreen.dtbo \ -+ piscreen2r.dtbo \ -+ pisound.dtbo \ -+ pitft22.dtbo \ -+ pitft28-capacitive.dtbo \ -+ pitft28-resistive.dtbo \ -+ pitft35-resistive.dtbo \ -+ pps-gpio.dtbo \ -+ proto-codec.dtbo \ -+ pwm.dtbo \ -+ pwm-2chan.dtbo \ -+ pwm-ir-tx.dtbo \ -+ pwm1.dtbo \ -+ qca7000.dtbo \ -+ qca7000-uart0.dtbo \ -+ ramoops.dtbo \ -+ ramoops-pi4.dtbo \ -+ rotary-encoder.dtbo \ -+ rpi-backlight.dtbo \ -+ rpi-codeczero.dtbo \ -+ rpi-dacplus.dtbo \ -+ rpi-dacpro.dtbo \ -+ rpi-digiampplus.dtbo \ -+ rpi-ft5406.dtbo \ -+ rpi-poe.dtbo \ -+ rpi-poe-plus.dtbo \ -+ rpi-sense.dtbo \ -+ rpi-sense-v2.dtbo \ -+ rpi-tv.dtbo \ -+ rra-digidac1-wm8741-audio.dtbo \ -+ sainsmart18.dtbo \ -+ sc16is750-i2c.dtbo \ -+ sc16is752-i2c.dtbo \ -+ sc16is752-spi0.dtbo \ -+ sc16is752-spi1.dtbo \ -+ sdhost.dtbo \ -+ sdio.dtbo \ -+ seeed-can-fd-hat-v1.dtbo \ -+ seeed-can-fd-hat-v2.dtbo \ -+ sh1106-spi.dtbo \ -+ si446x-spi0.dtbo \ -+ smi.dtbo \ -+ smi-dev.dtbo \ -+ smi-nand.dtbo \ -+ spi-gpio35-39.dtbo \ -+ spi-gpio40-45.dtbo \ -+ spi-rtc.dtbo \ -+ spi0-0cs.dtbo \ -+ spi0-1cs.dtbo \ -+ spi0-2cs.dtbo \ -+ spi1-1cs.dtbo \ -+ spi1-2cs.dtbo \ -+ spi1-3cs.dtbo \ -+ spi2-1cs.dtbo \ -+ spi2-2cs.dtbo \ -+ spi2-3cs.dtbo \ -+ spi3-1cs.dtbo \ -+ spi3-2cs.dtbo \ -+ spi4-1cs.dtbo \ -+ spi4-2cs.dtbo \ -+ spi5-1cs.dtbo \ -+ spi5-2cs.dtbo \ -+ spi6-1cs.dtbo \ -+ spi6-2cs.dtbo \ -+ ssd1306.dtbo \ -+ ssd1306-spi.dtbo \ -+ ssd1331-spi.dtbo \ -+ ssd1351-spi.dtbo \ -+ superaudioboard.dtbo \ -+ sx150x.dtbo \ -+ tc358743.dtbo \ -+ tc358743-audio.dtbo \ -+ tinylcd35.dtbo \ -+ tpm-slb9670.dtbo \ -+ tpm-slb9673.dtbo \ -+ uart0.dtbo \ -+ uart1.dtbo \ -+ uart2.dtbo \ -+ uart3.dtbo \ -+ uart4.dtbo \ -+ uart5.dtbo \ -+ udrc.dtbo \ -+ ugreen-dabboard.dtbo \ -+ upstream.dtbo \ -+ upstream-pi4.dtbo \ -+ vc4-fkms-v3d.dtbo \ -+ vc4-fkms-v3d-pi4.dtbo \ -+ vc4-kms-dpi-generic.dtbo \ -+ vc4-kms-dpi-hyperpixel2r.dtbo \ -+ vc4-kms-dpi-hyperpixel4.dtbo \ -+ vc4-kms-dpi-hyperpixel4sq.dtbo \ -+ vc4-kms-dpi-panel.dtbo \ -+ vc4-kms-dsi-7inch.dtbo \ -+ vc4-kms-dsi-lt070me05000.dtbo \ -+ vc4-kms-dsi-lt070me05000-v2.dtbo \ -+ vc4-kms-dsi-waveshare-panel.dtbo \ -+ vc4-kms-kippah-7inch.dtbo \ -+ vc4-kms-v3d.dtbo \ -+ vc4-kms-v3d-pi4.dtbo \ -+ vc4-kms-vga666.dtbo \ -+ vga666.dtbo \ -+ vl805.dtbo \ -+ w1-gpio.dtbo \ -+ w1-gpio-pullup.dtbo \ -+ w5500.dtbo \ -+ watterott-display.dtbo \ -+ waveshare-can-fd-hat-mode-a.dtbo \ -+ waveshare-can-fd-hat-mode-b.dtbo \ -+ wittypi.dtbo \ -+ wm8960-soundcard.dtbo -+ -+targets += dtbs dtbs_install -+targets += $(dtbo-y) -+ -+always-y := $(dtbo-y) -+clean-files := *.dtbo -diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README -new file mode 100644 -index 000000000000..1b6fe60d00e7 ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/README -@@ -0,0 +1,4779 @@ -+Introduction -+============ -+ -+This directory contains Device Tree overlays. Device Tree makes it possible -+to support many hardware configurations with a single kernel and without the -+need to explicitly load or blacklist kernel modules. Note that this isn't a -+"pure" Device Tree configuration (c.f. MACH_BCM2835) - some on-board devices -+are still configured by the board support code, but the intention is to -+eventually reach that goal. -+ -+On Raspberry Pi, Device Tree usage is controlled from /boot/config.txt. By -+default, the Raspberry Pi kernel boots with device tree enabled. You can -+completely disable DT usage (for now) by adding: -+ -+ device_tree= -+ -+to your config.txt, which should cause your Pi to revert to the old way of -+doing things after a reboot. -+ -+In /boot you will find a .dtb for each base platform. This describes the -+hardware that is part of the Raspberry Pi board. The loader (start.elf and its -+siblings) selects the .dtb file appropriate for the platform by name, and reads -+it into memory. At this point, all of the optional interfaces (i2c, i2s, spi) -+are disabled, but they can be enabled using Device Tree parameters: -+ -+ dtparam=i2c=on,i2s=on,spi=on -+ -+However, this shouldn't be necessary in many use cases because loading an -+overlay that requires one of those interfaces will cause it to be enabled -+automatically, and it is advisable to only enable interfaces if they are -+needed. -+ -+Configuring additional, optional hardware is done using Device Tree overlays -+(see below). -+ -+GPIO numbering uses the hardware pin numbering scheme (aka BCM scheme) and -+not the physical pin numbers. -+ -+raspi-config -+============ -+ -+The Advanced Options section of the raspi-config utility can enable and disable -+Device Tree use, as well as toggling the I2C and SPI interfaces. Note that it -+is possible to both enable an interface and blacklist the driver, if for some -+reason you should want to defer the loading. -+ -+Modules -+======= -+ -+As well as describing the hardware, Device Tree also gives enough information -+to allow suitable driver modules to be located and loaded, with the corollary -+that unneeded modules are not loaded. As a result it should be possible to -+remove lines from /etc/modules, and /etc/modprobe.d/raspi-blacklist.conf can -+have its contents deleted (or commented out). -+ -+Using Overlays -+============== -+ -+Overlays are loaded using the "dtoverlay" config.txt setting. As an example, -+consider I2C Real Time Clock drivers. In the pre-DT world these would be loaded -+by writing a magic string comprising a device identifier and an I2C address to -+a special file in /sys/class/i2c-adapter, having first loaded the driver for -+the I2C interface and the RTC device - something like this: -+ -+ modprobe i2c-bcm2835 -+ modprobe rtc-ds1307 -+ echo ds1307 0x68 > /sys/class/i2c-adapter/i2c-1/new_device -+ -+With DT enabled, this becomes a line in config.txt: -+ -+ dtoverlay=i2c-rtc,ds1307 -+ -+This causes the file /boot/overlays/i2c-rtc.dtbo to be loaded and a "node" -+describing the DS1307 I2C device to be added to the Device Tree for the Pi. By -+default it usees address 0x68, but this can be modified with an additional DT -+parameter: -+ -+ dtoverlay=i2c-rtc,ds1307,addr=0x68 -+ -+Parameters usually have default values, although certain parameters are -+mandatory. See the list of overlays below for a description of the parameters -+and their defaults. -+ -+Making new Overlays based on existing Overlays -+============================================== -+ -+Recent overlays have been designed in a more general way, so that they can be -+adapted to hardware by changing their parameters. When you have additional -+hardware with more than one device of a kind, you end up using the same overlay -+multiple times with other parameters, e.g. -+ -+ # 2 CAN FD interfaces on spi but with different pins -+ dtoverlay=mcp251xfd,spi0-0,interrupt=25 -+ dtoverlay=mcp251xfd,spi0-1,interrupt=24 -+ -+ # a realtime clock on i2c -+ dtoverlay=i2c-rtc,pcf85063 -+ -+While this approach does work, it requires knowledge about the hardware design. -+It is more feasible to simplify things for the end user by providing a single -+overlay as it is done the traditional way. -+ -+A new overlay can be generated by using ovmerge utility. -+https://github.com/raspberrypi/utils/blob/master/ovmerge/ovmerge -+ -+To generate an overlay for the above configuration we pass the configuration -+to ovmerge and add the -c flag. -+ -+ ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 \ -+ mcp251xfd-overlay.dts,spi0-1,interrupt=24 \ -+ i2c-rtc-overlay.dts,pcf85063 \ -+ >> merged-overlay.dts -+ -+The -c option writes the command above as a comment into the overlay as -+a marker that this overlay is generated and how it was generated. -+After compiling the overlay it can be loaded in a single line. -+ -+ dtoverlay=merged -+ -+It does the same as the original configuration but without parameters. -+ -+The Overlay and Parameter Reference -+=================================== -+ -+N.B. When editing this file, please preserve the indentation levels to make it -+simple to parse programmatically. NO HARD TABS. -+ -+ -+Name: -+Info: Configures the base Raspberry Pi hardware -+Load: -+Params: -+ ant1 Select antenna 1 (default). CM4 only. -+ -+ ant2 Select antenna 2. CM4 only. -+ -+ noant Disable both antennas. CM4 only. -+ -+ audio Set to "on" to enable the onboard ALSA audio -+ interface (default "off") -+ -+ axiperf Set to "on" to enable the AXI bus performance -+ monitors. -+ See /sys/kernel/debug/raspberrypi_axi_monitor -+ for the results. -+ -+ bdaddr Set an alternative Bluetooth address (BDADDR). -+ The value should be a 6-byte hexadecimal value, -+ with or without colon separators, written least- -+ significant-byte first. For example, -+ bdaddr=06:05:04:03:02:01 -+ will set the BDADDR to 01:02:03:04:05:06. -+ -+ cam0_reg Enables CAM 0 regulator. -+ Only required on CM1 & 3. -+ -+ cam0_reg_gpio Set GPIO for CAM 0 regulator. -+ Default 31 on CM1, 3, and 4S. -+ Default of GPIO expander 5 on CM4, but override -+ switches to normal GPIO. -+ -+ cam1_reg Enables CAM 1 regulator. -+ Only required on CM1 & 3. -+ -+ cam1_reg_gpio Set GPIO for CAM 1 regulator. -+ Default 3 on CM1, 3, and 4S. -+ Default of GPIO expander 5 on CM4, but override -+ switches to normal GPIO. -+ -+ eee Enable Energy Efficient Ethernet support for -+ compatible devices (default "on"). See also -+ "tx_lpi_timer". Pi3B+ only. -+ -+ eth_downshift_after Set the number of auto-negotiation failures -+ after which the 1000Mbps modes are disabled. -+ Legal values are 2, 3, 4, 5 and 0, where -+ 0 means never downshift (default 2). Pi3B+ only. -+ -+ eth_led0 Set mode of LED0 - amber on Pi3B+ (default "1"), -+ green on Pi4 (default "0"). -+ The legal values are: -+ -+ Pi3B+ -+ -+ 0=link/activity 1=link1000/activity -+ 2=link100/activity 3=link10/activity -+ 4=link100/1000/activity 5=link10/1000/activity -+ 6=link10/100/activity 14=off 15=on -+ -+ Pi4 -+ -+ 0=Speed/Activity 1=Speed -+ 2=Flash activity 3=FDX -+ 4=Off 5=On -+ 6=Alt 7=Speed/Flash -+ 8=Link 9=Activity -+ -+ eth_led1 Set mode of LED1 - green on Pi3B+ (default "6"), -+ amber on Pi4 (default "8"). See eth_led0 for -+ legal values. -+ -+ eth_max_speed Set the maximum speed a link is allowed -+ to negotiate. Legal values are 10, 100 and -+ 1000 (default 1000). Pi3B+ only. -+ -+ hdmi Set to "off" to disable the HDMI interface -+ (default "on") -+ -+ i2c_arm Set to "on" to enable the ARM's i2c interface -+ (default "off") -+ -+ i2c_vc Set to "on" to enable the i2c interface -+ usually reserved for the VideoCore processor -+ (default "off") -+ -+ i2c An alias for i2c_arm -+ -+ i2c_arm_baudrate Set the baudrate of the ARM's i2c interface -+ (default "100000") -+ -+ i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface -+ (default "100000") -+ -+ i2c_baudrate An alias for i2c_arm_baudrate -+ -+ i2s Set to "on" to enable the i2s interface -+ (default "off") -+ -+ i2s_dma4 Use to enable 40-bit DMA on the i2s interface -+ (the assigned value doesn't matter) -+ (2711 only) -+ -+ krnbt Set to "off" to disable autoprobing of Bluetooth -+ driver without need of hciattach/btattach -+ (default "on") -+ -+ krnbt_baudrate Set the baudrate of the PL011 UART when used -+ with krnbt=on -+ -+ pcie Set to "off" to disable the PCIe interface -+ (default "on") -+ (2711 only, but not applicable on CM4S) -+ N.B. USB-A ports on 4B are subsequently disabled -+ -+ spi Set to "on" to enable the spi interfaces -+ (default "off") -+ -+ spi_dma4 Use to enable 40-bit DMA on spi interfaces -+ (the assigned value doesn't matter) -+ (2711 only) -+ -+ random Set to "on" to enable the hardware random -+ number generator (default "on") -+ -+ sd Set to "off" to disable the SD card (or eMMC on -+ non-lite SKU of CM4). -+ (default "on") -+ -+ sd_overclock Clock (in MHz) to use when the MMC framework -+ requests 50MHz -+ -+ sd_poll_once Looks for a card once after booting. Useful -+ for network booting scenarios to avoid the -+ overhead of continuous polling. N.B. Using -+ this option restricts the system to using a -+ single card per boot (or none at all). -+ (default off) -+ -+ sd_force_pio Disable DMA support for SD driver (default off) -+ -+ sd_pio_limit Number of blocks above which to use DMA for -+ SD card (default 1) -+ -+ sd_debug Enable debug output from SD driver (default off) -+ -+ sdio_overclock Clock (in MHz) to use when the MMC framework -+ requests 50MHz for the SDIO/WLAN interface. -+ -+ tx_lpi_timer Set the delay in microseconds between going idle -+ and entering the low power state (default 600). -+ Requires EEE to be enabled - see "eee". -+ -+ uart0 Set to "off" to disable uart0 (default "on") -+ -+ uart1 Set to "on" or "off" to enable or disable uart1 -+ (default varies) -+ -+ watchdog Set to "on" to enable the hardware watchdog -+ (default "off") -+ -+ act_led_trigger Choose which activity the LED tracks. -+ Use "heartbeat" for a nice load indicator. -+ (default "mmc") -+ -+ act_led_activelow Set to "on" to invert the sense of the LED -+ (default "off") -+ N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led -+ overlay. -+ -+ act_led_gpio Set which GPIO to use for the activity LED -+ (in case you want to connect it to an external -+ device) -+ (default "16" on a non-Plus board, "47" on a -+ Plus or Pi 2) -+ N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led -+ overlay. -+ -+ pwr_led_trigger -+ pwr_led_activelow -+ pwr_led_gpio -+ As for act_led_*, but using the PWR LED. -+ Not available on Model A/B boards. -+ -+ N.B. It is recommended to only enable those interfaces that are needed. -+ Leaving all interfaces enabled can lead to unwanted behaviour (i2c_vc -+ interfering with Pi Camera, I2S and SPI hogging GPIO pins, etc.) -+ Note also that i2c, i2c_arm and i2c_vc are aliases for the physical -+ interfaces i2c0 and i2c1. Use of the numeric variants is still possible -+ but deprecated because the ARM/VC assignments differ between board -+ revisions. The same board-specific mapping applies to i2c_baudrate, -+ and the other i2c baudrate parameters. -+ -+ -+Name: act-led -+Info: Pi 3B, 3B+, 3A+ and 4B use a GPIO expander to drive the LEDs which can -+ only be accessed from the VPU. There is a special driver for this with a -+ separate DT node, which has the unfortunate consequence of breaking the -+ act_led_gpio and act_led_activelow dtparams. -+ This overlay changes the GPIO controller back to the standard one and -+ restores the dtparams. -+Load: dtoverlay=act-led,= -+Params: activelow Set to "on" to invert the sense of the LED -+ (default "off") -+ -+ gpio Set which GPIO to use for the activity LED -+ (in case you want to connect it to an external -+ device) -+ REQUIRED -+ -+ -+Name: adafruit-st7735r -+Info: Overlay for the SPI-connected Adafruit 1.8" 160x128 or 128x128 displays, -+ based on the ST7735R chip. -+ This overlay uses the newer DRM/KMS "Tiny" driver. -+Load: dtoverlay=adafruit-st7735r,= -+Params: 128x128 Select the 128x128 driver (default 160x128) -+ rotate Display rotation {0,90,180,270} (default 90) -+ speed SPI bus speed in Hz (default 4000000) -+ dc_pin GPIO pin for D/C (default 24) -+ reset_pin GPIO pin for RESET (default 25) -+ led_pin GPIO used to control backlight (default 18) -+ -+ -+Name: adafruit18 -+Info: Overlay for the SPI-connected Adafruit 1.8" display (based on the -+ ST7735R chip). It includes support for the "green tab" version. -+ This overlay uses the older fbtft driver. -+Load: dtoverlay=adafruit18,= -+Params: green Use the adafruit18_green variant. -+ rotate Display rotation {0,90,180,270} -+ speed SPI bus speed in Hz (default 4000000) -+ fps Display frame rate in Hz -+ bgr Enable BGR mode (default off) -+ debug Debug output level {0-7} -+ dc_pin GPIO pin for D/C (default 24) -+ reset_pin GPIO pin for RESET (default 25) -+ led_pin GPIO used to control backlight (default 18) -+ -+ -+Name: adau1977-adc -+Info: Overlay for activation of ADAU1977 ADC codec over I2C for control -+ and I2S for data. -+Load: dtoverlay=adau1977-adc -+Params: -+ -+ -+Name: adau7002-simple -+Info: Overlay for the activation of ADAU7002 stereo PDM to I2S converter. -+Load: dtoverlay=adau7002-simple,= -+Params: card-name Override the default, "adau7002", card name. -+ -+ -+Name: ads1015 -+Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C -+Load: dtoverlay=ads1015,= -+Params: addr I2C bus address of device. Set based on how the -+ addr pin is wired. (default=0x48 assumes addr -+ is pulled to GND) -+ cha_enable Enable virtual channel a. (default=true) -+ cha_cfg Set the configuration for virtual channel a. -+ (default=4 configures this channel for the -+ voltage at A0 with respect to GND) -+ cha_datarate Set the datarate (samples/sec) for this channel. -+ (default=4 sets 1600 sps) -+ cha_gain Set the gain of the Programmable Gain -+ Amplifier for this channel. (default=2 sets the -+ full scale of the channel to 2.048 Volts) -+ -+ Channel (ch) parameters can be set for each enabled channel. -+ A maximum of 4 channels can be enabled (letters a thru d). -+ For more information refer to the device datasheet at: -+ http://www.ti.com/lit/ds/symlink/ads1015.pdf -+ -+ -+Name: ads1115 -+Info: Texas Instruments ADS1115 ADC -+Load: dtoverlay=ads1115,[=] -+Params: addr I2C bus address of device. Set based on how the -+ addr pin is wired. (default=0x48 assumes addr -+ is pulled to GND) -+ cha_enable Enable virtual channel a. -+ cha_cfg Set the configuration for virtual channel a. -+ (default=4 configures this channel for the -+ voltage at A0 with respect to GND) -+ cha_datarate Set the datarate (samples/sec) for this channel. -+ (default=7 sets 860 sps) -+ cha_gain Set the gain of the Programmable Gain -+ Amplifier for this channel. (Default 1 sets the -+ full scale of the channel to 4.096 Volts) -+ -+ Channel parameters can be set for each enabled channel. -+ A maximum of 4 channels can be enabled (letters a thru d). -+ For more information refer to the device datasheet at: -+ http://www.ti.com/lit/ds/symlink/ads1115.pdf -+ -+ -+Name: ads7846 -+Info: ADS7846 Touch controller -+Load: dtoverlay=ads7846,= -+Params: cs SPI bus Chip Select (default 1) -+ speed SPI bus speed (default 2MHz, max 3.25MHz) -+ penirq GPIO used for PENIRQ. REQUIRED -+ penirq_pull Set GPIO pull (default 0=none, 2=pullup) -+ swapxy Swap x and y axis -+ xmin Minimum value on the X axis (default 0) -+ ymin Minimum value on the Y axis (default 0) -+ xmax Maximum value on the X axis (default 4095) -+ ymax Maximum value on the Y axis (default 4095) -+ pmin Minimum reported pressure value (default 0) -+ pmax Maximum reported pressure value (default 65535) -+ xohms Touchpanel sensitivity (X-plate resistance) -+ (default 400) -+ -+ penirq is required and usually xohms (60-100) has to be set as well. -+ Apart from that, pmax (255) and swapxy are also common. -+ The rest of the calibration can be done with xinput-calibrator. -+ See: github.com/notro/fbtft/wiki/FBTFT-on-Raspian -+ Device Tree binding document: -+ www.kernel.org/doc/Documentation/devicetree/bindings/input/ads7846.txt -+ -+ -+Name: adv7282m -+Info: Analog Devices ADV7282M analogue video to CSI2 bridge. -+ Uses Unicam1, which is the standard camera connector on most Pi -+ variants. -+Load: dtoverlay=adv7282m,= -+Params: addr Overrides the I2C address (default 0x21) -+ media-controller Configure use of Media Controller API for -+ configuring the sensor (default off) -+ -+ -+Name: adv728x-m -+Info: Analog Devices ADV728[0|1|2]-M analogue video to CSI2 bridges. -+ This is a wrapper for adv7282m, and defaults to ADV7282M. -+Load: dtoverlay=adv728x-m,= -+Params: addr Overrides the I2C address (default 0x21) -+ adv7280m Select ADV7280-M. -+ adv7281m Select ADV7281-M. -+ adv7281ma Select ADV7281-MA. -+ media-controller Configure use of Media Controller API for -+ configuring the sensor (default off) -+ -+ -+Name: akkordion-iqdacplus -+Info: Configures the Digital Dreamtime Akkordion Music Player (based on the -+ OEM IQAudIO DAC+ or DAC Zero module). -+Load: dtoverlay=akkordion-iqdacplus,= -+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec -+ Digital volume control. Enable with -+ dtoverlay=akkordion-iqdacplus,24db_digital_gain -+ (The default behaviour is that the Digital -+ volume control is limited to a maximum of -+ 0dB. ie. it can attenuate but not provide -+ gain. For most users, this will be desired -+ as it will prevent clipping. By appending -+ the 24db_digital_gain parameter, the Digital -+ volume control will allow up to 24dB of -+ gain. If this parameter is enabled, it is the -+ responsibility of the user to ensure that -+ the Digital volume control is set to a value -+ that does not result in clipping/distortion!) -+ -+ -+Name: allo-boss-dac-pcm512x-audio -+Info: Configures the Allo Boss DAC audio cards. -+Load: dtoverlay=allo-boss-dac-pcm512x-audio, -+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec -+ Digital volume control. Enable with -+ "dtoverlay=allo-boss-dac-pcm512x-audio, -+ 24db_digital_gain" -+ (The default behaviour is that the Digital -+ volume control is limited to a maximum of -+ 0dB. ie. it can attenuate but not provide -+ gain. For most users, this will be desired -+ as it will prevent clipping. By appending -+ the 24db_digital_gain parameter, the Digital -+ volume control will allow up to 24dB of -+ gain. If this parameter is enabled, it is the -+ responsibility of the user to ensure that -+ the Digital volume control is set to a value -+ that does not result in clipping/distortion!) -+ slave Force Boss DAC into slave mode, using Pi a -+ master for bit clock and frame clock. Enable -+ with "dtoverlay=allo-boss-dac-pcm512x-audio, -+ slave" -+ -+ -+Name: allo-boss2-dac-audio -+Info: Configures the Allo Boss2 DAC audio card -+Load: dtoverlay=allo-boss2-dac-audio -+Params: -+ -+ -+Name: allo-digione -+Info: Configures the Allo Digione audio card -+Load: dtoverlay=allo-digione -+Params: -+ -+ -+Name: allo-katana-dac-audio -+Info: Configures the Allo Katana DAC audio card -+Load: dtoverlay=allo-katana-dac-audio -+Params: -+ -+ -+Name: allo-piano-dac-pcm512x-audio -+Info: Configures the Allo Piano DAC (2.0/2.1) audio cards. -+ (NB. This initial support is for 2.0 channel audio ONLY! ie. stereo. -+ The subwoofer outputs on the Piano 2.1 are not currently supported!) -+Load: dtoverlay=allo-piano-dac-pcm512x-audio, -+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec -+ Digital volume control. -+ (The default behaviour is that the Digital -+ volume control is limited to a maximum of -+ 0dB. ie. it can attenuate but not provide -+ gain. For most users, this will be desired -+ as it will prevent clipping. By appending -+ the 24db_digital_gain parameter, the Digital -+ volume control will allow up to 24dB of -+ gain. If this parameter is enabled, it is the -+ responsibility of the user to ensure that -+ the Digital volume control is set to a value -+ that does not result in clipping/distortion!) -+ -+ -+Name: allo-piano-dac-plus-pcm512x-audio -+Info: Configures the Allo Piano DAC (2.1) audio cards. -+Load: dtoverlay=allo-piano-dac-plus-pcm512x-audio, -+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec -+ Digital volume control. -+ (The default behaviour is that the Digital -+ volume control is limited to a maximum of -+ 0dB. ie. it can attenuate but not provide -+ gain. For most users, this will be desired -+ as it will prevent clipping. By appending -+ the 24db_digital_gain parameter, the Digital -+ volume control will allow up to 24dB of -+ gain. If this parameter is enabled, it is the -+ responsibility of the user to ensure that -+ the Digital volume control is set to a value -+ that does not result in clipping/distortion!) -+ glb_mclk This option is only with Kali board. If enabled, -+ MCLK for Kali is used and PLL is disabled for -+ better voice quality. (default Off) -+ -+ -+Name: anyspi -+Info: Universal device tree overlay for SPI devices -+ -+ Just specify the SPI address and device name ("compatible" property). -+ This overlay lacks any device-specific parameter support! -+ -+ For devices on spi1 or spi2, the interfaces should be enabled -+ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays. -+ -+ Examples: -+ 1. SPI NOR flash on spi0.1, maximum SPI clock frequency 45MHz: -+ dtoverlay=anyspi:spi0-1,dev="jedec,spi-nor",speed=45000000 -+ 2. MCP3204 ADC on spi1.2, maximum SPI clock frequency 500kHz: -+ dtoverlay=anyspi:spi1-2,dev="microchip,mcp3204" -+Load: dtoverlay=anyspi,= -+Params: spi- Configure device at spi, cs -+ (boolean, required) -+ dev Set device name to search compatible module -+ (string, required) -+ speed Set SPI clock frequency in Hz -+ (integer, optional, default 500000) -+ -+ -+Name: apds9960 -+Info: Configures the AVAGO APDS9960 digital proximity, ambient light, RGB and -+ gesture sensor -+Load: dtoverlay=apds9960,= -+Params: gpiopin GPIO used for INT (default 4) -+ noints Disable the interrupt GPIO line. -+ -+ -+Name: applepi-dac -+Info: Configures the Orchard Audio ApplePi-DAC audio card -+Load: dtoverlay=applepi-dac -+Params: -+ -+ -+Name: arducam-64mp -+Info: Arducam 64MP camera module. -+ Uses Unicam 1, which is the standard camera connector on most Pi -+ variants. -+Load: dtoverlay=arducam-64mp,= -+Params: rotation Mounting rotation of the camera sensor (0 or -+ 180, default 0) -+ orientation Sensor orientation (0 = front, 1 = rear, -+ 2 = external, default external) -+ media-controller Configure use of Media Controller API for -+ configuring the sensor (default on) -+ cam0 Adopt the default configuration for CAM0 on a -+ Compute Module (CSI0, i2c_vc, and cam0_reg). -+ vcm Select lens driver state. Default is enabled, -+ but vcm=off will disable. -+ -+ -+Name: arducam-pivariety -+Info: Arducam Pivariety camera module. -+ Uses Unicam 1, which is the standard camera connector on most Pi -+ variants. -+Load: dtoverlay=arducam-pivariety,= -+Params: rotation Mounting rotation of the camera sensor (0 or -+ 180, default 0) -+ orientation Sensor orientation (0 = front, 1 = rear, -+ 2 = external, default external) -+ media-controller Configure use of Media Controller API for -+ configuring the sensor (default on) -+ cam0 Adopt the default configuration for CAM0 on a -+ Compute Module (CSI0, i2c_vc, and cam0_reg). -+ -+ -+Name: at86rf233 -+Info: Configures the Atmel AT86RF233 802.15.4 low-power WPAN transceiver, -+ connected to spi0.0 -+Load: dtoverlay=at86rf233,= -+Params: interrupt GPIO used for INT (default 23) -+ reset GPIO used for Reset (default 24) -+ sleep GPIO used for Sleep (default 25) -+ speed SPI bus speed in Hz (default 3000000) -+ trim Fine tuning of the internal capacitance -+ arrays (0=+0pF, 15=+4.5pF, default 15) -+ -+ -+Name: audioinjector-addons -+Info: Configures the audioinjector.net audio add on soundcards -+Load: dtoverlay=audioinjector-addons,= -+Params: non-stop-clocks Keeps the clocks running even when the stream -+ is paused or stopped (default off) -+ -+ -+Name: audioinjector-bare-i2s -+Info: Configures the audioinjector.net audio bare i2s soundcard -+Load: dtoverlay=audioinjector-bare-i2s -+Params: -+ -+ -+Name: audioinjector-isolated-soundcard -+Info: Configures the audioinjector.net isolated soundcard -+Load: dtoverlay=audioinjector-isolated-soundcard -+Params: -+ -+ -+Name: audioinjector-ultra -+Info: Configures the audioinjector.net ultra soundcard -+Load: dtoverlay=audioinjector-ultra -+Params: -+ -+ -+Name: audioinjector-wm8731-audio -+Info: Configures the audioinjector.net audio add on soundcard -+Load: dtoverlay=audioinjector-wm8731-audio -+Params: -+ -+ -+Name: audiosense-pi -+Info: Configures the audiosense-pi add on soundcard -+ For more information refer to -+ https://gitlab.com/kakar0t/audiosense-pi -+Load: dtoverlay=audiosense-pi -+Params: -+ -+ -+Name: audremap -+Info: Switches PWM sound output to GPIOs on the 40-pin header -+Load: dtoverlay=audremap,= -+Params: swap_lr Reverse the channel allocation, which will also -+ swap the audio jack outputs (default off) -+ enable_jack Don't switch off the audio jack output. Does -+ nothing on BCM2711 (default off) -+ pins_12_13 Select GPIOs 12 & 13 (default) -+ pins_18_19 Select GPIOs 18 & 19 -+ pins_40_41 Select GPIOs 40 & 41 (not available on CM4, used -+ for other purposes) -+ pins_40_45 Select GPIOs 40 & 45 (don't use on BCM2711 - the -+ pins are on different controllers) -+ -+ -+Name: balena-fin -+Info: Overlay that enables WLAN, Bluetooth and the GPIO expander on the -+ balenaFin carrier board for the Raspberry Pi Compute Module 3/3+ Lite. -+Load: dtoverlay=balena-fin -+Params: -+ -+ -+Name: bmp085_i2c-sensor -+Info: This overlay is now deprecated - see i2c-sensor -+Load: -+ -+ -+Name: camera-mux-2port -+Info: Configures a 2 port camera multiplexer -+ Note that currently ALL IMX290 modules share a common clock, therefore -+ all modules will need to have the same clock frequency. -+Load: dtoverlay=camera-mux-2port,= -+Params: cam0-arducam-64mp Select Arducam64MP for camera on port 0 -+ cam0-imx219 Select IMX219 for camera on port 0 -+ cam0-imx258 Select IMX258 for camera on port 0 -+ cam0-imx290 Select IMX290 for camera on port 0 -+ cam0-imx477 Select IMX477 for camera on port 0 -+ cam0-imx519 Select IMX519 for camera on port 0 -+ cam0-imx708 Select IMX708 for camera on port 0 -+ cam0-ov2311 Select OV2311 for camera on port 0 -+ cam0-ov5647 Select OV5647 for camera on port 0 -+ cam0-ov7251 Select OV7251 for camera on port 0 -+ cam0-ov9281 Select OV9281 for camera on port 0 -+ cam0-imx290-clk-freq Set clock frequency for an IMX290 on port 0 -+ cam1-arducam-64mp Select Arducam64MP for camera on port 1 -+ cam1-imx219 Select IMX219 for camera on port 1 -+ cam1-imx258 Select IMX258 for camera on port 1 -+ cam1-imx290 Select IMX290 for camera on port 1 -+ cam1-imx477 Select IMX477 for camera on port 1 -+ cam1-imx519 Select IMX519 for camera on port 1 -+ cam1-imx708 Select IMX708 for camera on port 1 -+ cam1-ov2311 Select OV2311 for camera on port 1 -+ cam1-ov5647 Select OV5647 for camera on port 1 -+ cam1-ov7251 Select OV7251 for camera on port 1 -+ cam1-ov9281 Select OV9281 for camera on port 1 -+ cam1-imx290-clk-freq Set clock frequency for an IMX290 on port 1 -+ -+ -+Name: camera-mux-4port -+Info: Configures a 4 port camera multiplexer -+ Note that currently ALL IMX290 modules share a common clock, therefore -+ all modules will need to have the same clock frequency. -+Load: dtoverlay=camera-mux-4port,= -+Params: cam0-arducam-64mp Select Arducam64MP for camera on port 0 -+ cam0-imx219 Select IMX219 for camera on port 0 -+ cam0-imx258 Select IMX258 for camera on port 0 -+ cam0-imx290 Select IMX290 for camera on port 0 -+ cam0-imx477 Select IMX477 for camera on port 0 -+ cam0-imx519 Select IMX519 for camera on port 0 -+ cam0-imx708 Select IMX708 for camera on port 0 -+ cam0-ov2311 Select OV2311 for camera on port 0 -+ cam0-ov5647 Select OV5647 for camera on port 0 -+ cam0-ov7251 Select OV7251 for camera on port 0 -+ cam0-ov9281 Select OV9281 for camera on port 0 -+ cam0-imx290-clk-freq Set clock frequency for an IMX290 on port 0 -+ cam1-arducam-64mp Select Arducam64MP for camera on port 1 -+ cam1-imx219 Select IMX219 for camera on port 1 -+ cam1-imx258 Select IMX258 for camera on port 1 -+ cam1-imx290 Select IMX290 for camera on port 1 -+ cam1-imx477 Select IMX477 for camera on port 1 -+ cam1-imx519 Select IMX519 for camera on port 1 -+ cam1-imx708 Select IMX708 for camera on port 1 -+ cam1-ov2311 Select OV2311 for camera on port 1 -+ cam1-ov5647 Select OV5647 for camera on port 1 -+ cam1-ov7251 Select OV7251 for camera on port 1 -+ cam1-ov9281 Select OV9281 for camera on port 1 -+ cam1-imx290-clk-freq Set clock frequency for an IMX290 on port 1 -+ cam2-arducam-64mp Select Arducam64MP for camera on port 2 -+ cam2-imx219 Select IMX219 for camera on port 2 -+ cam2-imx258 Select IMX258 for camera on port 2 -+ cam2-imx290 Select IMX290 for camera on port 2 -+ cam2-imx477 Select IMX477 for camera on port 2 -+ cam2-imx519 Select IMX519 for camera on port 2 -+ cam2-imx708 Select IMX708 for camera on port 2 -+ cam2-ov2311 Select OV2311 for camera on port 2 -+ cam2-ov5647 Select OV5647 for camera on port 2 -+ cam2-ov7251 Select OV7251 for camera on port 2 -+ cam2-ov9281 Select OV9281 for camera on port 2 -+ cam2-imx290-clk-freq Set clock frequency for an IMX290 on port 2 -+ cam3-arducam-64mp Select Arducam64MP for camera on port 3 -+ cam3-imx219 Select IMX219 for camera on port 3 -+ cam3-imx258 Select IMX258 for camera on port 3 -+ cam3-imx290 Select IMX290 for camera on port 3 -+ cam3-imx477 Select IMX477 for camera on port 3 -+ cam3-imx519 Select IMX519 for camera on port 3 -+ cam3-imx708 Select IMX708 for camera on port 3 -+ cam3-ov2311 Select OV2311 for camera on port 3 -+ cam3-ov5647 Select OV5647 for camera on port 3 -+ cam3-ov7251 Select OV7251 for camera on port 3 -+ cam3-ov9281 Select OV9281 for camera on port 3 -+ cam3-imx290-clk-freq Set clock frequency for an IMX290 on port 3 -+ -+ -+Name: cap1106 -+Info: Enables the ability to use the cap1106 touch sensor as a keyboard -+Load: dtoverlay=cap1106,= -+Params: int_pin GPIO pin for interrupt signal (default 23) -+ -+ -+Name: chipdip-dac -+Info: Configures Chip Dip audio cards. -+Load: dtoverlay=chipdip-dac -+Params: -+ -+ -+Name: cirrus-wm5102 -+Info: Configures the Cirrus Logic Audio Card -+Load: dtoverlay=cirrus-wm5102 -+Params: -+ -+ -+Name: cm-swap-i2c0 -+Info: Largely for Compute Modules 1&3 where the original instructions for -+ adding a camera used GPIOs 0&1 for CAM1 and 28&29 for CAM0, whilst all -+ other platforms use 28&29 (or 44&45) for CAM1. -+ The default assignment through using this overlay is for -+ i2c0 to use 28&29, and i2c10 (aka i2c_csi_dsi) to use 28&29, but the -+ overrides allow this to be changed. -+Load: dtoverlay=cm-swap-i2c0,= -+Params: i2c0-gpio0 Use GPIOs 0&1 for i2c0 -+ i2c0-gpio28 Use GPIOs 28&29 for i2c0 (default) -+ i2c0-gpio44 Use GPIOs 44&45 for i2c0 -+ i2c10-gpio0 Use GPIOs 0&1 for i2c0 (default) -+ i2c10-gpio28 Use GPIOs 28&29 for i2c0 -+ i2c10-gpio44 Use GPIOs 44&45 for i2c0 -+ -+ -+Name: cma -+Info: Set custom CMA sizes, only use if you know what you are doing, might -+ clash with other overlays like vc4-fkms-v3d and vc4-kms-v3d. -+Load: dtoverlay=cma,= -+Params: cma-512 CMA is 512MB (needs 1GB) -+ cma-448 CMA is 448MB (needs 1GB) -+ cma-384 CMA is 384MB (needs 1GB) -+ cma-320 CMA is 320MB (needs 1GB) -+ cma-256 CMA is 256MB (needs 1GB) -+ cma-192 CMA is 192MB (needs 1GB) -+ cma-128 CMA is 128MB -+ cma-96 CMA is 96MB -+ cma-64 CMA is 64MB -+ cma-size CMA size in bytes, 4MB aligned -+ cma-default Use upstream's default value -+ -+ -+Name: crystalfontz-cfa050_pi_m -+Info: Configures the Crystalfontz CFA050-PI-M series of Raspberry Pi CM4 -+ based modules using the CFA7201280A0_050Tx 7" TFT LCD displays, -+ with or without capacitive touch screen. -+ Requires use of vc4-kms-v3d. -+Load: dtoverlay=crystalfontz-cfa050_pi_m,= -+Params: captouch Enable capacitive touch display -+ -+ -+Name: cutiepi-panel -+Info: 8" TFT LCD display and touch panel used by cutiepi.io -+Load: dtoverlay=cutiepi-panel -+Params: -+ -+ -+Name: dacberry400 -+Info: Configures the dacberry400 add on soundcard -+Load: dtoverlay=dacberry400 -+Params: -+ -+ -+Name: dht11 -+Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors -+ Also sometimes found with the part number(s) AM230x. -+Load: dtoverlay=dht11,= -+Params: gpiopin GPIO connected to the sensor's DATA output. -+ (default 4) -+ -+ -+Name: dionaudio-kiwi -+Info: Configures the Dion Audio KIWI STREAMER -+Load: dtoverlay=dionaudio-kiwi -+Params: -+ -+ -+Name: dionaudio-loco -+Info: Configures the Dion Audio LOCO DAC-AMP -+Load: dtoverlay=dionaudio-loco -+Params: -+ -+ -+Name: dionaudio-loco-v2 -+Info: Configures the Dion Audio LOCO-V2 DAC-AMP -+Load: dtoverlay=dionaudio-loco-v2,= -+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec -+ Digital volume control. Enable with -+ "dtoverlay=hifiberry-dacplus,24db_digital_gain" -+ (The default behaviour is that the Digital -+ volume control is limited to a maximum of -+ 0dB. ie. it can attenuate but not provide -+ gain. For most users, this will be desired -+ as it will prevent clipping. By appending -+ the 24dB_digital_gain parameter, the Digital -+ volume control will allow up to 24dB of -+ gain. If this parameter is enabled, it is the -+ responsibility of the user to ensure that -+ the Digital volume control is set to a value -+ that does not result in clipping/distortion!) -+ -+ -+Name: disable-bt -+Info: Disable onboard Bluetooth on Pi 3B, 3B+, 3A+, 4B and Zero W, restoring -+ UART0/ttyAMA0 over GPIOs 14 & 15. -+ N.B. To disable the systemd service that initialises the modem so it -+ doesn't use the UART, use 'sudo systemctl disable hciuart'. -+Load: dtoverlay=disable-bt -+Params: -+ -+ -+Name: disable-emmc2 -+Info: Disable EMMC2 controller on BCM2711. -+ The allows the onboard EMMC storage on Compute Module 4 to be disabled -+ e.g. if a fault has occurred. -+Load: dtoverlay=disable-emmc2 -+Params: -+ -+ -+Name: disable-wifi -+Info: Disable onboard WLAN on Pi 3B, 3B+, 3A+, 4B and Zero W. -+Load: dtoverlay=disable-wifi -+Params: -+ -+ -+Name: dpi18 -+Info: Overlay for a generic 18-bit DPI display -+ This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output -+ 2-3 seconds after the kernel has started. -+Load: dtoverlay=dpi18 -+Params: -+ -+ -+Name: dpi18cpadhi -+Info: Overlay for a generic 18-bit DPI display (in 'mode 6' connection scheme) -+ This uses GPIOs 0-9,12-17,20-25 (so no I2C, uart etc.), and activates -+ the output 3-3 seconds after the kernel has started. -+Load: dtoverlay=dpi18cpadhi -+Params: -+ -+ -+Name: dpi24 -+Info: Overlay for a generic 24-bit DPI display -+ This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output -+ 2-3 seconds after the kernel has started. -+Load: dtoverlay=dpi24 -+Params: -+ -+ -+Name: draws -+Info: Configures the NW Digital Radio DRAWS Hat -+ -+ The board includes an ADC to measure various board values and also -+ provides two analog user inputs on the expansion header. The ADC -+ can be configured for various sample rates and gain values to adjust -+ the input range. Tables describing the two parameters follow. -+ -+ ADC Gain Values: -+ 0 = +/- 6.144V -+ 1 = +/- 4.096V -+ 2 = +/- 2.048V -+ 3 = +/- 1.024V -+ 4 = +/- 0.512V -+ 5 = +/- 0.256V -+ 6 = +/- 0.256V -+ 7 = +/- 0.256V -+ -+ ADC Datarate Values: -+ 0 = 128sps -+ 1 = 250sps -+ 2 = 490sps -+ 3 = 920sps -+ 4 = 1600sps (default) -+ 5 = 2400sps -+ 6 = 3300sps -+ 7 = 3300sps -+Load: dtoverlay=draws,= -+Params: draws_adc_ch4_gain Sets the full scale resolution of the ADCs -+ input voltage sensor (default 1) -+ -+ draws_adc_ch4_datarate Sets the datarate of the ADCs input voltage -+ sensor -+ -+ draws_adc_ch5_gain Sets the full scale resolution of the ADCs -+ 5V rail voltage sensor (default 1) -+ -+ draws_adc_ch5_datarate Sets the datarate of the ADCs 4V rail voltage -+ sensor -+ -+ draws_adc_ch6_gain Sets the full scale resolution of the ADCs -+ AIN2 input (default 2) -+ -+ draws_adc_ch6_datarate Sets the datarate of the ADCs AIN2 input -+ -+ draws_adc_ch7_gain Sets the full scale resolution of the ADCs -+ AIN3 input (default 2) -+ -+ draws_adc_ch7_datarate Sets the datarate of the ADCs AIN3 input -+ -+ alsaname Name of the ALSA audio device (default "draws") -+ -+ -+Name: dwc-otg -+Info: Selects the dwc_otg USB controller driver which has fiq support. This -+ is the default on all except the Pi Zero which defaults to dwc2. -+Load: dtoverlay=dwc-otg -+Params: -+ -+ -+Name: dwc2 -+Info: Selects the dwc2 USB controller driver -+Load: dtoverlay=dwc2,= -+Params: dr_mode Dual role mode: "host", "peripheral" or "otg" -+ -+ g-rx-fifo-size Size of rx fifo size in gadget mode -+ -+ g-np-tx-fifo-size Size of non-periodic tx fifo size in gadget -+ mode -+ -+ -+[ The ds1307-rtc overlay has been deleted. See i2c-rtc. ] -+ -+ -+Name: edt-ft5406 -+Info: Overlay for the EDT FT5406 touchscreen. -+ This works with the Raspberry Pi 7" touchscreen when not being polled -+ by the firmware. -+ By default the overlay uses the i2c_csi_dsi I2C interface, but this -+ can be overridden -+ You MUST use either "disable_touchscreen=1" or "ignore_lcd=1" in -+ config.txt to stop the firmware polling the touchscreen. -+Load: dtoverlay=edt-ft5406,= -+Params: sizex Touchscreen size x (default 800) -+ sizey Touchscreen size y (default 480) -+ invx Touchscreen inverted x axis -+ invy Touchscreen inverted y axis -+ swapxy Touchscreen swapped x y axis -+ i2c0 Choose the I2C0 bus on GPIOs 0&1 -+ i2c1 Choose the I2C1 bus on GPIOs 2&3 -+ i2c3 Choose the I2C3 bus (configure with the i2c3 -+ overlay - BCM2711 only) -+ i2c4 Choose the I2C4 bus (configure with the i2c4 -+ overlay - BCM2711 only) -+ i2c5 Choose the I2C5 bus (configure with the i2c5 -+ overlay - BCM2711 only) -+ i2c6 Choose the I2C6 bus (configure with the i2c6 -+ overlay - BCM2711 only) -+ addr Sets the address for the touch controller. Note -+ that the device must be configured to use the -+ specified address. -+ -+ -+Name: enc28j60 -+Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI0 -+Load: dtoverlay=enc28j60,= -+Params: int_pin GPIO used for INT (default 25) -+ -+ speed SPI bus speed (default 12000000) -+ -+ -+Name: enc28j60-spi2 -+Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI2 -+Load: dtoverlay=enc28j60-spi2,= -+Params: int_pin GPIO used for INT (default 39) -+ -+ speed SPI bus speed (default 12000000) -+ -+ -+Name: exc3000 -+Info: Enables I2C connected EETI EXC3000 multiple touch controller using -+ GPIO 4 (pin 7 on GPIO header) for interrupt. -+Load: dtoverlay=exc3000,= -+Params: interrupt GPIO used for interrupt (default 4) -+ sizex Touchscreen size x (default 4096) -+ sizey Touchscreen size y (default 4096) -+ invx Touchscreen inverted x axis -+ invy Touchscreen inverted y axis -+ swapxy Touchscreen swapped x y axis -+ -+ -+Name: fbtft -+Info: Overlay for SPI-connected displays using the fbtft drivers. -+ -+ This overlay seeks to replace the functionality provided by fbtft_device -+ which is now gone from the kernel. -+ -+ Most displays from fbtft_device have been ported over. -+ Example: -+ dtoverlay=fbtft,spi0-0,rpi-display,reset_pin=23,dc_pin=24,led_pin=18,rotate=270 -+ -+ It is also possible to specify the controller (this will use the default -+ init sequence in the driver). -+ Example: -+ dtoverlay=fbtft,spi0-0,ili9341,bgr,reset_pin=23,dc_pin=24,led_pin=18,rotate=270 -+ -+ For devices on spi1 or spi2, the interfaces should be enabled -+ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays. -+ -+ The following features of fbtft_device have not been ported over: -+ - parallel bus is not supported -+ - the init property which overrides the controller initialization -+ sequence is not supported as a parameter due to memory limitations in -+ the bootloader responsible for applying the overlay. -+ -+ See https://github.com/notro/fbtft/wiki/FBTFT-RPI-overlays for how to -+ create an overlay. -+ -+Load: dtoverlay=fbtft,= -+Params: -+ spi- Configure device at spi, cs -+ (boolean, required) -+ speed SPI bus speed in Hz (default 32000000) -+ cpha Shifted clock phase (CPHA) mode -+ cpol Inverse clock polarity (CPOL) mode -+ -+ adafruit18 Adafruit 1.8 -+ adafruit22 Adafruit 2.2 (old) -+ adafruit22a Adafruit 2.2 -+ adafruit28 Adafruit 2.8 -+ adafruit13m Adafruit 1.3 OLED -+ admatec_c-berry28 C-Berry28 -+ dogs102 EA DOGS102 -+ er_tftm050_2 ER-TFTM070-2 -+ er_tftm070_5 ER-TFTM070-5 -+ ew24ha0 EW24HA0 -+ ew24ha0_9bit EW24HA0 in 9-bit mode -+ freetronicsoled128 Freetronics OLED128 -+ hy28a HY28A -+ hy28b HY28B -+ itdb28_spi ITDB02-2.8 with SPI interface circuit -+ mi0283qt-2 Watterott MI0283QT-2 -+ mi0283qt-9a Watterott MI0283QT-9A -+ nokia3310 Nokia 3310 -+ nokia3310a Nokia 3310a -+ nokia5110 Nokia 5110 -+ piscreen PiScreen -+ pitft Adafruit PiTFT 2.8 -+ pioled ILSoft OLED -+ rpi-display Watterott rpi-display -+ sainsmart18 Sainsmart 1.8 -+ sainsmart32_spi Sainsmart 3.2 with SPI interfce circuit -+ tinylcd35 TinyLCD 3.5 -+ tm022hdh26 Tianma TM022HDH26 -+ tontec35_9481 Tontect 3.5 with ILI9481 controller -+ tontec35_9486 Tontect 3.5 with ILI9486 controller -+ waveshare32b Waveshare 3.2 -+ waveshare22 Waveshare 2.2 -+ -+ bd663474 BD663474 display controller -+ hx8340bn HX8340BN display controller -+ hx8347d HX8347D display controller -+ hx8353d HX8353D display controller -+ hx8357d HX8357D display controller -+ ili9163 ILI9163 display controller -+ ili9320 ILI9320 display controller -+ ili9325 ILI9325 display controller -+ ili9340 ILI9340 display controller -+ ili9341 ILI9341 display controller -+ ili9481 ILI9481 display controller -+ ili9486 ILI9486 display controller -+ pcd8544 PCD8544 display controller -+ ra8875 RA8875 display controller -+ s6d02a1 S6D02A1 display controller -+ s6d1121 S6D1121 display controller -+ seps525 SEPS525 display controller -+ sh1106 SH1106 display controller -+ ssd1289 SSD1289 display controller -+ ssd1305 SSD1305 display controller -+ ssd1306 SSD1306 display controller -+ ssd1325 SSD1325 display controller -+ ssd1331 SSD1331 display controller -+ ssd1351 SSD1351 display controller -+ st7735r ST7735R display controller -+ st7789v ST7789V display controller -+ tls8204 TLS8204 display controller -+ uc1611 UC1611 display controller -+ uc1701 UC1701 display controller -+ upd161704 UPD161704 display controller -+ -+ width Display width in pixels -+ height Display height in pixels -+ regwidth Display controller register width (default is -+ driver specific) -+ buswidth Display bus interface width (default 8) -+ debug Debug output level {0-7} -+ rotate Display rotation {0, 90, 180, 270} (counter -+ clockwise). Not supported by all drivers. -+ bgr Enable BGR mode (default off). Use if Red and -+ Blue are swapped. Not supported by all drivers. -+ fps Frames per second (default 30). In effect this -+ states how long the driver will wait after video -+ memory has been changed until display update -+ transfer is started. -+ txbuflen Length of the FBTFT transmit buffer -+ (default 4096) -+ startbyte Sets the Start byte used by fb_ili9320, -+ fb_ili9325 and fb_hx8347d. Common value is 0x70. -+ gamma String representation of Gamma Curve(s). Driver -+ specific. Not supported by all drivers. -+ reset_pin GPIO pin for RESET -+ dc_pin GPIO pin for D/C -+ led_pin GPIO pin for LED backlight -+ -+ -+Name: fe-pi-audio -+Info: Configures the Fe-Pi Audio Sound Card -+Load: dtoverlay=fe-pi-audio -+Params: -+ -+ -+Name: fsm-demo -+Info: A demonstration of the gpio-fsm driver. The GPIOs are chosen to work -+ nicely with a "traffic-light" display of red, amber and green LEDs on -+ GPIOs 7, 8 and 25 respectively. -+Load: dtoverlay=fsm-demo,= -+Params: fsm_debug Enable debug logging (default off) -+ -+ -+Name: gc9a01 -+Info: Enables GalaxyCore's GC9A01 single chip driver based displays on -+ SPI0 as fb1, using GPIOs DC=25, RST=27 and BL=18 (physical -+ GPIO header pins 22, 13 and 12 respectively) in addition to the -+ SPI0 pins DIN=10, CLK=11 and CS=8 (physical GPIO header pins 19, -+ 23 and 24 respectively). -+Load: dtoverlay=gc9a01,= -+Params: speed Display SPI bus speed -+ -+ rotate Display rotation {0,90,180,270} -+ -+ width Width of the display -+ -+ height Height of the display -+ -+ fps Delay between frame updates -+ -+ debug Debug output level {0-7} -+ -+ -+Name: ghost-amp -+Info: An overlay for the Ghost amplifier. -+Load: dtoverlay=ghost-amp,= -+Params: fsm_debug Enable debug logging of the GPIO FSM (default -+ off) -+ -+ -+Name: goodix -+Info: Enables I2C connected Goodix gt9271 multiple touch controller using -+ GPIOs 4 and 17 (pins 7 and 11 on GPIO header) for interrupt and reset. -+Load: dtoverlay=goodix,= -+Params: interrupt GPIO used for interrupt (default 4) -+ reset GPIO used for reset (default 17) -+ -+ -+Name: googlevoicehat-soundcard -+Info: Configures the Google voiceHAT soundcard -+Load: dtoverlay=googlevoicehat-soundcard -+Params: -+ -+ -+Name: gpio-charger -+Info: This is a generic overlay for detecting charger with GPIO. -+Load: dtoverlay=gpio-charger,= -+Params: gpio GPIO pin to trigger on (default 4) -+ active_low When this is 1 (active low), a falling -+ edge generates a charging event and a -+ rising edge generates a discharging event. -+ When this is 0 (active high), this is -+ reversed. The default is 0 (active high) -+ gpio_pull Desired pull-up/down state (off, down, up) -+ Default is "down". -+ type Set a charger type for the pin. (Default: mains) -+ -+ -+Name: gpio-fan -+Info: Configure a GPIO pin to control a cooling fan. -+Load: dtoverlay=gpio-fan,= -+Params: gpiopin GPIO used to control the fan (default 12) -+ temp Temperature at which the fan switches on, in -+ millicelcius (default 55000) -+ hyst Temperature delta (in millicelcius) below -+ temp at which the fan will drop to minrpm -+ (default 10000) -+ -+ -+Name: gpio-hog -+Info: Activate a "hog" for a GPIO - request that the kernel configures it as -+ an output, driven low or high as indicated by the presence or absence -+ of the active_low parameter. Note that a hogged GPIO is not available -+ to other drivers or for gpioset/gpioget. -+Load: dtoverlay=gpio-hog,= -+Params: gpio GPIO pin to hog (default 26) -+ active_low If set, the hog drives the GPIO low (defaults -+ to off - the GPIO is driven high) -+ -+ -+Name: gpio-ir -+Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core- -+ based gpio_ir_recv driver maps received keys directly to a -+ /dev/input/event* device, all decoding is done by the kernel - LIRC is -+ not required! The key mapping and other decoding parameters can be -+ configured by "ir-keytable" tool. -+Load: dtoverlay=gpio-ir,= -+Params: gpio_pin Input pin number. Default is 18. -+ -+ gpio_pull Desired pull-up/down state (off, down, up) -+ Default is "up". -+ -+ invert "1" = invert the input (active-low signalling). -+ "0" = non-inverted input (active-high -+ signalling). Default is "1". -+ -+ rc-map-name Default rc keymap (can also be changed by -+ ir-keytable), defaults to "rc-rc6-mce" -+ -+ -+Name: gpio-ir-tx -+Info: Use GPIO pin as bit-banged infrared transmitter output. -+ This is an alternative to "pwm-ir-tx". gpio-ir-tx doesn't require -+ a PWM so it can be used together with onboard analog audio. -+Load: dtoverlay=gpio-ir-tx,= -+Params: gpio_pin Output GPIO (default 18) -+ -+ invert "1" = invert the output (make it active-low). -+ Default is "0" (active-high). -+ -+ -+Name: gpio-key -+Info: This is a generic overlay for activating GPIO keypresses using -+ the gpio-keys library and this dtoverlay. Multiple keys can be -+ set up using multiple calls to the overlay for configuring -+ additional buttons or joysticks. You can see available keycodes -+ at https://github.com/torvalds/linux/blob/v4.12/include/uapi/ -+ linux/input-event-codes.h#L64 -+Load: dtoverlay=gpio-key,= -+Params: gpio GPIO pin to trigger on (default 3) -+ active_low When this is 1 (active low), a falling -+ edge generates a key down event and a -+ rising edge generates a key up event. -+ When this is 0 (active high), this is -+ reversed. The default is 1 (active low) -+ gpio_pull Desired pull-up/down state (off, down, up) -+ Default is "up". Note that the default pin -+ (GPIO3) has an external pullup -+ label Set a label for the key -+ keycode Set the key code for the button -+ -+ -+ -+Name: gpio-led -+Info: This is a generic overlay for activating LEDs (or any other component) -+ by a GPIO pin. Multiple LEDs can be set up using multiple calls to the -+ overlay. While there are many existing methods to activate LEDs on the -+ RPi, this method offers some advantages: -+ 1) Does not require any userspace programs. -+ 2) LEDs can be connected to the kernel's led-trigger framework, -+ and drive the LED based on triggers such as cpu load, heartbeat, -+ kernel panic, key input, timers and others. -+ 3) LED can be tied to the input state of another GPIO pin. -+ 4) The LED is setup early during the kernel boot process (useful -+ for cpu/heartbeat/panic triggers). -+ -+ Typical electrical connection is: -+ RPI-GPIO.19 -> LED -> 300ohm resister -> RPI-GND -+ The GPIO pin number can be changed with the 'gpio=' parameter. -+ -+ To control an LED from userspace, write a 0 or 1 value: -+ echo 1 > /sys/class/leds/myled1/brightness -+ The 'myled1' name can be changed with the 'label=' parameter. -+ -+ To connect the LED to a kernel trigger from userspace: -+ echo cpu > /sys/class/leds/myled1/trigger -+ echo heartbeat > /sys/class/leds/myled1/trigger -+ echo none > /sys/class/leds/myled1/trigger -+ To connect the LED to GPIO.26 pin (physical pin 37): -+ echo gpio > /sys/class/leds/myled1/trigger -+ echo 26 > /sys/class/leds/myled1/gpio -+ Available triggers: -+ cat /sys/class/leds/myled1/trigger -+ -+ More information about the Linux kernel LED/Trigger system: -+ https://www.kernel.org/doc/Documentation/leds/leds-class.rst -+ https://www.kernel.org/doc/Documentation/leds/ledtrig-oneshot.rst -+Load: dtoverlay=gpio-led,= -+Params: gpio GPIO pin connected to the LED (default 19) -+ label The label for this LED. It will appear under -+ /sys/class/leds/