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https://github.com/nyanmisaka/ffmpeg-rockchip.git
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swscale: convert rgb/bgr24ToY/UV_mmx functions from inline asm to yasm.
Also implement sse2/ssse3/avx versions.
This commit is contained in:
@@ -26,8 +26,279 @@
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SECTION_RODATA
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%define RY 0x20DE
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%define GY 0x4087
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%define BY 0x0C88
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%define RU 0xECFF
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%define GU 0xDAC8
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%define BU 0x3838
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%define RV 0x3838
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%define GV 0xD0E3
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%define BV 0xF6E4
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rgb_Yrnd: times 4 dd 0x84000 ; 16.5 << 15
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rgb_UVrnd: times 4 dd 0x404000 ; 128.5 << 15
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bgr_Ycoeff_12x4: times 2 dw BY, GY, 0, BY
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bgr_Ycoeff_3x56: times 2 dw RY, 0, GY, RY
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rgb_Ycoeff_12x4: times 2 dw RY, GY, 0, RY
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rgb_Ycoeff_3x56: times 2 dw BY, 0, GY, BY
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bgr_Ucoeff_12x4: times 2 dw BU, GU, 0, BU
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bgr_Ucoeff_3x56: times 2 dw RU, 0, GU, RU
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rgb_Ucoeff_12x4: times 2 dw RU, GU, 0, RU
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rgb_Ucoeff_3x56: times 2 dw BU, 0, GU, BU
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bgr_Vcoeff_12x4: times 2 dw BV, GV, 0, BV
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bgr_Vcoeff_3x56: times 2 dw RV, 0, GV, RV
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rgb_Vcoeff_12x4: times 2 dw RV, GV, 0, RV
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rgb_Vcoeff_3x56: times 2 dw BV, 0, GV, BV
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shuf_rgb_12x4: db 0, 0x80, 1, 0x80, 2, 0x80, 3, 0x80, \
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6, 0x80, 7, 0x80, 8, 0x80, 9, 0x80
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shuf_rgb_3x56: db 2, 0x80, 3, 0x80, 4, 0x80, 5, 0x80, \
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8, 0x80, 9, 0x80, 10, 0x80, 11, 0x80
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SECTION .text
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;-----------------------------------------------------------------------------
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; RGB to Y/UV.
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;
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; void <fmt>ToY_<opt>(uint8_t *dst, const uint8_t *src, int w);
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; and
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; void <fmt>toUV_<opt>(uint8_t *dstU, uint8_t *dstV, const uint8_t *src,
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; const uint8_t *unused, int w);
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;-----------------------------------------------------------------------------
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; %1 = nr. of XMM registers
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; %2 = rgb or bgr
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%macro RGB24_TO_Y_FN 2-3
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cglobal %2 %+ 24ToY, 3, 3, %1, dst, src, w
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%if mmsize == 8
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mova m5, [%2_Ycoeff_12x4]
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mova m6, [%2_Ycoeff_3x56]
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%define coeff1 m5
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%define coeff2 m6
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%elif ARCH_X86_64
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mova m8, [%2_Ycoeff_12x4]
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mova m9, [%2_Ycoeff_3x56]
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%define coeff1 m8
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%define coeff2 m9
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%else ; x86-32 && mmsize == 16
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%define coeff1 [%2_Ycoeff_12x4]
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%define coeff2 [%2_Ycoeff_3x56]
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%endif ; x86-32/64 && mmsize == 8/16
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%if (ARCH_X86_64 || mmsize == 8) && %0 == 3
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jmp mangle(program_name %+ _ %+ %3 %+ 24ToY %+ SUFFIX).body
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%else ; (ARCH_X86_64 && %0 == 3) || mmsize == 8
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.body:
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%if cpuflag(ssse3)
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mova m7, [shuf_rgb_12x4]
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%define shuf_rgb1 m7
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%if ARCH_X86_64
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mova m10, [shuf_rgb_3x56]
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%define shuf_rgb2 m10
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%else ; x86-32
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%define shuf_rgb2 [shuf_rgb_3x56]
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%endif ; x86-32/64
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%endif ; cpuflag(ssse3)
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%if ARCH_X86_64
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movsxd wq, wd
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%endif
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add dstq, wq
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neg wq
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%if notcpuflag(ssse3)
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pxor m7, m7
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%endif ; !cpuflag(ssse3)
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mova m4, [rgb_Yrnd]
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.loop:
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%if cpuflag(ssse3)
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movu m0, [srcq+0] ; (byte) { Bx, Gx, Rx }[0-3]
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movu m2, [srcq+12] ; (byte) { Bx, Gx, Rx }[4-7]
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pshufb m1, m0, shuf_rgb2 ; (word) { R0, B1, G1, R1, R2, B3, G3, R3 }
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pshufb m0, shuf_rgb1 ; (word) { B0, G0, R0, B1, B2, G2, R2, B3 }
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pshufb m3, m2, shuf_rgb2 ; (word) { R4, B5, G5, R5, R6, B7, G7, R7 }
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pshufb m2, shuf_rgb1 ; (word) { B4, G4, R4, B5, B6, G6, R6, B7 }
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%else ; !cpuflag(ssse3)
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movd m0, [srcq+0] ; (byte) { B0, G0, R0, B1 }
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movd m1, [srcq+2] ; (byte) { R0, B1, G1, R1 }
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movd m2, [srcq+6] ; (byte) { B2, G2, R2, B3 }
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movd m3, [srcq+8] ; (byte) { R2, B3, G3, R3 }
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%if mmsize == 16 ; i.e. sse2
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punpckldq m0, m2 ; (byte) { B0, G0, R0, B1, B2, G2, R2, B3 }
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punpckldq m1, m3 ; (byte) { R0, B1, G1, R1, R2, B3, G3, R3 }
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movd m2, [srcq+12] ; (byte) { B4, G4, R4, B5 }
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movd m3, [srcq+14] ; (byte) { R4, B5, G5, R5 }
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movd m5, [srcq+18] ; (byte) { B6, G6, R6, B7 }
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movd m6, [srcq+20] ; (byte) { R6, B7, G7, R7 }
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punpckldq m2, m5 ; (byte) { B4, G4, R4, B5, B6, G6, R6, B7 }
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punpckldq m3, m6 ; (byte) { R4, B5, G5, R5, R6, B7, G7, R7 }
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%endif ; mmsize == 16
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punpcklbw m0, m7 ; (word) { B0, G0, R0, B1, B2, G2, R2, B3 }
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punpcklbw m1, m7 ; (word) { R0, B1, G1, R1, R2, B3, G3, R3 }
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punpcklbw m2, m7 ; (word) { B4, G4, R4, B5, B6, G6, R6, B7 }
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punpcklbw m3, m7 ; (word) { R4, B5, G5, R5, R6, B7, G7, R7 }
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%endif ; cpuflag(ssse3)
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add srcq, 3 * mmsize / 2
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pmaddwd m0, coeff1 ; (dword) { B0*BY + G0*GY, B1*BY, B2*BY + G2*GY, B3*BY }
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pmaddwd m1, coeff2 ; (dword) { R0*RY, G1+GY + R1*RY, R2*RY, G3+GY + R3*RY }
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pmaddwd m2, coeff1 ; (dword) { B4*BY + G4*GY, B5*BY, B6*BY + G6*GY, B7*BY }
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pmaddwd m3, coeff2 ; (dword) { R4*RY, G5+GY + R5*RY, R6*RY, G7+GY + R7*RY }
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paddd m0, m1 ; (dword) { Bx*BY + Gx*GY + Rx*RY }[0-3]
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paddd m2, m3 ; (dword) { Bx*BY + Gx*GY + Rx*RY }[4-7]
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paddd m0, m4 ; += rgb_Yrnd, i.e. (dword) { Y[0-3] }
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paddd m2, m4 ; += rgb_Yrnd, i.e. (dword) { Y[4-7] }
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psrad m0, 15
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psrad m2, 15
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packssdw m0, m2 ; (word) { Y[0-7] }
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packuswb m0, m0 ; (byte) { Y[0-7] }
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movh [dstq+wq], m0
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add wq, mmsize / 2
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jl .loop
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REP_RET
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%endif ; (ARCH_X86_64 && %0 == 3) || mmsize == 8
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%endmacro
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; %1 = nr. of XMM registers
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; %2 = rgb or bgr
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%macro RGB24_TO_UV_FN 2-3
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cglobal %2 %+ 24ToUV, 3, 4, %1, dstU, dstV, src, w
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%if ARCH_X86_64
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mova m8, [%2_Ucoeff_12x4]
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mova m9, [%2_Ucoeff_3x56]
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mova m10, [%2_Vcoeff_12x4]
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mova m11, [%2_Vcoeff_3x56]
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%define coeffU1 m8
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%define coeffU2 m9
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%define coeffV1 m10
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%define coeffV2 m11
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%else ; x86-32
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%define coeffU1 [%2_Ucoeff_12x4]
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%define coeffU2 [%2_Ucoeff_3x56]
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%define coeffV1 [%2_Vcoeff_12x4]
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%define coeffV2 [%2_Vcoeff_3x56]
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%endif ; x86-32/64
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%if ARCH_X86_64 && %0 == 3
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jmp mangle(program_name %+ _ %+ %3 %+ 24ToUV %+ SUFFIX).body
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%else ; ARCH_X86_64 && %0 == 3
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.body:
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%if cpuflag(ssse3)
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mova m7, [shuf_rgb_12x4]
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%define shuf_rgb1 m7
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%if ARCH_X86_64
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mova m12, [shuf_rgb_3x56]
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%define shuf_rgb2 m12
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%else ; x86-32
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%define shuf_rgb2 [shuf_rgb_3x56]
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%endif ; x86-32/64
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%endif ; cpuflag(ssse3)
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%if ARCH_X86_64
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movsxd wq, dword r4m
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%else ; x86-32
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mov wq, r4m
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%endif
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add dstUq, wq
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add dstVq, wq
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neg wq
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mova m6, [rgb_UVrnd]
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%if notcpuflag(ssse3)
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pxor m7, m7
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%endif
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.loop:
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%if cpuflag(ssse3)
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movu m0, [srcq+0] ; (byte) { Bx, Gx, Rx }[0-3]
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movu m4, [srcq+12] ; (byte) { Bx, Gx, Rx }[4-7]
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pshufb m1, m0, shuf_rgb2 ; (word) { R0, B1, G1, R1, R2, B3, G3, R3 }
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pshufb m0, shuf_rgb1 ; (word) { B0, G0, R0, B1, B2, G2, R2, B3 }
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%else ; !cpuflag(ssse3)
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movd m0, [srcq+0] ; (byte) { B0, G0, R0, B1 }
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movd m1, [srcq+2] ; (byte) { R0, B1, G1, R1 }
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movd m4, [srcq+6] ; (byte) { B2, G2, R2, B3 }
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movd m5, [srcq+8] ; (byte) { R2, B3, G3, R3 }
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%if mmsize == 16
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punpckldq m0, m4 ; (byte) { B0, G0, R0, B1, B2, G2, R2, B3 }
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punpckldq m1, m5 ; (byte) { R0, B1, G1, R1, R2, B3, G3, R3 }
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movd m4, [srcq+12] ; (byte) { B4, G4, R4, B5 }
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movd m5, [srcq+14] ; (byte) { R4, B5, G5, R5 }
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%endif ; mmsize == 16
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punpcklbw m0, m7 ; (word) { B0, G0, R0, B1, B2, G2, R2, B3 }
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punpcklbw m1, m7 ; (word) { R0, B1, G1, R1, R2, B3, G3, R3 }
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%endif ; cpuflag(ssse3)
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pmaddwd m2, m0, coeffV1 ; (dword) { B0*BV + G0*GV, B1*BV, B2*BV + G2*GV, B3*BV }
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pmaddwd m3, m1, coeffV2 ; (dword) { R0*BV, G1*GV + R1*BV, R2*BV, G3*GV + R3*BV }
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pmaddwd m0, coeffU1 ; (dword) { B0*BU + G0*GU, B1*BU, B2*BU + G2*GU, B3*BU }
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pmaddwd m1, coeffU2 ; (dword) { R0*BU, G1*GU + R1*BU, R2*BU, G3*GU + R3*BU }
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paddd m0, m1 ; (dword) { Bx*BU + Gx*GU + Rx*RU }[0-3]
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paddd m2, m3 ; (dword) { Bx*BV + Gx*GV + Rx*RV }[0-3]
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%if cpuflag(ssse3)
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pshufb m5, m4, shuf_rgb2 ; (word) { R4, B5, G5, R5, R6, B7, G7, R7 }
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pshufb m4, shuf_rgb1 ; (word) { B4, G4, R4, B5, B6, G6, R6, B7 }
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%else ; !cpuflag(ssse3)
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%if mmsize == 16
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movd m1, [srcq+18] ; (byte) { B6, G6, R6, B7 }
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movd m3, [srcq+20] ; (byte) { R6, B7, G7, R7 }
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punpckldq m4, m1 ; (byte) { B4, G4, R4, B5, B6, G6, R6, B7 }
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punpckldq m5, m3 ; (byte) { R4, B5, G5, R5, R6, B7, G7, R7 }
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%endif ; mmsize == 16 && !cpuflag(ssse3)
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punpcklbw m4, m7 ; (word) { B4, G4, R4, B5, B6, G6, R6, B7 }
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punpcklbw m5, m7 ; (word) { R4, B5, G5, R5, R6, B7, G7, R7 }
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%endif ; cpuflag(ssse3)
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add srcq, 3 * mmsize / 2
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pmaddwd m1, m4, coeffU1 ; (dword) { B4*BU + G4*GU, B5*BU, B6*BU + G6*GU, B7*BU }
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pmaddwd m3, m5, coeffU2 ; (dword) { R4*BU, G5*GU + R5*BU, R6*BU, G7*GU + R7*BU }
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pmaddwd m4, coeffV1 ; (dword) { B4*BV + G4*GV, B5*BV, B6*BV + G6*GV, B7*BV }
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pmaddwd m5, coeffV2 ; (dword) { R4*BV, G5*GV + R5*BV, R6*BV, G7*GV + R7*BV }
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paddd m1, m3 ; (dword) { Bx*BU + Gx*GU + Rx*RU }[4-7]
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paddd m4, m5 ; (dword) { Bx*BV + Gx*GV + Rx*RV }[4-7]
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paddd m0, m6 ; += rgb_UVrnd, i.e. (dword) { U[0-3] }
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paddd m2, m6 ; += rgb_UVrnd, i.e. (dword) { V[0-3] }
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paddd m1, m6 ; += rgb_UVrnd, i.e. (dword) { U[4-7] }
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paddd m4, m6 ; += rgb_UVrnd, i.e. (dword) { V[4-7] }
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psrad m0, 15
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psrad m2, 15
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psrad m1, 15
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psrad m4, 15
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packssdw m0, m1 ; (word) { U[0-7] }
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packssdw m2, m4 ; (word) { V[0-7] }
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%if mmsize == 8
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packuswb m0, m0 ; (byte) { U[0-3] }
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packuswb m2, m2 ; (byte) { V[0-3] }
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movh [dstUq+wq], m0
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movh [dstVq+wq], m2
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%else ; mmsize == 16
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packuswb m0, m2 ; (byte) { U[0-7], V[0-7] }
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movh [dstUq+wq], m0
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movhps [dstVq+wq], m0
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%endif ; mmsize == 8/16
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add wq, mmsize / 2
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jl .loop
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REP_RET
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%endif ; ARCH_X86_64 && %0 == 3
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%endmacro
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%if ARCH_X86_32
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INIT_MMX mmx
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RGB24_TO_Y_FN 0, rgb
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RGB24_TO_Y_FN 0, bgr, rgb
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RGB24_TO_UV_FN 0, rgb
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RGB24_TO_UV_FN 0, bgr, rgb
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%endif
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INIT_XMM sse2
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RGB24_TO_Y_FN 10, rgb
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RGB24_TO_Y_FN 10, bgr, rgb
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RGB24_TO_UV_FN 12, rgb
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RGB24_TO_UV_FN 12, bgr, rgb
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INIT_XMM ssse3
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RGB24_TO_Y_FN 11, rgb
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RGB24_TO_Y_FN 11, bgr, rgb
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RGB24_TO_UV_FN 13, rgb
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RGB24_TO_UV_FN 13, bgr, rgb
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INIT_XMM avx
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RGB24_TO_Y_FN 11, rgb
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RGB24_TO_Y_FN 11, bgr, rgb
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RGB24_TO_UV_FN 13, rgb
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RGB24_TO_UV_FN 13, bgr, rgb
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;-----------------------------------------------------------------------------
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; YUYV/UYVY/NV12/NV21 packed pixel shuffling.
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;
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